i.MX95 DISPLAY STREAM_CSR includes registers to control DSI PHY settings. Add dt-schema for it.
Signed-off-by: Marek Vasut <[email protected]> --- Cc: Abel Vesa <[email protected]> Cc: Conor Dooley <[email protected]> Cc: Fabio Estevam <[email protected]> Cc: Krzysztof Kozlowski <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Liu Ying <[email protected]> Cc: Lucas Stach <[email protected]> Cc: Peng Fan <[email protected]> Cc: Pengutronix Kernel Team <[email protected]> Cc: Rob Herring <[email protected]> Cc: Shawn Guo <[email protected]> Cc: Thomas Zimmermann <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] --- .../imx/nxp,imx95-display-stream-csr.yaml | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx95-display-stream-csr.yaml diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx95-display-stream-csr.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx95-display-stream-csr.yaml new file mode 100644 index 0000000000000..61153120c9378 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx95-display-stream-csr.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/nxp,imx95-display-stream-csr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX95 Display Stream Block Control + +maintainers: + - Marek Vasut <[email protected]> + +properties: + compatible: + items: + - enum: + - nxp,imx95-display-stream-csr + - nxp,imx95-master-stream-csr + - nxp,imx95-mipi-tx-phy-csr + - const: syscon + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + +additionalProperties: false + +examples: + - | + syscon@4ad00000 { + compatible = "nxp,imx95-display-stream-csr", "syscon"; + reg = <0x4ad00000 0x10000>; + clocks = <&scmi_clk 62>; + }; +... -- 2.51.0
