@@ -2016,8 +2016,9 @@ TypeInfo ASTContext::getTypeInfoImpl(const Type *T) const
{
case Type::Vector: {
const auto *VT = cast(T);
TypeInfo EltInfo = getTypeInfo(VT->getElementType());
-Width = VT->isExtVectorBoolType() ? VT->getNumElements()
-
@@ -2016,8 +2016,9 @@ TypeInfo ASTContext::getTypeInfoImpl(const Type *T) const
{
case Type::Vector: {
const auto *VT = cast(T);
TypeInfo EltInfo = getTypeInfo(VT->getElementType());
-Width = VT->isExtVectorBoolType() ? VT->getNumElements()
-
@@ -1984,6 +1984,15 @@ llvm::Constant
*ConstantEmitter::emitForMemory(CodeGenModule &CGM,
return Res;
}
+ // In HLSL bool vectors are stored in memory as a vector of i32
+ if (destType->isExtVectorBoolType() && CGM.getContext().getLangOpts().HLSL) {
+llvm::Type *b
@@ -14857,6 +14857,7 @@ bool IntExprEvaluator::VisitCastExpr(const CastExpr *E)
{
case CK_FixedPointCast:
case CK_IntegralToFixedPoint:
case CK_MatrixCast:
+// TODO does CK_HLSLAggregateCast belong here?
spall wrote:
It can, and I do need to remove
@@ -14857,6 +14857,7 @@ bool IntExprEvaluator::VisitCastExpr(const CastExpr *E)
{
case CK_FixedPointCast:
case CK_IntegralToFixedPoint:
case CK_MatrixCast:
+// TODO does CK_HLSLAggregateCast belong here?
spall wrote:
You can truncate (for example) a
@@ -6358,3 +6359,81 @@ RValue CodeGenFunction::EmitPseudoObjectRValue(const
PseudoObjectExpr *E,
LValue CodeGenFunction::EmitPseudoObjectLValue(const PseudoObjectExpr *E) {
return emitPseudoObjectExpr(*this, E, true, AggValueSlot::ignored()).LV;
}
+
+void CodeGenFunction::Fl
@@ -2016,8 +2016,9 @@ TypeInfo ASTContext::getTypeInfoImpl(const Type *T) const
{
case Type::Vector: {
const auto *VT = cast(T);
TypeInfo EltInfo = getTypeInfo(VT->getElementType());
-Width = VT->isExtVectorBoolType() ? VT->getNumElements()
-
https://github.com/spall closed https://github.com/llvm/llvm-project/pull/126258
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https://github.com/llvm/llvm-project/pull/126561
Desugar type when converting from a ConstantArrayType to an ArrayParameterType
in getArrayParameterType
Closes #125743
>From 199395c935fc1da70db91bba94a1ea86afb83bf9 Mon Sep 17 00:00:00 2001
From: Sarah Spall
D
@@ -6358,3 +6359,81 @@ RValue CodeGenFunction::EmitPseudoObjectRValue(const
PseudoObjectExpr *E,
LValue CodeGenFunction::EmitPseudoObjectLValue(const PseudoObjectExpr *E) {
return emitPseudoObjectExpr(*this, E, true, AggValueSlot::ignored()).LV;
}
+
+void CodeGenFunction::Fl
spall wrote:
> Hi,
>
> We usually ask to include the reason for the revert in the commit message.
I apologize, there was a buildbot failure which seemed to be caused by the
reverted commit.
https://github.com/llvm/llvm-project/pull/126149
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Reverts llvm/llvm-project#118842
>From 6fd9dd96b0cd68d9bb04e791f90ec8ef5211563a Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Thu, 6 Feb 2025 15:17:49 -0800
Subject: [PATCH] Revert "[HLSL] Implement HLSL Flat
spall wrote:
> One small request: can you add a test that verifies we produce an error if
> you try to cast to or from a structure containing a bitfield?
I think I already did this
clang/test/SemaHLSL/Language/ElementwiseCast-errors.hlsl
https://github.com/llvm/llvm-project/pull/118842
__
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https://github.com/llvm/llvm-project/pull/118992
>From e994824f3630ee8b224afceb6c14d980c9013112 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Fri, 6 Dec 2024 05:14:17 +
Subject: [PATCH 01/11] splat cast wip
---
clang/include/clang/AST/OperationKinds.def
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/118992
>From e994824f3630ee8b224afceb6c14d980c9013112 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Fri, 6 Dec 2024 05:14:17 +
Subject: [PATCH 01/13] splat cast wip
---
clang/include/clang/AST/OperationKinds.def
https://github.com/spall ready_for_review
https://github.com/llvm/llvm-project/pull/118992
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@@ -2064,6 +2064,9 @@ llvm::Value *CodeGenFunction::EmitToMemory(llvm::Value
*Value, QualType Ty) {
if (Ty->isExtVectorBoolType()) {
spall wrote:
My intention was to replace calls to 'isExtVectorBoolType' and
'isPackedVectorBoolType' anywhere we want an hl
https://github.com/spall edited https://github.com/llvm/llvm-project/pull/123977
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>From 50f8b16bf83d70cc37f2ac7e70c9195a4c4cda02 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Thu, 16 Jan 2025 01:32:25 +
Subject: [PATCH 01/10] wip
---
clang/lib/CodeGen/CGExpr.cpp | 19
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/123977
>From 50f8b16bf83d70cc37f2ac7e70c9195a4c4cda02 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Thu, 16 Jan 2025 01:32:25 +
Subject: [PATCH 1/8] wip
---
clang/lib/CodeGen/CGExpr.cpp | 19 ++
@@ -0,0 +1,52 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes -o - %s |
FileCheck %s
+
+// CHECK: %struct.S = type { <2 x i32>, float }
+// CHECK: [[ConstS:@.*]] = private unnamed_addr constant %struct.S { <2
@@ -110,6 +131,24 @@ float2 HowManyFloats(float V) {
return V.rr.rr;
}
+// CHECK-LABEL: HowManyBools
+// CHECK: [[VAddr:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[Vec2Ptr:%.*]] = alloca <2 x i32>, align 1
spall wrote:
I probably need to update this test
@@ -3166,109 +3171,228 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh32(Register ResVReg,
.constrainAllUses(TII, TRI, RBI);
}
-bool SPIRVInstructionSelector::selectFirstBitHigh64(Register ResVReg,
-const SPIRVTyp
https://github.com/spall approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/117245
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@@ -3166,109 +3171,228 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh32(Register ResVReg,
.constrainAllUses(TII, TRI, RBI);
}
-bool SPIRVInstructionSelector::selectFirstBitHigh64(Register ResVReg,
-const SPIRVTyp
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@@ -3166,109 +3171,228 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh32(Register ResVReg,
.constrainAllUses(TII, TRI, RBI);
}
-bool SPIRVInstructionSelector::selectFirstBitHigh64(Register ResVReg,
-const SPIRVTyp
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spall wrote:
> This looks correct, but how much work is it to update all of these tests to
> have fast math enabled rather than explicitly disabling it? I worry that (1)
> folks looking at these tests in the future will think that disabling fast
> math is a meaningful part of the test and (2)
@@ -3166,109 +3171,228 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh32(Register ResVReg,
.constrainAllUses(TII, TRI, RBI);
}
-bool SPIRVInstructionSelector::selectFirstBitHigh64(Register ResVReg,
-const SPIRVTyp
@@ -3166,109 +3171,228 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh32(Register ResVReg,
.constrainAllUses(TII, TRI, RBI);
}
-bool SPIRVInstructionSelector::selectFirstBitHigh64(Register ResVReg,
-const SPIRVTyp
@@ -96,15 +96,20 @@ class SPIRVInstructionSelector : public InstructionSelector
{
bool selectFirstBitHigh(Register ResVReg, const SPIRVType *ResType,
MachineInstr &I, bool IsSigned) const;
- bool selectFirstBitHigh16(Register ResVReg, const SPIRVT
@@ -3166,109 +3171,228 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh32(Register ResVReg,
.constrainAllUses(TII, TRI, RBI);
}
-bool SPIRVInstructionSelector::selectFirstBitHigh64(Register ResVReg,
-const SPIRVTyp
@@ -3166,109 +3171,228 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh32(Register ResVReg,
.constrainAllUses(TII, TRI, RBI);
}
-bool SPIRVInstructionSelector::selectFirstBitHigh64(Register ResVReg,
-const SPIRVTyp
https://github.com/spall edited https://github.com/llvm/llvm-project/pull/116858
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spall wrote:
I'd also update your description to mention fixing the vector > size 2 bug in
FirstBitHigh as well, by making this code general purpose for both firstbitlow
and firstbithigh.
https://github.com/llvm/llvm-project/pull/116858
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https://github.com/llvm/llvm-project/pull/119820
Make fast math the default for HLSL
Closes #108597
>From d167cd92875f7aec8ed3ab15c3321ee9000e8481 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Thu, 12 Dec 2024 20:35:47 +
Subject: [PATCH 1/2] make fast m
https://github.com/spall ready_for_review
https://github.com/llvm/llvm-project/pull/119820
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spall wrote:
Waiting on #120630
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@@ -3158,6 +3172,166 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh(Register ResVReg,
}
}
+bool SPIRVInstructionSelector::selectFirstBitLow16(Register ResVReg,
+ const SPIRVType *ResType,
+
@@ -3158,6 +3172,166 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh(Register ResVReg,
}
}
+bool SPIRVInstructionSelector::selectFirstBitLow16(Register ResVReg,
+ const SPIRVType *ResType,
+
@@ -3158,6 +3172,166 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh(Register ResVReg,
}
}
+bool SPIRVInstructionSelector::selectFirstBitLow16(Register ResVReg,
+ const SPIRVType *ResType,
+
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/111047
>From 119def060924f13bd1fe07f6d73ce27a1b52ea12 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Tue, 17 Sep 2024 20:25:46 +
Subject: [PATCH 1/8] theoretically fix issue
---
clang/lib/Sema/SemaType.cpp | 4 ++
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/118842
>From 2e932a57ccb992b856b58bec4c30c6b64f24f711 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Thu, 28 Nov 2024 16:23:57 +
Subject: [PATCH 1/5] Flat casts WIP
---
clang/include/clang/AST/OperationKinds.def
spall wrote:
Work for this PR begins at 'splat cast wip' commit.
https://github.com/llvm/llvm-project/pull/118992
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https://github.com/llvm/llvm-project/pull/118992
Implement HLSL Flat casting that handles splatting for arrays and structs, and
vectors if splatting from a vec1.
Closes #100609 and Closes #100619
Depends on #118842
>From 2e932a57ccb992b856b58bec4c30c6b64f24f7
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/118992
>From 2e932a57ccb992b856b58bec4c30c6b64f24f711 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Thu, 28 Nov 2024 16:23:57 +
Subject: [PATCH 1/8] Flat casts WIP
---
clang/include/clang/AST/OperationKinds.def
@@ -3178,98 +3178,74 @@ bool
SPIRVInstructionSelector::selectFirstBitSet64Overflow(
Register ResVReg, const SPIRVType *ResType, MachineInstr &I,
Register SrcReg, unsigned BitSetOpcode, bool SwapPrimarySide) const {
+ // SPIR-V only allow vecs of size 2,3,4. Calling w
@@ -3178,98 +3178,74 @@ bool
SPIRVInstructionSelector::selectFirstBitSet64Overflow(
Register ResVReg, const SPIRVType *ResType, MachineInstr &I,
Register SrcReg, unsigned BitSetOpcode, bool SwapPrimarySide) const {
+ // SPIR-V only allow vecs of size 2,3,4. Calling w
@@ -3178,98 +3178,74 @@ bool
SPIRVInstructionSelector::selectFirstBitSet64Overflow(
Register ResVReg, const SPIRVType *ResType, MachineInstr &I,
Register SrcReg, unsigned BitSetOpcode, bool SwapPrimarySide) const {
+ // SPIR-V only allow vecs of size 2,3,4. Calling w
@@ -3178,98 +3178,74 @@ bool
SPIRVInstructionSelector::selectFirstBitSet64Overflow(
Register ResVReg, const SPIRVType *ResType, MachineInstr &I,
Register SrcReg, unsigned BitSetOpcode, bool SwapPrimarySide) const {
+ // SPIR-V only allow vecs of size 2,3,4. Calling w
https://github.com/spall created
https://github.com/llvm/llvm-project/pull/123977
Make the memory representation of boolean vectors in HLSL, vectors of i32.
Allow boolean swizzling for boolean vectors in HLSL.
Add tests for boolean vectors and boolean vector swizzling.
Closes #91639
>From 50f8
@@ -1461,6 +1552,7 @@ static bool castPreservesZero(const CastExpr *CE) {
case CK_NonAtomicToAtomic:
case CK_AtomicToNonAtomic:
case CK_HLSLVectorTruncation:
+ case CK_HLSLAggregateCast: // TODO does CK_HLSLAggregateCast preserve zero?
spall wrote:
@llv
https://github.com/spall converted_to_draft
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>From e994824f3630ee8b224afceb6c14d980c9013112 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Fri, 6 Dec 2024 05:14:17 +
Subject: [PATCH 01/19] splat cast wip
---
clang/include/clang/AST/OperationKinds.def
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/123977
>From 50f8b16bf83d70cc37f2ac7e70c9195a4c4cda02 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Thu, 16 Jan 2025 01:32:25 +
Subject: [PATCH 01/12] wip
---
clang/lib/CodeGen/CGExpr.cpp | 19
@@ -110,6 +131,24 @@ float2 HowManyFloats(float V) {
return V.rr.rr;
}
+// CHECK-LABEL: HowManyBools
+// CHECK: [[VAddr:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[Vec2Ptr:%.*]] = alloca <2 x i32>, align 8
+// CHECK-NEXT: [[Tmp:%.*]] = zext i1 {{.*}} to i32
+// CHECK-NEXT:
https://github.com/spall closed https://github.com/llvm/llvm-project/pull/118992
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@@ -2064,6 +2064,9 @@ llvm::Value *CodeGenFunction::EmitToMemory(llvm::Value
*Value, QualType Ty) {
if (Ty->isExtVectorBoolType()) {
llvm::Type *StoreTy = convertTypeForLoadStore(Ty, Value->getType());
+if (getLangOpts().HLSL)
spall wrote:
Yes, I g
@@ -2064,6 +2064,9 @@ llvm::Value *CodeGenFunction::EmitToMemory(llvm::Value
*Value, QualType Ty) {
if (Ty->isExtVectorBoolType()) {
llvm::Type *StoreTy = convertTypeForLoadStore(Ty, Value->getType());
+if (getLangOpts().HLSL)
spall wrote:
Does thi
@@ -0,0 +1,87 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm -disable-llvm-passes -o - %s
| FileCheck %s
+
+// array splat
+// CHECK-LABEL: define void {{.*}}call4
+// CHECK: [[B:%.*]] = alloca [2 x i32], align 4
+// CHE
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/118992
>From e994824f3630ee8b224afceb6c14d980c9013112 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Fri, 6 Dec 2024 05:14:17 +
Subject: [PATCH 1/9] splat cast wip
---
clang/include/clang/AST/OperationKinds.def |
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/123977
>From 50f8b16bf83d70cc37f2ac7e70c9195a4c4cda02 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Thu, 16 Jan 2025 01:32:25 +
Subject: [PATCH 01/11] wip
---
clang/lib/CodeGen/CGExpr.cpp | 19
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/128952
>From 656d6e87466bfc85246f7abaedfe6549e566717b Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Wed, 26 Feb 2025 14:37:06 -0800
Subject: [PATCH 1/7] error on out of bounds vector accesses
---
.../clang/Basic/Dia
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/129939
>From 23debaf2084f953e60847b8f0814c5d1ee27c726 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Tue, 4 Mar 2025 09:53:56 -0800
Subject: [PATCH 01/12] extra scalar vector overloads for clamp
---
.../lib/Headers/h
https://github.com/spall closed https://github.com/llvm/llvm-project/pull/131666
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@@ -0,0 +1,48 @@
+// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple
dxil-pc-shadermodel6.2-library %s -fnative-half-type -emit-llvm -O1 -o - |
FileCheck %s
+// CHECK: define {{.*}}test_ints{{.*}}(i16 {{.*}} [[VAL:%.*]]){{.*}}
+// CHECK-NOT: bitcast
+// CHECK: ret i16 [
@@ -0,0 +1,12 @@
+// RUN: not %clang_dxc -enable-16bit-types -T cs_6_0 -HV 202x %s 2>&1 |
FileCheck %s -DTEST_TYPE=half
+// RUN: not %clang_dxc -enable-16bit-types -T cs_6_0 -HV 202x %s 2>&1 |
FileCheck %s -DTEST_TYPE=half3
+// RUN: not %clang_dxc -enable-16bit-types -T cs_6_0
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/129939
>From 23debaf2084f953e60847b8f0814c5d1ee27c726 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Tue, 4 Mar 2025 09:53:56 -0800
Subject: [PATCH 01/15] extra scalar vector overloads for clamp
---
.../lib/Headers/h
spall wrote:
> > > For example, for `abs`, it still depends on the _HLSL_16BIT_AVAILABILITY
> > > availability attribute. Does this PR intend to keep abs overloads using
> > > half "unexposed"? Or should that overload for abs be exposed too?
> >
> >
> > Oh I see what you are referring to. Tha
https://github.com/spall edited https://github.com/llvm/llvm-project/pull/132804
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spall wrote:
> For example, for `abs`, it still depends on the _HLSL_16BIT_AVAILABILITY
> availability attribute. Does this PR intend to keep abs overloads using half
> "unexposed"? Or should that overload for abs be exposed too?
I'm not sure I understand the question, I think abs is the same
spall wrote:
> Are there any test changes we should consider here? If not could you prefix
> `[NFC]` to the title?
It looked to me like the tests were all correct based on what was done in the
reference PR
https://github.com/llvm/llvm-project/pull/132804
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spall wrote:
> For example, for `abs`, it still depends on the _HLSL_16BIT_AVAILABILITY
> availability attribute. Does this PR intend to keep abs overloads using half
> "unexposed"? Or should that overload for abs be exposed too?
Oh I see what you are referring to. That might be my mistake; le
@@ -91,6 +91,137 @@ if.end: ; preds =
%if.else, %if.then
%3 = load i32, ptr %resp, align 4
ret i32 %3
}
+
+; CHECK: define i32 @flatten_switch(i32 %X)
+; CHECK-NOT: hlsl.controlflow.hint
+; CHECK: switch i32 %0, label %sw.epil
@@ -91,6 +91,137 @@ if.end: ; preds =
%if.else, %if.then
%3 = load i32, ptr %resp, align 4
ret i32 %3
}
+
+; CHECK: define i32 @flatten_switch(i32 %X)
+; CHECK-NOT: hlsl.controlflow.hint
+; CHECK: switch i32 %0, label %sw.epil
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/129939
>From 23debaf2084f953e60847b8f0814c5d1ee27c726 Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Tue, 4 Mar 2025 09:53:56 -0800
Subject: [PATCH 01/13] extra scalar vector overloads for clamp
---
.../lib/Headers/h
@@ -54,5 +54,67 @@ clamp(U p0, V p1, W p2) {
return clamp(p0, (U)p1, (U)p2);
}
+//===--===//
+// max builtin overloads
+//===--===//
+
+tem
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/131666
>From 4d4541232fb8ada1a4a17701919809a2a727d52d Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Mon, 17 Mar 2025 12:01:11 -0700
Subject: [PATCH 1/3] remove Macros implementing overloads for min and max.
Implement
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/131666
>From 4d4541232fb8ada1a4a17701919809a2a727d52d Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Mon, 17 Mar 2025 12:01:11 -0700
Subject: [PATCH 1/4] remove Macros implementing overloads for min and max.
Implement
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/131666
>From 4d4541232fb8ada1a4a17701919809a2a727d52d Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Mon, 17 Mar 2025 12:01:11 -0700
Subject: [PATCH 1/5] remove Macros implementing overloads for min and max.
Implement
@@ -0,0 +1,29 @@
+// RUN: %clang_cc1 -finclude-default-header -triple
dxil-pc-shadermodel6.2-library %s -fnative-half-type -verify
+
+
+int16_t4 test_asint_too_many_arg(uint16_t p0, uint16_t p1)
+{
+return asint16(p0, p1);
+ // expected-error@-1 {{no matching function for ca
https://github.com/spall edited https://github.com/llvm/llvm-project/pull/131666
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@@ -0,0 +1,55 @@
+; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; CHECK: OpCapability Int16
+; CHECK: OpCapability Float16
+; CH
https://github.com/spall updated
https://github.com/llvm/llvm-project/pull/132804
>From 140b17c6972ac7f867dc342f29121d71e079c9db Mon Sep 17 00:00:00 2001
From: Sarah Spall
Date: Mon, 24 Mar 2025 11:38:21 -0700
Subject: [PATCH 1/2] half overloads are defined all the time
---
.../lib/Headers/hl
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