[PATCH] D156214: [LLVM][RISCV] Check more extension dependencies

craig.topper added a comment. I have deleted the two TODOs in r02c11c5aed59624046125cf512c12f70d2fa358d Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156214/new/ https://reviews.llvm.org/D156214 ___ cfe-

[PATCH] D156321: [Clang][RISCV] Remove RVV intrinsics `vread_csr`,`vwrite_csr`

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156321/new/ https://reviews.llvm.org/D156321 ___

[PATCH] D156507: [RISCV] Upgrade Zihintntl extension to version 1.0 and move out of experimental state.

craig.topper added a comment. We already have https://reviews.llvm.org/D151547 in review Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156507/new/ https://reviews.llvm.org/D156507 ___ cfe-commits mailing

[PATCH] D157651: [RISCV] Rewrite CheckInvalidVLENandLMUL to avoid floating point.

craig.topper created this revision. craig.topper added reviewers: 4vtomat, kito-cheng, reames, asb. Herald added subscribers: jobnoorman, VincentWu, vkmr, luismarques, sameer.abuasal, s.egerton, Jim, benna, psnobl, rogfer01, shiva0217, simoncook, arichardson. Herald added a project: All. craig.to

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added a comment. Please update docs/RISCVUsage.rst Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152793/new/ https://reviews.llvm.org/D152793 ___ cfe-commits mailing list cfe-commits@lists.l

[PATCH] D157130: [RISCV] Check type size for lax conversions between RVV builtin types and VectorType::RVVFixedLengthDataVector.

craig.topper added a comment. Ping Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157130/new/ https://reviews.llvm.org/D157130 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.or

[PATCH] D157693: [clang][doc] Mark _Float16 is support natively when Zfh is available

craig.topper added inline comments. Comment at: clang/docs/LanguageExtensions.rst:815 * X86 (if SSE2 is available; natively if AVX512-FP16 is also available) + * RISC-V (natively if Zfh is available) Zhinx also Repository: rG LLVM Github Monorepo CHANG

[PATCH] D157474: [RISCV] Add missing Xsfvcp extension check in clang sema

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157474/new/ https://reviews.llvm.org/D157474 ___

[PATCH] D157651: [RISCV] Rewrite CheckInvalidVLENandLMUL to avoid floating point.

craig.topper updated this revision to Diff 549634. craig.topper added a comment. Revise coment, rename variable. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157651/new/ https://reviews.llvm.org/D157651 Files: clang/lib/Sema/SemaChecking.cpp

[PATCH] D157651: [RISCV] Rewrite CheckInvalidVLENandLMUL to avoid floating point.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGee6befe26437: [RISCV] Rewrite CheckInvalidVLENandLMUL to avoid floating point. (authored by craig.topper). Changed prior to commit: https://review

[PATCH] D157693: [clang][doc] Mark _Float16 is support natively when Zfh or Zhinx is available

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157693/new/ https://reviews.llvm.org/D157693 ___

[PATCH] D157362: [RISCV] Add MC layer support for Zicfilp.

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:665 +let Predicates = [HasStdExtZicfilp] in { +def : InstAlias<"lpad $imm20", (AUIPC X0, uimm20:$imm20)>; There is a designated spot in this file for InstAliases. Reposito

[PATCH] D157362: [RISCV] Add MC layer support for Zicfilp.

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157362/new/ https://reviews.llvm.org/D157362 ___

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td:88 + +let Predicates = [HasStdExtZicfiss, HasStdExtC] in { +let Uses = [SSP], Defs = [SSP], hasSideEffects = 0, mayLoad = 0, mayStore = 1 in Is it compatible with Zca?

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td:32 + +class RVC_SSInst rs1, RegisterClass reg_class, string opcodestr> : + RVInst16<(outs), (ins reg_class:$rs1), opcodestr, "$rs1", [], InstFormatOther> { Can you ca

[PATCH] D152423: [RISCV] Add function that check extension name with version

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152423/new/ https://reviews.llvm.org/D152423 ___

[PATCH] D151730: [RISCV] Support target attribute for function

craig.topper added inline comments. Comment at: clang/lib/Basic/Targets/RISCV.cpp:417 + continue; +} else if (Feature.startswith("no-")) + Ret.Features.push_back("-" + Feature.split("-").second.str()); Is this tested? I don't see any "no-" in the th

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td:37 + let Inst{12} = 0; + let Inst{11-7} = rs1; + let Inst{6-2} = 0b0; Do we need the rs1 variable or can we use rs1val here? We usually have the rs1 field becau

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152793/new/ https://reviews.llvm.org/D152793 ___

[PATCH] D158067: [RISCV] Bump vector crypto to v1.0 RC2

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158067/new/ https://reviews.llvm.org/D158067 ___

[PATCH] D157953: [CGCall][RISCV] Handle function calls with parameter of RVV tuple type

craig.topper added inline comments. Comment at: clang/lib/CodeGen/CGCall.cpp:5268 + assert(STy->containsHomogeneousScalableVectorTypes() && + "ABI only supports structure with hmogeneous scalable vector " + "type"); Homoge

[PATCH] D158259: [clang][RISCV] Support operators for RVV sizeless vector types

craig.topper added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:14906 +// specified +if (S.Context.areCompatibleRVVTypes(QualType(OriginalTarget, 0), +QualType(Source, 0)) || Why do we need this, but

[PATCH] D156821: [CodeGen] [ubsan] Respect integer overflow handling in abs builtin

craig.topper added a comment. I just put up a patch for RISC-V failure related to this https://reviews.llvm.org/D158304 change. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156821/new/ https://reviews.llvm.org/D156821 ___

[PATCH] D158255: [RISCV][NFC] Update compile options for some vector crypto C intrinsics

craig.topper requested changes to this revision. craig.topper added inline comments. This revision now requires changes to proceed. Comment at: clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcpopv.c:4 +// RUN: %clang_cc1 -triple riscv64 -target-

[PATCH] D158257: [RISCV] Add feature checks for vector crypto C intrinsics

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158257/new/ https://reviews.llvm.org/D158257 ___

[PATCH] D156821: [CodeGen] [ubsan] Respect integer overflow handling in abs builtin

craig.topper added a comment. In D156821#4600550 , @MaskRay wrote: >> Currenly both Clang and GCC support the following set of flags that control > > code gen of signed overflow: > >> [...] >> Howerver, clang ignores these flags for __builtin_abs(int) and

[PATCH] D157953: [CGCall][RISCV] Handle function calls with parameter of RVV tuple type

craig.topper added inline comments. Comment at: clang/lib/CodeGen/CGCall.cpp:5278 + for (unsigned i = 0, e = STy->getNumElements(); i != e; ++i) { +llvm::Value *LI = Builder.CreateExtractValue( +StoredStructValue, i, Src.getName() + ".extract"

[PATCH] D142144: [RISCV][Driver] Add -mrvv-vector-bits= option similar to -msve-vector-bits=

craig.topper added inline comments. Comment at: clang/test/Driver/riscv-rvv-vector-bits.c:43 +// RUN: %clang -c %s -### --target=riscv64-linux-gnu -march=rv64gcv \ +// RUN: -mrvv-vector-bits=64 2>&1 | FileCheck --check-prefix=CHECK-BAD-VALUE-ERROR %s + wangpc w

[PATCH] D157130: [RISCV] Check type size for lax conversions between RVV builtin types and VectorType::RVVFixedLengthDataVector.

This revision was automatically updated to reflect the committed changes. Closed by commit rG33af2f131db7: [RISCV] Check type size for lax conversions between RVV builtin types and… (authored by craig.topper). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm

[PATCH] D158402: [Clang][RISCV] Add vcreate intrinsics for RVV tuple types

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158402/new/ https://reviews.llvm.org/D158402 ___

[PATCH] D157953: [CGCall][RISCV] Handle function calls with parameter of RVV tuple type

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157953/new/ https://reviews.llvm.org/D157953 ___

[PATCH] D155668: [RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.

craig.topper added a comment. In D155668#4548454 , @jrtc27 wrote: > Uh, why are there clang/test/Sema/aarch64* tests full of RISC-V extension > names? That's not right at all. One of them is coming from > https://reviews.llvm.org/D135011, I haven't trac

[PATCH] D156686: [AST] Simplify Type::isSizelessBuiltinType(). NFC.

craig.topper added inline comments. Comment at: clang/lib/AST/Type.cpp:2356 bool Type::isSizelessBuiltinType() const { + if (isSVESizelessBuiltinType()) +return true; Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm

[PATCH] D156779: [RISCV] Use correct LMUL!=1 types for __attribute__((riscv_rvv_vector_bits(N)))

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156779/new/ https://reviews.llvm.org/D156779 ___

[PATCH] D156686: [AST] Simplify Type::isSizelessBuiltinType(). NFC.

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156686/new/ https://reviews.llvm.org/D156686 ___

[PATCH] D156821: [CodeGen] [ubsan] Respect integer overflow handling in abs builtin

craig.topper added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:1807 + + // Do not emit checks for disabled sanitizers to support recover + SmallVector, 2> Checks; recover -> recovery? Period at the end of the comment Repository: rG LLVM Gi

[PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.

craig.topper added a comment. In D155145#4551526 , @anna wrote: > In D155145#4544068 , @pengfei wrote: > >> In D155145#4543326 , @anna wrote: >> >>> We see a crash bisecte

[PATCH] D156221: [RISCV] Support overloaded version ntlh intrinsic function

craig.topper added a comment. I think another option could be to do this in SemaChecking.cpp where we implement __builtin_riscv_ntl_load and __builtin_riscv_ntl_store. We already do custom type checking there. We could detect the missing argument and give it a default. Repository: rG LLVM G

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added a comment. Please update llvm/docs/RISCVUsage.rst Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152793/new/ https://reviews.llvm.org/D152793 ___ cfe-commits mailing list cfe-commits@li

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:233 +def uimm10 : Operand, ImmLeaf(Imm);}]> { + let ParserMatchClass = UImmAsmOperand<10>; Is this used? Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo

[PATCH] D155647: [RISCV] Add C intrinsics for scalar crypto

craig.topper updated this revision to Diff 546315. craig.topper added a comment. Add riscv_bitmanip.h to cover all of Zbb and Zbkb Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155647/new/ https://reviews.llvm.org/D155647 Files: clang/lib/Header

[PATCH] D156851: [RISCV] Merge rv32 and rv64 Zvb* intrinsic tests. NFC

craig.topper created this revision. craig.topper added reviewers: asb, wangpc, kito-cheng, reames. Herald added subscribers: jobnoorman, luke, VincentWu, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer0

[PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:1972 +// Control Flow Integerity +include "RISCVInstrInfoZicfiss.td" Put this with the other RISCVInstrInfoZi* files under "Integer" Comment at: llvm/lib/

[PATCH] D156851: [RISCV] Merge rv32 and rv64 Zvb* intrinsic tests. NFC

This revision was automatically updated to reflect the committed changes. Closed by commit rG36ac6ac1dbd0: [RISCV] Merge rv32 and rv64 Zvb* intrinsic tests. NFC (authored by craig.topper). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156851/new/ ht

[PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.

craig.topper added a comment. In D155145#4553922 , @anna wrote: > In D155145#4551621 , @craig.topper > wrote: > >> In D155145#4551526 , @anna wrote: >> >>> In D155145#454

[PATCH] D138810: [RISCV] Support vector crypto extension C intrinsics

craig.topper added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:4496 +static bool CheckInValidEGW(const TargetInfo &TI, CallExpr *TheCall, Sema &S, +QualType Type, int EGW) { InValid -> Invalid Comm

[PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.

craig.topper added a comment. In D155145#4556157 , @anna wrote: > In D155145#4554786 , @anna wrote: > >>> Can you capture the values of EAX, EBX, ECX, and EDX after the two calls to >>> getX86CpuIDAndInfoEx that

[PATCH] D156221: [RISCV] Support overloaded version ntlh intrinsic function

craig.topper accepted this revision. craig.topper added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156221/new/ https://reviews.llvm.org/D156221 ___ cfe-commits mailing list cfe-commits

[PATCH] D157130: [RISCV] Check type size for lax conversions between RVV builtin types and VectorType::RVVFixedLengthDataVector.

craig.topper created this revision. craig.topper added reviewers: aaron.ballman, c-rhodes. Herald added subscribers: jobnoorman, luke, VincentWu, ctetreau, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfe

[PATCH] D156821: [CodeGen] [ubsan] Respect integer overflow handling in abs builtin

craig.topper added a comment. This looks good to me, but I'm not sure I'm a fully qualified reviewer here. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156821/new/ https://reviews.llvm.org/D156821 ___ cfe-commits mailing list cfe-commits@lis

[PATCH] D157353: [RISCV] Remove pre-defined macro test for b extension. NFC.

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157353/new/ https://reviews.llvm.org/D157353 ___

[PATCH] D138810: [RISCV] Support vector crypto extension C intrinsics

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138810/new/ https://reviews.llvm.org/D138810 ___

[PATCH] D157474: [RISCV] Add missing Xsfvcp extension check in clang sema

craig.topper added a comment. Is it possible to test? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157474/new/ https://reviews.llvm.org/D157474 ___ cfe-commits mailing list cfe-commits@lists.llvm.org ht

[PATCH] D157474: [RISCV] Add missing Xsfvcp extension check in clang sema

craig.topper added inline comments. Comment at: clang/test/Sema/rvv-required-features-invalid.c:16 +void test_sf_vc_x_se_u64m1(uint64_t rs1, size_t vl) { // expected-note {{'test_sf_vc_x_se_u64m1' declared here}} + __riscv_sf_vc_x_se_u64m1(1, 1, 1, rs1, vl); // expected-error {

[PATCH] D151869: [RISCV] Enable more builtin for zvfhmin without zvfh

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D151869/new/ https://reviews.llvm.org/D151869 ___

[PATCH] D138810: [RISCV] Support vector crypto extension C intrinsics

craig.topper added inline comments. Comment at: clang/include/clang/Basic/riscv_vector.td:2378 + +multiclass RVVOutBuiltinSetP { What does `P` in this name mean? Is this because they use OP_P as their opcode? If so I don't think that should be part of how we nam

[PATCH] D154567: [RISCV] Use ClangBuiltin in IntrinsicsRISCV.td to map some scalar crypto builtins to IR intrinsic.

craig.topper created this revision. craig.topper added reviewers: asb, VincentWu, kito-cheng. Herald added subscribers: jobnoorman, luke, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones,

[PATCH] D154572: [RISCV] Use 'long' in aes64 Zknd/Zkne builtin tests.

craig.topper created this revision. craig.topper added reviewers: asb, VincentWu, kito-cheng. Herald added subscribers: jobnoorman, luke, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones,

[PATCH] D154577: [RISCV] Use 'long' in sha512 builtin tests. NFC

craig.topper created this revision. craig.topper added reviewers: kito-cheng, asb, VincentWu. Herald added subscribers: jobnoorman, luke, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones,

[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

craig.topper added a comment. Does this only change the calling convention when `__attribute__((riscv_vector_cc))` is used? The attribute should be mentioned in the patch description. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154576/new/ http

[PATCH] D154572: [RISCV] Use 'long' in aes64 Zknd/Zkne builtin tests. NFC

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGac03e3f51c27: [RISCV] Use 'long' in aes64 Zknd/Zkne builtin tests. NFC (authored by craig.topper). Repository: rG LLVM Github Monorepo CHANGES SI

[PATCH] D154577: [RISCV] Use 'long' in sha512 builtin tests. NFC

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGa8a6a4947439: [RISCV] Use 'long' in sha512 builtin tests. NFC (authored by craig.topper). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D154567: [RISCV] Use ClangBuiltin in IntrinsicsRISCV.td to map some scalar crypto builtins to IR intrinsic.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG1db5b49ae62a: [RISCV] Use ClangBuiltin in IntrinsicsRISCV.td to map some scalar crypto… (authored by craig.topper). Repository: rG LLVM Github Mon

[PATCH] D154616: [RISCV] Use unsigned instead of signed types for Zk* and Zb* builtins.

craig.topper created this revision. craig.topper added reviewers: asb, VincentWu, kito-cheng. Herald added subscribers: jobnoorman, luke, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones,

[PATCH] D154628: [1/8][RISCV] Add rounding mode control variant for vfsub, vfrsub

craig.topper added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:4811 return SemaBuiltinConstantArgRange(TheCall, 4, 0, 3); case RISCVVector::BI__builtin_rvv_vfadd_vv_rm_ta: case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_ta: Not related t

[PATCH] D154629: [2/8][RISCV] Add rounding mode control variant for vfwadd, vfwsub

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:14 #include "RISCVInstrInfo.h" +#include "MCTargetDesc/RISCVBaseInfo.h" #include "MCTargetDesc/RISCVMatInt.h" RISCV.h already includes this. Comment at:

[PATCH] D154635: [7/8][RISCV] Add rounding mode control variant for conversion intrinsics between floating-point and integer

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:6769 +let hasSideEffects = 0 in { +defm PseudoVFWCVT_F_XU : VPseudoVWCVTF_V_RM; +defm PseudoVFWCVT_F_X : VPseudoVWCVTF_V_RM; These don't need rounding mode. A

[PATCH] D154647: [RISCV] Re-define sha256, Zksed, and Zksh intrinsics to use i32 types.

craig.topper created this revision. craig.topper added reviewers: asb, VincentWu, kito-cheng, reames. Herald added subscribers: jobnoorman, luke, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edwar

[PATCH] D154635: [7/8][RISCV] Add rounding mode control variant for conversion intrinsics between floating-point and integer

craig.topper added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:6769 +let hasSideEffects = 0 in { +defm PseudoVFWCVT_F_XU : VPseudoVWCVTF_V_RM; +defm PseudoVFWCVT_F_X : VPseudoVWCVTF_V_RM; craig.topper wrote: > These don't

[PATCH] D154681: [RISCV] Split __builtin_riscv_xperm4/8 into separate _32 and _64 builtins.

craig.topper created this revision. craig.topper added reviewers: asb, VincentWu, kito-cheng. Herald added subscribers: jobnoorman, luke, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones,

[PATCH] D154683: [RISCV] Split __builtin_riscv_brev8 into _32 and _64 builtin.

craig.topper created this revision. craig.topper added reviewers: asb, VincentWu, kito-cheng. Herald added subscribers: jobnoorman, luke, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones,

[PATCH] D154706: [RISCV] Add XLEN width integer type: riscv_int.h

craig.topper added inline comments. Comment at: clang/lib/Headers/riscv_int.h:10 + +#ifndef __RISCV_INT_H + Don't you have to `#define __RISCV_INT_H` after this to make this a complete include guard? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST AC

[PATCH] D154647: [RISCV] Re-define sha256, Zksed, and Zksh intrinsics to use i32 types.

craig.topper updated this revision to Diff 538239. craig.topper added a comment. Rebase and add the missing autoupgrade tests Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154647/new/ https://reviews.llvm.org/D154647 Files: clang/include/clang/B

[PATCH] D154693: [RISCV] Remote redundant _ta suffix in RVV intrinsics builtins. NFC

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154693/new/ https://reviews.llvm.org/D154693 ___

[PATCH] D86310: [X86] Align i128 to 16 bytes in x86-64 datalayout

craig.topper added a comment. In D86310#4485837 , @tmgross wrote: > What is the current status of this patch? Are the reviewers here OK with this > fix in general but just need to see changes to autoupgrade? > > @craig.topper or @hvdijk since you worked o

[PATCH] D154628: [1/8][RISCV] Add rounding mode control variant for vfsub, vfrsub

craig.topper added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:4813 case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_ta: + case RISCVVector::BI__builtin_rvv_vfsub_vv_rm_ta: + case RISCVVector::BI__builtin_rvv_vfsub_vf_rm_ta: This needs to rebas

[PATCH] D154628: [1/8][RISCV] Add rounding mode control variant for vfsub, vfrsub

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154628/new/ https://reviews.llvm.org/D154628 ___

[PATCH] D152996: [RISCV][POC] Model frm control for vfadd

craig.topper added a comment. I think this conflicts with https://reviews.llvm.org/D154245 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152996/new/ https://reviews.llvm.org/D152996 ___ cfe-commits maili

[PATCH] D154681: [RISCV] Split __builtin_riscv_xperm4/8 into separate _32 and _64 builtins.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGa1b7db3e4ccc: [RISCV] Split __builtin_riscv_xperm4/8 into separate _32 and _64 builtins. (authored by craig.topper). Repository: rG LLVM Github Mo

[PATCH] D154629: [2/8][RISCV] Add rounding mode control variant for vfwadd, vfwsub

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:2515 +return nullptr; case CASE_WIDEOP_OPCODE_LMULS_MF4(FWADD_WV): + case CASE_WIDEOP_OPCODE_LMU

[PATCH] D154631: [3/8][RISCV] Add rounding mode control variant for vfmul, vfdiv, vfrdiv, vfwmul

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Comment at: clang/lib/Sema/SemaChecking.cpp:4824 case RISCVVector::BI__builtin_rvv_vfwsub_wf_rm_ta: + case RISCVVector::BI__builtin_rvv_vfmul_vv_rm_ta: +

[PATCH] D154632: [4/8][RISCV] Add rounding mode control variant for vfmacc, vfnmacc, vfmsac, vfnmsac, vfmadd, vfnmadd, vfmsub, vfnmsub

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154632/new/ https://reviews.llvm.org/D154632 ___

[PATCH] D154683: [RISCV] Split __builtin_riscv_brev8 into _32 and _64 builtin.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG939f818a662a: [RISCV] Split __builtin_riscv_brev8 into _32 and _64 builtin. (authored by craig.topper). Changed prior to commit: https://reviews.l

[PATCH] D153659: [RISCV] Fix name mangling for LMUL!=1 vector types with attribute(rvv_vector_bits)

craig.topper added inline comments. Comment at: clang/lib/AST/ItaniumMangle.cpp:3879 + + Out << "9__RVV_VLSI" << 'u' << TypeNameStr.size() << TypeNameStr << "Lj" << VecSizeInBits << "EE"; aaron.ballman wrote: > CC @rjmccall for ABI review -- naïve, possib

[PATCH] D154633: [5/8][RISCV] Add rounding mode control variant for vfwmacc, vfwnmacc, vfwmsac, vfwnmsac

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154633/new/ https://reviews.llvm.org/D154633 ___

[PATCH] D154634: [6/8][RISCV] Add rounding mode control variant for vfsqrt, vfrec7

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154634/new/ https://reviews.llvm.org/D154634 ___

[PATCH] D154635: [7/8][RISCV] Add rounding mode control variant for conversion intrinsics between floating-point and integer

craig.topper added inline comments. Comment at: llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll:24 ; CHECK-NEXT:vfsgnj.vv v8, v9, v8, v0.t +; CHECK-NEXT:fsrm a0 ; CHECK-NEXT:ret This is concerning. This means the `vfcvt.f.x.v` is getting the modified roundi

[PATCH] D154910: [ARM][AArch64] Make ACLE __clzl/__clzll return unsigned int instead of unsigned long/uint64_t.

craig.topper created this revision. craig.topper added reviewers: dmgreen, tmatheson, compnerd, SjoerdMeijer, kongyi. Herald added a subscriber: kristof.beyls. Herald added a project: All. craig.topper requested review of this revision. Herald added a project: clang. Use unsigned long in place of

[PATCH] D154910: [ARM][AArch64] Make ACLE __clzl/__clzll return unsigned int instead of unsigned long/uint64_t.

craig.topper updated this revision to Diff 538880. craig.topper added a comment. Update __clzl test case to pass an unsigned long instead of signed long. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154910/new/ https://reviews.llvm.org/D154910 Fi

[PATCH] D154915: [ARM][AArch64] Add ARM specific builtin for clz that is not undefined for 0 in ubsan.

craig.topper created this revision. craig.topper added reviewers: dmgreen, efriedma, SjoerdMeijer, tmatheson, kongyi. Herald added a subscriber: kristof.beyls. Herald added a project: All. craig.topper requested review of this revision. Herald added a project: clang. D152023

[PATCH] D154915: [ARM][AArch64] Add ARM specific builtin for clz that is not undefined for 0 in ubsan.

craig.topper added inline comments. Comment at: clang/test/CodeGen/arm_acle.c:351 // long test_clzl(long t) { return __clzl(t); __builtin_clzl returned a signed int, but the new builtin returns an unsigned int so the cast changed. Repository: rG LLVM Gi

[PATCH] D154910: [ARM][AArch64] Make ACLE __clzl/__clzll return unsigned int instead of unsigned long/uint64_t.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG2df12f30551e: [ARM][AArch64] Make ACLE __clzl/__clzll return unsigned int instead of unsigned… (authored by craig.topper). Repository: rG LLVM Git

[PATCH] D154915: [ARM][AArch64] Add ARM specific builtin for clz that is not undefined for 0 in ubsan.

craig.topper updated this revision to Diff 539221. craig.topper added a comment. Rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154915/new/ https://reviews.llvm.org/D154915 Files: clang/include/clang/Basic/BuiltinsAArch64.def clang/inclu

[PATCH] D153659: [RISCV] Fix name mangling for LMUL!=1 vector types with attribute(rvv_vector_bits)

This revision was automatically updated to reflect the committed changes. Closed by commit rG30962268e7a5: [RISCV] Fix name mangling for LMUL!=1 vector types with attribute… (authored by craig.topper). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D15

[PATCH] D151730: [RISCV] Support target attribute for function

craig.topper added a comment. In D151730#4491773 , @jrtc27 wrote: > Isn't multiversioning a separate thing that builds on top of per-function > target attributes? That's what I thought. The supportsMultiVersioning call was in an earlier version of the

[PATCH] D152996: [RISCV][POC] Model frm control for vfadd

craig.topper added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:4816 + case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_tu: + case RISCVVector::BI__builtin_rvv_vfadd_vv_rm_tama: + case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_tama: not related to

[PATCH] D154915: [ARM][AArch64] Add ARM specific builtin for clz that is not undefined for 0 in ubsan.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG85b27ace5256: [ARM][AArch64] Add ARM specific builtin for clz that is not undefined for 0 in… (authored by craig.topper). Repository: rG LLVM Gith

[PATCH] D154635: [7/8][RISCV] Add rounding mode control variant for conversion intrinsics between floating-point and integer

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154635/new/ https://reviews.llvm.org/D154635 ___

[PATCH] D154636: [8/8][RISCV] Add rounding mode control variant for vfredosum, vfredusum, vfwredosum, vfwredusum

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:6821 //===--===// -let Uses

[PATCH] D155102: [Clang][RISCV] Align RVV intrinsic builtin names with the C intrinsics

craig.topper accepted this revision. craig.topper added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155102/new/ https://reviews.llvm.org/D155102 ___

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