[PATCH] D82727: [PowerPC] Implement Vector Expand Mask builtins in LLVM/Clang

Conanap accepted this revision. Conanap added a comment. This revision is now accepted and ready to land. Minor nit, okay if changed for commit Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D82727/new/ https://reviews.llvm.org/D82727 __

[PATCH] D87394: [PowerPC][Power10] Implementation of 128-bit Binary Vector Mod and Sign Extend builtins

Conanap created this revision. Conanap added reviewers: PowerPC, saghir, nemanjai, hfinkel. Conanap added projects: LLVM, clang, PowerPC. Herald added subscribers: steven.zhang, kbarton. Conanap requested review of this revision. This patch implements 128-bit Binary Vector Mod and Sign Extend buil

[PATCH] D91974: [PowerPC] Rename the vector pair intrinsics and builtins to replace the _mma_ prefix by _vsx_

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGc2892978e919: [PowerPC] Rename the vector pair intrinsics and builtins to replace the _mma_… (authored by bsaleil, committed by Conanap). Repository

[PATCH] D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10

Conanap updated this revision to Diff 302886. Conanap marked 5 inline comments as done. Conanap added a comment. Addressed some formatting problems as well as corrected incorrect arguments for Hi case. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D

[PATCH] D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10

Conanap marked an inline comment as done. Conanap added a comment. The unrelated change no longer shows as diff, thank you! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90173/new/ https://reviews.llvm.org/D90173 __

[PATCH] D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10

Conanap updated this revision to Diff 302894. Conanap marked an inline comment as done. Conanap added a comment. Updated a test file. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90173/new/ https://reviews.llvm.org/D90173 Files: llvm/lib/Target

[PATCH] D84962: [PowerPC] Correct cpsgn's behaviour on PowerPC to match that of the ABI

This revision was automatically updated to reflect the committed changes. Closed by commit rG1af037f643fc: [PowerPC] Correct cpsgn's behaviour on PowerPC to match that of the ABI (authored by Conanap). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D84

[PATCH] D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10

Conanap updated this revision to Diff 305575. Conanap added a comment. clang format Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90173/new/ https://reviews.llvm.org/D90173 Files: llvm/lib/Target/PowerPC/PPCISelLowering.cpp llvm/lib/Target/Pow

[PATCH] D84962: [PowerPC] Correct cpsgn's behaviour on PowerPC to match that of the ABI

Conanap updated this revision to Diff 294778. Conanap marked an inline comment as done. Conanap added a comment. Changed the location of fix and added extra test cases CHANGES SINCE LAST ACTION https://reviews.llvm.org/D84962/new/ https://reviews.llvm.org/D84962 Files: clang/lib/Headers/al

[PATCH] D86819: [PowerPC][Power10] Implementation of 128-bit Binary Vector Rotate builtins

Conanap updated this revision to Diff 295393. Conanap marked 6 inline comments as done. Conanap added a comment. Addressed comments and corrected incorrect behaviour on Power10 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D86819/new/ https://reviews.llvm.org/D86819 Files: clang/inclu

[PATCH] D84962: [PowerPC] Correct cpsgn's behaviour on PowerPC to match that of the ABI

Conanap updated this revision to Diff 297936. Conanap added a comment. Use regex match to check for variable order in IR instead. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D84962/new/ https://reviews.llvm.org/D84962 Files: clang/lib/Headers/altivec.h clang/test/CodeGen/builtins-

[PATCH] D84962: [PowerPC] Correct cpsgn's behaviour on PowerPC to match that of the ABI

Conanap marked 3 inline comments as done. Conanap added a comment. Addressed Nemenja's concerns. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D84962/new/ https://reviews.llvm.org/D84962 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10

Conanap updated this revision to Diff 309039. Conanap marked 6 inline comments as done. Conanap added a comment. Addressed some formatting comments CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90173/new/ https://reviews.llvm.org/D90173 Files: llvm/lib/Target/PowerPC/PPCISelLowering.

[PATCH] D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10

Conanap added a comment. Replied to a comment Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:9213 + + if (bot) { +SplatNode = DAG.getNode( NeHuang wrote: > I do not quite understand the `if` and `else` logic here, current logic seems > we

[PATCH] D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10

Conanap added a comment. addressed a comment Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:9366 +SplatNode = DAG.getNode( +PPCISD::XXSPLTI32DX, SDLoc(SplatNode), MVT::v2i64, SplatNode, +DAG.getTargetConstant(isLE ? 1 : 0, SplatNode, MVT

[PATCH] D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10

Conanap updated this revision to Diff 309534. Conanap marked 4 inline comments as done. Conanap added a comment. Removed braces for single lines CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90173/new/ https://reviews.llvm.org/D90173 Files: llvm/lib/Target/PowerPC/PPCISelLowering.cpp

[PATCH] D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10

Conanap added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:2385 + + def : Pat <(v2i64 (PPCxxsplti32dx v2i64:$XT, i32:$XI, i32:$IMM32)), + (v2i64 (XXSPLTI32DX v2i64:$XT, i32:$XI, i32:$IMM32))>; amyk wrote: > It would be good

[PATCH] D86819: [PowerPC][Power10] Implementation of 128-bit Binary Vector Rotate builtins

This revision was automatically updated to reflect the committed changes. Closed by commit rGd30155feaa9c: [PowerPC] Implementation of 128-bit Binary Vector Rotate builtins (authored by Conanap). Changed prior to commit: https://reviews.llvm.org/D86819?vs=295393&id=298770#toc Repository: rG

[PATCH] D90173: [PowerPC] Exploit splat instruction xxsplti32dx in Power10

Conanap created this revision. Conanap added reviewers: PowerPC, nemanjai, saghir. Conanap added projects: LLVM, clang, PowerPC. Herald added a subscriber: kbarton. Conanap requested review of this revision. Exploits the instruction xxsplti32dx. It can be used to materialize any 64 bit scalar/vec

[PATCH] D100782: [PowerPC] Improve f32 to i32 bitcast code gen

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGdb26cd30b6dd: [PowerPC] Improve f32 to i32 bitcast code gen (authored by Conanap). Changed prior to commit: https://reviews.llvm.org/D100782?vs=34

[PATCH] D94627: [PowerPC][PC Rel] Implement option to omit P10 instructions from stubs

Conanap updated this revision to Diff 319140. Conanap marked 7 inline comments as done. Conanap added a comment. Fixed some formatting and comments. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D94627/new/ https://reviews.llvm.org/D94627 Files: lld/ELF/Config.h lld/ELF/Driver.cpp

[PATCH] D94627: [PowerPC][PC Rel] Implement option to omit P10 instructions from stubs

Conanap added a comment. Addressed comments Comment at: lld/ELF/Config.h:74 +// For --power10-stub +enum class P10Stub { Default, No }; + amyk wrote: > We have a "yes", but does it need to be here, too? After a bit of discussion, since we don't have a concrete

[PATCH] D95458: [PowerPC] Exploit xxsplti32dx (constant materialization) for scalars

Conanap created this revision. Conanap added reviewers: nemanjai, saghir, PowerPC. Conanap added projects: LLVM, clang, PowerPC. Herald added a subscriber: kbarton. Conanap requested review of this revision. Previously related differential (exploit xxsplti32dx for vectors) here: https://reviews.l

[PATCH] D94627: [PowerPC][PC Rel] Implement option to omit P10 instructions from stubs

Conanap updated this revision to Diff 319715. Conanap marked 12 inline comments as done. Conanap added a comment. Removed lambda functions and made a static function, included a R2SaveStub test case that covers if it fits in 34 bits with option --no-power10-stubs. CHANGES SINCE LAST ACTION ht

[PATCH] D95634: [PowerPC][Power10] Fix XXSPLI32DX not correctly exploiting specific cases

Conanap created this revision. Conanap added reviewers: nemanjai, saghir, PowerPC. Conanap added projects: LLVM, clang, PowerPC. Herald added a subscriber: kbarton. Conanap requested review of this revision. Some cases may be transformed into 32 bit splats before hitting the boolean statement, wh

[PATCH] D95634: [PowerPC][Power10] Fix XXSPLI32DX not correctly exploiting specific cases

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Conanap marked 4 inline comments as done. Closed by commit rG2e470e03b49f: [PowerPC][Power10] Fix XXSPLI32DX not correctly exploiting specific cases (authored by Conana

[PATCH] D94627: [PowerPC][PC Rel] Implement option to omit Power10 instructions from stubs

Conanap updated this revision to Diff 320865. Conanap marked 10 inline comments as done. Conanap added a comment. Addressed comments, fixed an incorrect encoding. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D94627/new/ https://reviews.llvm.org/D94627 Files: lld/ELF/Config.h lld/EL

[PATCH] D94627: [PowerPC][PC Rel] Implement option to omit Power10 instructions from stubs

Conanap added a comment. Added a note on one of the functions Comment at: lld/ELF/Driver.cpp:765 +// instructions in stubs. +static bool getP10StubOpt(opt::InputArgList &args) { + For this function here, I realize we can inline all the ifs into a giant return

[PATCH] D95458: [PowerPC] Exploit xxsplti32dx (constant materialization) for scalars

Conanap updated this revision to Diff 321184. Conanap added a comment. Updated to ensure the shortcircuit protects against the destructive function. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95458/new/ https://reviews.llvm.org/D95458 Files: llvm/lib/Target/PowerPC/PPCISelLowering

[PATCH] D109902: [PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws

Conanap created this revision. Conanap added reviewers: PowerPC, nemanjai, saghir. Conanap added projects: PowerPC, LLVM, clang. Herald added subscribers: kbarton, hiraditya. Conanap requested review of this revision. This patch removes the uneccessary mf/mtvsr generated in conjunction with xscvdp

[PATCH] D109902: [PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws

Conanap updated this revision to Diff 373009. Conanap added a comment. Removed unintended change, moved pattern to more appropriate location, reduced added complexity to 600 as it still works. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109902/new/ https://reviews.llvm.org/D109902 F

[PATCH] D109902: [PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws

Conanap updated this revision to Diff 373045. Conanap edited the summary of this revision. Conanap added a comment. Removed complexity and restored a test case CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109902/new/ https://reviews.llvm.org/D109902 Files: llvm/lib/Target/PowerPC/PP

[PATCH] D109437: [PowerPC] FP compare and test XL compat builtins.

Conanap added inline comments. Comment at: clang/lib/Sema/SemaChecking.cpp:3490 + SemaBuiltinConstantArgRange(TheCall, 1, 0, 127) || + CheckPPCTestDataClassType(TheCall); #define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \ If you're making a fun

[PATCH] D110084: [PowerPC] Support for vector bool int128 on vector comparison builtins

Conanap created this revision. Conanap added reviewers: PowerPC, saghir, nemanjai. Conanap added projects: PowerPC, clang, LLVM. Herald added a subscriber: kbarton. Conanap requested review of this revision. This patch implements support for the type `vector bool int128` for arguments on vector co

[PATCH] D109652: [PowerPC] Restrict various P10 options to P10 only.

Conanap accepted this revision. Conanap added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109652/new/ https://reviews.llvm.org/D109652 _

[PATCH] D109996: [PowerPC] Fix signature of lxvp and stxvp builtins

Conanap accepted this revision as: Conanap. Conanap added a comment. This revision is now accepted and ready to land. lgtm Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109996/new/ https://reviews.llvm.org/D109996 _

[PATCH] D109780: [PowerPC] Add range check for vec_genpcvm builtins

Conanap accepted this revision. Conanap added a comment. This revision is now accepted and ready to land. lgtm Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109780/new/ https://reviews.llvm.org/D109780 _

[PATCH] D110084: [PowerPC] Support for vector bool int128 on vector comparison builtins

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGb93359ea3fe5: [PowerPC] Support for vector bool int128 on vector comparison builtins (authored by Conanap). Repository: rG LLVM Github Monorepo C

[PATCH] D109902: [PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws

Conanap updated this revision to Diff 374059. Conanap marked an inline comment as done. Conanap added a comment. Removed AIX test line as it has the same code gen as BE CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109902/new/ https://reviews.llvm.org/D109902 Files: llvm/lib/Target/P

[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

Conanap created this revision. Conanap added reviewers: PowerPC, nemanjai, stefanp, saghir. Conanap added projects: clang, LLVM, PowerPC. Herald added subscribers: steven.zhang, kbarton. Conanap requested review of this revision. The signatures for the PowerPC builtins `lharx` and `lbarx` are inco

[PATCH] D110282: [PowerPC] SemaChecking for darn family of builtins

Conanap created this revision. Conanap added reviewers: PowerPC, nemanjai, saghir, stefanp. Conanap added projects: PowerPC, clang, LLVM. Herald added a subscriber: kbarton. Conanap requested review of this revision. The `__darn` family of builtins are only available on Pwr9, and only `__darn_32`

[PATCH] D110282: [PowerPC] SemaChecking for darn family of builtins

Conanap updated this revision to Diff 374329. Conanap added a comment. Added error testing CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110282/new/ https://reviews.llvm.org/D110282 Files: clang/lib/Sema/SemaChecking.cpp clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c clang/te

[PATCH] D110282: [PowerPC] SemaChecking for darn family of builtins

Conanap added inline comments. Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c:13 +int testdarn_32(void) { + return __darn_32(); +} lei wrote: > Isn't this valid for both 32 and 64bit? > Maybe change one of the run lines above to a 64bit test. It

[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

Conanap updated this revision to Diff 374556. Conanap added a comment. Added test cases CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110273/new/ https://reviews.llvm.org/D110273 Files: clang/include/clang/Basic/BuiltinsPPC.def clang/test/CodeGen/builtins-ppc-xlcompat-LoadReseve-St

[PATCH] D110282: [PowerPC] SemaChecking for darn family of builtins

Conanap updated this revision to Diff 374565. Conanap added a comment. Moved test case back to original file and use `#ifdef __PPC64__` instead CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110282/new/ https://reviews.llvm.org/D110282 Files: clang/lib/Sema/SemaChecking.cpp clang/te

[PATCH] D109902: [PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws

Conanap updated this revision to Diff 374578. Conanap added a comment. Updated test cases, fixed a typo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109902/new/ https://reviews.llvm.org/D109902 Files: llvm/lib/Target/PowerPC/PPCInstrVSX.td llvm/test/CodeGen/PowerPC/test-vector-ins

[PATCH] D109902: [PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws

Conanap marked 3 inline comments as done. Conanap added inline comments. Comment at: llvm/test/CodeGen/PowerPC/test-vector-insert.ll:8 +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \ +; RUN: -mcpu=pwr7 < %s | FileCheck %s + kamaub wrote: > It

[PATCH] D109902: [PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws

Conanap updated this revision to Diff 374614. Conanap added a comment. Added P7 and P8 run lines for BE CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109902/new/ https://reviews.llvm.org/D109902 Files: llvm/lib/Target/Power

[PATCH] D110282: [PowerPC] SemaChecking for darn family of builtins

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG840afbde48e9: [PowerPC] SemaChecking for darn family of builtins (authored by Conanap). Changed prior to commit: https://reviews.llvm.org/D110282?

[PATCH] D109902: [PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws

Conanap updated this revision to Diff 374906. Conanap added a comment. This modifies a test case introduced in this commit: https://github.com/llvm/llvm-project/commit/3678df5ae6618eec656ae0ea0dab3be09d73bc9a CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109902/new/ https://reviews.llv

[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

Conanap updated this revision to Diff 374908. Conanap added a comment. Fixed an old test case CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110273/new/ https://reviews.llvm.org/D110273 Files: clang/include/clang/Basic/BuiltinsPPC.def clang/test/CodeGen/builtins-ppc-xlcompat-LoadRes

[PATCH] D109902: [PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws

Conanap updated this revision to Diff 375667. Conanap added a comment. Added context, changed var names in aptterns CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109902/new/ https://reviews.llvm.org/D109902 Files: llvm/lib/Target/PowerPC/PPCInstrVSX.td llvm/test/CodeGen/PowerPC/tes

[PATCH] D109902: [PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws

Conanap marked 2 inline comments as done. Conanap added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCInstrVSX.td:4150 +0))>; +def : Pat<(v4i32 (insertelt v4i32:$VEC, DblToUInt.A, 0)), + (v4i32 (XXINSERTW v4i32:$VEC,

[PATCH] D109902: [PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws

Conanap updated this revision to Diff 375780. Conanap marked an inline comment as done. Conanap added a comment. Updated correct version of the patch CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109902/new/ https://reviews.llvm.org/D109902 Files: llvm/lib/Target/PowerPC/PPCInstrVSX.

[PATCH] D110858: [PowerPC] Implement vector float and vector double version for vec_orc builtin

Conanap created this revision. Conanap added reviewers: PowerPC, nemanjai, kamaub, saghir. Conanap added projects: LLVM, clang, PowerPC. Herald added a subscriber: kbarton. Conanap requested review of this revision. The builtin for vec_orc has support for the following two signatures, but currentl

[PATCH] D109902: [PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG4195ed995993: [PowerPC] Improved codegen related to xscvdpsxws/xscvdpuxws (authored by Conanap). Changed prior to commit: https://reviews.llvm.org

[PATCH] D110273: [PowerPC] Fix lharx and lbarx builtin signatures

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG29bb877499ce: [PowerPC] Fix lharx and lbarx builtin signatures (authored by Conanap). Changed prior to commit: https://reviews.llvm.org/D110273?vs

[PATCH] D94627: [PowerPC][PC Rel] Implement option to omit Power10 instructions from stubs

Conanap updated this revision to Diff 323000. Conanap marked 6 inline comments as done. Conanap added a comment. Fixed up a few comments CHANGES SINCE LAST ACTION https://reviews.llvm.org/D94627/new/ https://reviews.llvm.org/D94627 Files: lld/ELF/Config.h lld/ELF/Driver.cpp lld/ELF/Opt

[PATCH] D95458: [PowerPC] Exploit xxsplti32dx (constant materialization) for scalars

Conanap updated this revision to Diff 326000. Conanap marked 6 inline comments as done. Conanap added a comment. Addressed some nits and a problem where sometimes the compiler would spill half way through materialization. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95458/new/ https:/

[PATCH] D95458: [PowerPC] Exploit xxsplti32dx (constant materialization) for scalars

Conanap added inline comments. Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.h:1321 bool convertToNonDenormSingle(APFloat &ArgAPFloat); + bool checkNonDenormCannotConvertToSingle(APInt &ArgAPInt); + bool checkNonDenormCannotConvertToSingle(APFloat &ArgAPFloat); ---

[PATCH] D96835: [HIP] Support device sanitizer

Conanap added a comment. Hello, One of our PowerPC buildbots is failing because it is named `lld-multistage`, which matches with this CHECK-NOT in `clang/test/Driver/hip-sanitize-options.hip`: `;CHECK-NOT: {{"[^"]*lld[^"]*".* ".*hip.bc"}}`. I've created a patch and if you could review it that'

[PATCH] D97423: Fix a test case that checks should check whether or not it is passed into lld

Conanap created this revision. Conanap added reviewers: yaxunl, PowerPC, nemanjai, saghir. Conanap added projects: LLVM, clang, PowerPC, AMDGPU. Herald added a subscriber: steven.zhang. Conanap requested review of this revision. This test case was causing a PowerPC buildbot to fail as it happened

[PATCH] D97423: Fix a test case that checks should check whether or not it is passed into lld

Conanap updated this revision to Diff 326311. Conanap marked 2 inline comments as done. Conanap added a comment. Added .exe check for windows CHANGES SINCE LAST ACTION https://reviews.llvm.org/D97423/new/ https://reviews.llvm.org/D97423 Files: clang/test/Driver/hip-sanitize-options.hip I

[PATCH] D97423: Fix a test case that checks should check whether or not it is passed into lld

Conanap added inline comments. Comment at: clang/test/Driver/hip-sanitize-options.hip:29 // CHECK-NOT: {{"[^"]*clang[^"]*".* "-fcuda-is-device".* "-fsanitize=address"}} -// CHECK-NOT: {{"[^"]*lld[^"]*".* ".*hip.bc"}} +// CHECK-NOT: {{"[^"]*lld".* ".*hip.bc"}} // CHECK: {{"[^"]*

[PATCH] D97423: Fix a test case that checks should check whether or not it is passed into lld

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG3b7104a2f203: Fix a test case that should check whether or not it is passed into lld (authored by Conanap). Repository: rG LLVM Github Monorepo C

[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

Conanap created this revision. Herald added subscribers: shchenz, kbarton, hiraditya, nemanjai. Conanap requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. This patch implements trap and FP to and from double conversions. The

[PATCH] D104125: [PowerPC] Moving defineXLCompatMacros() definition

This revision was automatically updated to reflect the committed changes. Closed by commit rG994bb937f020: [PowerPC] Moving defineXLCompatMacros() definition (authored by quinnp, committed by Conanap). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D10

[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

Conanap updated this revision to Diff 352431. Conanap added a comment. Rebase and added 64 bit sema checking Rebased to include the updated location for the builtin alias definition location, as well as added 64 bit checking for 64 bit only builtins in sema checking. Repository: rG LLVM Githu

[PATCH] D107138: [PowerPC] Implement cmplxl builtins

Conanap created this revision. Herald added subscribers: shchenz, kbarton, nemanjai. Conanap requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. This patch implements the builtins for cmplxl by utilising __builtin_complex. Thi

[PATCH] D107138: [PowerPC] Implement cmplxl builtins

Conanap updated this revision to Diff 364223. Conanap marked 6 inline comments as done. Conanap added a comment. Removed backend tests, removed some uneeded definitions, updated frontend test with regex for variable names. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https:

[PATCH] D107138: [PowerPC] Implement cmplxl builtins

Conanap marked an inline comment as done. Conanap added inline comments. Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-complex.c:1 +// RUN: %clang_cc1 -O2 -triple powerpc64-unknown-unknown \ +// RUN: -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s NeH

[PATCH] D107138: [PowerPC] Implement cmplxl builtins

Conanap updated this revision to Diff 365289. Conanap marked 3 inline comments as done. Conanap added a comment. Merged the test case into the existing cmplx test Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D107138/new/ https://reviews.llvm.org/D1

[PATCH] D107138: [PowerPC] Implement cmplxl builtins

Conanap updated this revision to Diff 365596. Conanap added a comment. Removed unintended change Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D107138/new/ https://reviews.llvm.org/D107138 Files: clang/lib/Basic/Targets/PPC.cpp clang/test/CodeG

[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

Conanap updated this revision to Diff 355129. Conanap added a comment. Separated new test cases, rebased for newest changes, different semachecking Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103668/new/ https://reviews.llvm.org/D103668 Files:

[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

Conanap updated this revision to Diff 355130. Conanap marked 3 inline comments as done. Conanap added a comment. Removed unneccessary brackets Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103668/new/ https://reviews.llvm.org/D103668 Files: clan

[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

Conanap added a comment. Addressed comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103668/new/ https://reviews.llvm.org/D103668 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://list

[PATCH] D105236: [PowerPC] Implament Atomic Load and Stores Builtins

Conanap created this revision. Herald added subscribers: steven.zhang, shchenz, jfb, kbarton, hiraditya, nemanjai. Conanap requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. This patch implaments the atomic load and store

[PATCH] D105236: [PowerPC] Implament Atomic Load and Stores Builtins

Conanap updated this revision to Diff 356527. Conanap added a comment. Moved the pattern definitions and removed unnecessary guard. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: llvm/include/ll

[PATCH] D105236: [PowerPC] Implament Atomic Load and Stores Builtins

Conanap updated this revision to Diff 356528. Conanap added a comment. Properly updated the diff with arc. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/clang/Basic/BuiltinsPPC.de

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356532. Conanap added a comment. Changed test case file names Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/clang/Basic/BuiltinsPPC.def cla

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356533. Conanap added a comment. Updated C test case name Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/clang/Basic/BuiltinsPPC.def clang/l

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap marked 3 inline comments as done. Conanap added a comment. Addressed comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 ___ cfe-commits mailing li

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356542. Conanap added a comment. Added error test cases and sema checking Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/clang/Basic/BuiltinsP

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356545. Conanap added a comment. Updated 64 bit error test cases Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/clang/Basic/BuiltinsPPC.def

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356546. Conanap marked 2 inline comments as done. Conanap added a comment. Updated IR test cases Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/includ

[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

Conanap updated this revision to Diff 356549. Conanap added a comment. Changed to ForceXForm Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103668/new/ https://reviews.llvm.org/D103668 Files: clang/include/clang/Basic/BuiltinsPPC.def clang/lib/

[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

Conanap updated this revision to Diff 356550. Conanap added a comment. Changed to ForceXForm Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103668/new/ https://reviews.llvm.org/D103668 Files: clang/include/clang/Basic/BuiltinsPPC.def clang/lib/

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356551. Conanap added a comment. Changed to ForceXForm Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/clang/Basic/BuiltinsPPC.def clang/lib/

[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

Conanap updated this revision to Diff 356552. Conanap added a comment. Fixed incorrect diff update Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103668/new/ https://reviews.llvm.org/D103668 Files: clang/include/clang/Basic/BuiltinsPPC.def clan

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356559. Conanap marked 4 inline comments as done. Conanap added a comment. Updated test cases Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/c

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap marked an inline comment as done. Conanap added a comment. addressed comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 ___ cfe-commits mailing li

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap updated this revision to Diff 356562. Conanap added a comment. Removed entry from check Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105236/new/ https://reviews.llvm.org/D105236 Files: clang/include/clang/Basic/BuiltinsPPC.def clang/l

[PATCH] D105236: [PowerPC] Implament Load and Reserve and Store Conditional Builtins

Conanap marked 3 inline comments as done. Conanap added inline comments. Comment at: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll:2 +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -verify-machinein

[PATCH] D105236: [PowerPC] Implement Load and Reserve and Store Conditional Builtins

This revision was automatically updated to reflect the committed changes. Closed by commit rG7d10dd60ce12: [PowerPC] Implament Load and Reserve and Store Conditional Builtins (authored by Conanap). Changed prior to commit: https://reviews.llvm.org/D105236?vs=356562&id=356590#toc Repository:

[PATCH] D105454: Removed accidentally added file

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG203b48c71a0d: [PowerPC] Removed a test case meant for a later patch (authored by Conanap). Herald added a project: clang. Herald added a subscriber:

[PATCH] D105236: [PowerPC] Implement Load and Reserve and Store Conditional Builtins

Conanap added a comment. In D105236#2858909 , @thakis wrote: > Looks like this breaks tests: http://45.33.8.238/linux/50465/step_7.txt > > Please take a look, and revert for now if it takes a while to fix. Hi! I accidentally included a test case meant fo

[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

Conanap updated this revision to Diff 356985. Conanap marked 15 inline comments as done. Conanap added a comment. Addressed comments, separated 64 bit C test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103668/new/ https://reviews.llvm.org/

[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

Conanap added inline comments. Comment at: clang/include/clang/Basic/BuiltinsPPC.def:50 BUILTIN(__builtin_ppc_compare_and_swaplp, "iLiD*Li*Li", "") +BUILTIN(__builtin_ppc_tdw, "vLLiLLiIi", "") +BUILTIN(__builtin_ppc_tw, "viiIi", "") NeHuang wrote: > definition h

[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

Conanap updated this revision to Diff 356988. Conanap added a comment. Moved inst alias for 64bit to the 64 bit file Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103668/new/ https://reviews.llvm.org/D103668 Files: clang/include/clang/Basic/Buil

[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

Conanap updated this revision to Diff 357052. Conanap marked 6 inline comments as done. Conanap added a comment. Rebased and changed aix test cases to pwr 7 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103668/new/ https://reviews.llvm.org/D103668

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