[llvm-branch-commits] [lldb] 2bbf724 - Implement vAttachWait in lldb-server

[Pavel Labath via llvm-branch-commits]

Author: Augusto Noronha
Date: 2021-01-14T09:25:15+01:00
New Revision: 2bbf724feea9824f9b9e4d20d34828023dbec2af

URL: 
https://github.com/llvm/llvm-project/commit/2bbf724feea9824f9b9e4d20d34828023dbec2af
DIFF: 
https://github.com/llvm/llvm-project/commit/2bbf724feea9824f9b9e4d20d34828023dbec2af.diff

LOG: Implement vAttachWait in lldb-server

This commit vAttachWait in lldb-server, so --waitfor can be used on
Linux

Reviewed By: labath, clayborg

Differential Revision: https://reviews.llvm.org/D93895

Added: 
lldb/test/API/tools/lldb-server/TestGdbRemoteAttachWait.py

Modified: 
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h

Removed: 




diff  --git 
a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp 
b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
index c202fc9d339f..2c8bcf477f50 100644
--- 
a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
+++ 
b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
@@ -159,6 +159,9 @@ void 
GDBRemoteCommunicationServerLLGS::RegisterPacketHandlers() {
   RegisterMemberFunctionHandler(
   StringExtractorGDBRemote::eServerPacketType_vAttach,
   &GDBRemoteCommunicationServerLLGS::Handle_vAttach);
+  RegisterMemberFunctionHandler(
+  StringExtractorGDBRemote::eServerPacketType_vAttachWait,
+  &GDBRemoteCommunicationServerLLGS::Handle_vAttachWait);
   RegisterMemberFunctionHandler(
   StringExtractorGDBRemote::eServerPacketType_vCont,
   &GDBRemoteCommunicationServerLLGS::Handle_vCont);
@@ -334,6 +337,71 @@ Status 
GDBRemoteCommunicationServerLLGS::AttachToProcess(lldb::pid_t pid) {
   return Status();
 }
 
+Status GDBRemoteCommunicationServerLLGS::AttachWaitProcess(
+llvm::StringRef process_name) {
+  Log *log(GetLogIfAnyCategoriesSet(LIBLLDB_LOG_PROCESS));
+
+  std::chrono::milliseconds polling_interval = std::chrono::milliseconds(1);
+
+  // Create the matcher used to search the process list.
+  ProcessInstanceInfoList exclusion_list;
+  ProcessInstanceInfoMatch match_info;
+  match_info.GetProcessInfo().GetExecutableFile().SetFile(
+  process_name, llvm::sys::path::Style::posix);
+  match_info.SetNameMatchType(NameMatch::EndsWith);
+
+  // Create the excluded process list before polling begins.
+  Host::FindProcesses(match_info, exclusion_list);
+  LLDB_LOG(log, "placed '{0}' processes in the exclusion list.",
+   exclusion_list.size());
+
+  LLDB_LOG(log, "waiting for '{0}' to appear", process_name);
+
+  auto is_in_exclusion_list =
+  [&exclusion_list](const ProcessInstanceInfo &info) {
+for (auto &excluded : exclusion_list) {
+  if (excluded.GetProcessID() == info.GetProcessID())
+return true;
+}
+return false;
+  };
+
+  ProcessInstanceInfoList loop_process_list;
+  while (true) {
+loop_process_list.clear();
+if (Host::FindProcesses(match_info, loop_process_list)) {
+  // Remove all the elements that are in the exclusion list.
+  llvm::erase_if(loop_process_list, is_in_exclusion_list);
+
+  // One match! We found the desired process.
+  if (loop_process_list.size() == 1) {
+auto matching_process_pid = loop_process_list[0].GetProcessID();
+LLDB_LOG(log, "found pid {0}", matching_process_pid);
+return AttachToProcess(matching_process_pid);
+  }
+
+  // Multiple matches! Return an error reporting the PIDs we found.
+  if (loop_process_list.size() > 1) {
+StreamString error_stream;
+error_stream.Format(
+"Multiple executables with name: '{0}' found. Pids: ",
+process_name);
+for (size_t i = 0; i < loop_process_list.size() - 1; ++i) {
+  error_stream.Format("{0}, ", loop_process_list[i].GetProcessID());
+}
+error_stream.Format("{0}.", loop_process_list.back().GetProcessID());
+
+Status error;
+error.SetErrorString(error_stream.GetString());
+return error;
+  }
+}
+// No matches, we have not found the process. Sleep until next poll.
+LLDB_LOG(log, "sleep {0} seconds", polling_interval);
+std::this_thread::sleep_for(polling_interval);
+  }
+}
+
 void GDBRemoteCommunicationServerLLGS::InitializeDelegate(
 NativeProcessProtocol *process) {
   assert(process && "process cannot be NULL");
@@ -3188,6 +3256,36 @@ GDBRemoteCommunicationServerLLGS::Handle_vAttach(
   return SendStopReasonForState(m_debugged_process_up->GetState());
 }
 
+GDBRemoteCommunication::PacketResult
+GDBRemoteCommunicationServerLLGS::Handle_vAttachWait(
+StringExtractorGDBRemote &packet) {
+  Log *log(GetLogIfAnyCategoriesSet(LIBLLDB_LOG_PROCESS));
+
+  // Consume the ';' after the identifier.
+  packet.SetFilePos(strlen("vAttachWait")

[llvm-branch-commits] [mlir] ed205f6 - [mlir] Update doc to omit the usage of LLVMIntegerType

[Alex Zinenko via llvm-branch-commits]

Author: lewuathe
Date: 2021-01-14T09:29:24+01:00
New Revision: ed205f63b4a288ccbffc9af58333d09a7cec40dc

URL: 
https://github.com/llvm/llvm-project/commit/ed205f63b4a288ccbffc9af58333d09a7cec40dc
DIFF: 
https://github.com/llvm/llvm-project/commit/ed205f63b4a288ccbffc9af58333d09a7cec40dc.diff

LOG: [mlir] Update doc to omit the usage of LLVMIntegerType

Since [[ https://reviews.llvm.org/D94178 | the LLVMIntegerType was replaced 
with build-in integer type ]], the usage in the tutorial should be also updated 
accordingly.
We need to update chapter 6 for Toy tutorial specifically.

See: https://reviews.llvm.org/D94178

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D94651

Added: 


Modified: 
mlir/docs/Tutorials/Toy/Ch-6.md

Removed: 




diff  --git a/mlir/docs/Tutorials/Toy/Ch-6.md b/mlir/docs/Tutorials/Toy/Ch-6.md
index 1093ae9fe2ba..bddd93688ddb 100644
--- a/mlir/docs/Tutorials/Toy/Ch-6.md
+++ b/mlir/docs/Tutorials/Toy/Ch-6.md
@@ -37,9 +37,9 @@ static FlatSymbolRefAttr getOrInsertPrintf(PatternRewriter 
&rewriter,
 
   // Create a function declaration for printf, the signature is:
   //   * `i32 (i8*, ...)`
-  auto llvmI32Ty = LLVM::LLVMIntegerType::get(context, 32);
+  auto llvmI32Ty = IntegerType::get(context, 32);
   auto llvmI8PtrTy =
-  LLVM::LLVMPointerType::get(LLVM::LLVMIntegerType::get(context, 8));
+  LLVM::LLVMPointerType::get(IntegerType::get(context, 8));
   auto llvmFnType = LLVM::LLVMFunctionType::get(llvmI32Ty, llvmI8PtrTy,
 /*isVarArg=*/true);
 



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[llvm-branch-commits] [lldb] 4b284b9 - [lldb] Fix TestPlatformProcessConnect.py

[Pavel Labath via llvm-branch-commits]

Author: Pavel Labath
Date: 2021-01-14T09:49:19+01:00
New Revision: 4b284b9ca8098e284b8d965a633b71bd283043d6

URL: 
https://github.com/llvm/llvm-project/commit/4b284b9ca8098e284b8d965a633b71bd283043d6
DIFF: 
https://github.com/llvm/llvm-project/commit/4b284b9ca8098e284b8d965a633b71bd283043d6.diff

LOG: [lldb] Fix TestPlatformProcessConnect.py

The test was marked as remote-only, which means it was run ~never, and
accumulated various problems. This commit modifies the test to run
locally and includes a couple of other fixes necessary to make it run:
- moves the "invoke" method into the "Base" test class
- adds []'s around the IP address in a couple more places to make things
  work with IPv6

The test is now marked as skipped when running the remote test suite. It
would be possible to make it run both locally and remotely, but this
would require writing a lot special logic for the remote case, and that
is not worth it.

Added: 


Modified: 
lldb/packages/Python/lldbsuite/test/lldbtest.py
lldb/source/Plugins/Platform/gdb-server/PlatformRemoteGDBServer.cpp

lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp

lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py

Removed: 




diff  --git a/lldb/packages/Python/lldbsuite/test/lldbtest.py 
b/lldb/packages/Python/lldbsuite/test/lldbtest.py
index d240050cc4c6..c377b64e9b9e 100644
--- a/lldb/packages/Python/lldbsuite/test/lldbtest.py
+++ b/lldb/packages/Python/lldbsuite/test/lldbtest.py
@@ -1765,6 +1765,19 @@ def cleanup(self, dictionary=None):
 "Don't know how to do cleanup with dictionary: " +
 dictionary)
 
+def invoke(self, obj, name, trace=False):
+"""Use reflection to call a method dynamically with no argument."""
+trace = (True if traceAlways else trace)
+
+method = getattr(obj, name)
+import inspect
+self.assertTrue(inspect.ismethod(method),
+name + "is a method name of object: " + str(obj))
+result = method()
+with recording(self, trace) as sbuf:
+print(str(method) + ":", result, file=sbuf)
+return result
+
 def getLLDBLibraryEnvVal(self):
 """ Returns the path that the OS-specific library search environment 
variable
 (self.dylibPath) should be set to in order for a program to find 
the LLDB
@@ -2624,19 +2637,6 @@ def expect_var_path(
 value_check.check_value(self, eval_result, str(eval_result))
 return eval_result
 
-def invoke(self, obj, name, trace=False):
-"""Use reflection to call a method dynamically with no argument."""
-trace = (True if traceAlways else trace)
-
-method = getattr(obj, name)
-import inspect
-self.assertTrue(inspect.ismethod(method),
-name + "is a method name of object: " + str(obj))
-result = method()
-with recording(self, trace) as sbuf:
-print(str(method) + ":", result, file=sbuf)
-return result
-
 def build(
 self,
 architecture=None,

diff  --git 
a/lldb/source/Plugins/Platform/gdb-server/PlatformRemoteGDBServer.cpp 
b/lldb/source/Plugins/Platform/gdb-server/PlatformRemoteGDBServer.cpp
index a64ee2634e2b..6a4275d249f6 100644
--- a/lldb/source/Plugins/Platform/gdb-server/PlatformRemoteGDBServer.cpp
+++ b/lldb/source/Plugins/Platform/gdb-server/PlatformRemoteGDBServer.cpp
@@ -825,7 +825,7 @@ std::string PlatformRemoteGDBServer::MakeUrl(const char 
*scheme,
  const char *hostname,
  uint16_t port, const char *path) {
   StreamString result;
-  result.Printf("%s://%s", scheme, hostname);
+  result.Printf("%s://[%s]", scheme, hostname);
   if (port != 0)
 result.Printf(":%u", port);
   if (path)

diff  --git 
a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp
 
b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp
index 4aa153460941..3462fb7ec8b9 100644
--- 
a/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp
+++ 
b/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp
@@ -205,7 +205,7 @@ Status 
GDBRemoteCommunicationServerPlatform::LaunchGDBServer(
platform_port, platform_path);
 UNUSED_IF_ASSERT_DISABLED(ok);
 assert(ok);
-url << platform_ip.str() << ":" << *port;
+url << '[' << platform_ip.str() << "]:" << *port;
   } else {
 socket_name = GetDomainSocketPath("gdbserver").GetPath();
 url << socket_name;

diff  --git 
a/lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
 
b/lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
index 17738

[llvm-branch-commits] [llvm] 259936f - [NFC][AsmPrinter] Windows warning: Use explicit cast

[David Stuttard via llvm-branch-commits]

Author: David Stuttard
Date: 2021-01-14T09:10:31Z
New Revision: 259936f4910ad7da7589f81862fc855386ae8621

URL: 
https://github.com/llvm/llvm-project/commit/259936f4910ad7da7589f81862fc855386ae8621
DIFF: 
https://github.com/llvm/llvm-project/commit/259936f4910ad7da7589f81862fc855386ae8621.diff

LOG: [NFC][AsmPrinter] Windows warning: Use explicit cast

static_cast for uint64_t to unsigned gives a MS VC build warning
for Windows:

warning C4309: 'static_cast': truncation of constant value

Use an explicit cast instead.

Change-Id: I692d335b4913070686a102780c1fb05b893a2f69

Differential Revision: https://reviews.llvm.org/D94592

Added: 


Modified: 
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp 
b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index f4749f8ca95d..85754bf29d0c 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -846,7 +846,7 @@ static void emitComments(const MachineInstr &MI, 
raw_ostream &CommentOS) {
 CommentOS << *Size << "-byte Reload\n";
   } else if ((Size = MI.getFoldedRestoreSize(TII))) {
 if (*Size) {
-  if (*Size == static_cast(MemoryLocation::UnknownSize))
+  if (*Size == unsigned(MemoryLocation::UnknownSize))
 CommentOS << "Unknown-size Folded Reload\n";
   else
 CommentOS << *Size << "-byte Folded Reload\n";
@@ -855,7 +855,7 @@ static void emitComments(const MachineInstr &MI, 
raw_ostream &CommentOS) {
 CommentOS << *Size << "-byte Spill\n";
   } else if ((Size = MI.getFoldedSpillSize(TII))) {
 if (*Size) {
-  if (*Size == static_cast(MemoryLocation::UnknownSize))
+  if (*Size == unsigned(MemoryLocation::UnknownSize))
 CommentOS << "Unknown-size Folded Spill\n";
   else
 CommentOS << *Size << "-byte Folded Spill\n";



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[llvm-branch-commits] [clang] 2b1e25b - [AArch64] Adding ACLE intrinsics for the LS64 extension

[Lucas Prates via llvm-branch-commits]

Author: Lucas Prates
Date: 2021-01-14T09:43:58Z
New Revision: 2b1e25befefc20f012aa49011f46e11e8530ee21

URL: 
https://github.com/llvm/llvm-project/commit/2b1e25befefc20f012aa49011f46e11e8530ee21
DIFF: 
https://github.com/llvm/llvm-project/commit/2b1e25befefc20f012aa49011f46e11e8530ee21.diff

LOG: [AArch64] Adding ACLE intrinsics for the LS64 extension

This introduces the ARMv8.7-A LS64 extension's intrinsics for 64 bytes
atomic loads and stores: `__arm_ld64b`, `__arm_st64b`, `__arm_st64bv`,
and `__arm_st64bv0`. These are selected into the LS64 instructions
LD64B, ST64B, ST64BV and ST64BV0, respectively.

Based on patches written by Simon Tatham.

Reviewed By: tmatheson

Differential Revision: https://reviews.llvm.org/D93232

Added: 
clang/test/CodeGen/aarch64-ls64.c
llvm/test/CodeGen/AArch64/ls64-intrinsics.ll

Modified: 
clang/include/clang/Basic/BuiltinsAArch64.def
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/arm_acle.h
clang/test/Preprocessor/aarch64-target-features.c
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/lib/Target/AArch64/AArch64InstrInfo.td

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsAArch64.def 
b/clang/include/clang/Basic/BuiltinsAArch64.def
index c684105908de..b35510f8b691 100644
--- a/clang/include/clang/Basic/BuiltinsAArch64.def
+++ b/clang/include/clang/Basic/BuiltinsAArch64.def
@@ -99,6 +99,12 @@ BUILTIN(__builtin_arm_tcommit, "v", "n")
 BUILTIN(__builtin_arm_tcancel, "vWUIi", "n")
 BUILTIN(__builtin_arm_ttest, "WUi", "nc")
 
+// Armv8.7-A load/store 64-byte intrinsics
+BUILTIN(__builtin_arm_ld64b, "vvC*WUi*", "n")
+BUILTIN(__builtin_arm_st64b, "vv*WUiC*", "n")
+BUILTIN(__builtin_arm_st64bv, "WUiv*WUiC*", "n")
+BUILTIN(__builtin_arm_st64bv0, "WUiv*WUiC*", "n")
+
 TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", "intrin.h", 
ALL_MS_LANGUAGES, "")
 TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", "intrin.h", 
ALL_MS_LANGUAGES, "")
 TARGET_HEADER_BUILTIN(_BitScanForward64, "UcUNi*ULLi", "nh", "intrin.h", 
ALL_MS_LANGUAGES, "")

diff  --git a/clang/lib/Basic/Targets/AArch64.cpp 
b/clang/lib/Basic/Targets/AArch64.cpp
index 312c822ebb05..f17134623b8b 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -356,6 +356,9 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions 
&Opts,
   if (Opts.BranchTargetEnforcement)
 Builder.defineMacro("__ARM_FEATURE_BTI_DEFAULT", "1");
 
+  if (HasLS64)
+Builder.defineMacro("__ARM_FEATURE_LS64", "1");
+
   switch (ArchKind) {
   default:
 break;

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index cf84ad34e1ec..7fa4e4d270ad 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -8979,6 +8979,46 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned 
BuiltinID,
 CGM.getIntrinsic(Intrinsic::aarch64_fjcvtzs), Arg);
   }
 
+  if (BuiltinID == AArch64::BI__builtin_arm_ld64b ||
+  BuiltinID == AArch64::BI__builtin_arm_st64b ||
+  BuiltinID == AArch64::BI__builtin_arm_st64bv ||
+  BuiltinID == AArch64::BI__builtin_arm_st64bv0) {
+llvm::Value *MemAddr = EmitScalarExpr(E->getArg(0));
+llvm::Value *ValPtr = EmitScalarExpr(E->getArg(1));
+
+if (BuiltinID == AArch64::BI__builtin_arm_ld64b) {
+  // Load from the address via an LLVM intrinsic, receiving a
+  // tuple of 8 i64 words, and store each one to ValPtr.
+  Function *F = CGM.getIntrinsic(Intrinsic::aarch64_ld64b);
+  llvm::Value *Val = Builder.CreateCall(F, MemAddr);
+  llvm::Value *ToRet;
+  for (size_t i = 0; i < 8; i++) {
+llvm::Value *ValOffsetPtr = Builder.CreateGEP(ValPtr, 
Builder.getInt32(i));
+Address Addr(ValOffsetPtr, CharUnits::fromQuantity(8));
+ToRet = Builder.CreateStore(Builder.CreateExtractValue(Val, i), Addr);
+  }
+  return ToRet;
+} else {
+  // Load 8 i64 words from ValPtr, and store them to the address
+  // via an LLVM intrinsic.
+  SmallVector Args;
+  Args.push_back(MemAddr);
+  for (size_t i = 0; i < 8; i++) {
+llvm::Value *ValOffsetPtr = Builder.CreateGEP(ValPtr, 
Builder.getInt32(i));
+Address Addr(ValOffsetPtr, CharUnits::fromQuantity(8));
+Args.push_back(Builder.CreateLoad(Addr));
+  }
+
+  auto Intr = (BuiltinID == AArch64::BI__builtin_arm_st64b
+   ? Intrinsic::aarch64_st64b
+   : BuiltinID == AArch64::BI__builtin_arm_st64bv
+ ? Intrinsic::aarch64_st64bv
+ : Intrinsic::aarch64_st64bv0);
+  Function *F = CGM.getIntrinsic(Intr);
+  return Builder.CreateCall(F, Args);
+}
+  }
+
   if (BuiltinID == AArch64::BI__clear_cache) {
 assert(E->getNumArgs() == 2 && "__

[llvm-branch-commits] [llvm] 4bb11b3 - [LTO] Expose opt() in LTOBackend (NFC).

[Florian Hahn via llvm-branch-commits]

Author: Florian Hahn
Date: 2021-01-14T09:53:41Z
New Revision: 4bb11b3eafbde75ab026ec180cae62799ba0fb3c

URL: 
https://github.com/llvm/llvm-project/commit/4bb11b3eafbde75ab026ec180cae62799ba0fb3c
DIFF: 
https://github.com/llvm/llvm-project/commit/4bb11b3eafbde75ab026ec180cae62799ba0fb3c.diff

LOG: [LTO] Expose opt() in LTOBackend (NFC).

Exposing opt() which runs middle-end LTO optimzation allows re-using it
in LTOCodeGenerator.

Reviewed By: steven_wu

Differential Revision: https://reviews.llvm.org/D94486

Added: 


Modified: 
llvm/include/llvm/LTO/LTOBackend.h
llvm/lib/LTO/LTOBackend.cpp

Removed: 




diff  --git a/llvm/include/llvm/LTO/LTOBackend.h 
b/llvm/include/llvm/LTO/LTOBackend.h
index db3c8c092ef9..824c7d143854 100644
--- a/llvm/include/llvm/LTO/LTOBackend.h
+++ b/llvm/include/llvm/LTO/LTOBackend.h
@@ -33,6 +33,12 @@ class Target;
 
 namespace lto {
 
+/// Runs middle-end LTO optimizations on \p Mod.
+bool opt(const Config &Conf, TargetMachine *TM, unsigned Task, Module &Mod,
+ bool IsThinLTO, ModuleSummaryIndex *ExportSummary,
+ const ModuleSummaryIndex *ImportSummary,
+ const std::vector &CmdArgs);
+
 /// Runs a regular LTO backend. The regular LTO backend can also act as the
 /// regular LTO phase of ThinLTO, which may need to access the combined index.
 Error backend(const Config &C, AddStreamFn AddStream,

diff  --git a/llvm/lib/LTO/LTOBackend.cpp b/llvm/lib/LTO/LTOBackend.cpp
index 112a0c0897e8..effbdf6cfd9e 100644
--- a/llvm/lib/LTO/LTOBackend.cpp
+++ b/llvm/lib/LTO/LTOBackend.cpp
@@ -358,10 +358,10 @@ static void runOldPMPasses(const Config &Conf, Module 
&Mod, TargetMachine *TM,
   passes.run(Mod);
 }
 
-static bool opt(const Config &Conf, TargetMachine *TM, unsigned Task,
-Module &Mod, bool IsThinLTO, ModuleSummaryIndex *ExportSummary,
-const ModuleSummaryIndex *ImportSummary,
-const std::vector &CmdArgs) {
+bool lto::opt(const Config &Conf, TargetMachine *TM, unsigned Task, Module 
&Mod,
+  bool IsThinLTO, ModuleSummaryIndex *ExportSummary,
+  const ModuleSummaryIndex *ImportSummary,
+  const std::vector &CmdArgs) {
   if (EmbedBitcode == LTOBitcodeEmbedding::EmbedPostMergePreOptimized) {
 // FIXME: the motivation for capturing post-merge bitcode and command line
 // is replicating the compilation environment from bitcode, without needing



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[llvm-branch-commits] [lld] 53e3b81 - [lld][WebAssembly] Add support for handling table symbols

[Andy Wingo via llvm-branch-commits]

Author: Andy Wingo
Date: 2021-01-14T11:13:13+01:00
New Revision: 53e3b81faaf32a495189182e0e4d635cbe19c5dd

URL: 
https://github.com/llvm/llvm-project/commit/53e3b81faaf32a495189182e0e4d635cbe19c5dd
DIFF: 
https://github.com/llvm/llvm-project/commit/53e3b81faaf32a495189182e0e4d635cbe19c5dd.diff

LOG: [lld][WebAssembly] Add support for handling table symbols

This commit adds table symbol support in a partial way, while still
including some special cases for the __indirect_function_table symbol.
No change in tests.

Differential Revision: https://reviews.llvm.org/D94075

Added: 
lld/wasm/InputTable.h

Modified: 
lld/include/lld/Common/LLVM.h
lld/wasm/InputChunks.cpp
lld/wasm/InputFiles.cpp
lld/wasm/InputFiles.h
lld/wasm/MarkLive.cpp
lld/wasm/SymbolTable.cpp
lld/wasm/SymbolTable.h
lld/wasm/Symbols.cpp
lld/wasm/Symbols.h
lld/wasm/SyntheticSections.cpp
lld/wasm/SyntheticSections.h
lld/wasm/Writer.cpp
lld/wasm/WriterUtils.cpp
lld/wasm/WriterUtils.h
llvm/include/llvm/BinaryFormat/Wasm.h
llvm/include/llvm/Object/Wasm.h
llvm/lib/Object/WasmObjectFile.cpp
llvm/tools/llvm-readobj/WasmDumper.cpp

Removed: 




diff  --git a/lld/include/lld/Common/LLVM.h b/lld/include/lld/Common/LLVM.h
index 663944771aa9..f6eca27b02ff 100644
--- a/lld/include/lld/Common/LLVM.h
+++ b/lld/include/lld/Common/LLVM.h
@@ -49,8 +49,11 @@ struct WasmEventType;
 struct WasmFunction;
 struct WasmGlobal;
 struct WasmGlobalType;
+struct WasmLimits;
 struct WasmRelocation;
 struct WasmSignature;
+struct WasmTable;
+struct WasmTableType;
 } // namespace wasm
 } // namespace llvm
 
@@ -88,8 +91,11 @@ using llvm::wasm::WasmEventType;
 using llvm::wasm::WasmFunction;
 using llvm::wasm::WasmGlobal;
 using llvm::wasm::WasmGlobalType;
+using llvm::wasm::WasmLimits;
 using llvm::wasm::WasmRelocation;
 using llvm::wasm::WasmSignature;
+using llvm::wasm::WasmTable;
+using llvm::wasm::WasmTableType;
 } // end namespace lld.
 
 namespace std {

diff  --git a/lld/wasm/InputChunks.cpp b/lld/wasm/InputChunks.cpp
index 52d19e6ddc10..d8c5f84c0487 100644
--- a/lld/wasm/InputChunks.cpp
+++ b/lld/wasm/InputChunks.cpp
@@ -69,6 +69,7 @@ void InputChunk::verifyRelocTargets() const {
 case R_WASM_GLOBAL_INDEX_LEB:
 case R_WASM_EVENT_INDEX_LEB:
 case R_WASM_MEMORY_ADDR_LEB:
+case R_WASM_TABLE_NUMBER_LEB:
   existingValue = decodeULEB128(loc, &bytesRead);
   break;
 case R_WASM_MEMORY_ADDR_LEB64:
@@ -152,6 +153,7 @@ void InputChunk::writeTo(uint8_t *buf) const {
 case R_WASM_GLOBAL_INDEX_LEB:
 case R_WASM_EVENT_INDEX_LEB:
 case R_WASM_MEMORY_ADDR_LEB:
+case R_WASM_TABLE_NUMBER_LEB:
   encodeULEB128(value, loc, 5);
   break;
 case R_WASM_MEMORY_ADDR_LEB64:
@@ -233,6 +235,7 @@ static unsigned writeCompressedReloc(uint8_t *buf, const 
WasmRelocation &rel,
   case R_WASM_EVENT_INDEX_LEB:
   case R_WASM_MEMORY_ADDR_LEB:
   case R_WASM_MEMORY_ADDR_LEB64:
+  case R_WASM_TABLE_NUMBER_LEB:
 return encodeULEB128(value, buf);
   case R_WASM_TABLE_INDEX_SLEB:
   case R_WASM_TABLE_INDEX_SLEB64:
@@ -251,6 +254,7 @@ static unsigned getRelocWidthPadded(const WasmRelocation 
&rel) {
   case R_WASM_GLOBAL_INDEX_LEB:
   case R_WASM_EVENT_INDEX_LEB:
   case R_WASM_MEMORY_ADDR_LEB:
+  case R_WASM_TABLE_NUMBER_LEB:
   case R_WASM_TABLE_INDEX_SLEB:
   case R_WASM_MEMORY_ADDR_SLEB:
 return 5;

diff  --git a/lld/wasm/InputFiles.cpp b/lld/wasm/InputFiles.cpp
index eb37ae548b80..1d0f016f325a 100644
--- a/lld/wasm/InputFiles.cpp
+++ b/lld/wasm/InputFiles.cpp
@@ -11,6 +11,7 @@
 #include "InputChunks.h"
 #include "InputEvent.h"
 #include "InputGlobal.h"
+#include "InputTable.h"
 #include "OutputSegment.h"
 #include "SymbolTable.h"
 #include "lld/Common/ErrorHandler.h"
@@ -94,7 +95,8 @@ void ObjFile::dumpInfo() const {
   "\n  Symbols : " + Twine(symbols.size()) +
   "\n Function Imports : " + Twine(wasmObj->getNumImportedFunctions()) 
+
   "\n   Global Imports : " + Twine(wasmObj->getNumImportedGlobals()) +
-  "\nEvent Imports : " + Twine(wasmObj->getNumImportedEvents()));
+  "\nEvent Imports : " + Twine(wasmObj->getNumImportedEvents()) +
+  "\nTable Imports : " + Twine(wasmObj->getNumImportedTables()));
 }
 
 // Relocations contain either symbol or type indices.  This function takes a
@@ -188,7 +190,8 @@ uint64_t ObjFile::calcExpectedValue(const WasmRelocation 
&reloc) const {
   case R_WASM_FUNCTION_INDEX_LEB:
   case R_WASM_GLOBAL_INDEX_LEB:
   case R_WASM_GLOBAL_INDEX_I32:
-  case R_WASM_EVENT_INDEX_LEB: {
+  case R_WASM_EVENT_INDEX_LEB:
+  case R_WASM_TABLE_NUMBER_LEB: {
 const WasmSymbol &sym = wasmObj->syms()[reloc.Index];
 return sym.Info.ElementIndex;
   }
@@ -270,6 +273,8 @@ uint64_t ObjFile::calcNewValue(const WasmRelocation &reloc, 
uint64_t tombstone)
   }
   case R_WASM_SECTION_OFFSET_I32:

[llvm-branch-commits] [llvm] d58512b - [SLP] Don't vectorize stores of non-packed types (like i1, i2)

[Bjorn Pettersson via llvm-branch-commits]

Author: Bjorn Pettersson
Date: 2021-01-14T11:30:33+01:00
New Revision: d58512b2e31a255dccc2c9a351a4e47b2b4c9f79

URL: 
https://github.com/llvm/llvm-project/commit/d58512b2e31a255dccc2c9a351a4e47b2b4c9f79
DIFF: 
https://github.com/llvm/llvm-project/commit/d58512b2e31a255dccc2c9a351a4e47b2b4c9f79.diff

LOG: [SLP] Don't vectorize stores of non-packed types (like i1, i2)

In the spirit of commit fc783e91e0c0696e (llvm-svn: 248943) we
shouldn't vectorize stores of non-packed types (i.e. types that
has padding between consecutive variables in a scalar layout,
but being packed in a vector layout).

The problem was detected as a miscompile in a downstream test case.

Reviewed By: anton-afanasyev

Differential Revision: https://reviews.llvm.org/D94446

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
llvm/test/Transforms/SLPVectorizer/X86/bad_types.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp 
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index b3a3d65d3340..0f3f74b63860 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -3094,6 +3094,16 @@ void BoUpSLP::buildTree_rec(ArrayRef VL, 
unsigned Depth,
 case Instruction::Store: {
   // Check if the stores are consecutive or if we need to swizzle them.
   llvm::Type *ScalarTy = 
cast(VL0)->getValueOperand()->getType();
+  // Avoid types that are padded when being allocated as scalars, while
+  // being packed together in a vector (such as i1).
+  if (DL->getTypeSizeInBits(ScalarTy) !=
+  DL->getTypeAllocSizeInBits(ScalarTy)) {
+BS.cancelScheduling(VL, VL0);
+newTreeEntry(VL, None /*not vectorized*/, S, UserTreeIdx,
+ ReuseShuffleIndicies);
+LLVM_DEBUG(dbgs() << "SLP: Gathering stores of non-packed type.\n");
+return;
+  }
   // Make sure all stores in the bundle are simple - we can't vectorize
   // atomic or volatile stores.
   SmallVector PointerOps(VL.size());

diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/bad_types.ll 
b/llvm/test/Transforms/SLPVectorizer/X86/bad_types.ll
index 93a97c3c2405..8c0b9b184130 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/bad_types.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/bad_types.ll
@@ -113,7 +113,6 @@ declare void @f(i64, i64)
 
 define void @test4(i32 %a, i28* %ptr) {
 ; Check that we do not vectorize types that are padded to a bigger ones.
-; FIXME: This is not correct! See D94446.
 ;
 ; CHECK-LABEL: @test4(
 ; CHECK-NEXT:  entry:
@@ -121,12 +120,10 @@ define void @test4(i32 %a, i28* %ptr) {
 ; CHECK-NEXT:[[GEP1:%.*]] = getelementptr i28, i28* [[PTR:%.*]], i32 1
 ; CHECK-NEXT:[[GEP2:%.*]] = getelementptr i28, i28* [[PTR]], i32 2
 ; CHECK-NEXT:[[GEP3:%.*]] = getelementptr i28, i28* [[PTR]], i32 3
-; CHECK-NEXT:[[TMP0:%.*]] = insertelement <4 x i28> poison, i28 [[TRUNC]], 
i32 0
-; CHECK-NEXT:[[TMP1:%.*]] = insertelement <4 x i28> [[TMP0]], i28 
[[TRUNC]], i32 1
-; CHECK-NEXT:[[TMP2:%.*]] = insertelement <4 x i28> [[TMP1]], i28 
[[TRUNC]], i32 2
-; CHECK-NEXT:[[TMP3:%.*]] = insertelement <4 x i28> [[TMP2]], i28 
[[TRUNC]], i32 3
-; CHECK-NEXT:[[TMP4:%.*]] = bitcast i28* [[PTR]] to <4 x i28>*
-; CHECK-NEXT:store <4 x i28> [[TMP3]], <4 x i28>* [[TMP4]], align 4
+; CHECK-NEXT:store i28 [[TRUNC]], i28* [[PTR]], align 4
+; CHECK-NEXT:store i28 [[TRUNC]], i28* [[GEP1]], align 4
+; CHECK-NEXT:store i28 [[TRUNC]], i28* [[GEP2]], align 4
+; CHECK-NEXT:store i28 [[TRUNC]], i28* [[GEP3]], align 4
 ; CHECK-NEXT:ret void
 ;
 entry:



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[llvm-branch-commits] [clang] 17f8c45 - [clang] Use SourceLocations in unions [NFCI]

[Mikhail Maltsev via llvm-branch-commits]

Author: Mikhail Maltsev
Date: 2021-01-14T10:56:53Z
New Revision: 17f8c458de631c0311828931a5bdf72b1a13c29d

URL: 
https://github.com/llvm/llvm-project/commit/17f8c458de631c0311828931a5bdf72b1a13c29d
DIFF: 
https://github.com/llvm/llvm-project/commit/17f8c458de631c0311828931a5bdf72b1a13c29d.diff

LOG: [clang] Use SourceLocations in unions [NFCI]

Currently, there are many instances where `SourceLocation` objects are
converted to raw representation to be stored in structs that are
used as fields of tagged unions.

This is done to make the corresponding structs trivial.
Triviality allows avoiding undefined behavior when implicitly changing
the active member of the union.

However, in most cases, we can explicitly construct an active member
using placement new. This patch adds the required active member
selections and replaces `SourceLocation`-s represented as
`unsigned int` with proper `SourceLocation`-s.

One notable exception is `DeclarationNameLoc`: the objects of this class
are often not properly initialized (so the code currently relies on
its default constructor which uses memset). This class will be fixed
in a separate patch.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D94237

Added: 


Modified: 
clang/include/clang/AST/DependentDiagnostic.h
clang/include/clang/AST/Expr.h
clang/include/clang/AST/TemplateBase.h
clang/include/clang/Basic/SourceManager.h
clang/include/clang/Sema/DeclSpec.h
clang/include/clang/Sema/Designator.h
clang/include/clang/Sema/Initialization.h
clang/lib/AST/Expr.cpp
clang/lib/AST/TemplateBase.cpp
clang/lib/Parse/ParseDeclCXX.cpp
clang/lib/Sema/DeclSpec.cpp
clang/lib/Sema/SemaDecl.cpp
clang/lib/Sema/SemaExpr.cpp
clang/lib/Sema/SemaType.cpp

Removed: 




diff  --git a/clang/include/clang/AST/DependentDiagnostic.h 
b/clang/include/clang/AST/DependentDiagnostic.h
index 5a8624608e74..18276d54d540 100644
--- a/clang/include/clang/AST/DependentDiagnostic.h
+++ b/clang/include/clang/AST/DependentDiagnostic.h
@@ -48,7 +48,7 @@ class DependentDiagnostic {
  QualType BaseObjectType,
  const PartialDiagnostic &PDiag) {
 DependentDiagnostic *DD = Create(Context, Parent, PDiag);
-DD->AccessData.Loc = Loc.getRawEncoding();
+DD->AccessData.Loc = Loc;
 DD->AccessData.IsMember = IsMemberAccess;
 DD->AccessData.Access = AS;
 DD->AccessData.TargetDecl = TargetDecl;
@@ -73,7 +73,7 @@ class DependentDiagnostic {
 
   SourceLocation getAccessLoc() const {
 assert(getKind() == Access);
-return SourceLocation::getFromRawEncoding(AccessData.Loc);
+return AccessData.Loc;
   }
 
   NamedDecl *getAccessTarget() const {
@@ -112,7 +112,7 @@ class DependentDiagnostic {
   PartialDiagnostic Diag;
 
   struct {
-unsigned Loc;
+SourceLocation Loc;
 unsigned Access : 2;
 unsigned IsMember : 1;
 NamedDecl *TargetDecl;

diff  --git a/clang/include/clang/AST/Expr.h b/clang/include/clang/AST/Expr.h
index c8d87ec48a3f..a44d06967431 100644
--- a/clang/include/clang/AST/Expr.h
+++ b/clang/include/clang/AST/Expr.h
@@ -4994,10 +4994,10 @@ class DesignatedInitExpr final
 uintptr_t NameOrField;
 
 /// The location of the '.' in the designated initializer.
-unsigned DotLoc;
+SourceLocation DotLoc;
 
 /// The location of the field name in the designated initializer.
-unsigned FieldLoc;
+SourceLocation FieldLoc;
   };
 
   /// An array or GNU array-range designator, e.g., "[9]" or "[10..15]".
@@ -5006,12 +5006,12 @@ class DesignatedInitExpr final
 /// initializer expression's list of subexpressions.
 unsigned Index;
 /// The location of the '[' starting the array range designator.
-unsigned LBracketLoc;
+SourceLocation LBracketLoc;
 /// The location of the ellipsis separating the start and end
 /// indices. Only valid for GNU array-range designators.
-unsigned EllipsisLoc;
+SourceLocation EllipsisLoc;
 /// The location of the ']' terminating the array range designator.
-unsigned RBracketLoc;
+SourceLocation RBracketLoc;
   };
 
   /// Represents a single C99 designator.
@@ -5043,29 +5043,32 @@ class DesignatedInitExpr final
 Designator(const IdentifierInfo *FieldName, SourceLocation DotLoc,
SourceLocation FieldLoc)
   : Kind(FieldDesignator) {
+  new (&Field) DesignatedInitExpr::FieldDesignator;
   Field.NameOrField = reinterpret_cast(FieldName) | 0x01;
-  Field.DotLoc = DotLoc.getRawEncoding();
-  Field.FieldLoc = FieldLoc.getRawEncoding();
+  Field.DotLoc = DotLoc;
+  Field.FieldLoc = FieldLoc;
 }
 
 /// Initializes an array designator.
 Designator(unsigned Index, SourceLocation LBracketLoc,
SourceLocation RBracketLoc)
   : Kind(ArrayDesignator) {
+  new (&ArrayOrRange) Desi

[llvm-branch-commits] [llvm] af8d27a - [DAG] visitVECTOR_SHUFFLE - pull out shuffle merging code into lambda helper. NFCI.

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-14T11:05:19Z
New Revision: af8d27a7a8266b89916b5e4db2b2fd97eb7d84e5

URL: 
https://github.com/llvm/llvm-project/commit/af8d27a7a8266b89916b5e4db2b2fd97eb7d84e5
DIFF: 
https://github.com/llvm/llvm-project/commit/af8d27a7a8266b89916b5e4db2b2fd97eb7d84e5.diff

LOG: [DAG] visitVECTOR_SHUFFLE - pull out shuffle merging code into lambda 
helper. NFCI.

Make it easier to reuse in a future patch.

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 24bc7fe7e0ad..f4c9b814b806 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -20823,30 +20823,19 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
   return DAG.getCommutedVectorShuffle(*SVN);
   }
 
-  // Try to fold according to rules:
-  //   shuffle(shuffle(A, B, M0), C, M1) -> shuffle(A, B, M2)
-  //   shuffle(shuffle(A, B, M0), C, M1) -> shuffle(A, C, M2)
-  //   shuffle(shuffle(A, B, M0), C, M1) -> shuffle(B, C, M2)
-  // Don't try to fold shuffles with illegal type.
-  // Only fold if this shuffle is the only user of the other shuffle.
-  if (N0.getOpcode() == ISD::VECTOR_SHUFFLE && N->isOnlyUserOf(N0.getNode()) &&
-  Level < AfterLegalizeDAG && TLI.isTypeLegal(VT)) {
-ShuffleVectorSDNode *OtherSV = cast(N0);
-
+  // Compute the combined shuffle mask for a shuffle with SV0 as the first
+  // operand, and SV1 as the second operand.
+  // i.e. Merge SVN(OtherSVN, N1) -> shuffle(SV0, SV1, Mask).
+  auto MergeInnerShuffle = [NumElts](ShuffleVectorSDNode *SVN,
+ ShuffleVectorSDNode *OtherSVN, SDValue N1,
+ SDValue &SV0, SDValue &SV1,
+ SmallVectorImpl &Mask) -> bool {
 // Don't try to fold splats; they're likely to simplify somehow, or they
 // might be free.
-if (OtherSV->isSplat())
-  return SDValue();
-
-// The incoming shuffle must be of the same type as the result of the
-// current shuffle.
-assert(OtherSV->getOperand(0).getValueType() == VT &&
-   "Shuffle types don't match");
+if (OtherSVN->isSplat())
+  return false;
 
-SDValue SV0, SV1;
-SmallVector Mask;
-// Compute the combined shuffle mask for a shuffle with SV0 as the first
-// operand, and SV1 as the second operand.
+Mask.clear();
 for (unsigned i = 0; i != NumElts; ++i) {
   int Idx = SVN->getMaskElt(i);
   if (Idx < 0) {
@@ -20859,15 +20848,14 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
   if (Idx < (int)NumElts) {
 // This shuffle index refers to the inner shuffle N0. Lookup the inner
 // shuffle mask to identify which vector is actually referenced.
-Idx = OtherSV->getMaskElt(Idx);
+Idx = OtherSVN->getMaskElt(Idx);
 if (Idx < 0) {
   // Propagate Undef.
   Mask.push_back(Idx);
   continue;
 }
-
-CurrentVec = (Idx < (int) NumElts) ? OtherSV->getOperand(0)
-   : OtherSV->getOperand(1);
+CurrentVec = (Idx < (int)NumElts) ? OtherSVN->getOperand(0)
+  : OtherSVN->getOperand(1);
   } else {
 // This shuffle index references an element within N1.
 CurrentVec = N1;
@@ -20892,31 +20880,52 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
 
   // Bail out if we cannot convert the shuffle pair into a single shuffle.
   if (SV1.getNode() && SV1 != CurrentVec)
-return SDValue();
+return false;
 
   // Ok. CurrentVec is the right hand side.
   // Update the mask accordingly.
   SV1 = CurrentVec;
   Mask.push_back(Idx + NumElts);
 }
+return true;
+  };
 
-// Check if all indices in Mask are Undef. In case, propagate Undef.
-if (llvm::all_of(Mask, [](int M) { return M < 0; }))
-  return DAG.getUNDEF(VT);
+  // Try to fold according to rules:
+  //   shuffle(shuffle(A, B, M0), C, M1) -> shuffle(A, B, M2)
+  //   shuffle(shuffle(A, B, M0), C, M1) -> shuffle(A, C, M2)
+  //   shuffle(shuffle(A, B, M0), C, M1) -> shuffle(B, C, M2)
+  // Don't try to fold shuffles with illegal type.
+  // Only fold if this shuffle is the only user of the other shuffle.
+  if (N0.getOpcode() == ISD::VECTOR_SHUFFLE && N->isOnlyUserOf(N0.getNode()) &&
+  Level < AfterLegalizeDAG && TLI.isTypeLegal(VT)) {
+ShuffleVectorSDNode *OtherSV = cast(N0);
+
+// The incoming shuffle must be of the same type as the result of the
+// current shuffle.
+assert(OtherSV->getOperand(0).getValueType() == VT &&
+   "Shuffle types don't match");
 
-if (!SV0.getNode())
-  SV0 = DAG.getUNDEF(VT);
-if (!SV1.getNode())
-  S

[llvm-branch-commits] [llvm] 8f1d7f3 - [X86] Improve sum-of-reductions v4f32 test coverage

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-14T11:05:19Z
New Revision: 8f1d7f3753ca132b310bbb0e62c394cfa75daee5

URL: 
https://github.com/llvm/llvm-project/commit/8f1d7f3753ca132b310bbb0e62c394cfa75daee5
DIFF: 
https://github.com/llvm/llvm-project/commit/8f1d7f3753ca132b310bbb0e62c394cfa75daee5.diff

LOG: [X86] Improve sum-of-reductions v4f32 test coverage

Ensure that the v4f32 reductions use a -0.0f start value and add fast-math test 
variant.

Added: 


Modified: 
llvm/test/CodeGen/X86/horizontal-sum.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/horizontal-sum.ll 
b/llvm/test/CodeGen/X86/horizontal-sum.ll
index 315e795d7a37..a5b34c482474 100644
--- a/llvm/test/CodeGen/X86/horizontal-sum.ll
+++ b/llvm/test/CodeGen/X86/horizontal-sum.ll
@@ -1,10 +1,10 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3   | FileCheck %s 
--check-prefixes=SSSE3,SSSE3-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3,fast-hops | FileCheck %s 
--check-prefixes=SSSE3,SSSE3-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s 
--check-prefixes=AVX,AVX-SLOW,AVX1-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx,fast-hops   | FileCheck %s 
--check-prefixes=AVX,AVX-FAST,AVX1-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2| FileCheck %s 
--check-prefixes=AVX,AVX-SLOW,AVX2-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2,fast-hops  | FileCheck %s 
--check-prefixes=AVX,AVX-FAST,AVX2-FAST
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3   | FileCheck %s 
--check-prefixes=SSSE3-SLOW
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3,fast-hops | FileCheck %s 
--check-prefixes=SSSE3-FAST
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s 
--check-prefixes=AVX-SLOW,AVX1-SLOW
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx,fast-hops   | FileCheck %s 
--check-prefixes=AVX-FAST,AVX1-FAST
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2| FileCheck %s 
--check-prefixes=AVX-SLOW,AVX2-SLOW
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2,fast-hops  | FileCheck %s 
--check-prefixes=AVX-FAST,AVX2-FAST
 
 ; Vectorized Pairwise Sum Reductions
 ; e.g.
@@ -954,77 +954,137 @@ define <4 x i32> @sequential_sum_v4i32_v4i32(<4 x i32> 
%0, <4 x i32> %1, <4 x i3
 ; }
 
 define <4 x float> @reduction_sum_v4f32_v4f32(<4 x float> %0, <4 x float> %1, 
<4 x float> %2, <4 x float> %3) {
-; SSSE3-LABEL: reduction_sum_v4f32_v4f32:
-; SSSE3:   # %bb.0:
-; SSSE3-NEXT:movshdup {{.*#+}} xmm5 = xmm0[1,1,3,3]
-; SSSE3-NEXT:movss {{.*#+}} xmm4 = mem[0],zero,zero,zero
-; SSSE3-NEXT:addss %xmm4, %xmm5
-; SSSE3-NEXT:movaps %xmm0, %xmm6
-; SSSE3-NEXT:unpckhpd {{.*#+}} xmm6 = xmm6[1],xmm0[1]
-; SSSE3-NEXT:addss %xmm5, %xmm6
-; SSSE3-NEXT:shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
-; SSSE3-NEXT:addss %xmm6, %xmm0
-; SSSE3-NEXT:movshdup {{.*#+}} xmm5 = xmm1[1,1,3,3]
-; SSSE3-NEXT:addss %xmm4, %xmm5
-; SSSE3-NEXT:movaps %xmm1, %xmm6
-; SSSE3-NEXT:unpckhpd {{.*#+}} xmm6 = xmm6[1],xmm1[1]
-; SSSE3-NEXT:addss %xmm5, %xmm6
-; SSSE3-NEXT:shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]
-; SSSE3-NEXT:addss %xmm6, %xmm1
-; SSSE3-NEXT:unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; SSSE3-NEXT:movshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]
-; SSSE3-NEXT:addss %xmm4, %xmm1
-; SSSE3-NEXT:movaps %xmm2, %xmm5
-; SSSE3-NEXT:unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm2[1]
-; SSSE3-NEXT:addss %xmm1, %xmm5
-; SSSE3-NEXT:shufps {{.*#+}} xmm2 = xmm2[3,3,3,3]
-; SSSE3-NEXT:addss %xmm5, %xmm2
-; SSSE3-NEXT:movshdup {{.*#+}} xmm1 = xmm3[1,1,3,3]
-; SSSE3-NEXT:addss %xmm4, %xmm1
-; SSSE3-NEXT:movaps %xmm3, %xmm4
-; SSSE3-NEXT:unpckhpd {{.*#+}} xmm4 = xmm4[1],xmm3[1]
-; SSSE3-NEXT:addss %xmm1, %xmm4
-; SSSE3-NEXT:shufps {{.*#+}} xmm3 = xmm3[3,3,3,3]
-; SSSE3-NEXT:addss %xmm4, %xmm3
-; SSSE3-NEXT:unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
-; SSSE3-NEXT:movlhps {{.*#+}} xmm0 = xmm0[0],xmm2[0]
-; SSSE3-NEXT:retq
+; SSSE3-SLOW-LABEL: reduction_sum_v4f32_v4f32:
+; SSSE3-SLOW:   # %bb.0:
+; SSSE3-SLOW-NEXT:movshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
+; SSSE3-SLOW-NEXT:addss %xmm0, %xmm4
+; SSSE3-SLOW-NEXT:movaps %xmm0, %xmm5
+; SSSE3-SLOW-NEXT:unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm0[1]
+; SSSE3-SLOW-NEXT:addss %xmm4, %xmm5
+; SSSE3-SLOW-NEXT:shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
+; SSSE3-SLOW-NEXT:addss %xmm5, %xmm0
+; SSSE3-SLOW-NEXT:movshdup {{.*#+}} xmm4 = xmm1[1,1,3,3]
+; SSSE3-SLOW-NEXT:addss %xmm1, %xmm4
+; SSSE3-SLOW-NEXT:movaps %xmm1, %xmm5
+; SSSE3-SLOW-NEXT:unpckhpd {{.*#+}} xmm5 = xmm5[1],xmm1[1]
+; SSSE3-SLOW-NEXT:addss %xmm4, %xmm5
+; SSSE3-SLOW-NEXT:shufps {{.*#+}} xmm1 = xmm1[3,3,3,3]

[llvm-branch-commits] [lldb] a997a1d - [lldb/test] Ensure launched processes are ready to be attached

[Pavel Labath via llvm-branch-commits]

Author: Pavel Labath
Date: 2021-01-14T12:07:04+01:00
New Revision: a997a1d7fbe229433fb458bb0035b32424ecf3bd

URL: 
https://github.com/llvm/llvm-project/commit/a997a1d7fbe229433fb458bb0035b32424ecf3bd
DIFF: 
https://github.com/llvm/llvm-project/commit/a997a1d7fbe229433fb458bb0035b32424ecf3bd.diff

LOG: [lldb/test] Ensure launched processes are ready to be attached

Linux systems can be configured (and most of them are configured that
way) to disable attaching to unrelated processes, /unless/ those
processes explicitly allow that.

Our test inferiors do that by explicitly calling prctl(PR_SET_PTRACER,
PR_SET_PTRACER_ANY) (a.k.a., lldb_enable_attach). This requires
additional synchronization to ensure that the test does not attempt
attach before that statement is executed.

This is working fine (albeit cumbersome) for most tests but
TestGdbRemoteAttachWait is special in that it wants to start the
inferior _after_ issuing the attach request. This means that the usual
synchronization method does not work.

This patch introduces a different solution -- enable attaching in the
test harness, before the process is launched. Besides fixing this
problem, this is also better because it avoids the need to add special
code to each attach test (which is a common error).

One gotcha here is that it won't work for remote test suites, as we
don't control launching there. However, we could add a similar option to
lldb-platform, or require that lldb-platform itself is started with
attaching enabled. At that point we could delete all lldb_enable_attach
logic.

Added: 


Modified: 
lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
lldb/packages/Python/lldbsuite/test/lldbtest.py

Removed: 




diff  --git a/lldb/packages/Python/lldbsuite/test/lldbplatformutil.py 
b/lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
index 3d6402c13b47..94b133589dcc 100644
--- a/lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
+++ b/lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
@@ -4,11 +4,12 @@
 from __future__ import absolute_import
 
 # System modules
+import ctypes
 import itertools
+import os
 import re
 import subprocess
 import sys
-import os
 
 # Third-party modules
 import six
@@ -198,3 +199,14 @@ def hasChattyStderr(test_case):
 if match_android_device(test_case.getArchitecture(), ['aarch64'], 
range(22, 25+1)):
 return True  # The dynamic linker on the device will complain about 
unknown DT entries
 return False
+
+if getHostPlatform() == "linux":
+def enable_attach():
+"""Enable attaching to _this_ process, if host requires such an action.
+Suitable for use as a preexec_fn in subprocess.Popen and similar."""
+c = ctypes.CDLL(None)
+PR_SET_PTRACER = ctypes.c_int(0x59616d61)
+PR_SET_PTRACER_ANY = ctypes.c_ulong(-1)
+c.prctl(PR_SET_PTRACER, PR_SET_PTRACER_ANY)
+else:
+enable_attach = None

diff  --git a/lldb/packages/Python/lldbsuite/test/lldbtest.py 
b/lldb/packages/Python/lldbsuite/test/lldbtest.py
index c377b64e9b9e..958cadd3a7c8 100644
--- a/lldb/packages/Python/lldbsuite/test/lldbtest.py
+++ b/lldb/packages/Python/lldbsuite/test/lldbtest.py
@@ -384,7 +384,8 @@ def launch(self, executable, args):
 [executable] + args,
 stdout=open(
 os.devnull) if not self._trace_on else None,
-stdin=PIPE)
+stdin=PIPE,
+preexec_fn=lldbplatformutil.enable_attach)
 
 def terminate(self):
 if self._proc.poll() is None:



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[llvm-branch-commits] [llvm] 7c30c05 - [DAG] visitVECTOR_SHUFFLE - MergeInnerShuffle - reset shuffle ops and reorder early-out and second op matching. NFCI.

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-14T11:55:20Z
New Revision: 7c30c05ff71d062f0b8a05b7c3c12ede2c285371

URL: 
https://github.com/llvm/llvm-project/commit/7c30c05ff71d062f0b8a05b7c3c12ede2c285371
DIFF: 
https://github.com/llvm/llvm-project/commit/7c30c05ff71d062f0b8a05b7c3c12ede2c285371.diff

LOG: [DAG] visitVECTOR_SHUFFLE - MergeInnerShuffle - reset shuffle ops and 
reorder early-out and second op matching. NFCI.

I'm hoping to reuse MergeInnerShuffle in some other folds - so ensure the 
candidate ops/mask are reset at the start of each run.

Also, move the second op matching before bailing to make it simpler to try to 
match other things afterward.

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index f4c9b814b806..eaf9ad9ef6e2 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -20835,7 +20835,9 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
 if (OtherSVN->isSplat())
   return false;
 
+SV0 = SV1 = SDValue();
 Mask.clear();
+
 for (unsigned i = 0; i != NumElts; ++i) {
   int Idx = SVN->getMaskElt(i);
   if (Idx < 0) {
@@ -20877,15 +20879,16 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
 Mask.push_back(Idx);
 continue;
   }
+  if (!SV1.getNode() || SV1 == CurrentVec) {
+// Ok. CurrentVec is the right hand side.
+// Update the mask accordingly.
+SV1 = CurrentVec;
+Mask.push_back(Idx + NumElts);
+continue;
+  }
 
   // Bail out if we cannot convert the shuffle pair into a single shuffle.
-  if (SV1.getNode() && SV1 != CurrentVec)
-return false;
-
-  // Ok. CurrentVec is the right hand side.
-  // Update the mask accordingly.
-  SV1 = CurrentVec;
-  Mask.push_back(Idx + NumElts);
+  return false;
 }
 return true;
   };



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[llvm-branch-commits] [clang-tools-extra] 2e25be0 - [clangd] Add main file macros into the main-file index.

[Aleksandr Platonov via llvm-branch-commits]

Author: Aleksandr Platonov
Date: 2021-01-14T15:10:17+03:00
New Revision: 2e25be0b6134e9544f7cee7bb7b31a921ca37cc0

URL: 
https://github.com/llvm/llvm-project/commit/2e25be0b6134e9544f7cee7bb7b31a921ca37cc0
DIFF: 
https://github.com/llvm/llvm-project/commit/2e25be0b6134e9544f7cee7bb7b31a921ca37cc0.diff

LOG: [clangd] Add main file macros into the main-file index.

This patch is a try to fix `WorkspaceSymbols.Macros` test after D93796.
If a macro definition is in the preamble section, then it appears to be in the 
preamble (static) index and not in the main-file (dynamic) index.
Thus, a such macro could not be found at a symbol search according to the logic 
that we skip symbols from the static index if the location of these symbols is 
inside the dynamic index files.
To fix this behavior this patch adds main file macros into the main-file 
(dynamic) index.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D94477

Added: 


Modified: 
clang-tools-extra/clangd/CollectMacros.cpp
clang-tools-extra/clangd/CollectMacros.h
clang-tools-extra/clangd/SemanticHighlighting.cpp
clang-tools-extra/clangd/XRefs.cpp
clang-tools-extra/clangd/index/SymbolCollector.cpp
clang-tools-extra/clangd/unittests/CollectMacrosTests.cpp
clang-tools-extra/clangd/unittests/FindSymbolsTests.cpp
clang-tools-extra/clangd/unittests/ParsedASTTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/CollectMacros.cpp 
b/clang-tools-extra/clangd/CollectMacros.cpp
index bd6165ef10ba..0e89b35d9d56 100644
--- a/clang-tools-extra/clangd/CollectMacros.cpp
+++ b/clang-tools-extra/clangd/CollectMacros.cpp
@@ -13,8 +13,8 @@
 namespace clang {
 namespace clangd {
 
-void CollectMainFileMacros::add(const Token &MacroNameTok,
-const MacroInfo *MI) {
+void CollectMainFileMacros::add(const Token &MacroNameTok, const MacroInfo *MI,
+bool IsDefinition) {
   if (!InMainFile)
 return;
   auto Loc = MacroNameTok.getLocation();
@@ -26,9 +26,9 @@ void CollectMainFileMacros::add(const Token &MacroNameTok,
   auto Range = halfOpenToRange(
   SM, CharSourceRange::getCharRange(Loc, MacroNameTok.getEndLoc()));
   if (auto SID = getSymbolID(Name, MI, SM))
-Out.MacroRefs[SID].push_back(Range);
+Out.MacroRefs[SID].push_back({Range, IsDefinition});
   else
-Out.UnknownMacros.push_back(Range);
+Out.UnknownMacros.push_back({Range, IsDefinition});
 }
 } // namespace clangd
 } // namespace clang

diff  --git a/clang-tools-extra/clangd/CollectMacros.h 
b/clang-tools-extra/clangd/CollectMacros.h
index eecea0455be2..3240111e5a33 100644
--- a/clang-tools-extra/clangd/CollectMacros.h
+++ b/clang-tools-extra/clangd/CollectMacros.h
@@ -21,15 +21,20 @@
 namespace clang {
 namespace clangd {
 
-struct MainFileMacros {
-  llvm::StringSet<> Names;
+struct MacroOccurrence {
   // Instead of storing SourceLocation, we have to store the token range 
because
   // SourceManager from preamble is not available when we build the AST.
-  llvm::DenseMap> MacroRefs;
+  Range Rng;
+  bool IsDefinition;
+};
+
+struct MainFileMacros {
+  llvm::StringSet<> Names;
+  llvm::DenseMap> MacroRefs;
   // Somtimes it is not possible to compute the SymbolID for the Macro, e.g. a
   // reference to an undefined macro. Store them separately, e.g. for semantic
   // highlighting.
-  std::vector UnknownMacros;
+  std::vector UnknownMacros;
   // Ranges skipped by the preprocessor due to being inactive.
   std::vector SkippedRanges;
 };
@@ -49,7 +54,7 @@ class CollectMainFileMacros : public PPCallbacks {
   }
 
   void MacroDefined(const Token &MacroName, const MacroDirective *MD) override 
{
-add(MacroName, MD->getMacroInfo());
+add(MacroName, MD->getMacroInfo(), /*IsDefinition=*/true);
   }
 
   void MacroExpands(const Token &MacroName, const MacroDefinition &MD,
@@ -87,7 +92,8 @@ class CollectMainFileMacros : public PPCallbacks {
   }
 
 private:
-  void add(const Token &MacroNameTok, const MacroInfo *MI);
+  void add(const Token &MacroNameTok, const MacroInfo *MI,
+   bool IsDefinition = false);
   const SourceManager &SM;
   bool InMainFile = true;
   MainFileMacros &Out;

diff  --git a/clang-tools-extra/clangd/SemanticHighlighting.cpp 
b/clang-tools-extra/clangd/SemanticHighlighting.cpp
index be0a5437cde6..5e70baf73310 100644
--- a/clang-tools-extra/clangd/SemanticHighlighting.cpp
+++ b/clang-tools-extra/clangd/SemanticHighlighting.cpp
@@ -397,10 +397,10 @@ std::vector 
getSemanticHighlightings(ParsedAST &AST) {
   // Add highlightings for macro references.
   for (const auto &SIDToRefs : AST.getMacros().MacroRefs) {
 for (const auto &M : SIDToRefs.second)
-  Builder.addToken({HighlightingKind::Macro, M});
+  Builder.addToken({HighlightingKind::Macro, M.Rng});
   }
   for (const auto &M : AST.getMacros().UnknownMacros)
-Builder.addToken({Highlig

[llvm-branch-commits] [llvm] 19297a4 - Change XCore code owner.

[Nigel Perks via llvm-branch-commits]

Author: Nigel Perks
Date: 2021-01-14T12:13:48Z
New Revision: 19297a4171177b942832d49a3767609d2a112ae1

URL: 
https://github.com/llvm/llvm-project/commit/19297a4171177b942832d49a3767609d2a112ae1
DIFF: 
https://github.com/llvm/llvm-project/commit/19297a4171177b942832d49a3767609d2a112ae1.diff

LOG: Change XCore code owner.

Discussion: https://lists.llvm.org/pipermail/llvm-dev/2021-January/147603.html

Added: 


Modified: 
llvm/CODE_OWNERS.TXT

Removed: 




diff  --git a/llvm/CODE_OWNERS.TXT b/llvm/CODE_OWNERS.TXT
index bfa06764f81c..6fc7cf1cd3ef 100644
--- a/llvm/CODE_OWNERS.TXT
+++ b/llvm/CODE_OWNERS.TXT
@@ -152,10 +152,6 @@ E: sa...@nondot.org
 W: http://nondot.org/~sabre/
 D: Everything not covered by someone else
 
-N: Robert Lytton
-E: rob...@xmos.com
-D: XCore Backend
-
 N: David Majnemer
 E: david.majne...@gmail.com
 D: IR Constant Folder, InstCombine
@@ -180,6 +176,10 @@ N: Krzysztof Parzyszek
 E: kparz...@quicinc.com
 D: Hexagon Backend
 
+N: Nigel Perks
+E: nig...@xmos.com
+D: XCore Backend
+
 N: Jacques Pienaar
 E: jpien...@google.com
 D: Lanai Backend



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[llvm-branch-commits] [clang] 3bccd87 - [clang][cli] NFC: Remove SSPBufferSize assignment

[Jan Svoboda via llvm-branch-commits]

Author: Jan Svoboda
Date: 2021-01-14T13:21:44+01:00
New Revision: 3bccd87a588b3c320b669686c8f006b92ff72182

URL: 
https://github.com/llvm/llvm-project/commit/3bccd87a588b3c320b669686c8f006b92ff72182
DIFF: 
https://github.com/llvm/llvm-project/commit/3bccd87a588b3c320b669686c8f006b92ff72182.diff

LOG: [clang][cli] NFC: Remove SSPBufferSize assignment

This should've been part of D84669, but got overlooked. Removing the assignment 
is NFC, as it's also done by the marshalling infrastructure for the 
stack_protector_buffer_size option.

Reviewed By: dexonsmith in D94488

Added: 


Modified: 
clang/lib/Frontend/CompilerInvocation.cpp

Removed: 




diff  --git a/clang/lib/Frontend/CompilerInvocation.cpp 
b/clang/lib/Frontend/CompilerInvocation.cpp
index f496c1d65bc5..cbe038224323 100644
--- a/clang/lib/Frontend/CompilerInvocation.cpp
+++ b/clang/lib/Frontend/CompilerInvocation.cpp
@@ -1142,8 +1142,6 @@ static bool ParseCodeGenArgs(CodeGenOptions &Opts, 
ArgList &Args, InputKind IK,
 }
 Opts.LinkBitcodeFiles.push_back(F);
   }
-  Opts.SSPBufferSize =
-  getLastArgIntValue(Args, OPT_stack_protector_buffer_size, 8, Diags);
 
   Opts.StackProtectorGuard =
   std::string(Args.getLastArgValue(OPT_mstack_protector_guard_EQ));



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[llvm-branch-commits] [clang] fa2fe96 - [clang][cli] Port more CodeGenOptions to marshalling infrastructure

[Jan Svoboda via llvm-branch-commits]

Author: Jan Svoboda
Date: 2021-01-14T13:21:44+01:00
New Revision: fa2fe9608c1c1b402296960b1edc157230c30062

URL: 
https://github.com/llvm/llvm-project/commit/fa2fe9608c1c1b402296960b1edc157230c30062
DIFF: 
https://github.com/llvm/llvm-project/commit/fa2fe9608c1c1b402296960b1edc157230c30062.diff

LOG: [clang][cli] Port more CodeGenOptions to marshalling infrastructure

Leveraging the recently added TableGen constructs (ShouldParseIf and 
MarshallingInfoStringInt) to shift from manual command line parsing to 
automatic TableGen-driver marshalling.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D94488

Added: 


Modified: 
clang/include/clang/Driver/Options.td
clang/lib/Frontend/CompilerInvocation.cpp

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 9ea3feccddff..2123ac226ffc 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -1162,12 +1162,22 @@ def fno_profile_instr_use : Flag<["-"], 
"fno-profile-instr-use">,
 HelpText<"Disable using instrumentation data for profile-guided 
optimization">;
 def fno_profile_use : Flag<["-"], "fno-profile-use">,
 Alias;
+defm profile_arcs : BoolFOption<"profile-arcs",
+  "CodeGenOpts.EmitGcovArcs", DefaultsToFalse,
+  ChangedBy, ResetBy>;
+defm test_coverage : BoolFOption<"test-coverage",
+  "CodeGenOpts.EmitGcovNotes", DefaultsToFalse,
+  ChangedBy, ResetBy>;
 def fprofile_filter_files_EQ : Joined<["-"], "fprofile-filter-files=">,
 Group, Flags<[CC1Option, CoreOption]>,
-HelpText<"Instrument only functions from files where names match any regex 
separated by a semi-colon">;
+HelpText<"Instrument only functions from files where names match any regex 
separated by a semi-colon">,
+MarshallingInfoString<"CodeGenOpts.ProfileFilterFiles">,
+ShouldParseIf;
 def fprofile_exclude_files_EQ : Joined<["-"], "fprofile-exclude-files=">,
 Group, Flags<[CC1Option, CoreOption]>,
-HelpText<"Instrument only functions from files where names don't match all 
the regexes separated by a semi-colon">;
+HelpText<"Instrument only functions from files where names don't match all 
the regexes separated by a semi-colon">,
+MarshallingInfoString<"CodeGenOpts.ProfileExcludeFiles">,
+ShouldParseIf;
 def fprofile_update_EQ : Joined<["-"], "fprofile-update=">,
 Group, Flags<[CC1Option, CoreOption]>, 
Values<"atomic,prefer-atomic,single">,
 MetaVarName<"">, HelpText<"Set update method of profile counters 
(atomic,prefer-atomic,single)">,
@@ -1318,9 +1328,10 @@ defm eliminate_unused_debug_types : 
OptOutFFlag<"eliminate-unused-debug-types",
 def femit_all_decls : Flag<["-"], "femit-all-decls">, Group, 
Flags<[CC1Option]>,
   HelpText<"Emit all declarations, even if unused">,
   MarshallingInfoFlag<"LangOpts->EmitAllDecls">;
-def femulated_tls : Flag<["-"], "femulated-tls">, Group, 
Flags<[CC1Option]>,
-  HelpText<"Use emutls functions to access thread_local variables">;
-def fno_emulated_tls : Flag<["-"], "fno-emulated-tls">, Group, 
Flags<[CC1Option]>;
+defm emulated_tls : BoolFOption<"emulated-tls",
+  "CodeGenOpts.EmulatedTLS", DefaultsToFalse,
+  ChangedBy,
+  ResetBy, BothFlags<[CC1Option]>>;
 def fencoding_EQ : Joined<["-"], "fencoding=">, Group;
 def ferror_limit_EQ : Joined<["-"], "ferror-limit=">, Group, 
Flags<[CoreOption]>;
 defm exceptions : BoolFOption<"exceptions",
@@ -1759,12 +1770,14 @@ def fxray_instrumentation_bundle :
 def fxray_function_groups :
   Joined<["-"], "fxray-function-groups=">,
   Group, Flags<[CC1Option]>,
-  HelpText<"Only instrument 1 of N groups">;
+  HelpText<"Only instrument 1 of N groups">,
+  MarshallingInfoStringInt<"CodeGenOpts.XRayTotalFunctionGroups", "1">;
 
 def fxray_selected_function_group :
   Joined<["-"], "fxray-selected-function-group=">,
   Group, Flags<[CC1Option]>,
-  HelpText<"When using -fxray-function-groups, select which group of functions 
to instrument. Valid range is 0 to fxray-function-groups - 1">;
+  HelpText<"When using -fxray-function-groups, select which group of functions 
to instrument. Valid range is 0 to fxray-function-groups - 1">,
+  MarshallingInfoStringInt<"CodeGenOpts.XRaySelectedFunctionGroup", "0">;
 
 
 defm fine_grained_bitfield_accesses : 
BoolOption<"fine-grained-bitfield-accesses",
@@ -2223,9 +2236,6 @@ defm preserve_as_comments : 
BoolFOption<"preserve-as-comments",
   "CodeGenOpts.PreserveAsmComments", DefaultsToTrue,
   ChangedBy,
   ResetBy>;
-defm profile_arcs : BoolFOption<"profile-arcs",
-  "CodeGenOpts.EmitGcovArcs", DefaultsToFalse,
-  ChangedBy, ResetBy>;
 def framework : Separate<["-"], "framework">, Flags<[LinkerInput]>;
 def frandom_seed_EQ : Joined<["-"], "frandom-seed=">, 
Group;
 def freg_struct_return : Flag<["-"], "freg-struct-return">, Group, 
Flags<[CC1Option]>,
@@ -2348,9 +2358,6 @@ def foptimization_record_passes_EQ : 

[llvm-branch-commits] [flang] a176ffa - Add Semantic check for Flang OpenMP 4.5 - 2.7.1 Do Loop restrictions on single directive and firstprivate clause.

[via llvm-branch-commits]

Author: Yashaswini
Date: 2021-01-14T18:34:09+05:30
New Revision: a176ffa6248a37a84439cc311e7faf60f17ea78c

URL: 
https://github.com/llvm/llvm-project/commit/a176ffa6248a37a84439cc311e7faf60f17ea78c
DIFF: 
https://github.com/llvm/llvm-project/commit/a176ffa6248a37a84439cc311e7faf60f17ea78c.diff

LOG: Add Semantic check for Flang OpenMP 4.5 - 2.7.1  Do Loop restrictions on 
single directive and firstprivate clause.

Semantic checks added to check the worksharing 'single' region closely nested 
inside a worksharing 'do' region. And also to check whether the DO iteration 
variable is a variable in Firstprivate clause.

Files:
check-directive-structure.h
check-omp-structure.h
check-omp-structure.cpp

Testcases:
omp-do01-positivecase.f90
omp-do01.f90
omp-do05-positivecase.f90
omp-do05.f90

Reviewed by: Kiran Chandramohan @kiranchandramohan , Valentin Clement 
@clementval

Differential Revision: https://reviews.llvm.org/D93205

Added: 
flang/test/Semantics/omp-do01-positivecase.f90
flang/test/Semantics/omp-do05-positivecase.f90

Modified: 
flang/lib/Semantics/check-directive-structure.h
flang/lib/Semantics/check-omp-structure.cpp
flang/lib/Semantics/check-omp-structure.h
flang/test/Semantics/omp-do01.f90
flang/test/Semantics/omp-do05.f90

Removed: 




diff  --git a/flang/lib/Semantics/check-directive-structure.h 
b/flang/lib/Semantics/check-directive-structure.h
index 1075087feb4f..b93287e8c8dd 100644
--- a/flang/lib/Semantics/check-directive-structure.h
+++ b/flang/lib/Semantics/check-directive-structure.h
@@ -139,8 +139,11 @@ class DirectiveStructureChecker : public virtual 
BaseChecker {
 const PC *clause{nullptr};
 std::multimap clauseInfo;
 std::list actualClauses;
+Symbol *loopIV{nullptr};
   };
 
+  void SetLoopIv(Symbol *symbol) { GetContext().loopIV = symbol; }
+
   // back() is the top of the stack
   DirectiveContext &GetContext() {
 CHECK(!dirContext_.empty());
@@ -160,6 +163,7 @@ class DirectiveStructureChecker : public virtual 
BaseChecker {
 GetContext().allowedExclusiveClauses = {};
 GetContext().requiredClauses = {};
 GetContext().clauseInfo = {};
+GetContext().loopIV = {nullptr};
   }
 
   void SetContextDirectiveSource(const parser::CharBlock &directive) {

diff  --git a/flang/lib/Semantics/check-omp-structure.cpp 
b/flang/lib/Semantics/check-omp-structure.cpp
index 773f5b2aeb21..ff0db2c5182c 100644
--- a/flang/lib/Semantics/check-omp-structure.cpp
+++ b/flang/lib/Semantics/check-omp-structure.cpp
@@ -93,6 +93,22 @@ void OmpStructureChecker::Enter(const 
parser::OpenMPLoopConstruct &x) {
 llvm::omp::Directive::OMPD_master});
 PushContextAndClauseSets(beginDir.source, llvm::omp::Directive::OMPD_do);
   }
+  SetLoopInfo(x);
+}
+const parser::Name OmpStructureChecker::GetLoopIndex(
+const parser::DoConstruct *x) {
+  using Bounds = parser::LoopControl::Bounds;
+  return std::get(x->GetLoopControl()->u).name.thing;
+}
+void OmpStructureChecker::SetLoopInfo(const parser::OpenMPLoopConstruct &x) {
+  if (const auto &loopConstruct{
+  std::get>(x.t)}) {
+const parser::DoConstruct *loop{&*loopConstruct};
+if (loop && loop->IsDoNormal()) {
+  const parser::Name &itrVal{GetLoopIndex(loop)};
+  SetLoopIv(itrVal.symbol);
+}
+  }
 }
 
 void OmpStructureChecker::Leave(const parser::OpenMPLoopConstruct &) {
@@ -124,6 +140,13 @@ void OmpStructureChecker::Enter(const 
parser::OpenMPBlockConstruct &x) {
 
   CheckMatching(beginDir, endDir);
 
+  // TODO: This check needs to be extended while implementing nesting of 
regions
+  // checks.
+  if (beginDir.v == llvm::omp::Directive::OMPD_single) {
+HasInvalidWorksharingNesting(
+beginDir.source, {llvm::omp::Directive::OMPD_do});
+  }
+
   PushContextAndClauseSets(beginDir.source, beginDir.v);
   CheckNoBranching(block, beginDir.v, beginDir.source);
 }
@@ -401,7 +424,6 @@ CHECK_SIMPLE_CLAUSE(Copyprivate, OMPC_copyprivate)
 CHECK_SIMPLE_CLAUSE(Default, OMPC_default)
 CHECK_SIMPLE_CLAUSE(Device, OMPC_device)
 CHECK_SIMPLE_CLAUSE(Final, OMPC_final)
-CHECK_SIMPLE_CLAUSE(Firstprivate, OMPC_firstprivate)
 CHECK_SIMPLE_CLAUSE(From, OMPC_from)
 CHECK_SIMPLE_CLAUSE(Inbranch, OMPC_inbranch)
 CHECK_SIMPLE_CLAUSE(IsDevicePtr, OMPC_is_device_ptr)
@@ -487,6 +509,23 @@ void OmpStructureChecker::CheckIsVarPartOfAnotherVar(
 ompObject.u);
   }
 }
+void OmpStructureChecker::Enter(const parser::OmpClause::Firstprivate &x) {
+  CheckAllowed(llvm::omp::Clause::OMPC_firstprivate);
+  CheckIsLoopIvPartOfClause(llvmOmpClause::OMPC_firstprivate, x.v);
+}
+void OmpStructureChecker::CheckIsLoopIvPartOfClause(
+llvmOmpClause clause, const parser::OmpObjectList &ompObjectList) {
+  for (const auto &ompObject : ompObjectList.v) {
+if (const parser::Name * name{parser::Unwrap(ompObject)}) {
+  if (name->symbol == GetContext().loopIV) {
+context_.Say(name->source,

[llvm-branch-commits] [llvm] 6abbba3 - Revert "Fix llvm::Optional build breaks in MSVC using std::is_trivially_copyable"

[Alexandre Ganea via llvm-branch-commits]

Author: Alexandre Ganea
Date: 2021-01-14T08:35:38-05:00
New Revision: 6abbba3fca9fdf8d31f74800a7ddb40b103ae6e3

URL: 
https://github.com/llvm/llvm-project/commit/6abbba3fca9fdf8d31f74800a7ddb40b103ae6e3
DIFF: 
https://github.com/llvm/llvm-project/commit/6abbba3fca9fdf8d31f74800a7ddb40b103ae6e3.diff

LOG: Revert "Fix llvm::Optional build breaks in MSVC using 
std::is_trivially_copyable"

This reverts commit 854f0984f0b7ab9a9a541a4bcda7ea173e4113d3.

This breaks compilation with clang-cl on Windows, while in a MSVC 16.8 cmd.exe.
This also breaks PPC: http://lab.llvm.org:8011/#/builders/93/builds/1435
And: https://reviews.llvm.org/D93510#2497737

Added: 


Modified: 
llvm/include/llvm/ADT/Optional.h
llvm/unittests/ADT/OptionalTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/ADT/Optional.h 
b/llvm/include/llvm/ADT/Optional.h
index 820e586ff7dd..daa9ee627fa9 100644
--- a/llvm/include/llvm/ADT/Optional.h
+++ b/llvm/include/llvm/ADT/Optional.h
@@ -33,12 +33,7 @@ namespace optional_detail {
 struct in_place_t {};
 
 /// Storage for any type.
-template ::value &&
-  std::is_trivially_copy_assignable::value &&
-  (std::is_trivially_move_constructible::value 
||
-   !std::is_move_constructible::value) &&
-  (std::is_trivially_move_assignable::value ||
-   !std::is_move_assignable::value))>
+template ::value>
 class OptionalStorage {
   union {
 char empty;

diff  --git a/llvm/unittests/ADT/OptionalTest.cpp 
b/llvm/unittests/ADT/OptionalTest.cpp
index 235b834887d1..c7fa796a2d7f 100644
--- a/llvm/unittests/ADT/OptionalTest.cpp
+++ b/llvm/unittests/ADT/OptionalTest.cpp
@@ -390,127 +390,6 @@ TEST(OptionalTest, ImmovableEmplace) {
   EXPECT_EQ(0u, Immovable::Destructions);
 }
 
-// Craft a class which is_trivially_copyable, but not
-// is_trivially_copy_constructible.
-struct NonTCopy {
-  NonTCopy() = default;
-
-  // Delete the volatile copy constructor to engage the "rule of 3" and delete
-  // any unspecified copy assignment or constructor.
-  NonTCopy(volatile NonTCopy const &) = delete;
-
-  // Leave the non-volatile default copy constructor unspecified (deleted by
-  // rule of 3)
-
-  // This template can serve as the copy constructor, but isn't chosen
-  // by =default in a class with a 'NonTCopy' member.
-  template 
-  NonTCopy(Self const &Other) : Val(Other.Val) {}
-
-  NonTCopy &operator=(NonTCopy const &) = default;
-
-  int Val{0};
-};
-
-#if defined(_MSC_VER) && _MSC_VER >= 1927
-// Currently only true on recent MSVC releases.
-static_assert(std::is_trivially_copyable::value,
-  "Expect NonTCopy to be trivially copyable");
-
-static_assert(!std::is_trivially_copy_constructible::value,
-  "Expect NonTCopy not to be trivially copy constructible.");
-#endif // defined(_MSC_VER) && _MSC_VER >= 1927
-
-TEST(OptionalTest, DeletedCopyConstructor) {
-
-  // Expect compile to fail if 'trivial' version of
-  // optional_detail::OptionalStorage is chosen.
-  using NonTCopyOptT = Optional;
-  NonTCopyOptT NonTCopy1;
-
-  // Check that the Optional can be copy constructed.
-  NonTCopyOptT NonTCopy2{NonTCopy1};
-
-  // Check that the Optional can be copy assigned.
-  NonTCopy1 = NonTCopy2;
-}
-
-// Craft a class which is_trivially_copyable, but not
-// is_trivially_copy_assignable.
-class NonTAssign {
-public:
-  NonTAssign() = default;
-  NonTAssign(NonTAssign const &) = default;
-
-  // Delete the volatile copy assignment to engage the "rule of 3" and delete
-  // any unspecified copy assignment or constructor.
-  NonTAssign &operator=(volatile NonTAssign const &) = delete;
-
-  // Leave the non-volatile default copy assignment unspecified (deleted by 
rule
-  // of 3).
-
-  // This template can serve as the copy assignment, but isn't chosen
-  // by =default in a class with a 'NonTAssign' member.
-  template 
-  NonTAssign &operator=(Self const &Other) {
-A = Other.A;
-return *this;
-  }
-
-  int A{0};
-};
-
-#if defined(_MSC_VER) && _MSC_VER >= 1927
-// Currently only true on recent MSVC releases.
-static_assert(std::is_trivially_copyable::value,
-  "Expect NonTAssign to be trivially copyable");
-
-static_assert(!std::is_trivially_copy_assignable::value,
-  "Expect NonTAssign not to be trivially assignable.");
-#endif // defined(_MSC_VER) && _MSC_VER >= 1927
-
-TEST(OptionalTest, DeletedCopyAssignment) {
-
-  // Expect compile to fail if 'trivial' version of
-  // optional_detail::OptionalStorage is chosen.
-  using NonTAssignOptT = Optional;
-  NonTAssignOptT NonTAssign1;
-
-  // Check that the Optional can be copy constructed.
-  NonTAssignOptT NonTAssign2{NonTAssign1};
-
-  // Check that the Optional can be copy assigned.
-  NonTAssign1 = NonTAssign2;
-}
-
-struct NoTMove {
-  NoTMove() = default;
-  NoTMove(NoTMov

[llvm-branch-commits] [clang-tools-extra] 176f5e9 - [clang-tidy] Use DenseSet in UpgradeDurationConversionsCheck, NFCI

[Mikhail Maltsev via llvm-branch-commits]

Author: Mikhail Maltsev
Date: 2021-01-14T13:50:16Z
New Revision: 176f5e95e1afad75ff045a00f0fa9c781bd5f54a

URL: 
https://github.com/llvm/llvm-project/commit/176f5e95e1afad75ff045a00f0fa9c781bd5f54a
DIFF: 
https://github.com/llvm/llvm-project/commit/176f5e95e1afad75ff045a00f0fa9c781bd5f54a.diff

LOG: [clang-tidy] Use DenseSet in 
UpgradeDurationConversionsCheck, NFCI

This change replaces `unordered_set` (which used to store
internal representation of `SourceLocation`-s) with
`DenseSet` (which stores `SourceLocation`-s directly).

Reviewed By: aaron.ballman, njames93

Differential Revision: https://reviews.llvm.org/D94601

Added: 


Modified: 
clang-tools-extra/clang-tidy/abseil/UpgradeDurationConversionsCheck.cpp
clang-tools-extra/clang-tidy/abseil/UpgradeDurationConversionsCheck.h

Removed: 




diff  --git 
a/clang-tools-extra/clang-tidy/abseil/UpgradeDurationConversionsCheck.cpp 
b/clang-tools-extra/clang-tidy/abseil/UpgradeDurationConversionsCheck.cpp
index 208d1df27763..539b575d1880 100644
--- a/clang-tools-extra/clang-tidy/abseil/UpgradeDurationConversionsCheck.cpp
+++ b/clang-tools-extra/clang-tidy/abseil/UpgradeDurationConversionsCheck.cpp
@@ -128,7 +128,7 @@ void UpgradeDurationConversionsCheck::check(
 
   if (!match(isInTemplateInstantiation(), *OuterExpr, *Result.Context)
.empty()) {
-if (MatchedTemplateLocations.count(Loc.getRawEncoding()) == 0) {
+if (MatchedTemplateLocations.count(Loc) == 0) {
   // For each location matched in a template instantiation, we check if the
   // location can also be found in `MatchedTemplateLocations`. If it is not
   // found, that means the expression did not create a match without the
@@ -144,7 +144,7 @@ void UpgradeDurationConversionsCheck::check(
   internal::Matcher IsInsideTemplate =
   hasAncestor(decl(anyOf(classTemplateDecl(), functionTemplateDecl(;
   if (!match(IsInsideTemplate, *ArgExpr, *Result.Context).empty())
-MatchedTemplateLocations.insert(Loc.getRawEncoding());
+MatchedTemplateLocations.insert(Loc);
 
   DiagnosticBuilder Diag = diag(Loc, Message);
   CharSourceRange SourceRange = Lexer::makeFileCharRange(

diff  --git 
a/clang-tools-extra/clang-tidy/abseil/UpgradeDurationConversionsCheck.h 
b/clang-tools-extra/clang-tidy/abseil/UpgradeDurationConversionsCheck.h
index 7a450a8e9249..23af29299f78 100644
--- a/clang-tools-extra/clang-tidy/abseil/UpgradeDurationConversionsCheck.h
+++ b/clang-tools-extra/clang-tidy/abseil/UpgradeDurationConversionsCheck.h
@@ -11,7 +11,8 @@
 
 #include "../ClangTidyCheck.h"
 
-#include 
+#include "clang/Basic/SourceLocation.h"
+#include "llvm/ADT/DenseSet.h"
 
 namespace clang {
 namespace tidy {
@@ -32,7 +33,7 @@ class UpgradeDurationConversionsCheck : public ClangTidyCheck 
{
   void check(const ast_matchers::MatchFinder::MatchResult &Result) override;
 
 private:
-  std::unordered_set MatchedTemplateLocations;
+  llvm::DenseSet MatchedTemplateLocations;
 };
 
 } // namespace abseil



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[llvm-branch-commits] [flang] a1bbd1e - [flang][driver] Unify f18_version.h.in and Version.inc.in

[Andrzej Warzynski via llvm-branch-commits]

Author: Andrzej Warzynski
Date: 2021-01-14T13:50:46Z
New Revision: a1bbd1ef1dbd2a39777ef0b2d623f15f0523cdbf

URL: 
https://github.com/llvm/llvm-project/commit/a1bbd1ef1dbd2a39777ef0b2d623f15f0523cdbf
DIFF: 
https://github.com/llvm/llvm-project/commit/a1bbd1ef1dbd2a39777ef0b2d623f15f0523cdbf.diff

LOG: [flang][driver] Unify f18_version.h.in and Version.inc.in

Flang has two CMake configurable header files that define compiler
version numbers:
* f18_version.h.in - only used in f18.cpp (uses version numbers from
  LLVM's macro definitions)
* Version.inc.in - not currently used (uses version numbers hard-coded
  in Flang's top CMake script)

Currently only f18_version.h.in provides version numbers consistent with
other subprojects in llvm-project. However, its location and name are
inconsistent with e.g. Clang. This patch merges the two headers
together:
  * hard-coded version numbers in Flang's top CMake script are deleted
  * Version.inc.in is updated to provide string versions of version
  numbers (required by f18.cpp)
  * f18_version.h.in is deleted as it's no longer needed

Differential Revision: https://reviews.llvm.org/D94422

Added: 


Modified: 
flang/CMakeLists.txt
flang/include/flang/Version.inc.in
flang/tools/f18/CMakeLists.txt
flang/tools/f18/f18.cpp

Removed: 
flang/tools/f18/f18_version.h.in



diff  --git a/flang/CMakeLists.txt b/flang/CMakeLists.txt
index a73655baffe8..07d34354bd81 100644
--- a/flang/CMakeLists.txt
+++ b/flang/CMakeLists.txt
@@ -268,10 +268,6 @@ endif()
 
 
 set(PACKAGE_VERSION "${LLVM_PACKAGE_VERSION}")
-# Override LLVM versioning for now...
-set(FLANG_VERSION_MAJOR  "0")
-set(FLANG_VERSION_MINOR  "1")
-set(FLANG_VERSION_PATCHLEVEL "0")
 
 
 if (NOT DEFINED FLANG_VERSION_MAJOR)

diff  --git a/flang/include/flang/Version.inc.in 
b/flang/include/flang/Version.inc.in
index a0eeab2686a9..562b5832e771 100644
--- a/flang/include/flang/Version.inc.in
+++ b/flang/include/flang/Version.inc.in
@@ -1,5 +1,8 @@
 #define FLANG_VERSION @FLANG_VERSION@
 #define FLANG_VERSION_STRING "@FLANG_VERSION@"
 #define FLANG_VERSION_MAJOR @FLANG_VERSION_MAJOR@
+#define FLANG_VERSION_MAJOR_STRING "@FLANG_VERSION_MAJOR@"
 #define FLANG_VERSION_MINOR @FLANG_VERSION_MINOR@
+#define FLANG_VERSION_MINOR_STRING "@FLANG_VERSION_MINOR@"
 #define FLANG_VERSION_PATCHLEVEL @FLANG_VERSION_PATCHLEVEL@
+#define FLANG_VERSION_PATCHLEVEL_STRING "@FLANG_VERSION_PATCHLEVEL@"

diff  --git a/flang/tools/f18/CMakeLists.txt b/flang/tools/f18/CMakeLists.txt
index 8f30bfa47b79..2e5350aecdc6 100644
--- a/flang/tools/f18/CMakeLists.txt
+++ b/flang/tools/f18/CMakeLists.txt
@@ -72,5 +72,3 @@ if (NOT WIN32)
 FILE_PERMISSIONS OWNER_EXECUTE OWNER_READ OWNER_WRITE)
   install(PROGRAMS ${CMAKE_BINARY_DIR}/bin/flang DESTINATION bin)
 endif()
-
-configure_file(${CMAKE_CURRENT_SOURCE_DIR}/f18_version.h.in 
${CMAKE_CURRENT_BINARY_DIR}/f18_version.h @ONLY)

diff  --git a/flang/tools/f18/f18.cpp b/flang/tools/f18/f18.cpp
index 8b7cc099bac1..bdf48d071142 100644
--- a/flang/tools/f18/f18.cpp
+++ b/flang/tools/f18/f18.cpp
@@ -8,7 +8,6 @@
 
 // Temporary Fortran front end driver main program for development scaffolding.
 
-#include "f18_version.h"
 #include "flang/Common/Fortran-features.h"
 #include "flang/Common/default-kinds.h"
 #include "flang/Evaluate/expression.h"
@@ -25,6 +24,7 @@
 #include "flang/Semantics/runtime-type-info.h"
 #include "flang/Semantics/semantics.h"
 #include "flang/Semantics/unparse-with-symbols.h"
+#include "flang/Version.inc"
 #include "llvm/Support/Errno.h"
 #include "llvm/Support/FileSystem.h"
 #include "llvm/Support/Program.h"
@@ -389,8 +389,8 @@ void Link(std::vector &liblist, 
std::vector &objects,
 
 int printVersion() {
   llvm::errs() << "\nf18 compiler (under development), version "
-   << __FLANG_MAJOR__ << "." << __FLANG_MINOR__ << "."
-   << __FLANG_PATCHLEVEL__ << "\n";
+   << FLANG_VERSION_MAJOR << "." << FLANG_VERSION_MINOR << "."
+   << FLANG_VERSION_PATCHLEVEL << "\n";
   return exitStatus;
 }
 
@@ -415,11 +415,13 @@ int main(int argc, char *const argv[]) {
   options.predefinitions.emplace_back("__F18_MAJOR__", "1");
   options.predefinitions.emplace_back("__F18_MINOR__", "1");
   options.predefinitions.emplace_back("__F18_PATCHLEVEL__", "1");
-  options.predefinitions.emplace_back("__flang__", __FLANG__);
-  options.predefinitions.emplace_back("__flang_major__", __FLANG_MAJOR__);
-  options.predefinitions.emplace_back("__flang_minor__", __FLANG_MINOR__);
+  options.predefinitions.emplace_back("__flang__", FLANG_VERSION_STRING);
   options.predefinitions.emplace_back(
-  "__flang_patchlevel__", __FLANG_PATCHLEVEL__);
+  "__flang_major__", FLANG_VERSION_MAJOR_STRING);
+  options.predefinitions.emplace_back(
+  "__flang_minor__", FLANG_VERSION_MINOR_STRING);
+  options.predefinitions.emplace_back(
+  "__flang_patchlevel__",

[llvm-branch-commits] [llvm] c23e34e - [InferFunctionAttrs] Improve CHECK variable names (NFC).

[Florian Hahn via llvm-branch-commits]

Author: Florian Hahn
Date: 2021-01-14T13:53:51Z
New Revision: c23e34e606bf23ee8d4060469ecebe0f7971c5dd

URL: 
https://github.com/llvm/llvm-project/commit/c23e34e606bf23ee8d4060469ecebe0f7971c5dd
DIFF: 
https://github.com/llvm/llvm-project/commit/c23e34e606bf23ee8d4060469ecebe0f7971c5dd.diff

LOG: [InferFunctionAttrs] Improve CHECK variable names (NFC).

Added: 


Modified: 
llvm/test/Transforms/InferFunctionAttrs/annotate.ll

Removed: 




diff  --git a/llvm/test/Transforms/InferFunctionAttrs/annotate.ll 
b/llvm/test/Transforms/InferFunctionAttrs/annotate.ll
index f8e031408b01..cf31baf9996b 100644
--- a/llvm/test/Transforms/InferFunctionAttrs/annotate.ll
+++ b/llvm/test/Transforms/InferFunctionAttrs/annotate.ll
@@ -6,13 +6,13 @@
 
 ; operator new routines
 declare i8* @_Znwj(i64 )
-; CHECK: declare noalias noundef nonnull i8* @_Znwj(i64) [[G0:#[0-9]+]]
+; CHECK: declare noalias noundef nonnull i8* @_Znwj(i64) [[NOFREE:#[0-9]+]]
 declare i8* @_Znwm(i64)
-; CHECK: declare noalias noundef nonnull i8* @_Znwm(i64) [[G0]]
+; CHECK: declare noalias noundef nonnull i8* @_Znwm(i64) [[NOFREE]]
 
 declare i32 @__nvvm_reflect(i8*)
-; CHECK-NVPTX: declare noundef i32 @__nvvm_reflect(i8* noundef) [[G0:#[0-9]+]]
-; CHECK-NVPTX: attributes [[G0]] = { nofree nounwind readnone }
+; CHECK-NVPTX: declare noundef i32 @__nvvm_reflect(i8* noundef) 
[[NOFREE:#[0-9]+]]
+; CHECK-NVPTX: attributes [[NOFREE]] = { nofree nounwind readnone }
 
 
 ; Check all the libc functions (thereby also exercising the prototype check).
@@ -160,91 +160,91 @@ declare double @__sinpi(double)
 ; CHECK: declare float @__sinpif(float)
 declare float @__sinpif(float)
 
-; CHECK: declare i32 @abs(i32) [[G0]]
+; CHECK: declare i32 @abs(i32) [[NOFREE]]
 declare i32 @abs(i32)
 
-; CHECK: declare noundef i32 @access(i8* nocapture noundef readonly, i32 
noundef) [[G1:#[0-9]+]]
+; CHECK: declare noundef i32 @access(i8* nocapture noundef readonly, i32 
noundef) [[NOFREE_NOUNWIND:#[0-9]+]]
 declare i32 @access(i8*, i32)
 
-; CHECK: declare double @acos(double) [[G0]]
+; CHECK: declare double @acos(double) [[NOFREE]]
 declare double @acos(double)
 
-; CHECK: declare float @acosf(float) [[G0]]
+; CHECK: declare float @acosf(float) [[NOFREE]]
 declare float @acosf(float)
 
-; CHECK: declare double @acosh(double) [[G0]]
+; CHECK: declare double @acosh(double) [[NOFREE]]
 declare double @acosh(double)
 
-; CHECK: declare float @acoshf(float) [[G0]]
+; CHECK: declare float @acoshf(float) [[NOFREE]]
 declare float @acoshf(float)
 
-; CHECK: declare x86_fp80 @acoshl(x86_fp80) [[G0]]
+; CHECK: declare x86_fp80 @acoshl(x86_fp80) [[NOFREE]]
 declare x86_fp80 @acoshl(x86_fp80)
 
-; CHECK: declare x86_fp80 @acosl(x86_fp80) [[G0]]
+; CHECK: declare x86_fp80 @acosl(x86_fp80) [[NOFREE]]
 declare x86_fp80 @acosl(x86_fp80)
 
-; CHECK: declare double @asin(double) [[G0]]
+; CHECK: declare double @asin(double) [[NOFREE]]
 declare double @asin(double)
 
-; CHECK: declare float @asinf(float) [[G0]]
+; CHECK: declare float @asinf(float) [[NOFREE]]
 declare float @asinf(float)
 
-; CHECK: declare double @asinh(double) [[G0]]
+; CHECK: declare double @asinh(double) [[NOFREE]]
 declare double @asinh(double)
 
-; CHECK: declare float @asinhf(float) [[G0]]
+; CHECK: declare float @asinhf(float) [[NOFREE]]
 declare float @asinhf(float)
 
-; CHECK: declare x86_fp80 @asinhl(x86_fp80) [[G0]]
+; CHECK: declare x86_fp80 @asinhl(x86_fp80) [[NOFREE]]
 declare x86_fp80 @asinhl(x86_fp80)
 
-; CHECK: declare x86_fp80 @asinl(x86_fp80) [[G0]]
+; CHECK: declare x86_fp80 @asinl(x86_fp80) [[NOFREE]]
 declare x86_fp80 @asinl(x86_fp80)
 
-; CHECK: declare double @atan(double) [[G0]]
+; CHECK: declare double @atan(double) [[NOFREE]]
 declare double @atan(double)
 
-; CHECK: declare double @atan2(double, double) [[G0]]
+; CHECK: declare double @atan2(double, double) [[NOFREE]]
 declare double @atan2(double, double)
 
-; CHECK: declare float @atan2f(float, float) [[G0]]
+; CHECK: declare float @atan2f(float, float) [[NOFREE]]
 declare float @atan2f(float, float)
 
-; CHECK: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[G0]]
+; CHECK: declare x86_fp80 @atan2l(x86_fp80, x86_fp80) [[NOFREE]]
 declare x86_fp80 @atan2l(x86_fp80, x86_fp80)
 
-; CHECK: declare float @atanf(float) [[G0]]
+; CHECK: declare float @atanf(float) [[NOFREE]]
 declare float @atanf(float)
 
-; CHECK: declare double @atanh(double) [[G0]]
+; CHECK: declare double @atanh(double) [[NOFREE]]
 declare double @atanh(double)
 
-; CHECK: declare float @atanhf(float) [[G0]]
+; CHECK: declare float @atanhf(float) [[NOFREE]]
 declare float @atanhf(float)
 
-; CHECK: declare x86_fp80 @atanhl(x86_fp80) [[G0]]
+; CHECK: declare x86_fp80 @atanhl(x86_fp80) [[NOFREE]]
 declare x86_fp80 @atanhl(x86_fp80)
 
-; CHECK: declare x86_fp80 @atanl(x86_fp80) [[G0]]
+; CHECK: declare x86_fp80 @atanl(x86_fp80) [[NOFREE]]
 declare x86_fp80 @atanl(x86_fp80)
 
-; CHECK: declare double

[llvm-branch-commits] [llvm] a1cba5b - [SelectionDAG] Make use of KnownBits::commonBits. NFC.

[Jay Foad via llvm-branch-commits]

Author: Jay Foad
Date: 2021-01-14T14:02:43Z
New Revision: a1cba5b7a1fb09d2d4082967e2466a5a89ed698a

URL: 
https://github.com/llvm/llvm-project/commit/a1cba5b7a1fb09d2d4082967e2466a5a89ed698a
DIFF: 
https://github.com/llvm/llvm-project/commit/a1cba5b7a1fb09d2d4082967e2466a5a89ed698a.diff

LOG: [SelectionDAG] Make use of KnownBits::commonBits. NFC.

Differential Revision: https://reviews.llvm.org/D94587

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp 
b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
index 669bca966a7d..0b830f462c90 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
@@ -509,8 +509,7 @@ void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const 
PHINode *PN) {
   return;
 }
 DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
-DestLOI.Known.Zero &= SrcLOI->Known.Zero;
-DestLOI.Known.One &= SrcLOI->Known.One;
+DestLOI.Known = KnownBits::commonBits(DestLOI.Known, SrcLOI->Known);
   }
 }
 

diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp 
b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 7ea0b09ef9c9..173e45a4b18e 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1016,10 +1016,8 @@ bool TargetLowering::SimplifyDemandedBits(
  Depth + 1))
   return true;
 
-if (!!DemandedVecElts) {
-  Known.One &= KnownVec.One;
-  Known.Zero &= KnownVec.Zero;
-}
+if (!!DemandedVecElts)
+  Known = KnownBits::commonBits(Known, KnownVec);
 
 return false;
   }
@@ -1044,14 +1042,10 @@ bool TargetLowering::SimplifyDemandedBits(
 
 Known.Zero.setAllBits();
 Known.One.setAllBits();
-if (!!DemandedSubElts) {
-  Known.One &= KnownSub.One;
-  Known.Zero &= KnownSub.Zero;
-}
-if (!!DemandedSrcElts) {
-  Known.One &= KnownSrc.One;
-  Known.Zero &= KnownSrc.Zero;
-}
+if (!!DemandedSubElts)
+  Known = KnownBits::commonBits(Known, KnownSub);
+if (!!DemandedSrcElts)
+  Known = KnownBits::commonBits(Known, KnownSrc);
 
 // Attempt to avoid multi-use src if we don't need anything from it.
 if (!DemandedBits.isAllOnesValue() || !DemandedSubElts.isAllOnesValue() ||
@@ -1108,10 +1102,8 @@ bool TargetLowering::SimplifyDemandedBits(
Known2, TLO, Depth + 1))
 return true;
   // Known bits are shared by every demanded subvector element.
-  if (!!DemandedSubElts) {
-Known.One &= Known2.One;
-Known.Zero &= Known2.Zero;
-  }
+  if (!!DemandedSubElts)
+Known = KnownBits::commonBits(Known, Known2);
 }
 break;
   }
@@ -1149,15 +1141,13 @@ bool TargetLowering::SimplifyDemandedBits(
 if (SimplifyDemandedBits(Op0, DemandedBits, DemandedLHS, Known2, TLO,
  Depth + 1))
   return true;
-Known.One &= Known2.One;
-Known.Zero &= Known2.Zero;
+Known = KnownBits::commonBits(Known, Known2);
   }
   if (!!DemandedRHS) {
 if (SimplifyDemandedBits(Op1, DemandedBits, DemandedRHS, Known2, TLO,
  Depth + 1))
   return true;
-Known.One &= Known2.One;
-Known.Zero &= Known2.Zero;
+Known = KnownBits::commonBits(Known, Known2);
   }
 
   // Attempt to avoid multi-use ops if we don't need anything from them.
@@ -1384,8 +1374,7 @@ bool TargetLowering::SimplifyDemandedBits(
   return true;
 
 // Only known if known in both the LHS and RHS.
-Known.One &= Known2.One;
-Known.Zero &= Known2.Zero;
+Known = KnownBits::commonBits(Known, Known2);
 break;
   case ISD::SELECT_CC:
 if (SimplifyDemandedBits(Op.getOperand(3), DemandedBits, Known, TLO,
@@ -1402,8 +1391,7 @@ bool TargetLowering::SimplifyDemandedBits(
   return true;
 
 // Only known if known in both the LHS and RHS.
-Known.One &= Known2.One;
-Known.Zero &= Known2.Zero;
+Known = KnownBits::commonBits(Known, Known2);
 break;
   case ISD::SETCC: {
 SDValue Op0 = Op.getOperand(0);



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[llvm-branch-commits] [llvm] 517196e - [Analysis, CodeGen] Make use of KnownBits::makeConstant. NFC.

[Jay Foad via llvm-branch-commits]

Author: Jay Foad
Date: 2021-01-14T14:02:43Z
New Revision: 517196e569129677be32d6ebcfa57bac552268a4

URL: 
https://github.com/llvm/llvm-project/commit/517196e569129677be32d6ebcfa57bac552268a4
DIFF: 
https://github.com/llvm/llvm-project/commit/517196e569129677be32d6ebcfa57bac552268a4.diff

LOG: [Analysis,CodeGen] Make use of KnownBits::makeConstant. NFC.

Differential Revision: https://reviews.llvm.org/D94588

Added: 


Modified: 
llvm/lib/Analysis/ValueTracking.cpp
llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Removed: 




diff  --git a/llvm/lib/Analysis/ValueTracking.cpp 
b/llvm/lib/Analysis/ValueTracking.cpp
index b138caa05610..61c992d0eedf 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -1337,8 +1337,8 @@ static void computeKnownBitsFromOperator(const Operator 
*I,
 AccConstIndices += IndexConst.sextOrTrunc(BitWidth);
 continue;
   } else {
-ScalingFactor.Zero = ~TypeSizeInBytes;
-ScalingFactor.One = TypeSizeInBytes;
+ScalingFactor =
+KnownBits::makeConstant(APInt(IndexBitWidth, TypeSizeInBytes));
   }
   IndexBits = KnownBits::computeForMul(IndexBits, ScalingFactor);
 
@@ -1353,9 +1353,7 @@ static void computeKnownBitsFromOperator(const Operator 
*I,
   /*Add=*/true, /*NSW=*/false, Known, IndexBits);
 }
 if (!Known.isUnknown() && !AccConstIndices.isNullValue()) {
-  KnownBits Index(BitWidth);
-  Index.Zero = ~AccConstIndices;
-  Index.One = AccConstIndices;
+  KnownBits Index = KnownBits::makeConstant(AccConstIndices);
   Known = KnownBits::computeForAddSub(
   /*Add=*/true, /*NSW=*/false, Known, Index);
 }
@@ -1818,8 +1816,7 @@ void computeKnownBits(const Value *V, const APInt 
&DemandedElts,
   const APInt *C;
   if (match(V, m_APInt(C))) {
 // We know all of the bits for a scalar constant or a splat vector 
constant!
-Known.One = *C;
-Known.Zero = ~Known.One;
+Known = KnownBits::makeConstant(*C);
 return;
   }
   // Null and aggregate-zero are all-zeros.

diff  --git a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp 
b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
index 64c7fb486493..aac7a73e858f 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
@@ -217,8 +217,7 @@ void GISelKnownBits::computeKnownBitsImpl(Register R, 
KnownBits &Known,
 auto CstVal = getConstantVRegVal(R, MRI);
 if (!CstVal)
   break;
-Known.One = *CstVal;
-Known.Zero = ~Known.One;
+Known = KnownBits::makeConstant(*CstVal);
 break;
   }
   case TargetOpcode::G_FRAME_INDEX: {

diff  --git a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp 
b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
index 0b830f462c90..32a4f60df097 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
@@ -458,8 +458,7 @@ void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const 
PHINode *PN) {
   if (ConstantInt *CI = dyn_cast(V)) {
 APInt Val = CI->getValue().zextOrTrunc(BitWidth);
 DestLOI.NumSignBits = Val.getNumSignBits();
-DestLOI.Known.Zero = ~Val;
-DestLOI.Known.One = Val;
+DestLOI.Known = KnownBits::makeConstant(Val);
   } else {
 assert(ValueMap.count(V) && "V should have been placed in ValueMap when 
its"
 "CopyToReg node was created.");

diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp 
b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index e080408bbe42..7084ab68524b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3134,13 +3134,10 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, 
const APInt &DemandedElts,
   }
 } else if (BitWidth == CstTy->getPrimitiveSizeInBits()) {
   if (auto *CInt = dyn_cast(Cst)) {
-const APInt &Value = CInt->getValue();
-Known.One = Value;
-Known.Zero = ~Value;
+Known = KnownBits::makeConstant(CInt->getValue());
   } else if (auto *CFP = dyn_cast(Cst)) {
-APInt Value = CFP->getValueAPF().bitcastToAPInt();
-Known.One = Value;
-Known.Zero = ~Value;
+Known =
+KnownBits::makeConstant(CFP->getValueAPF().bitcastToAPInt());
   }
 }
   }

diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp 
b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 173e45a4b18e..6ae0a39962b3 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -912,15 +912,14 @@ boo

[llvm-branch-commits] [llvm] 90b310f - [Support] Simplify KnownBits::icmp helpers. NFC.

[Jay Foad via llvm-branch-commits]

Author: Jay Foad
Date: 2021-01-14T14:02:43Z
New Revision: 90b310f6caf0b356075c70407c338b3c751eebb3

URL: 
https://github.com/llvm/llvm-project/commit/90b310f6caf0b356075c70407c338b3c751eebb3
DIFF: 
https://github.com/llvm/llvm-project/commit/90b310f6caf0b356075c70407c338b3c751eebb3.diff

LOG: [Support] Simplify KnownBits::icmp helpers. NFC.

Remove some special cases that aren't really any simpler than the
general case.

Differential Revision: https://reviews.llvm.org/D94595

Added: 


Modified: 
llvm/lib/Support/KnownBits.cpp

Removed: 




diff  --git a/llvm/lib/Support/KnownBits.cpp b/llvm/lib/Support/KnownBits.cpp
index 0147d21d153a..0f36c6a9ef1d 100644
--- a/llvm/lib/Support/KnownBits.cpp
+++ b/llvm/lib/Support/KnownBits.cpp
@@ -271,9 +271,6 @@ KnownBits KnownBits::ashr(const KnownBits &LHS, const 
KnownBits &RHS) {
 Optional KnownBits::eq(const KnownBits &LHS, const KnownBits &RHS) {
   if (LHS.isConstant() && RHS.isConstant())
 return Optional(LHS.getConstant() == RHS.getConstant());
-  if (LHS.getMaxValue().ult(RHS.getMinValue()) ||
-  LHS.getMinValue().ugt(RHS.getMaxValue()))
-return Optional(false);
   if (LHS.One.intersects(RHS.Zero) || RHS.One.intersects(LHS.Zero))
 return Optional(false);
   return None;
@@ -286,8 +283,6 @@ Optional KnownBits::ne(const KnownBits &LHS, const 
KnownBits &RHS) {
 }
 
 Optional KnownBits::ugt(const KnownBits &LHS, const KnownBits &RHS) {
-  if (LHS.isConstant() && RHS.isConstant())
-return Optional(LHS.getConstant().ugt(RHS.getConstant()));
   // LHS >u RHS -> false if umax(LHS) <= umax(RHS)
   if (LHS.getMaxValue().ule(RHS.getMinValue()))
 return Optional(false);
@@ -312,8 +307,6 @@ Optional KnownBits::ule(const KnownBits &LHS, const 
KnownBits &RHS) {
 }
 
 Optional KnownBits::sgt(const KnownBits &LHS, const KnownBits &RHS) {
-  if (LHS.isConstant() && RHS.isConstant())
-return Optional(LHS.getConstant().sgt(RHS.getConstant()));
   // LHS >s RHS -> false if smax(LHS) <= smax(RHS)
   if (LHS.getSignedMaxValue().sle(RHS.getSignedMinValue()))
 return Optional(false);



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[llvm-branch-commits] [llvm] e8622d2 - [Support] Add KnownBits::sextInReg exhaustive tests

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-14T14:27:45Z
New Revision: e8622d27c0e3020177ff47ad57dd1e5371feb9cf

URL: 
https://github.com/llvm/llvm-project/commit/e8622d27c0e3020177ff47ad57dd1e5371feb9cf
DIFF: 
https://github.com/llvm/llvm-project/commit/e8622d27c0e3020177ff47ad57dd1e5371feb9cf.diff

LOG: [Support] Add KnownBits::sextInReg exhaustive tests

Requested by @foad in rG9cf4f493a72f

Added: 


Modified: 
llvm/unittests/Support/KnownBitsTest.cpp

Removed: 




diff  --git a/llvm/unittests/Support/KnownBitsTest.cpp 
b/llvm/unittests/Support/KnownBitsTest.cpp
index ba587a1e2f65..991096098b8e 100644
--- a/llvm/unittests/Support/KnownBitsTest.cpp
+++ b/llvm/unittests/Support/KnownBitsTest.cpp
@@ -425,4 +425,24 @@ TEST(KnownBitsTest, SExtOrTrunc) {
   }
 }
 
+TEST(KnownBitsTest, SExtInReg) {
+  unsigned Bits = 4;
+  for (unsigned FromBits = 1; FromBits != Bits; ++FromBits) {
+ForeachKnownBits(Bits, [&](const KnownBits &Known) {
+  APInt CommonOne = APInt::getAllOnesValue(Bits);
+  APInt CommonZero = APInt::getAllOnesValue(Bits);
+  unsigned ExtBits = Bits - FromBits;
+  ForeachNumInKnownBits(Known, [&](const APInt &N) {
+APInt Ext = N << ExtBits;
+Ext.ashrInPlace(ExtBits);
+CommonOne &= Ext;
+CommonZero &= ~Ext;
+  });
+  KnownBits KnownSExtInReg = Known.sextInReg(FromBits);
+  EXPECT_EQ(CommonOne, KnownSExtInReg.One);
+  EXPECT_EQ(CommonZero, KnownSExtInReg.Zero);
+});
+  }
+}
+
 } // end anonymous namespace



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[llvm-branch-commits] [llvm] 332e220 - [docs] Update DebuggingJITedCode page after fix in LLDB

[Stefan Gränitz via llvm-branch-commits]

Author: Stefan Gränitz
Date: 2021-01-14T15:43:11+01:00
New Revision: 332e220ef42b92df4e080cfa5b91c9accbe9731b

URL: 
https://github.com/llvm/llvm-project/commit/332e220ef42b92df4e080cfa5b91c9accbe9731b
DIFF: 
https://github.com/llvm/llvm-project/commit/332e220ef42b92df4e080cfa5b91c9accbe9731b.diff

LOG: [docs] Update DebuggingJITedCode page after fix in LLDB

Generalize the documentation to include both, GDB and LLDB. Add a link to the 
interface
definition. Make a note on MCJIT's restriction to ELF. Mention the regression 
and bugfix
in LLDB as well as the jit-loader setting for macOS. Update the command line 
session to
use LLDB instead of GDB.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D90789

Added: 


Modified: 
llvm/docs/DebuggingJITedCode.rst

Removed: 




diff  --git a/llvm/docs/DebuggingJITedCode.rst 
b/llvm/docs/DebuggingJITedCode.rst
index e4885e42fa10..e1583648978a 100644
--- a/llvm/docs/DebuggingJITedCode.rst
+++ b/llvm/docs/DebuggingJITedCode.rst
@@ -1,35 +1,48 @@
-==
-Debugging JIT-ed Code With GDB
-==
+=
+Debugging JIT-ed Code
+=
 
 Background
 ==
 
-Without special runtime support, debugging dynamically generated code with
-GDB (as well as most debuggers) can be quite painful.  Debuggers generally
-read debug information from the object file of the code, but for JITed
-code, there is no such file to look for.
-
-In order to communicate the necessary debug info to GDB, an interface for
-registering JITed code with debuggers has been designed and implemented for
-GDB and LLVM MCJIT.  At a high level, whenever MCJIT generates new machine 
code,
-it does so in an in-memory object file that contains the debug information in
-DWARF format.  MCJIT then adds this in-memory object file to a global list of
-dynamically generated object files and calls a special function
-(``__jit_debug_register_code``) marked noinline that GDB knows about.  When
-GDB attaches to a process, it puts a breakpoint in this function and loads all
-of the object files in the global list.  When MCJIT calls the registration
-function, GDB catches the breakpoint signal, loads the new object file from
-the inferior's memory, and resumes the execution.  In this way, GDB can get the
-necessary debug information.
+Without special runtime support, debugging dynamically generated code can be
+quite painful.  Debuggers generally read debug information from object files on
+disk, but for JITed code there is no such file to look for.
+
+In order to hand over the necessary debug info, `GDB established an
+interface 
`_
+for registering JITed code with debuggers. LLDB implements it in the
+JITLoaderGDB plugin.  On the JIT side, LLVM MCJIT does implement the interface
+for ELF object files.
+
+At a high level, whenever MCJIT generates new machine code, it does so in an
+in-memory object file that contains the debug information in DWARF format.
+MCJIT then adds this in-memory object file to a global list of dynamically
+generated object files and calls a special function
+``__jit_debug_register_code`` that the debugger knows about. When the debugger
+attaches to a process, it puts a breakpoint in this function and associates a
+special handler with it.  Once MCJIT calls the registration function, the
+debugger catches the breakpoint signal, loads the new object file from the
+inferior's memory and resumes execution.  This way it can obtain debug
+information for pure in-memory object files.
+
 
 GDB Version
 ===
 
 In order to debug code JIT-ed by LLVM, you need GDB 7.0 or newer, which is
 available on most modern distributions of Linux.  The version of GDB that
-Apple ships with Xcode has been frozen at 6.3 for a while.  LLDB may be a
-better option for debugging JIT-ed code on macOS.
+Apple ships with Xcode has been frozen at 6.3 for a while.
+
+
+LLDB Version
+
+
+Due to a regression in release 6.0, LLDB didn't support JITed code debugging 
for
+a while.  The bug was fixed in mainline recently, so that debugging JITed ELF
+objects should be possible again from the upcoming release 12.0 on. On macOS 
the
+feature must be enabled explicitly using the ``plugin.jit-loader.gdb.enable``
+setting.
 
 
 Debugging MCJIT-ed code
@@ -39,8 +52,8 @@ The emerging MCJIT component of LLVM allows full debugging of 
JIT-ed code with
 GDB.  This is due to MCJIT's ability to use the MC emitter to provide full
 DWARF debugging information to GDB.
 
-Note that lli has to be passed the ``-jit-kind=mcjit`` flag to JIT the code 
with
-MCJIT instead of the old JIT.
+Note that lli has to be passed the ``--jit-kind=mcjit`` flag to JIT the code
+with MCJIT instead of the newer ORC JIT.
 
 Example
 ---
@@ -81,63 +94,89 @@ easier to follow):
22  }
 

[llvm-branch-commits] [llvm] 0b46f19 - [Support] Ensure KnownBits::sextInReg can handle the src == dst sext-in-reg case.

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-14T14:50:21Z
New Revision: 0b46f19a9ecd6215cffb51d19f2403c18b0226f5

URL: 
https://github.com/llvm/llvm-project/commit/0b46f19a9ecd6215cffb51d19f2403c18b0226f5
DIFF: 
https://github.com/llvm/llvm-project/commit/0b46f19a9ecd6215cffb51d19f2403c18b0226f5.diff

LOG: [Support] Ensure KnownBits::sextInReg can handle the src == dst 
sext-in-reg case.

This was resulting in assertions inside APInt::zext that we were extending to 
the same bitwidth.

Added: 


Modified: 
llvm/lib/Support/KnownBits.cpp
llvm/unittests/Support/KnownBitsTest.cpp

Removed: 




diff  --git a/llvm/lib/Support/KnownBits.cpp b/llvm/lib/Support/KnownBits.cpp
index 0f36c6a9ef1d..a46a90bb97d4 100644
--- a/llvm/lib/Support/KnownBits.cpp
+++ b/llvm/lib/Support/KnownBits.cpp
@@ -85,7 +85,11 @@ KnownBits KnownBits::computeForAddSub(bool Add, bool NSW,
 
 KnownBits KnownBits::sextInReg(unsigned SrcBitWidth) const {
   unsigned BitWidth = getBitWidth();
-  assert(BitWidth >= SrcBitWidth && "Illegal sext-in-register");
+  assert(0 < SrcBitWidth && SrcBitWidth <= BitWidth &&
+ "Illegal sext-in-register");
+
+  if (SrcBitWidth == BitWidth)
+return *this;
 
   // Sign extension.  Compute the demanded bits in the result that are not
   // present in the input.

diff  --git a/llvm/unittests/Support/KnownBitsTest.cpp 
b/llvm/unittests/Support/KnownBitsTest.cpp
index 991096098b8e..4e69df49837e 100644
--- a/llvm/unittests/Support/KnownBitsTest.cpp
+++ b/llvm/unittests/Support/KnownBitsTest.cpp
@@ -427,7 +427,7 @@ TEST(KnownBitsTest, SExtOrTrunc) {
 
 TEST(KnownBitsTest, SExtInReg) {
   unsigned Bits = 4;
-  for (unsigned FromBits = 1; FromBits != Bits; ++FromBits) {
+  for (unsigned FromBits = 1; FromBits <= Bits; ++FromBits) {
 ForeachKnownBits(Bits, [&](const KnownBits &Known) {
   APInt CommonOne = APInt::getAllOnesValue(Bits);
   APInt CommonZero = APInt::getAllOnesValue(Bits);



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[llvm-branch-commits] [flang] 3e41ab1 - [flang] Fix dangling pointer in LabelEnforce

[Tim Keith via llvm-branch-commits]

Author: Tim Keith
Date: 2021-01-14T06:52:21-08:00
New Revision: 3e41ab18db2255028c288a11665c08d260654299

URL: 
https://github.com/llvm/llvm-project/commit/3e41ab18db2255028c288a11665c08d260654299
DIFF: 
https://github.com/llvm/llvm-project/commit/3e41ab18db2255028c288a11665c08d260654299.diff

LOG: [flang] Fix dangling pointer in LabelEnforce

`DirectiveStructureChecker` was passing in a pointer to a temporary
string for the `construct` argument to the constructor for `LabelEnforce`.
The `LabelEnforce` object had a lifetime longer than the temporary,
resulting in accessing a dangling pointer when emitting an error message
for `omp-parallell01.f90`.

The fix is to make the lifetime of the temporary as long as the lifetime
of the `LabelEnforce` object.

Differential Revision: https://reviews.llvm.org/D94618

Added: 


Modified: 
flang/lib/Semantics/check-directive-structure.h

Removed: 




diff  --git a/flang/lib/Semantics/check-directive-structure.h 
b/flang/lib/Semantics/check-directive-structure.h
index 1075087feb4f..76157ac93925 100644
--- a/flang/lib/Semantics/check-directive-structure.h
+++ b/flang/lib/Semantics/check-directive-structure.h
@@ -280,9 +280,9 @@ void DirectiveStructureChecker::CheckNoBranching(
   context_, directiveSource, directive, ContextDirectiveAsFortran()};
   parser::Walk(block, noBranchingEnforce);
 
+  auto 
construct{parser::ToUpperCaseLetters(getDirectiveName(directive).str())};
   LabelEnforce directiveLabelEnforce{context_, noBranchingEnforce.labels(),
-  directiveSource,
-  parser::ToUpperCaseLetters(getDirectiveName(directive).str()).c_str()};
+  directiveSource, construct.c_str()};
   parser::Walk(block, directiveLabelEnforce);
 }
 



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[llvm-branch-commits] [clang] adb77a7 - [OpenCL] Improve online documentation.

[Anastasia Stulova via llvm-branch-commits]

Author: Anastasia Stulova
Date: 2021-01-14T14:56:10Z
New Revision: adb77a7456920a46908c7e20b2d3008789274975

URL: 
https://github.com/llvm/llvm-project/commit/adb77a7456920a46908c7e20b2d3008789274975
DIFF: 
https://github.com/llvm/llvm-project/commit/adb77a7456920a46908c7e20b2d3008789274975.diff

LOG: [OpenCL] Improve online documentation.

Update UsersManual and OpenCLSupport pages to reflect
recent functionality i.e. SPIR-V generation,
C++ for OpenCL, OpenCL 3.0 development plans.

Tags: #clang

Differential Revision: https://reviews.llvm.org/D93942

Added: 


Modified: 
clang/docs/OpenCLSupport.rst
clang/docs/UsersManual.rst

Removed: 




diff  --git a/clang/docs/OpenCLSupport.rst b/clang/docs/OpenCLSupport.rst
index b00a9ef41064..9c17bd8f2692 100644
--- a/clang/docs/OpenCLSupport.rst
+++ b/clang/docs/OpenCLSupport.rst
@@ -17,34 +17,92 @@
 OpenCL Support
 ==
 
-Clang fully supports all OpenCL C versions from 1.1 to 2.0.
+Clang has complete support of OpenCL C versions from 1.0 to 2.0.
 
-Please refer to `Bugzilla
-`__
-for the most up to date bug reports.
+Clang also supports :ref:`the C++ for OpenCL kernel language 
`.
 
+There is an ongoing work to support :ref:`OpenCL 3.0 `.
+
+There are also other :ref:`new and experimental features ` 
available.
+
+For general issues and bugs with OpenCL in clang refer to `Bugzilla
+`__.
+
+.. _cxx_for_opencl_impl:
 
 C++ for OpenCL Implementation Status
 
 
-Bugzilla bugs for this functionality are typically prefixed
-with '[C++]'.
+Clang implements language version 1.0 published in `the official
+release of C++ for OpenCL Documentation
+`_.
 
-Differences to OpenCL C

+Limited support of experimental C++ libraries is described in the 
`experimental features `.
+
+Bugzilla bugs for this functionality are typically prefixed
+with '[C++4OpenCL]' - click `here
+`_
+to view the full bug list.
 
-TODO!
 
 Missing features or with limited support
 
 
-- Use of ObjC blocks is disabled.
-
-- Global destructor invocation is not generated correctly.
-
-- Initialization of objects in `__constant` address spaces is not guaranteed 
to work.
-
-- `addrspace_cast` operator is not supported.
+- Use of ObjC blocks is disabled and therefore the ``enqueue_kernel`` builtin
+  function is not supported currently. It is expected that if support for this
+  feature is added in the future, it will utilize C++ lambdas instead of ObjC
+  blocks.
+
+- IR generation for global destructors is incomplete (See:
+  `PR48047 `_).
+
+- There is no distinct file extension for sources that are to be compiled
+  in C++ for OpenCL mode (See: `PR48097 `_)
+
+.. _opencl_300:
+
+OpenCL 3.0 Implementation Status
+
+
+The following table provides an overview of features in OpenCL C 3.0 and their
+implementation status. 
+
++--+--+--+---
+
+| Category | Feature   
   | Status   | Reviews 
  |
++==+==+==+===
+
+| Command line interface   | New value for ``-cl-std`` flag
   | :good:`done` | https://reviews.llvm.org/D88300 
  |
++--+--+--+---
+
+| Predefined macros| New version macro 
   | :good:`done` | https://reviews.llvm.org/D88300 
  |
++--+--+--+---
+
+| Predefined macros| Feature macros  

[llvm-branch-commits] [mlir] 6b9fa8a - [mlir][linalg] Add docstring support for named op spec

[Lei Zhang via llvm-branch-commits]

Author: Lei Zhang
Date: 2021-01-14T09:57:56-05:00
New Revision: 6b9fa8a50d0f9e1e54f238b1c50fee8ff7011218

URL: 
https://github.com/llvm/llvm-project/commit/6b9fa8a50d0f9e1e54f238b1c50fee8ff7011218
DIFF: 
https://github.com/llvm/llvm-project/commit/6b9fa8a50d0f9e1e54f238b1c50fee8ff7011218.diff

LOG: [mlir][linalg] Add docstring support for named op spec

Depends on D94335

Reviewed By: nicolasvasilache, hanchung

Differential Revision: https://reviews.llvm.org/D94548

Added: 


Modified: 
mlir/docs/Dialects/Linalg.md
mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp

Removed: 




diff  --git a/mlir/docs/Dialects/Linalg.md b/mlir/docs/Dialects/Linalg.md
index 1f8ef3c4021b..a5caabd212b4 100644
--- a/mlir/docs/Dialects/Linalg.md
+++ b/mlir/docs/Dialects/Linalg.md
@@ -608,10 +608,18 @@ semantics:
 perform multiple updates.
 2.  Each tensor may only be used with a single indexing expression.
 
+A `"""`-wrapped doc string can be attached to the named op. It should contain a
+oneliner for summary first, followed by lengthy description.
+
 The following specification may be used to define a named `batchmatmul` op:
 
 ```
-def batchmatmul(A: f32(Batch, M, K), B: f32(K, N)) -> (C: f32(Batch, M, N)) {
+def batchmatmul(A: f32(Batch, M, K), B: f32(K, N)) -> (C: f32(Batch, M, N))
+"""Batch matrix-multiply operation.
+
+This operation performs batch matrix-multiply over ...
+"""
+{
   C(b, m, n) = std_addf(std_mulf(A(b, m, k), B(k, n)));
 }
 ```

diff  --git a/mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc 
b/mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
index 1ce2d2ac9418..226a09669b1c 100644
--- a/mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
+++ b/mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
@@ -125,3 +125,22 @@ def test5(I: f32(N, H, W, C), K: f32(F, KH, KW, C)) -> (O: 
f32(N, H, W, F))
   O(n, h, w, f) = std_addf(std_mulf(
 I(n, h * strides[0] + kh, w * strides[1] + kw, c), K(f, kh, kw, c)));
 }
+
+// ODS-LABEL: def Test6Op
+// ODS:   let summary = [{ My magic op. }];
+// ODS-NEXT:  let description = [{
+// ODS-NEXT:It has two inputs.
+// ODS-NEXT:It has one output.
+// ODS-NEXT:  }];
+//
+ods_def:
+def test6(A: f32(M, K), B: f32(K)) -> (C: f32(M))
+"""
+My magic op.
+
+It has two inputs.
+It has one output.
+"""
+{
+  C(m) = std_addf(std_mulf(A(m, k), B(k)));
+}

diff  --git a/mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp 
b/mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp
index cb7bfd2c9c4d..f4b7f9f9323a 100644
--- a/mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp
+++ b/mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp
@@ -30,6 +30,7 @@
 #include "llvm/ADT/Twine.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Debug.h"
 #include "llvm/Support/FormatVariadic.h"
 #include "llvm/Support/ToolOutputFile.h"
 
@@ -85,6 +86,7 @@ class Token {
 // Tokens with no info.
 colon,
 comma,
+doc_str,
 equal,
 gt,
 l_brace,
@@ -183,6 +185,9 @@ class Lexer {
   // Lex an integer.
   Token lexInteger(const char *tokStart);
 
+  // Lex a string.
+  Token lexString(const char *tokStart);
+
   // Skip a comment line, starting with a '//'.
   void skipComment();
 
@@ -287,6 +292,8 @@ Token Lexer::lexToken() {
   return formToken(Token::Kind::star, tokStart);
 case '?':
   return formToken(Token::Kind::question, tokStart);
+case '"':
+  return lexString(tokStart);
 case '/':
   if (*curPtr == '/') {
 skipComment();
@@ -333,6 +340,36 @@ Token Lexer::lexInteger(const char *tokStart) {
   return Token(Token::Kind::integer, str);
 }
 
+Token Lexer::lexString(const char *tokStart) {
+  assert(curPtr[-1] == '"');
+
+  if (*curPtr == '"' && *(curPtr + 1) == '"') {
+curPtr += 2;
+while (true) {
+  switch (*curPtr++) {
+  case '"':
+if (*curPtr == '"' && *(curPtr + 1) == '"') {
+  Token token(Token::Kind::doc_str,
+  StringRef(tokStart + 3, curPtr - tokStart - 4));
+  curPtr += 2;
+  return token;
+}
+continue;
+  case 0:
+// If this is a random nul character in the middle of the doc string,
+// just include it.  If it is the end of file, then it is an error.
+if (curPtr - 1 != curBuffer.end())
+  continue;
+return emitError(curPtr - 1, "expected '\"\"\"' to end doc string");
+  default:
+continue;
+  }
+}
+  }
+
+  return emitError(curPtr - 1, "expected '\"\"\"' to start doc string");
+}
+
 /// Skip a comment line, starting with a '//'.
 void Lexer::skipComment() {
   // Advance over the second '/' in a '//' comment.
@@ -1134,6 +1171,8 @@ class TCParser {
   /// Attributes are per TC def.
   std::map registeredAttrs;
 
+  StringRef docString;
+
   Parser &p

[llvm-branch-commits] [llvm] c0939fd - [Support] Simplify KnownBits::sextInReg implementation.

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-14T15:14:32Z
New Revision: c0939fddf80c16829502186e2e5b78f77696310a

URL: 
https://github.com/llvm/llvm-project/commit/c0939fddf80c16829502186e2e5b78f77696310a
DIFF: 
https://github.com/llvm/llvm-project/commit/c0939fddf80c16829502186e2e5b78f77696310a.diff

LOG: [Support] Simplify KnownBits::sextInReg implementation.

As noted by @foad in rG9cf4f493a72f all we need to do is sextInReg both 
KnownBits One and Zero.

Added: 


Modified: 
llvm/lib/Support/KnownBits.cpp

Removed: 




diff  --git a/llvm/lib/Support/KnownBits.cpp b/llvm/lib/Support/KnownBits.cpp
index a46a90bb97d4..3623a54ae476 100644
--- a/llvm/lib/Support/KnownBits.cpp
+++ b/llvm/lib/Support/KnownBits.cpp
@@ -91,34 +91,12 @@ KnownBits KnownBits::sextInReg(unsigned SrcBitWidth) const {
   if (SrcBitWidth == BitWidth)
 return *this;
 
-  // Sign extension.  Compute the demanded bits in the result that are not
-  // present in the input.
-  APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth);
-
-  // If the sign extended bits are demanded, we know that the sign
-  // bit is demanded.
-  APInt InSignMask = APInt::getSignMask(SrcBitWidth).zext(BitWidth);
-  APInt InDemandedBits = APInt::getLowBitsSet(BitWidth, SrcBitWidth);
-  if (NewBits.getBoolValue())
-InDemandedBits |= InSignMask;
-
+  unsigned ExtBits = BitWidth - SrcBitWidth;
   KnownBits Result;
-  Result.One = One & InDemandedBits;
-  Result.Zero = Zero & InDemandedBits;
-
-  // If the sign bit of the input is known set or clear, then we know the
-  // top bits of the result.
-  if (Result.Zero.intersects(InSignMask)) { // Input sign bit known clear
-Result.Zero |= NewBits;
-Result.One &= ~NewBits;
-  } else if (Result.One.intersects(InSignMask)) { // Input sign bit known set
-Result.One |= NewBits;
-Result.Zero &= ~NewBits;
-  } else { // Input sign bit unknown
-Result.Zero &= ~NewBits;
-Result.One &= ~NewBits;
-  }
-
+  Result.One = One << ExtBits;
+  Result.Zero = Zero << ExtBits;
+  Result.One.ashrInPlace(ExtBits);
+  Result.Zero.ashrInPlace(ExtBits);
   return Result;
 }
 



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[llvm-branch-commits] [llvm] a022be6 - [TableGen] Enhance !cast to handle bit and bits types.

[Paul C. Anagnostopoulos via llvm-branch-commits]

Author: Paul C. Anagnostopoulos
Date: 2021-01-14T10:20:35-05:00
New Revision: a022be625387370cf67b26c6b99b05f16b2a8610

URL: 
https://github.com/llvm/llvm-project/commit/a022be625387370cf67b26c6b99b05f16b2a8610
DIFF: 
https://github.com/llvm/llvm-project/commit/a022be625387370cf67b26c6b99b05f16b2a8610.diff

LOG: [TableGen] Enhance !cast to handle bit and bits types.

Add a test for this.

Differential Revision: https://reviews.llvm.org/D94529

Added: 
llvm/test/TableGen/cast-string.td

Modified: 
llvm/lib/TableGen/Record.cpp

Removed: 




diff  --git a/llvm/lib/TableGen/Record.cpp b/llvm/lib/TableGen/Record.cpp
index d047b7bdf1cd..74786e040018 100644
--- a/llvm/lib/TableGen/Record.cpp
+++ b/llvm/lib/TableGen/Record.cpp
@@ -689,8 +689,10 @@ Init *UnOpInit::Fold(Record *CurRec, bool IsFinal) const {
   if (DefInit *LHSd = dyn_cast(LHS))
 return StringInit::get(LHSd->getAsString());
 
-  if (IntInit *LHSi = dyn_cast(LHS))
+  if (IntInit *LHSi =
+  
dyn_cast_or_null(LHS->convertInitializerTo(IntRecTy::get(
 return StringInit::get(LHSi->getAsString());
+
 } else if (isa(getType())) {
   if (StringInit *Name = dyn_cast(LHS)) {
 if (!CurRec && !IsFinal)

diff  --git a/llvm/test/TableGen/cast-string.td 
b/llvm/test/TableGen/cast-string.td
new file mode 100644
index ..be25d24a3b9f
--- /dev/null
+++ b/llvm/test/TableGen/cast-string.td
@@ -0,0 +1,59 @@
+// RUN: llvm-tblgen %s | FileCheck %s
+// RUN: not llvm-tblgen -DERROR1 %s 2>&1 | FileCheck --check-prefix=ERROR1 %s
+
+// This file tests the !cast bang operator with the result type string.
+
+defvar IntList = [0, 1, 2, 3, 4, 5, 6];
+
+// CHECK: def Rec0
+// CHECK:   string str3 = "a string here"
+
+def Rec0 {
+  string str = "a string";
+  string str2 = !cast(str);
+  string str3 = !cast(str # " here");
+}
+
+// CHECK: def Rec1
+// CHECK:   string str = "42 -108"
+
+def Rec1 {
+  int int1 = 42;
+  int int2 = -108;
+  string str = !cast(int1) # " " # !cast(int2);
+}
+
+// CHECK: def Rec2
+// CHECK:   string str = "0, 1"
+
+def Rec2 {
+  bit bit1 = false;
+  bit bit2 = true;
+  string str = !cast(bit1) # ", " # !cast(bit2);
+}
+
+// CHECK: def Rec3
+// CHECK:   string str = "5 and 37"
+
+def Rec3 {
+  bits<4> bits1 = 0b0101;
+  bits<8> bits2 = 0b00100101;
+  string str = !cast(bits1) # " and " # !cast(bits2);
+}
+
+// CHECK: def Rec4
+// CHECK:   string str = "Rec1, Rec2"
+
+def Rec4 {
+  string str = !cast(Rec1) # ", " # !cast(Rec2);
+}
+
+#ifdef ERROR1
+
+// ERROR1: nitializer of 'str' in 'Rec5' could not be fully resolved
+
+def Rec5 {
+  string str = !cast(IntList);
+}
+
+#endif



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[llvm-branch-commits] [llvm] dbaa6a1 - Revert "[AArch64] Attempt to sink mul operands"

[Martin Storsjö via llvm-branch-commits]

Author: Martin Storsjö
Date: 2021-01-14T17:28:18+02:00
New Revision: dbaa6a1858a42f72b683f700d3bd7a9632f7a518

URL: 
https://github.com/llvm/llvm-project/commit/dbaa6a1858a42f72b683f700d3bd7a9632f7a518
DIFF: 
https://github.com/llvm/llvm-project/commit/dbaa6a1858a42f72b683f700d3bd7a9632f7a518.diff

LOG: Revert "[AArch64] Attempt to sink mul operands"

This reverts commit dda60035e9f0769c8907cdf6561489e0435c2275.

This commit caused failures to compile some sources, erroring out
with "error in backend: Cannot select: t85: v2i32 = AArch64ISD::DUP t15",
see https://reviews.llvm.org/D91271 for the full reproduction case.

Added: 


Modified: 
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Removed: 
llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll



diff  --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp 
b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 082fdf390786..b500cd534a1f 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -10956,43 +10956,6 @@ bool AArch64TargetLowering::shouldSinkOperands(
 
 return true;
   }
-  case Instruction::Mul: {
-bool IsProfitable = false;
-for (auto &Op : I->operands()) {
-  // Make sure we are not already sinking this operand
-  if (any_of(Ops, [&](Use *U) { return U->get() == Op; }))
-continue;
-
-  ShuffleVectorInst *Shuffle = dyn_cast(Op);
-  if (!Shuffle || !Shuffle->isZeroEltSplat())
-continue;
-
-  Value *ShuffleOperand = Shuffle->getOperand(0);
-  InsertElementInst *Insert = dyn_cast(ShuffleOperand);
-  if (!Insert)
-continue;
-
-  Instruction *OperandInstr = dyn_cast(Insert->getOperand(1));
-  if (!OperandInstr)
-continue;
-
-  ConstantInt *ElementConstant =
-  dyn_cast(Insert->getOperand(2));
-  // Check that the insertelement is inserting into element 0
-  if (!ElementConstant || ElementConstant->getZExtValue() != 0)
-continue;
-
-  unsigned Opcode = OperandInstr->getOpcode();
-  if (Opcode != Instruction::SExt && Opcode != Instruction::ZExt)
-continue;
-
-  Ops.push_back(&Shuffle->getOperandUse(0));
-  Ops.push_back(&Op);
-  IsProfitable = true;
-}
-
-return IsProfitable;
-  }
   default:
 return false;
   }

diff  --git a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll 
b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
deleted file mode 100644
index 966cf7b46daa..
--- a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
+++ /dev/null
@@ -1,186 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-none-linux-gnu < %s -o -| FileCheck %s
-
-define void @matrix_mul_unsigned(i32 %N, i32* nocapture %C, i16* nocapture 
readonly %A, i16 %val) {
-; CHECK-LABEL: matrix_mul_unsigned:
-; CHECK:   // %bb.0: // %vector.header
-; CHECK-NEXT:and w9, w3, #0x
-; CHECK-NEXT:// kill: def $w0 killed $w0 def $x0
-; CHECK-NEXT:and x8, x0, #0xfff8
-; CHECK-NEXT:dup v0.4h, w9
-; CHECK-NEXT:  .LBB0_1: // %vector.body
-; CHECK-NEXT:// =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:add x9, x2, w0, uxtw #1
-; CHECK-NEXT:ldp d1, d2, [x9]
-; CHECK-NEXT:add x9, x1, w0, uxtw #2
-; CHECK-NEXT:subs x8, x8, #8 // =8
-; CHECK-NEXT:add w0, w0, #8 // =8
-; CHECK-NEXT:umull v1.4s, v0.4h, v1.4h
-; CHECK-NEXT:umull v2.4s, v0.4h, v2.4h
-; CHECK-NEXT:stp q1, q2, [x9]
-; CHECK-NEXT:b.ne .LBB0_1
-; CHECK-NEXT:  // %bb.2: // %for.end12
-; CHECK-NEXT:ret
-vector.header:
-  %conv4 = zext i16 %val to i32
-  %wide.trip.count = zext i32 %N to i64
-  %0 = add nsw i64 %wide.trip.count, -1
-  %min.iters.check = icmp ult i32 %N, 8
-  %1 = trunc i64 %0 to i32
-  %2 = icmp ugt i64 %0, 4294967295
-  %n.vec = and i64 %wide.trip.count, 4294967288
-  %broadcast.splatinsert = insertelement <4 x i32> undef, i32 %conv4, i32 0
-  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> 
undef, <4 x i32> zeroinitializer
-  %broadcast.splatinsert31 = insertelement <4 x i32> undef, i32 %conv4, i32 0
-  %broadcast.splat32 = shufflevector <4 x i32> %broadcast.splatinsert31, <4 x 
i32> undef, <4 x i32> zeroinitializer
-  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
-  br label %vector.body
-
-vector.body:  ; preds = %vector.header, 
%vector.body
-  %index = phi i64 [ %index.next, %vector.body ], [ 0, %vector.header ]
-  %3 = trunc i64 %index to i32
-  %4 = add i32 %N, %3
-  %5 = zext i32 %4 to i64
-  %6 = getelementptr inbounds i16, i16* %A, i64 %5
-  %7 = bitcast i16* %6 to <4 x i16>*
-  %wide.load = load <4 x i16>, <4 x i16>* %7, align 2
-  %8 = getelementptr inbounds i16, i16* %6, i64 4
-  %9 = bitcast i16* %8 to <4 x i16>*
-  %wide.load30 = load <4 x i16>, <4 x i16>* %9, align 2
-  %1

[llvm-branch-commits] [llvm] 0a59647 - [SystemZ] misched-cutoff tests can only be tested on non-NDEBUG (assertion) builds

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-14T15:46:27Z
New Revision: 0a59647ee407524e6468cc5be4ba288861aa700d

URL: 
https://github.com/llvm/llvm-project/commit/0a59647ee407524e6468cc5be4ba288861aa700d
DIFF: 
https://github.com/llvm/llvm-project/commit/0a59647ee407524e6468cc5be4ba288861aa700d.diff

LOG: [SystemZ] misched-cutoff tests can only be tested on non-NDEBUG 
(assertion) builds

Fixes clang-with-thin-lto-ubuntu buildbot after D94383/rGddd03842c347

Added: 


Modified: 
llvm/test/CodeGen/SystemZ/misched-cutoff.ll

Removed: 




diff  --git a/llvm/test/CodeGen/SystemZ/misched-cutoff.ll 
b/llvm/test/CodeGen/SystemZ/misched-cutoff.ll
index 0de80a22c301..859c7398f2cd 100644
--- a/llvm/test/CodeGen/SystemZ/misched-cutoff.ll
+++ b/llvm/test/CodeGen/SystemZ/misched-cutoff.ll
@@ -1,5 +1,7 @@
 ; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -misched-cutoff=1 -o /dev/null < 
%s
-;
+; REQUIRES: asserts
+; -misched=shuffle isn't available in NDEBUG builds!
+
 ; Test that the post-ra scheduler does not crash with -misched-cutoff.
 
 @g_184 = external dso_local global i16, align 2



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[llvm-branch-commits] [llvm] d0dbb04 - [Support] Remove redundant sign bit tests from KnownBits::getSignedMinValue/getSignedMaxValue

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-14T15:46:26Z
New Revision: d0dbb0468c26bafa88e7340781fb3a0a79379470

URL: 
https://github.com/llvm/llvm-project/commit/d0dbb0468c26bafa88e7340781fb3a0a79379470
DIFF: 
https://github.com/llvm/llvm-project/commit/d0dbb0468c26bafa88e7340781fb3a0a79379470.diff

LOG: [Support] Remove redundant sign bit tests from 
KnownBits::getSignedMinValue/getSignedMaxValue

As noted by @foad on rG6895581fd2c1

Added: 


Modified: 
llvm/include/llvm/Support/KnownBits.h

Removed: 




diff  --git a/llvm/include/llvm/Support/KnownBits.h 
b/llvm/include/llvm/Support/KnownBits.h
index edb771d659e2..d854aadbd430 100644
--- a/llvm/include/llvm/Support/KnownBits.h
+++ b/llvm/include/llvm/Support/KnownBits.h
@@ -125,7 +125,7 @@ struct KnownBits {
 // Assume that all bits that aren't known-ones are zeros.
 APInt Min = One;
 // Sign bit is unknown.
-if (Zero.isSignBitClear() && One.isSignBitClear())
+if (Zero.isSignBitClear())
   Min.setSignBit();
 return Min;
   }
@@ -141,7 +141,7 @@ struct KnownBits {
 // Assume that all bits that aren't known-zeros are ones.
 APInt Max = ~Zero;
 // Sign bit is unknown.
-if (Zero.isSignBitClear() && One.isSignBitClear())
+if (One.isSignBitClear())
   Max.clearSignBit();
 return Max;
   }



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[llvm-branch-commits] [clang-tools-extra] 17fb21f - [clangd] Remove another option that was effectively always true. NFC

[Sam McCall via llvm-branch-commits]

Author: Sam McCall
Date: 2021-01-14T17:19:47+01:00
New Revision: 17fb21f875f4aaf6ad2cf9499cb75d76588167f2

URL: 
https://github.com/llvm/llvm-project/commit/17fb21f875f4aaf6ad2cf9499cb75d76588167f2
DIFF: 
https://github.com/llvm/llvm-project/commit/17fb21f875f4aaf6ad2cf9499cb75d76588167f2.diff

LOG: [clangd] Remove another option that was effectively always true. NFC

Added: 


Modified: 
clang-tools-extra/clangd/ClangdServer.cpp
clang-tools-extra/clangd/CodeComplete.h
clang-tools-extra/clangd/tool/ClangdMain.cpp
clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/ClangdServer.cpp 
b/clang-tools-extra/clangd/ClangdServer.cpp
index d5e21cfb063e..4f3a47dff05d 100644
--- a/clang-tools-extra/clangd/ClangdServer.cpp
+++ b/clang-tools-extra/clangd/ClangdServer.cpp
@@ -243,15 +243,11 @@ void ClangdServer::codeComplete(PathRef File, Position 
Pos,
   // No speculation in Fallback mode, as it's supposed to be much faster
   // without compiling.
   vlog("Build for file {0} is not ready. Enter fallback mode.", File);
-} else {
-  if (CodeCompleteOpts.Index && CodeCompleteOpts.SpeculativeIndexRequest) {
-SpecFuzzyFind.emplace();
-{
-  std::lock_guard Lock(
-  CachedCompletionFuzzyFindRequestMutex);
-  SpecFuzzyFind->CachedReq =
-  CachedCompletionFuzzyFindRequestByFile[File];
-}
+} else if (CodeCompleteOpts.Index) {
+  SpecFuzzyFind.emplace();
+  {
+std::lock_guard 
Lock(CachedCompletionFuzzyFindRequestMutex);
+SpecFuzzyFind->CachedReq = 
CachedCompletionFuzzyFindRequestByFile[File];
   }
 }
 ParseInputs ParseInput{IP->Command, &TFS, IP->Contents.str()};

diff  --git a/clang-tools-extra/clangd/CodeComplete.h 
b/clang-tools-extra/clangd/CodeComplete.h
index f7ac3c7e5aba..ddcbd487ecc6 100644
--- a/clang-tools-extra/clangd/CodeComplete.h
+++ b/clang-tools-extra/clangd/CodeComplete.h
@@ -82,16 +82,6 @@ struct CodeCompleteOptions {
   /// Expose origins of completion items in the label (for debugging).
   bool ShowOrigins = false;
 
-  /// If set to true, this will send an asynchronous speculative index request,
-  /// based on the index request for the last code completion on the same file
-  /// and the filter text typed before the cursor, before sema code completion
-  /// is invoked. This can reduce the code completion latency (by roughly
-  /// latency of sema code completion) if the speculative request is the same 
as
-  /// the one generated for the ongoing code completion from sema. As a 
sequence
-  /// of code completions often have the same scopes and proximity paths etc,
-  /// this should be effective for a number of code completions.
-  bool SpeculativeIndexRequest = false;
-
   // Populated internally by clangd, do not set.
   /// If `Index` is set, it is used to augment the code completion
   /// results.

diff  --git a/clang-tools-extra/clangd/tool/ClangdMain.cpp 
b/clang-tools-extra/clangd/tool/ClangdMain.cpp
index 9c75cafdb08e..d3859103b0f0 100644
--- a/clang-tools-extra/clangd/tool/ClangdMain.cpp
+++ b/clang-tools-extra/clangd/tool/ClangdMain.cpp
@@ -828,7 +828,6 @@ clangd accepts flags on the commandline, and in the 
CLANGD_FLAGS environment var
 Opts.CodeComplete.IncludeIndicator.Insert.clear();
 Opts.CodeComplete.IncludeIndicator.NoInsert.clear();
   }
-  Opts.CodeComplete.SpeculativeIndexRequest = Opts.StaticIndex;
   Opts.CodeComplete.EnableFunctionArgSnippets = EnableFunctionArgSnippets;
   Opts.CodeComplete.AllScopes = AllScopesCompletion;
   Opts.CodeComplete.RunParser = CodeCompletionParse;

diff  --git a/clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp 
b/clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
index 43a557d6c73e..9842bcb315e5 100644
--- a/clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
+++ b/clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
@@ -2339,7 +2339,6 @@ TEST(CompletionTest, EnableSpeculativeIndexRequest) {
 
   IndexRequestCollector Requests;
   Opts.Index = &Requests;
-  Opts.SpeculativeIndexRequest = true;
 
   auto CompleteAtPoint = [&](StringRef P) {
 cantFail(runCodeComplete(Server, File, Test.point(P), Opts));



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[llvm-branch-commits] [llvm] 7c9c2a2 - Revert "[RISCV] Legalize select when Zbt extension available"

[Sam Elliott via llvm-branch-commits]

Author: Sam Elliott
Date: 2021-01-14T16:44:34Z
New Revision: 7c9c2a2ea5e3760d7310309c96c9a4ce41fa4d9b

URL: 
https://github.com/llvm/llvm-project/commit/7c9c2a2ea5e3760d7310309c96c9a4ce41fa4d9b
DIFF: 
https://github.com/llvm/llvm-project/commit/7c9c2a2ea5e3760d7310309c96c9a4ce41fa4d9b.diff

LOG: Revert "[RISCV] Legalize select when Zbt extension available"

We found issues with this patch in additional testing. Backing out while
we work on a fix.

This reverts commit 71ed4b6ce57d8843ef705af8f98305976a8f107a.

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
llvm/test/CodeGen/RISCV/rv32Zbb.ll
llvm/test/CodeGen/RISCV/rv32Zbbp.ll
llvm/test/CodeGen/RISCV/rv32Zbs.ll
llvm/test/CodeGen/RISCV/rv32Zbt.ll
llvm/test/CodeGen/RISCV/rv64Zbt.ll

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp 
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index e84c2e9e368e..6055dd826e0d 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -163,6 +163,7 @@ RISCVTargetLowering::RISCVTargetLowering(const 
TargetMachine &TM,
 
   setOperationAction(ISD::BR_JT, MVT::Other, Expand);
   setOperationAction(ISD::BR_CC, XLenVT, Expand);
+  setOperationAction(ISD::SELECT, XLenVT, Custom);
   setOperationAction(ISD::SELECT_CC, XLenVT, Expand);
 
   setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
@@ -249,14 +250,11 @@ RISCVTargetLowering::RISCVTargetLowering(const 
TargetMachine &TM,
   if (Subtarget.hasStdExtZbt()) {
 setOperationAction(ISD::FSHL, XLenVT, Legal);
 setOperationAction(ISD::FSHR, XLenVT, Legal);
-setOperationAction(ISD::SELECT, XLenVT, Legal);
 
 if (Subtarget.is64Bit()) {
   setOperationAction(ISD::FSHL, MVT::i32, Custom);
   setOperationAction(ISD::FSHR, MVT::i32, Custom);
 }
-  } else {
-setOperationAction(ISD::SELECT, XLenVT, Custom);
   }
 
   ISD::CondCode FPCCToExpand[] = {

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td 
b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
index 47740308518f..ce6cb6ba82ce 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
@@ -797,23 +797,7 @@ def : Pat<(rotl (riscv_grevi GPR:$rs1, (i32 24)), (i32 
16)), (GREVI GPR:$rs1, 8)
 let Predicates = [HasStdExtZbt] in {
 def : Pat<(or (and (not GPR:$rs2), GPR:$rs3), (and GPR:$rs2, GPR:$rs1)),
   (CMIX GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
-def : Pat<(select (XLenVT (setne GPR:$rs2, 0)), GPR:$rs1, GPR:$rs3),
-  (CMOV GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
-def : Pat<(select (XLenVT (seteq GPR:$rs2, 0)), GPR:$rs3, GPR:$rs1),
-  (CMOV GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
-def : Pat<(select (XLenVT (seteq GPR:$x, GPR:$y)), GPR:$rs1, GPR:$rs3),
-  (CMOV GPR:$rs1, (XOR GPR:$x, GPR:$y), GPR:$rs3)>;
-def : Pat<(select (XLenVT (setne GPR:$x, GPR:$y)), GPR:$rs3, GPR:$rs1),
-  (CMOV GPR:$rs1, (XOR GPR:$x, GPR:$y), GPR:$rs3)>;
-def : Pat<(select (XLenVT (setuge GPR:$x, GPR:$y)), GPR:$rs1, GPR:$rs3),
-  (CMOV GPR:$rs1, (SLTU GPR:$x, GPR:$y), GPR:$rs3)>;
-def : Pat<(select (XLenVT (setule GPR:$y, GPR:$x)), GPR:$rs1, GPR:$rs3),
-  (CMOV GPR:$rs1, (SLTU GPR:$x, GPR:$y), GPR:$rs3)>;
-def : Pat<(select (XLenVT (setge GPR:$x, GPR:$y)), GPR:$rs1, GPR:$rs3),
-  (CMOV GPR:$rs1, (SLT GPR:$x, GPR:$y), GPR:$rs3)>;
-def : Pat<(select (XLenVT (setle GPR:$y, GPR:$x)), GPR:$rs1, GPR:$rs3),
-  (CMOV GPR:$rs1, (SLT GPR:$x, GPR:$y), GPR:$rs3)>;
-def : Pat<(select GPR:$rs2, GPR:$rs3, GPR:$rs1),
+def : Pat<(riscv_selectcc GPR:$rs2, (XLenVT 0), (XLenVT 17), GPR:$rs3, 
GPR:$rs1),
   (CMOV GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
 } // Predicates = [HasStdExtZbt]
 

diff  --git a/llvm/test/CodeGen/RISCV/rv32Zbb.ll 
b/llvm/test/CodeGen/RISCV/rv32Zbb.ll
index 90ea5629aae6..b95fcd5f5232 100644
--- a/llvm/test/CodeGen/RISCV/rv32Zbb.ll
+++ b/llvm/test/CodeGen/RISCV/rv32Zbb.ll
@@ -60,7 +60,14 @@ define i64 @slo_i64(i64 %a, i64 %b) nounwind {
 ;
 ; RV32IB-LABEL: slo_i64:
 ; RV32IB:   # %bb.0:
+; RV32IB-NEXT:addi a3, a2, -32
 ; RV32IB-NEXT:not a0, a0
+; RV32IB-NEXT:bltz a3, .LBB1_2
+; RV32IB-NEXT:  # %bb.1:
+; RV32IB-NEXT:mv a2, zero
+; RV32IB-NEXT:sll a1, a0, a3
+; RV32IB-NEXT:j .LBB1_3
+; RV32IB-NEXT:  .LBB1_2:
 ; RV32IB-NEXT:not a1, a1
 ; RV32IB-NEXT:sll a1, a1, a2
 ; RV32IB-NEXT:addi a3, zero, 31
@@ -68,15 +75,10 @@ define i64 @slo_i64(i64 %a, i64 %b) nounwind {
 ; RV32IB-NEXT:srli a4, a0, 1
 ; RV32IB-NEXT:srl a3, a4, a3
 ; RV32IB-NEXT:or a1, a1, a3
-; RV32IB-NEXT:addi a3, a2, -32
-; RV32IB-NEXT:sll a4, a0, a3
-; RV32IB-NEXT:slti a5, a3, 0
-; RV32IB-NEXT:cmov a1, a5, a4, a1
-; RV32IB-NEXT:sll a0, a0, a2
-; RV32IB-NEXT:srai a2, a3, 31
-; RV32IB-NEXT:and a0, a2, a0
+; RV32IB-NEXT:sll a2, a0, a2
+; RV32IB-NEXT:  .LBB1_3:
 ; R

[llvm-branch-commits] [flang] 0afdbb4 - [flang][driver] Use __FLANG_VERISION__ in f18.cpp (nfc)

[Andrzej Warzynski via llvm-branch-commits]

Author: Andrzej Warzynski
Date: 2021-01-14T16:51:49Z
New Revision: 0afdbb4d2dead42df14361ca9f5613d56667481c

URL: 
https://github.com/llvm/llvm-project/commit/0afdbb4d2dead42df14361ca9f5613d56667481c
DIFF: 
https://github.com/llvm/llvm-project/commit/0afdbb4d2dead42df14361ca9f5613d56667481c.diff

LOG: [flang][driver] Use __FLANG_VERISION__ in f18.cpp (nfc)

Just a minor improvement suggested in a post-commit review here:
https://reviews.llvm.org/D94422

Added: 


Modified: 
flang/tools/f18/f18.cpp

Removed: 




diff  --git a/flang/tools/f18/f18.cpp b/flang/tools/f18/f18.cpp
index bdf48d071142..9a10aeda7b24 100644
--- a/flang/tools/f18/f18.cpp
+++ b/flang/tools/f18/f18.cpp
@@ -389,8 +389,7 @@ void Link(std::vector &liblist, 
std::vector &objects,
 
 int printVersion() {
   llvm::errs() << "\nf18 compiler (under development), version "
-   << FLANG_VERSION_MAJOR << "." << FLANG_VERSION_MINOR << "."
-   << FLANG_VERSION_PATCHLEVEL << "\n";
+   << FLANG_VERSION_STRING << "\n";
   return exitStatus;
 }
 



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[llvm-branch-commits] [llvm] e21bf87 - [NFC] Disallow unused prefixes under MC/ARM

[Mircea Trofin via llvm-branch-commits]

Author: Mircea Trofin
Date: 2021-01-14T08:56:45-08:00
New Revision: e21bf875c0f709a721d98450203781a605483a1d

URL: 
https://github.com/llvm/llvm-project/commit/e21bf875c0f709a721d98450203781a605483a1d
DIFF: 
https://github.com/llvm/llvm-project/commit/e21bf875c0f709a721d98450203781a605483a1d.diff

LOG: [NFC] Disallow unused prefixes under MC/ARM

Differential Revision: https://reviews.llvm.org/D94620

Added: 


Modified: 
llvm/test/MC/ARM/ldr-pseudo-cond-darwin.s
llvm/test/MC/ARM/ldr-pseudo-cond.s
llvm/test/MC/ARM/lit.local.cfg
llvm/test/MC/ARM/lsl-zero-errors.s
llvm/test/MC/ARM/lsl-zero.s
llvm/test/MC/ARM/mve-fp-registers.s
llvm/test/MC/ARM/thumbv8m.s

Removed: 




diff  --git a/llvm/test/MC/ARM/ldr-pseudo-cond-darwin.s 
b/llvm/test/MC/ARM/ldr-pseudo-cond-darwin.s
index 915b883bc755..34dda3235276 100644
--- a/llvm/test/MC/ARM/ldr-pseudo-cond-darwin.s
+++ b/llvm/test/MC/ARM/ldr-pseudo-cond-darwin.s
@@ -1,5 +1,5 @@
-@RUN: llvm-mc -triple armv7-base-apple-darwin %s | FileCheck 
--check-prefix=CHECK-ARM --check-prefix=CHECK %s
-@RUN: llvm-mc -triple thumbv7-base-apple-darwin %s | FileCheck 
--check-prefix=CHECK-THUMB2 --check-prefix=CHECK %s
+@RUN: llvm-mc -triple armv7-base-apple-darwin %s | FileCheck 
--check-prefix=CHECK %s
+@RUN: llvm-mc -triple thumbv7-base-apple-darwin %s | FileCheck 
--check-prefix=CHECK %s
 
 @
 @ Check that ldr to constant pool correctly transfers the condition codes

diff  --git a/llvm/test/MC/ARM/ldr-pseudo-cond.s 
b/llvm/test/MC/ARM/ldr-pseudo-cond.s
index fa78311965c5..2785247f2256 100644
--- a/llvm/test/MC/ARM/ldr-pseudo-cond.s
+++ b/llvm/test/MC/ARM/ldr-pseudo-cond.s
@@ -1,5 +1,5 @@
-@RUN: llvm-mc -triple armv7-unknown-linux-gnueabi %s | FileCheck 
--check-prefix=CHECK-ARM --check-prefix=CHECK %s
-@RUN: llvm-mc -triple thumbv7-unknown-linux-gnueabi %s | FileCheck 
--check-prefix=CHECK-THUMB2 --check-prefix=CHECK %s
+@RUN: llvm-mc -triple armv7-unknown-linux-gnueabi %s | FileCheck 
--check-prefix=CHECK %s
+@RUN: llvm-mc -triple thumbv7-unknown-linux-gnueabi %s | FileCheck 
--check-prefix=CHECK %s
 
 @
 @ Check that ldr to constant pool correctly transfers the condition codes

diff  --git a/llvm/test/MC/ARM/lit.local.cfg b/llvm/test/MC/ARM/lit.local.cfg
index 236e1d344166..b305cf706e77 100644
--- a/llvm/test/MC/ARM/lit.local.cfg
+++ b/llvm/test/MC/ARM/lit.local.cfg
@@ -1,2 +1,10 @@
+from lit.llvm.subst import ToolSubst
+
 if not 'ARM' in config.root.targets:
 config.unsupported = True
+
+fc = ToolSubst('FileCheck', unresolved='fatal')
+# Insert this first. Then, we'll first update the blank FileCheck command; 
then,
+# the default substitution of FileCheck will replace it to its full path.
+config.substitutions.insert(0, (fc.regex,
+'FileCheck --allow-unused-prefixes=false'))

diff  --git a/llvm/test/MC/ARM/lsl-zero-errors.s 
b/llvm/test/MC/ARM/lsl-zero-errors.s
index 937b50f62da0..ad39470a4a50 100644
--- a/llvm/test/MC/ARM/lsl-zero-errors.s
+++ b/llvm/test/MC/ARM/lsl-zero-errors.s
@@ -1,6 +1,6 @@
-// RUN: not llvm-mc -triple=thumbv7 -show-encoding < %s 2>&1 | FileCheck 
--check-prefix=CHECK --check-prefix=CHECK-NONARM --check-prefix=CHECK-THUMBV7 %s
-// RUN: not llvm-mc -triple=thumbv8 -show-encoding < %s 2>&1 | FileCheck 
--check-prefix=CHECK --check-prefix=CHECK-NONARM --check-prefix=CHECK-THUMBV8 %s
-// RUN: llvm-mc -triple=armv7 -show-encoding < %s 2>&1 | FileCheck 
--check-prefix=CHECK --check-prefix=CHECK-ARM %s
+// RUN: not llvm-mc -triple=thumbv7 -show-encoding < %s 2>&1 | FileCheck 
--check-prefixes=CHECK-NONARM,CHECK-THUMBV7 %s
+// RUN: not llvm-mc -triple=thumbv8 -show-encoding < %s 2>&1 | FileCheck 
--check-prefixes=CHECK-NONARM,CHECK-THUMBV8 %s
+// RUN: llvm-mc -triple=armv7 -show-encoding < %s 2>&1 | FileCheck 
--check-prefix=CHECK-ARM %s
 
 // lsl #0 is actually mov, so here we check that it behaves the same as
 // mov with regards to the permitted registers

diff  --git a/llvm/test/MC/ARM/lsl-zero.s b/llvm/test/MC/ARM/lsl-zero.s
index 6e64e0012362..81a599d68417 100644
--- a/llvm/test/MC/ARM/lsl-zero.s
+++ b/llvm/test/MC/ARM/lsl-zero.s
@@ -1,6 +1,6 @@
-// RUN: llvm-mc -triple=thumbv7 -show-encoding < %s 2>/dev/null | FileCheck 
--check-prefix=CHECK --check-prefix=CHECK-NONARM --check-prefix=CHECK-THUMBV7 %s
-// RUN: llvm-mc -triple=thumbv8 -show-encoding < %s 2>/dev/null | FileCheck 
--check-prefix=CHECK --check-prefix=CHECK-NONARM --check-prefix=CHECK-THUMBV8 %s
-// RUN: llvm-mc -triple=armv7 -show-encoding < %s 2>/dev/null | FileCheck 
--check-prefix=CHECK --check-prefix=CHECK-ARM %s
+// RUN: llvm-mc -triple=thumbv7 -show-encoding < %s 2>/dev/null | FileCheck 
--check-prefix=CHECK-NONARM %s
+// RUN: llvm-mc -triple=thumbv8 -show-encoding < %s 2>/dev/null | FileCheck 
--check-prefix=CHECK-NONARM %s
+// RUN: llvm-mc -triple=armv7 -show-encoding < %s 2>/dev/null | FileCheck 
--check-prefix=CHECK-ARM %s
 
 // lsl #0 is

[llvm-branch-commits] [clang-tools-extra] 2f395b7 - [clangd] Make AST-based signals available to runWithPreamble.

[Utkarsh Saxena via llvm-branch-commits]

Author: Utkarsh Saxena
Date: 2021-01-14T18:34:50+01:00
New Revision: 2f395b7092bdac0e39bb4e2bb5e6b03e521a45dd

URL: 
https://github.com/llvm/llvm-project/commit/2f395b7092bdac0e39bb4e2bb5e6b03e521a45dd
DIFF: 
https://github.com/llvm/llvm-project/commit/2f395b7092bdac0e39bb4e2bb5e6b03e521a45dd.diff

LOG: [clangd] Make AST-based signals available to runWithPreamble.

Many useful signals can be derived from a valid AST which is regularly updated 
by
the ASTWorker. `runWithPreamble` does not have access to the ParsedAST
but it can be provided access to some signals derived from a (possibly
stale) AST.

Differential Revision: https://reviews.llvm.org/D94424

Added: 
clang-tools-extra/clangd/ASTSignals.cpp
clang-tools-extra/clangd/ASTSignals.h
clang-tools-extra/clangd/unittests/ASTSignalsTests.cpp

Modified: 
clang-tools-extra/clangd/CMakeLists.txt
clang-tools-extra/clangd/TUScheduler.cpp
clang-tools-extra/clangd/TUScheduler.h
clang-tools-extra/clangd/unittests/CMakeLists.txt
clang-tools-extra/clangd/unittests/TUSchedulerTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/ASTSignals.cpp 
b/clang-tools-extra/clangd/ASTSignals.cpp
new file mode 100644
index ..da849287bbf6
--- /dev/null
+++ b/clang-tools-extra/clangd/ASTSignals.cpp
@@ -0,0 +1,42 @@
+//===--- ASTSignals.cpp - LSP server -*- 
C++-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "ASTSignals.h"
+#include "AST.h"
+#include "FindTarget.h"
+
+namespace clang {
+namespace clangd {
+ASTSignals ASTSignals::derive(const ParsedAST &AST) {
+  ASTSignals Signals;
+  const SourceManager &SM = AST.getSourceManager();
+  findExplicitReferences(AST.getASTContext(), [&](ReferenceLoc Ref) {
+for (const NamedDecl *ND : Ref.Targets) {
+  if (!isInsideMainFile(Ref.NameLoc, SM))
+continue;
+  SymbolID ID = getSymbolID(ND);
+  if (!ID)
+continue;
+  unsigned &SymbolCount = Signals.ReferencedSymbols[ID];
+  SymbolCount++;
+  // Process namespace only when we see the symbol for the first time.
+  if (SymbolCount != 1)
+continue;
+  if (const auto *NSD = dyn_cast(ND->getDeclContext())) {
+if (NSD->isAnonymousNamespace())
+  continue;
+std::string NS = printNamespaceScope(*NSD);
+if (!NS.empty())
+  Signals.RelatedNamespaces[NS]++;
+  }
+}
+  });
+  return Signals;
+}
+} // namespace clangd
+} // namespace clang

diff  --git a/clang-tools-extra/clangd/ASTSignals.h 
b/clang-tools-extra/clangd/ASTSignals.h
new file mode 100644
index ..bc70cd17310a
--- /dev/null
+++ b/clang-tools-extra/clangd/ASTSignals.h
@@ -0,0 +1,39 @@
+//===--- ASTSignals.h - LSP server ---*- 
C++-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_TOOLS_EXTRA_CLANGD_ASTSIGNALS_H
+#define LLVM_CLANG_TOOLS_EXTRA_CLANGD_ASTSIGNALS_H
+
+#include "ParsedAST.h"
+#include "index/SymbolID.h"
+#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/StringMap.h"
+
+namespace clang {
+namespace clangd {
+
+/// Signals derived from a valid AST of a file.
+/// Provides information that can only be extracted from the AST to actions 
that
+/// can't access an AST. The signals are computed and updated asynchronously by
+/// the ASTWorker and thus they are always stale and also can be absent.
+/// Example usage: Information about the declarations used in a file affects
+/// code-completion ranking in that file.
+struct ASTSignals {
+  /// Number of occurrences of each symbol present in the file.
+  llvm::DenseMap ReferencedSymbols;
+  /// Namespaces whose symbols are used in the file, and the number of such
+  /// distinct symbols.
+  llvm::StringMap RelatedNamespaces;
+
+  static ASTSignals derive(const ParsedAST &AST);
+};
+
+} // namespace clangd
+} // namespace clang
+
+#endif // LLVM_CLANG_TOOLS_EXTRA_CLANGD_ASTSIGNALS_H

diff  --git a/clang-tools-extra/clangd/CMakeLists.txt 
b/clang-tools-extra/clangd/CMakeLists.txt
index 9e62e0948027..1d12e7e2355d 100644
--- a/clang-tools-extra/clangd/CMakeLists.txt
+++ b/clang-tools-extra/clangd/CMakeLists.txt
@@ -46,6 +46,7 @@ include_directories(BEFORE 
"${CMAKE_CURRENT_BINARY_DIR}/../clang-tidy")
 
 add_clang_library(clangDaemon
   AST.cpp
+  ASTSignals.cpp
   ClangdLSPServer.cpp
   ClangdServer.cpp
   CodeComplete.cpp

diff  --git a/clang-tools-

[llvm-branch-commits] [clang-tools-extra] 8b09cf7 - [clangd] Trivial: Documentation fix in ASTSignals.

[Utkarsh Saxena via llvm-branch-commits]

Author: Utkarsh Saxena
Date: 2021-01-14T18:38:42+01:00
New Revision: 8b09cf7956d8abc722fa736874e4cea667a9d3cb

URL: 
https://github.com/llvm/llvm-project/commit/8b09cf7956d8abc722fa736874e4cea667a9d3cb
DIFF: 
https://github.com/llvm/llvm-project/commit/8b09cf7956d8abc722fa736874e4cea667a9d3cb.diff

LOG: [clangd] Trivial: Documentation fix in ASTSignals.

Added: 


Modified: 
clang-tools-extra/clangd/ASTSignals.cpp
clang-tools-extra/clangd/ASTSignals.h

Removed: 




diff  --git a/clang-tools-extra/clangd/ASTSignals.cpp 
b/clang-tools-extra/clangd/ASTSignals.cpp
index da849287bbf6..b8cc7f05927a 100644
--- a/clang-tools-extra/clangd/ASTSignals.cpp
+++ b/clang-tools-extra/clangd/ASTSignals.cpp
@@ -1,4 +1,4 @@
-//===--- ASTSignals.cpp - LSP server -*- 
C++-*-===//
+//===--- ASTSignals.cpp --*- 
C++-*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.

diff  --git a/clang-tools-extra/clangd/ASTSignals.h 
b/clang-tools-extra/clangd/ASTSignals.h
index bc70cd17310a..fd31be38ce8b 100644
--- a/clang-tools-extra/clangd/ASTSignals.h
+++ b/clang-tools-extra/clangd/ASTSignals.h
@@ -1,4 +1,4 @@
-//===--- ASTSignals.h - LSP server ---*- 
C++-*-===//
+//===--- ASTSignals.h *- 
C++-*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.



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[llvm-branch-commits] [llvm] b4e083b - [gn build] Port 2f395b7092bd

[LLVM GN Syncbot via llvm-branch-commits]

Author: LLVM GN Syncbot
Date: 2021-01-14T17:39:58Z
New Revision: b4e083b0ef7ca86851b5b1d043004ae632a63f8d

URL: 
https://github.com/llvm/llvm-project/commit/b4e083b0ef7ca86851b5b1d043004ae632a63f8d
DIFF: 
https://github.com/llvm/llvm-project/commit/b4e083b0ef7ca86851b5b1d043004ae632a63f8d.diff

LOG: [gn build] Port 2f395b7092bd

Added: 


Modified: 
llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn

Removed: 




diff  --git a/llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn 
b/llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
index c07a61fe61e4..88a519580618 100644
--- a/llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
+++ b/llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
@@ -67,6 +67,7 @@ static_library("clangd") {
   ]
   sources = [
 "AST.cpp",
+"ASTSignals.cpp",
 "ClangdLSPServer.cpp",
 "ClangdServer.cpp",
 "CodeComplete.cpp",

diff  --git 
a/llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn 
b/llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
index 34ba224fa7e0..26cc183b132e 100644
--- a/llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
+++ b/llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
@@ -42,6 +42,7 @@ unittest("ClangdTests") {
 target_gen_dir,
   ]
   sources = [
+"ASTSignalsTests.cpp",
 "ASTTests.cpp",
 "Annotations.cpp",
 "BackgroundIndexTests.cpp",



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[llvm-branch-commits] [flang] 4864d9f - [flang] Fix some module file issues exposed by Whizard

[peter klausler via llvm-branch-commits]

Author: peter klausler
Date: 2021-01-14T09:44:50-08:00
New Revision: 4864d9f7e91fdd58a84e4ae576f1ad16f71f9d91

URL: 
https://github.com/llvm/llvm-project/commit/4864d9f7e91fdd58a84e4ae576f1ad16f71f9d91
DIFF: 
https://github.com/llvm/llvm-project/commit/4864d9f7e91fdd58a84e4ae576f1ad16f71f9d91.diff

LOG: [flang] Fix some module file issues exposed by Whizard

Generic type-bound interfaces for user-defined operators need to be formatted
as "OPERATOR(.op.)", not just ".op."

PRIVATE generics need to be marked as such.

Declaration ordering: when a generic interface shadows a
derived type of the same name, it needs to be emitted to the
module file at the point of definition of the derived type;
otherwise, the derived type's definition may appear after its
first use.

The module symbol for a module read from a module file needs
to be marked as coming from a module file before semantic
processing is performed on the contents of the module so that
any special handling for declarations in module files can be
properly activated.

IMPORT statements were sometimes missing for use-associated
symbols in surrounding scopes; fine-tune NeedImport().

Differential Revision: https://reviews.llvm.org/D94636

Added: 
flang/test/Semantics/modfile37.f90
flang/test/Semantics/modfile38.f90

Modified: 
flang/lib/Semantics/mod-file.cpp
flang/test/Semantics/modfile35.f90

Removed: 




diff  --git a/flang/lib/Semantics/mod-file.cpp 
b/flang/lib/Semantics/mod-file.cpp
index 23733f944d8c..af3267a1c9a0 100644
--- a/flang/lib/Semantics/mod-file.cpp
+++ b/flang/lib/Semantics/mod-file.cpp
@@ -198,6 +198,15 @@ bool ModFileWriter::PutSymbols(const Scope &scope) {
   }
 }
 
+static llvm::raw_ostream &PutGenericName(
+llvm::raw_ostream &os, const Symbol &symbol) {
+  if (IsGenericDefinedOp(symbol)) {
+return os << "operator(" << symbol.name() << ')';
+  } else {
+return os << symbol.name();
+  }
+}
+
 // Emit a symbol to decls_, except for bindings in a derived type (type-bound
 // procedures, type-bound generics, final procedures) which go to typeBindings.
 void ModFileWriter::PutSymbol(
@@ -210,8 +219,8 @@ void ModFileWriter::PutSymbol(
if (symbol.owner().IsDerivedType()) {
  // generic binding
  for (const Symbol &proc : x.specificProcs()) {
-   typeBindings << "generic::" << symbol.name() << "=>"
-<< proc.name() << '\n';
+   PutGenericName(typeBindings << "generic::", symbol)
+   << "=>" << proc.name() << '\n';
  }
} else {
  PutGeneric(symbol);
@@ -392,15 +401,6 @@ static bool IsIntrinsicOp(const Symbol &symbol) {
   }
 }
 
-static llvm::raw_ostream &PutGenericName(
-llvm::raw_ostream &os, const Symbol &symbol) {
-  if (IsGenericDefinedOp(symbol)) {
-return os << "operator(" << symbol.name() << ')';
-  } else {
-return os << symbol.name();
-  }
-}
-
 void ModFileWriter::PutGeneric(const Symbol &symbol) {
   const auto &genericOwner{symbol.owner()};
   auto &details{symbol.get()};
@@ -427,9 +427,11 @@ void ModFileWriter::PutUse(const Symbol &symbol) {
 PutGenericName(uses_ << "=>", use);
   }
   uses_ << '\n';
-  PutUseExtraAttr(Attr::PRIVATE, symbol, use);
   PutUseExtraAttr(Attr::VOLATILE, symbol, use);
   PutUseExtraAttr(Attr::ASYNCHRONOUS, symbol, use);
+  if (symbol.attrs().test(Attr::PRIVATE)) {
+PutGenericName(useExtraAttrs_ << "private::", symbol) << '\n';
+  }
 }
 
 // We have "USE local => use" in this module. If attr was added locally
@@ -442,6 +444,31 @@ void ModFileWriter::PutUseExtraAttr(
   }
 }
 
+// When a generic interface has the same name as a derived type
+// in the same scope, the generic shadows the derived type.
+// If the derived type were declared first, emit the generic
+// interface at the position of derived type's declaration.
+// (ReplaceName() is not used for this purpose because doing so
+// would confusingly position error messages pertaining to the generic
+// interface upon the derived type's declaration.)
+static inline SourceName NameInModuleFile(const Symbol &symbol) {
+  if (const auto *generic{symbol.detailsIf()}) {
+if (const auto *derivedTypeOverload{generic->derivedType()}) {
+  if (derivedTypeOverload->name().begin() < symbol.name().begin()) {
+return derivedTypeOverload->name();
+  }
+}
+  } else if (const auto *use{symbol.detailsIf()}) {
+if (use->symbol().attrs().test(Attr::PRIVATE)) {
+  // Avoid the use in sorting of names created to access private
+  // specific procedures as a result of generic resolution;
+  // they're not in the cooked source.
+  return use->symbol().name();
+}
+  }
+  return symbol.name();
+}
+
 // Collect the symbols of this scope sorted by their original order, not name.
 

[llvm-branch-commits] [llvm] 35c8a6c - [NFC] Disallow unused prefixes under MC/AArch64

[Mircea Trofin via llvm-branch-commits]

Author: Mircea Trofin
Date: 2021-01-14T09:46:13-08:00
New Revision: 35c8a6cbf5ff0b525e2c01e5d746067bdda1dde7

URL: 
https://github.com/llvm/llvm-project/commit/35c8a6cbf5ff0b525e2c01e5d746067bdda1dde7
DIFF: 
https://github.com/llvm/llvm-project/commit/35c8a6cbf5ff0b525e2c01e5d746067bdda1dde7.diff

LOG: [NFC] Disallow unused prefixes under MC/AArch64

Differential Revision: https://reviews.llvm.org/D94616

Added: 


Modified: 
llvm/test/MC/AArch64/armv8.7a-ls64.s
llvm/test/MC/AArch64/armv8.7a-xs.s
llvm/test/MC/AArch64/lit.local.cfg

Removed: 




diff  --git a/llvm/test/MC/AArch64/armv8.7a-ls64.s 
b/llvm/test/MC/AArch64/armv8.7a-ls64.s
index c647ecce53f0..d4684e38cbea 100644
--- a/llvm/test/MC/AArch64/armv8.7a-ls64.s
+++ b/llvm/test/MC/AArch64/armv8.7a-ls64.s
@@ -1,7 +1,7 @@
 // RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+ls64 
< %s 2>%t | FileCheck %s
-// RUN: FileCheck --check-prefix=CHECK-ERR --check-prefix=CHECK-LS64-ERR %s < 
%t
+// RUN: FileCheck --check-prefix=CHECK-ERR %s < %t
 // RUN: not llvm-mc -triple aarch64-none-linux-gnu < %s 2> %t
-// RUN: FileCheck --check-prefix=CHECK-ERR --check-prefix=CHECK-NO-LS64-ERR %s 
< %t
+// RUN: FileCheck --check-prefixes=CHECK-ERR,CHECK-NO-LS64-ERR %s < %t
 
   ld64b x0, [x13]
   st64b x14, [x13]

diff  --git a/llvm/test/MC/AArch64/armv8.7a-xs.s 
b/llvm/test/MC/AArch64/armv8.7a-xs.s
index 6193c1f15f53..e3a1e12aae9a 100644
--- a/llvm/test/MC/AArch64/armv8.7a-xs.s
+++ b/llvm/test/MC/AArch64/armv8.7a-xs.s
@@ -1,9 +1,9 @@
 // RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding 
-mattr=+v8.4a,+xs < %s 2>%t | FileCheck %s
-// RUN: FileCheck --check-prefix=CHECK-ERR --check-prefix=CHECK-XS-ERR %s < %t
+// RUN: FileCheck --check-prefix=CHECK-ERR %s < %t
 // RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding 
-mattr=+v8.7a < %s 2>%t | FileCheck %s
-// RUN: FileCheck --check-prefix=CHECK-ERR --check-prefix=CHECK-XS-ERR %s < %t
+// RUN: FileCheck --check-prefix=CHECK-ERR %s < %t
 // RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.4a < %s 2> %t
-// RUN: FileCheck --check-prefix=CHECK-ERR --check-prefix=CHECK-NO-XS-ERR %s < 
%t
+// RUN: FileCheck --check-prefixes=CHECK-ERR,CHECK-NO-XS-ERR %s < %t
 
   dsb #16
   dsb #20

diff  --git a/llvm/test/MC/AArch64/lit.local.cfg 
b/llvm/test/MC/AArch64/lit.local.cfg
index 5822b7226687..ab829130e269 100644
--- a/llvm/test/MC/AArch64/lit.local.cfg
+++ b/llvm/test/MC/AArch64/lit.local.cfg
@@ -1,2 +1,10 @@
+from lit.llvm.subst import ToolSubst
+
 if 'AArch64' not in config.root.targets:
 config.unsupported = True
+
+fc = ToolSubst('FileCheck', unresolved='fatal')
+# Insert this first. Then, we'll first update the blank FileCheck command; 
then,
+# the default substitution of FileCheck will replace it to its full path.
+config.substitutions.insert(0, (fc.regex,
+'FileCheck --allow-unused-prefixes=false'))



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[llvm-branch-commits] [llvm] a03ffa9 - [NewPM] Fix placement of LoopFlatten

[Arthur Eubanks via llvm-branch-commits]

Author: Arthur Eubanks
Date: 2021-01-14T09:49:31-08:00
New Revision: a03ffa98503bb6d5a990e61df060ed480c3e3f3b

URL: 
https://github.com/llvm/llvm-project/commit/a03ffa98503bb6d5a990e61df060ed480c3e3f3b
DIFF: 
https://github.com/llvm/llvm-project/commit/a03ffa98503bb6d5a990e61df060ed480c3e3f3b.diff

LOG: [NewPM] Fix placement of LoopFlatten

https://reviews.llvm.org/D90402 was inconsistent with where it put
LoopFlatten between the two pass managers. It also missed adding it to
the non-O1 function simplification pipeline.

PR48738

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D94650

Added: 


Modified: 
llvm/lib/Passes/PassBuilder.cpp

Removed: 




diff  --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index d5c0c47bd9a6..7f3f132ab82b 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -562,8 +562,6 @@ 
PassBuilder::buildO1FunctionSimplificationPipeline(OptimizationLevel Level,
   LPM1.addPass(LICMPass(PTO.LicmMssaOptCap, PTO.LicmMssaNoAccForPromotionCap));
   LPM1.addPass(SimpleLoopUnswitchPass());
 
-  if (EnableLoopFlatten)
-FPM.addPass(LoopFlattenPass());
   LPM2.addPass(LoopIdiomRecognizePass());
   LPM2.addPass(IndVarSimplifyPass());
 
@@ -594,6 +592,8 @@ 
PassBuilder::buildO1FunctionSimplificationPipeline(OptimizationLevel Level,
   DebugLogging));
   FPM.addPass(SimplifyCFGPass());
   FPM.addPass(InstCombinePass());
+  if (EnableLoopFlatten)
+FPM.addPass(LoopFlattenPass());
   // The loop passes in LPM2 (LoopFullUnrollPass) do not preserve MemorySSA.
   // *All* loop passes must preserve it, in order to be able to use it.
   FPM.addPass(createFunctionToLoopPassAdaptor(
@@ -756,6 +756,8 @@ 
PassBuilder::buildFunctionSimplificationPipeline(OptimizationLevel Level,
   DebugLogging));
   FPM.addPass(SimplifyCFGPass());
   FPM.addPass(InstCombinePass());
+  if (EnableLoopFlatten)
+FPM.addPass(LoopFlattenPass());
   // The loop passes in LPM2 (LoopIdiomRecognizePass, IndVarSimplifyPass,
   // LoopDeletionPass and LoopFullUnrollPass) do not preserve MemorySSA.
   // *All* loop passes must preserve it, in order to be able to use it.



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[llvm-branch-commits] [llvm] b99782c - [X86][AVX] Adjust unsigned saturation downconvert negative test

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-14T17:51:23Z
New Revision: b99782cf7850a481fa36fd95ae04923739e0da6d

URL: 
https://github.com/llvm/llvm-project/commit/b99782cf7850a481fa36fd95ae04923739e0da6d
DIFF: 
https://github.com/llvm/llvm-project/commit/b99782cf7850a481fa36fd95ae04923739e0da6d.diff

LOG: [X86][AVX] Adjust unsigned saturation downconvert negative test

D87145 was showing that this test (added in D45315) could always be constant 
folded (with suitable value tracking).

What we actually needed was smax(smin()) negative test coverage, the invert of 
negative_test2_smax_usat_trunc_wb_256_mem, so I've tweaked the test to provide 
that instead.

Added: 


Modified: 
llvm/test/CodeGen/X86/avx512-trunc.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/avx512-trunc.ll 
b/llvm/test/CodeGen/X86/avx512-trunc.ll
index 0b2a47c2772c..d61ada4e5d05 100644
--- a/llvm/test/CodeGen/X86/avx512-trunc.ll
+++ b/llvm/test/CodeGen/X86/avx512-trunc.ll
@@ -1007,10 +1007,8 @@ define <16 x i16> @smax_usat_trunc_dw_512(<16 x i32> %i) 
{
 define void @negative_test1_smax_usat_trunc_wb_256_mem(<16 x i16> %i, <16 x 
i8>* %res) {
 ; KNL-LABEL: negative_test1_smax_usat_trunc_wb_256_mem:
 ; KNL:   ## %bb.0:
-; KNL-NEXT:vpxor %xmm1, %xmm1, %xmm1
-; KNL-NEXT:vpmaxsw %ymm1, %ymm0, %ymm0
-; KNL-NEXT:vpcmpeqd %ymm1, %ymm1, %ymm1
-; KNL-NEXT:vpminsw %ymm1, %ymm0, %ymm0
+; KNL-NEXT:vpminsw {{.*}}(%rip), %ymm0, %ymm0
+; KNL-NEXT:vpmaxsw {{.*}}(%rip), %ymm0, %ymm0
 ; KNL-NEXT:vpmovzxwd {{.*#+}} zmm0 = 
ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
 ; KNL-NEXT:vpmovdb %zmm0, (%rdi)
 ; KNL-NEXT:vzeroupper
@@ -1018,17 +1016,15 @@ define void 
@negative_test1_smax_usat_trunc_wb_256_mem(<16 x i16> %i, <16 x i8>*
 ;
 ; SKX-LABEL: negative_test1_smax_usat_trunc_wb_256_mem:
 ; SKX:   ## %bb.0:
-; SKX-NEXT:vpxor %xmm1, %xmm1, %xmm1
-; SKX-NEXT:vpmaxsw %ymm1, %ymm0, %ymm0
-; SKX-NEXT:vpcmpeqd %ymm1, %ymm1, %ymm1
-; SKX-NEXT:vpminsw %ymm1, %ymm0, %ymm0
+; SKX-NEXT:vpminsw {{.*}}(%rip), %ymm0, %ymm0
+; SKX-NEXT:vpmaxsw {{.*}}(%rip), %ymm0, %ymm0
 ; SKX-NEXT:vpmovwb %ymm0, (%rdi)
 ; SKX-NEXT:vzeroupper
 ; SKX-NEXT:retq
-  %x1 = icmp sgt <16 x i16> %i, 
-  %x2 = select <16 x i1> %x1, <16 x i16> %i, <16 x i16> 
-  %x3 = icmp slt <16 x i16> %x2, 
-  %x5 = select <16 x i1> %x3, <16 x i16> %x2, <16 x i16> 
+  %x1 = icmp slt <16 x i16> %i, 
+  %x2 = select <16 x i1> %x1, <16 x i16> %i, <16 x i16> 
+  %x3 = icmp sgt <16 x i16> %x2, 
+  %x5 = select <16 x i1> %x3, <16 x i16> %x2, <16 x i16> 
   %x6 = trunc <16 x i16> %x5 to <16 x i8>
   store <16 x i8> %x6, <16 x i8>* %res, align 1
   ret void



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[llvm-branch-commits] [openmp] 5d165f0 - [libomptarget][amdgpu] Fix kernel launch tracing to match previous behavior

[Jon Chesterfield via llvm-branch-commits]

Author: Jon Chesterfield
Date: 2021-01-14T18:13:22Z
New Revision: 5d165f0b893d4fc5fb5caeb2b05c566dd26e4d89

URL: 
https://github.com/llvm/llvm-project/commit/5d165f0b893d4fc5fb5caeb2b05c566dd26e4d89
DIFF: 
https://github.com/llvm/llvm-project/commit/5d165f0b893d4fc5fb5caeb2b05c566dd26e4d89.diff

LOG: [libomptarget][amdgpu] Fix kernel launch tracing to match previous behavior

Restore control of kernel launch tracing to be >= 1 as it was before

export LIBOMPTARGET_KERNEL_TRACE=1

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D94695

Added: 


Modified: 
openmp/libomptarget/plugins/amdgpu/src/rtl.cpp

Removed: 




diff  --git a/openmp/libomptarget/plugins/amdgpu/src/rtl.cpp 
b/openmp/libomptarget/plugins/amdgpu/src/rtl.cpp
index bd450f9898fa..9453171e1378 100644
--- a/openmp/libomptarget/plugins/amdgpu/src/rtl.cpp
+++ b/openmp/libomptarget/plugins/amdgpu/src/rtl.cpp
@@ -1762,7 +1762,7 @@ int32_t __tgt_rtl_run_target_team_region_locked(
 loop_tripcount, // From run_region arg
 KernelInfo->device_id);
 
-  if (print_kernel_trace == 4)
+  if (print_kernel_trace >= 1)
 // enum modes are SPMD, GENERIC, NONE 0,1,2
 fprintf(stderr,
 "DEVID:%2d SGN:%1d ConstWGSize:%-4d args:%2d teamsXthrds:(%4dX%4d) 
"



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[llvm-branch-commits] [llvm] 868da2e - [SelectionDAG] Remove an early-out from computeKnownBits for smin/smax

[Jay Foad via llvm-branch-commits]

Author: Jay Foad
Date: 2021-01-14T18:15:17Z
New Revision: 868da2ea939baf8c71a6dcb878cf6094ede9486e

URL: 
https://github.com/llvm/llvm-project/commit/868da2ea939baf8c71a6dcb878cf6094ede9486e
DIFF: 
https://github.com/llvm/llvm-project/commit/868da2ea939baf8c71a6dcb878cf6094ede9486e.diff

LOG: [SelectionDAG] Remove an early-out from computeKnownBits for smin/smax

Even if we know nothing about LHS, it can still be useful to know that
smax(LHS, RHS) >= RHS and smin(LHS, RHS) <= RHS.

Differential Revision: https://reviews.llvm.org/D87145

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/test/CodeGen/X86/known-bits-vector.ll

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp 
b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 7084ab68524b5..82da553954d2f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3416,7 +3416,6 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, 
const APInt &DemandedElts,
 }
 
 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
-if (Known.isUnknown()) break; // Early-out
 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
 if (IsMax)
   Known = KnownBits::smax(Known, Known2);

diff  --git a/llvm/test/CodeGen/X86/known-bits-vector.ll 
b/llvm/test/CodeGen/X86/known-bits-vector.ll
index 3b6912a9d9461..05bf984101abc 100644
--- a/llvm/test/CodeGen/X86/known-bits-vector.ll
+++ b/llvm/test/CodeGen/X86/known-bits-vector.ll
@@ -435,11 +435,7 @@ define <4 x float> @knownbits_smax_smin_shuffle_uitofp(<4 
x i32> %a0) {
 ; X32-NEXT:vpminsd {{\.LCPI.*}}, %xmm0, %xmm0
 ; X32-NEXT:vpmaxsd {{\.LCPI.*}}, %xmm0, %xmm0
 ; X32-NEXT:vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
-; X32-NEXT:vpblendw {{.*#+}} xmm1 = 
xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
-; X32-NEXT:vpsrld $16, %xmm0, %xmm0
-; X32-NEXT:vpblendw {{.*#+}} xmm0 = 
xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
-; X32-NEXT:vsubps {{\.LCPI.*}}, %xmm0, %xmm0
-; X32-NEXT:vaddps %xmm0, %xmm1, %xmm0
+; X32-NEXT:vcvtdq2ps %xmm0, %xmm0
 ; X32-NEXT:retl
 ;
 ; X64-LABEL: knownbits_smax_smin_shuffle_uitofp:
@@ -447,11 +443,7 @@ define <4 x float> @knownbits_smax_smin_shuffle_uitofp(<4 
x i32> %a0) {
 ; X64-NEXT:vpminsd {{.*}}(%rip), %xmm0, %xmm0
 ; X64-NEXT:vpmaxsd {{.*}}(%rip), %xmm0, %xmm0
 ; X64-NEXT:vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
-; X64-NEXT:vpblendw {{.*#+}} xmm1 = 
xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
-; X64-NEXT:vpsrld $16, %xmm0, %xmm0
-; X64-NEXT:vpblendw {{.*#+}} xmm0 = 
xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
-; X64-NEXT:vsubps {{.*}}(%rip), %xmm0, %xmm0
-; X64-NEXT:vaddps %xmm0, %xmm1, %xmm0
+; X64-NEXT:vcvtdq2ps %xmm0, %xmm0
 ; X64-NEXT:retq
   %1 = call <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32> %a0, <4 x i32> )
   %2 = call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %1, <4 x i32> )



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[llvm-branch-commits] [lldb] 85dfcaa - [LLDB] MinidumpParser: Prefer executable module even at higher address

[Joseph Tremoulet via llvm-branch-commits]

Author: Joseph Tremoulet
Date: 2021-01-14T13:17:57-05:00
New Revision: 85dfcaadc5f0920dc8ecbece6c786701b8f45ab4

URL: 
https://github.com/llvm/llvm-project/commit/85dfcaadc5f0920dc8ecbece6c786701b8f45ab4
DIFF: 
https://github.com/llvm/llvm-project/commit/85dfcaadc5f0920dc8ecbece6c786701b8f45ab4.diff

LOG: [LLDB] MinidumpParser: Prefer executable module even at higher address

When a program maps one of its own modules for reading, and then
crashes, breakpad can emit two entries for that module in the
ModuleList.  We have logic to identify this case by checking permissions
on mapped memory regions and report just the module with an executable
region.  As currently written, though, the check is asymmetric -- the
entry with the executable region must be the second one encountered for
the preference to kick in.

This change makes the logic symmetric, so that the first-encountered
module will similarly be preferred if it has an executable region but
the second-encountered module does not.  This happens for example when
the module in question is the executable itself, which breakpad likes to
report first -- we need to ignore the other entry for that module when
we see it later, even though it may be mapped at a lower virtual
address.

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D94629

Added: 


Modified: 
lldb/source/Plugins/Process/minidump/MinidumpParser.cpp
lldb/unittests/Process/minidump/MinidumpParserTest.cpp

Removed: 




diff  --git a/lldb/source/Plugins/Process/minidump/MinidumpParser.cpp 
b/lldb/source/Plugins/Process/minidump/MinidumpParser.cpp
index e16f86cca1c2..61106ebcc430 100644
--- a/lldb/source/Plugins/Process/minidump/MinidumpParser.cpp
+++ b/lldb/source/Plugins/Process/minidump/MinidumpParser.cpp
@@ -391,19 +391,23 @@ std::vector 
MinidumpParser::GetFilteredModuleList() {
   filtered_modules.push_back(&module);
 } else {
   // We have a duplicate module entry. Check the linux regions to see if
-  // the module we already have is not really a mapped executable. If it
-  // isn't check to see if the current duplicate module entry is a real
-  // mapped executable, and if so, replace it. This can happen when a
-  // process mmap's in the file for an executable in order to read bytes
-  // from the executable file. A memory region mapping will exist for the
-  // mmap'ed version and for the loaded executable, but only one will have
-  // a consecutive region that is executable in the memory regions.
+  // either module is not really a mapped executable. If one but not the
+  // other is a real mapped executable, prefer the executable one. This
+  // can happen when a process mmap's in the file for an executable in
+  // order to read bytes from the executable file. A memory region mapping
+  // will exist for the mmap'ed version and for the loaded executable, but
+  // only one will have a consecutive region that is executable in the
+  // memory regions.
   auto dup_module = filtered_modules[iter->second];
   ConstString name(*ExpectedName);
-  if (!CheckForLinuxExecutable(name, linux_regions,
-   dup_module->BaseOfImage) &&
-  CheckForLinuxExecutable(name, linux_regions, module.BaseOfImage)) {
-filtered_modules[iter->second] = &module;
+  bool is_executable =
+  CheckForLinuxExecutable(name, linux_regions, module.BaseOfImage);
+  bool dup_is_executable =
+  CheckForLinuxExecutable(name, linux_regions, 
dup_module->BaseOfImage);
+
+  if (is_executable != dup_is_executable) {
+if (is_executable)
+  filtered_modules[iter->second] = &module;
 continue;
   }
   // This module has been seen. Modules are sometimes mentioned multiple

diff  --git a/lldb/unittests/Process/minidump/MinidumpParserTest.cpp 
b/lldb/unittests/Process/minidump/MinidumpParserTest.cpp
index 69046af283eb..e3f23c5fe33a 100644
--- a/lldb/unittests/Process/minidump/MinidumpParserTest.cpp
+++ b/lldb/unittests/Process/minidump/MinidumpParserTest.cpp
@@ -792,6 +792,47 @@ TEST_F(MinidumpParserTest, 
MinidumpDuplicateModuleMappedSecond) {
   EXPECT_EQ(0x400du, filtered_modules[0]->BaseOfImage);
 }
 
+TEST_F(MinidumpParserTest, MinidumpDuplicateModuleMappedSecondHigh) {
+  ASSERT_THAT_ERROR(SetUpFromYaml(R"(
+--- !minidump
+Streams:
+  - Type:ModuleList
+Modules:
+  - Base of Image:   0x400d3000
+Size of Image:   0x2000
+Module Name: '/usr/lib/libc.so'
+CodeView Record: ''
+  - Base of Image:   0x400d
+Size of Image:   0x1000
+Module Name: '/usr/lib/libc.so'
+CodeView Record: ''
+  - Type:LinuxMaps
+Text: |
+  400d-400d2000 r--p  b3:04 227/usr/lib/libc.so
+  400d2000-400d3000 rw-p 

[llvm-branch-commits] [clang] be40c12 - [HIP] Add signbit(long double) decl

[Aaron En Ye Shi via llvm-branch-commits]

Author: Aaron En Ye Shi
Date: 2021-01-14T18:23:37Z
New Revision: be40c12040a0d5551bf3430cbb184b5ef23e25fd

URL: 
https://github.com/llvm/llvm-project/commit/be40c12040a0d5551bf3430cbb184b5ef23e25fd
DIFF: 
https://github.com/llvm/llvm-project/commit/be40c12040a0d5551bf3430cbb184b5ef23e25fd.diff

LOG: [HIP] Add signbit(long double) decl

An _MSC_VER version of signbit(long double) is required for MSVC headers.

Fixes: SWDEV-256409

Differential Revision: https://reviews.llvm.org/D93062

Added: 


Modified: 
clang/lib/Headers/__clang_cuda_math_forward_declares.h

Removed: 




diff  --git a/clang/lib/Headers/__clang_cuda_math_forward_declares.h 
b/clang/lib/Headers/__clang_cuda_math_forward_declares.h
index 8a270859e4a5..c0f1f47cc993 100644
--- a/clang/lib/Headers/__clang_cuda_math_forward_declares.h
+++ b/clang/lib/Headers/__clang_cuda_math_forward_declares.h
@@ -160,6 +160,9 @@ __DEVICE__ double scalbln(double, long);
 __DEVICE__ float scalbln(float, long);
 __DEVICE__ double scalbn(double, int);
 __DEVICE__ float scalbn(float, int);
+#ifdef _MSC_VER
+__DEVICE__ bool signbit(long double);
+#endif
 __DEVICE__ bool signbit(double);
 __DEVICE__ bool signbit(float);
 __DEVICE__ double sin(double);



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[llvm-branch-commits] [mlir] 6ebeba8 - Support emptiness checks for unbounded FlatAffineConstraints.

[Alex Zinenko via llvm-branch-commits]

Author: Arjun P
Date: 2021-01-14T19:33:37+01:00
New Revision: 6ebeba88f51959d763a8f274cdfecea46d51d28c

URL: 
https://github.com/llvm/llvm-project/commit/6ebeba88f51959d763a8f274cdfecea46d51d28c
DIFF: 
https://github.com/llvm/llvm-project/commit/6ebeba88f51959d763a8f274cdfecea46d51d28c.diff

LOG: Support emptiness checks for unbounded FlatAffineConstraints.

With this, we have complete support for emptiness checks. This also paves the 
way for future support to check if two FlatAffineConstraints are equal.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D94272

Added: 
mlir/include/mlir/Analysis/LinearTransform.h
mlir/lib/Analysis/LinearTransform.cpp
mlir/unittests/Analysis/LinearTransformTest.cpp

Modified: 
mlir/include/mlir/Analysis/AffineStructures.h
mlir/include/mlir/Analysis/Presburger/Fraction.h
mlir/include/mlir/Analysis/Presburger/Matrix.h
mlir/include/mlir/Analysis/Presburger/Simplex.h
mlir/lib/Analysis/AffineStructures.cpp
mlir/lib/Analysis/CMakeLists.txt
mlir/lib/Analysis/Presburger/CMakeLists.txt
mlir/lib/Analysis/Presburger/Matrix.cpp
mlir/lib/Analysis/Presburger/Simplex.cpp
mlir/unittests/Analysis/AffineStructuresTest.cpp
mlir/unittests/Analysis/CMakeLists.txt

Removed: 




diff  --git a/mlir/include/mlir/Analysis/AffineStructures.h 
b/mlir/include/mlir/Analysis/AffineStructures.h
index 25071db100e3..fa80db7d4b63 100644
--- a/mlir/include/mlir/Analysis/AffineStructures.h
+++ b/mlir/include/mlir/Analysis/AffineStructures.h
@@ -13,6 +13,7 @@
 #ifndef MLIR_ANALYSIS_AFFINE_STRUCTURES_H
 #define MLIR_ANALYSIS_AFFINE_STRUCTURES_H
 
+#include "mlir/Analysis/Presburger/Matrix.h"
 #include "mlir/IR/AffineExpr.h"
 #include "mlir/IR/OpDefinition.h"
 #include "mlir/Support/LogicalResult.h"
@@ -153,6 +154,12 @@ class FlatAffineConstraints {
   /// false if a solution exists or all tests were inconclusive.
   bool isIntegerEmpty() const;
 
+  // Returns a matrix where each row is a vector along which the polytope is
+  // bounded. The span of the returned vectors is guaranteed to contain all
+  // such vectors. The returned vectors are NOT guaranteed to be linearly
+  // independent. This function should not be called on empty sets.
+  Matrix getBoundedDirections() const;
+
   /// Find a sample point satisfying the constraints. This uses a branch and
   /// bound algorithm with generalized basis reduction, which always works if
   /// the set is bounded. This should not be called for unbounded sets.

diff  --git a/mlir/include/mlir/Analysis/LinearTransform.h 
b/mlir/include/mlir/Analysis/LinearTransform.h
new file mode 100644
index ..0850f5a00609
--- /dev/null
+++ b/mlir/include/mlir/Analysis/LinearTransform.h
@@ -0,0 +1,48 @@
+//===- LinearTransform.h - MLIR LinearTransform Class ---*- C++ 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// Support for linear transforms and applying them to FlatAffineConstraints.
+//
+//===--===//
+
+#ifndef MLIR_ANALYSIS_LINEARTRANSFORM_H
+#define MLIR_ANALYSIS_LINEARTRANSFORM_H
+
+#include "mlir/Analysis/AffineStructures.h"
+#include "mlir/Analysis/Presburger/Matrix.h"
+#include "llvm/ADT/SmallVector.h"
+
+namespace mlir {
+
+class LinearTransform {
+public:
+  explicit LinearTransform(Matrix &&oMatrix);
+  explicit LinearTransform(const Matrix &oMatrix);
+
+  // Returns a linear transform T such that MT is M in column echelon form.
+  // Also returns the number of non-zero columns in MT.
+  //
+  // Specifically, T is such that in every column the first non-zero row is
+  // strictly below that of the previous column, and all columns which have 
only
+  // zeros are at the end.
+  static std::pair
+  makeTransformToColumnEchelon(Matrix m);
+
+  // Returns a FlatAffineConstraints having a constraint vector vT for every
+  // constraint vector v in fac, where T is this transform.
+  FlatAffineConstraints applyTo(const FlatAffineConstraints &fac);
+
+  // Post-multiply the given vector v with this transform, say T, returning vT.
+  SmallVector applyTo(ArrayRef v);
+
+private:
+  Matrix matrix;
+};
+
+} // namespace mlir
+#endif // MLIR_ANALYSIS_LINEARTRANSFORM_H

diff  --git a/mlir/include/mlir/Analysis/Presburger/Fraction.h 
b/mlir/include/mlir/Analysis/Presburger/Fraction.h
index 09996c486ef3..61b0915e559e 100644
--- a/mlir/include/mlir/Analysis/Presburger/Fraction.h
+++ b/mlir/include/mlir/Analysis/Presburger/Fraction.h
@@ -64,6 +64,8 @@ inline bool operator<=(Fraction x, Fraction y) { return 
compare(x, y) <= 0; }
 
 inline bool operator==(Fraction x, Fraction y) 

[llvm-branch-commits] [openmp] 763c1f9 - [OpenMP] Drop the static library libomptarget-nvptx

[Shilei Tian via llvm-branch-commits]

Author: Shilei Tian
Date: 2021-01-14T13:34:25-05:00
New Revision: 763c1f9933463c40c39c04b68bbe4d296823b003

URL: 
https://github.com/llvm/llvm-project/commit/763c1f9933463c40c39c04b68bbe4d296823b003
DIFF: 
https://github.com/llvm/llvm-project/commit/763c1f9933463c40c39c04b68bbe4d296823b003.diff

LOG: [OpenMP] Drop the static library libomptarget-nvptx

For NVPTX target, OpenMP provides a static library `libomptarget-nvptx`
built by NVCC, and another bitcode `libomptarget-nvptx-sm_{$sm}.bc` generated by
Clang. When compiling an OpenMP program, the `.bc` file will be fed to `clang`
in the second run on the program that compiles the target part. Then the 
generated
PTX file will be fed to `ptxas` to generate the object file, and finally the 
driver
invokes `nvlink` to generate the binary, where the static library will be 
appened
to `nvlink`.

One question is, why do we need two libraries? The only difference is, the 
static
library contains `omp_data.cu` and the bitcode library doesn't. It's unclear why
they were implemented in this way, but per D94565, there is no issue if we also
include the file into the bitcode library. Therefore, we can safely drop the
static library.

This patch is about the change in OpenMP. The driver will be updated as well if
this patch is accepted.

Reviewed By: jdoerfert, JonChesterfield

Differential Revision: https://reviews.llvm.org/D94573

Added: 


Modified: 
openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt

Removed: 




diff  --git a/openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt 
b/openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt
index ea11c8114166..200c6401d628 100644
--- a/openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt
+++ b/openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt
@@ -10,31 +10,6 @@
 #
 
##===--===##
 
-set(LIBOMPTARGET_NVPTX_ALTERNATE_HOST_COMPILER "" CACHE STRING
-  "Path to alternate NVCC host compiler to be used by the NVPTX device RTL.")
-
-if(LIBOMPTARGET_NVPTX_ALTERNATE_HOST_COMPILER)
-  find_program(ALTERNATE_CUDA_HOST_COMPILER NAMES 
${LIBOMPTARGET_NVPTX_ALTERNATE_HOST_COMPILER})
-  if(NOT ALTERNATE_CUDA_HOST_COMPILER)
-libomptarget_say("Not building CUDA offloading device RTL: invalid NVPTX 
alternate host compiler.")
-  endif()
-  set(CUDA_HOST_COMPILER ${ALTERNATE_CUDA_HOST_COMPILER} CACHE FILEPATH "" 
FORCE)
-endif()
-
-# We can't use clang as nvcc host preprocessor, so we attempt to replace it 
with
-# gcc.
-if(CUDA_HOST_COMPILER MATCHES clang)
-
-  find_program(LIBOMPTARGET_NVPTX_ALTERNATE_GCC_HOST_COMPILER NAMES gcc)
-
-  if(NOT LIBOMPTARGET_NVPTX_ALTERNATE_GCC_HOST_COMPILER)
-libomptarget_say("Not building CUDA offloading device RTL: clang is not 
supported as NVCC host compiler.")
-libomptarget_say("Please include gcc in your path or set 
LIBOMPTARGET_NVPTX_ALTERNATE_HOST_COMPILER to the full path of of valid 
compiler.")
-return()
-  endif()
-  set(CUDA_HOST_COMPILER "${LIBOMPTARGET_NVPTX_ALTERNATE_GCC_HOST_COMPILER}" 
CACHE FILEPATH "" FORCE)
-endif()
-
 get_filename_component(devicertl_base_directory
   ${CMAKE_CURRENT_SOURCE_DIR}
   DIRECTORY)
@@ -44,28 +19,6 @@ set(devicertl_nvptx_directory
   ${devicertl_base_directory}/nvptx)
 
 if(LIBOMPTARGET_DEP_CUDA_FOUND)
-  libomptarget_say("Building CUDA offloading device RTL.")
-
-  # We really don't have any host code, so we don't need to care about
-  # propagating host flags.
-  set(CUDA_PROPAGATE_HOST_FLAGS OFF)
-
-  set(cuda_src_files
-  ${devicertl_common_directory}/src/cancel.cu
-  ${devicertl_common_directory}/src/critical.cu
-  ${devicertl_common_directory}/src/data_sharing.cu
-  ${devicertl_common_directory}/src/libcall.cu
-  ${devicertl_common_directory}/src/loop.cu
-  ${devicertl_common_directory}/src/omp_data.cu
-  ${devicertl_common_directory}/src/omptarget.cu
-  ${devicertl_common_directory}/src/parallel.cu
-  ${devicertl_common_directory}/src/reduction.cu
-  ${devicertl_common_directory}/src/support.cu
-  ${devicertl_common_directory}/src/sync.cu
-  ${devicertl_common_directory}/src/task.cu
-  src/target_impl.cu
-  )
-
   # Build library support for the highest compute capability the system 
supports
   # and always build support for sm_35 by default
   if (${LIBOMPTARGET_DEP_CUDA_ARCH} EQUAL 35)
@@ -94,24 +47,6 @@ if(LIBOMPTARGET_DEP_CUDA_FOUND)
   # Activate RTL message dumps if requested by the user.
   set(LIBOMPTARGET_NVPTX_DEBUG FALSE CACHE BOOL
 "Activate NVPTX device RTL debug messages.")
-  if(${LIBOMPTARGET_NVPTX_DEBUG})
-set(CUDA_DEBUG -DOMPTARGET_NVPTX_DEBUG=-1 -g --ptxas-options=-v)
-  endif()
-
-  # NVPTX runtime library has to be statically linked. Dynamic linking is not
-  # yet supported by the CUDA toolchain on the device.
-  set(BUILD_SHARED_LIBS OFF)
-  set(CUDA_SEPARABLE_COMPILATION ON)
-  list(APPEND CUDA_N

[llvm-branch-commits] [clang] 4fffbc1 - [clang][MSVC] Fix missing MSInheritanceAttr in template specialization.

[Zequan Wu via llvm-branch-commits]

Author: Zequan Wu
Date: 2021-01-14T10:37:35-08:00
New Revision: 4fffbc150cca1638051b8ad2a20f4b8240df0869

URL: 
https://github.com/llvm/llvm-project/commit/4fffbc150cca1638051b8ad2a20f4b8240df0869
DIFF: 
https://github.com/llvm/llvm-project/commit/4fffbc150cca1638051b8ad2a20f4b8240df0869.diff

LOG: [clang][MSVC] Fix missing MSInheritanceAttr in template specialization.

Fix PR48687.

Differential Revision: https://reviews.llvm.org/D94646

Added: 


Modified: 
clang/lib/Sema/SemaTemplate.cpp
clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp

Removed: 




diff  --git a/clang/lib/Sema/SemaTemplate.cpp b/clang/lib/Sema/SemaTemplate.cpp
index 64259767d98a..12880b95b9c6 100644
--- a/clang/lib/Sema/SemaTemplate.cpp
+++ b/clang/lib/Sema/SemaTemplate.cpp
@@ -9764,6 +9764,11 @@ DeclResult Sema::ActOnExplicitInstantiation(
   dllExportImportClassTemplateSpecialization(*this, Def);
 }
 
+if (Def->hasAttr()) {
+  Specialization->addAttr(Def->getAttr());
+  Consumer.AssignInheritanceModel(Specialization);
+}
+
 // Set the template specialization kind. Make sure it is set before
 // instantiating the members which will trigger ASTConsumer callbacks.
 Specialization->setTemplateSpecializationKind(TSK);

diff  --git a/clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp 
b/clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp
index bfe620df5ce3..527363a6ff8f 100644
--- a/clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp
+++ b/clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp
@@ -148,6 +148,16 @@ const C table[] = {
 // CHECK-SAME:  %"struct.pr43803::C" { { i32, i32, i32 } { i32 8, i32 0, i32 0 
}, [4 x i8] undef }]
 }
 
+namespace pr48687 {
+template  struct A {
+  T value;
+  static constexpr auto address = &A::value;
+};
+extern template class A;
+template class A;
+// CHECK: @"?address@?$A@M@pr48687@@2QQ12@MQ12@" = weak_odr dso_local constant 
i32 0, comdat, align 4
+}
+
 struct PR26313_Y;
 typedef void (PR26313_Y::*PR26313_FUNC)();
 struct PR26313_X {



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[llvm-branch-commits] [llvm] 202d359 - [X86] Add the FSRM feature (Fast Short Rep Mov) to Zen3.

[Hiroshi Yamauchi via llvm-branch-commits]

Author: Hiroshi Yamauchi
Date: 2021-01-14T10:47:33-08:00
New Revision: 202d359753d1f130a228c3ad52dfaabf384250d1

URL: 
https://github.com/llvm/llvm-project/commit/202d359753d1f130a228c3ad52dfaabf384250d1
DIFF: 
https://github.com/llvm/llvm-project/commit/202d359753d1f130a228c3ad52dfaabf384250d1.diff

LOG: [X86] Add the FSRM feature (Fast Short Rep Mov) to Zen3.

Note -x86-use-fsrm-for-memcpy is still disabled by default and there's no
default behavior change.

Differential Revision: https://reviews.llvm.org/D94436

Added: 


Modified: 
llvm/lib/Target/X86/X86.td
llvm/test/CodeGen/X86/memcpy-inline-fsrm.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td
index 9096d9d54452..c492d686c52e 100644
--- a/llvm/lib/Target/X86/X86.td
+++ b/llvm/lib/Target/X86/X86.td
@@ -1071,7 +1071,8 @@ def ProcessorFeatures {
   list ZN2Tuning = ZNTuning;
   list ZN2Features =
 !listconcat(ZNFeatures, ZN2AdditionalFeatures);
-  list ZN3AdditionalFeatures = [FeatureINVPCID,
+  list ZN3AdditionalFeatures = [FeatureFSRM,
+  FeatureINVPCID,
   FeaturePKU,
   FeatureVAES,
   FeatureVPCLMULQDQ];

diff  --git a/llvm/test/CodeGen/X86/memcpy-inline-fsrm.ll 
b/llvm/test/CodeGen/X86/memcpy-inline-fsrm.ll
index 9480d74723fc..77e97626b1c6 100644
--- a/llvm/test/CodeGen/X86/memcpy-inline-fsrm.ll
+++ b/llvm/test/CodeGen/X86/memcpy-inline-fsrm.ll
@@ -4,6 +4,7 @@
 ; RUN: llc -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy -mcpu=haswell < 
%s | FileCheck %s --check-prefix=NOFSRM
 ; RUN: llc -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy 
-mcpu=icelake-client < %s | FileCheck %s --check-prefix=FSRM
 ; RUN: llc -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy 
-mcpu=icelake-server < %s | FileCheck %s --check-prefix=FSRM
+; RUN: llc -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy -mcpu=znver3 < 
%s | FileCheck %s --check-prefix=FSRM
 
 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) 
nounwind
 



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[llvm-branch-commits] [openmp] 64e9e9a - [OpenMP] Dropped unnecessary define when compiling deviceRTLs for NVPTX

[Shilei Tian via llvm-branch-commits]

Author: Shilei Tian
Date: 2021-01-14T13:55:12-05:00
New Revision: 64e9e9aeee0155fc12d7d40d56e7611a63d8e47d

URL: 
https://github.com/llvm/llvm-project/commit/64e9e9aeee0155fc12d7d40d56e7611a63d8e47d
DIFF: 
https://github.com/llvm/llvm-project/commit/64e9e9aeee0155fc12d7d40d56e7611a63d8e47d.diff

LOG: [OpenMP] Dropped unnecessary define when compiling deviceRTLs for NVPTX

The comment said CUDA 9 header files use the `nv_weak` attribute which
`clang` is not yet prepared to handle. It's three years ago and now things have
changed. Based on my test, removing the definition doesn't have any problem on
my machine with CUDA 11.1 installed.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94700

Added: 


Modified: 
openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt

Removed: 




diff  --git a/openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt 
b/openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt
index 200c6401d628..c8acf6a31966 100644
--- a/openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt
+++ b/openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt
@@ -89,13 +89,6 @@ if(LIBOMPTARGET_DEP_CUDA_FOUND)
   set(bc_flags ${bc_flags} -DOMPTARGET_NVPTX_DEBUG=0)
 endif()
 
-# CUDA 9 header files use the nv_weak attribute which clang is not yet 
prepared
-# to handle. Therefore, we use 'weak' instead. We are compiling only for 
the
-# device, so it should be equivalent.
-if(CUDA_VERSION_MAJOR GREATER 8)
-  set(bc_flags ${bc_flags} -Dnv_weak=weak)
-endif()
-
 # Create target to build all Bitcode libraries.
 add_custom_target(omptarget-nvptx-bc)
 



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[llvm-branch-commits] [compiler-rt] a8520f6 - [GWP-ASan] Minor refactor of optional components.

[Mitch Phillips via llvm-branch-commits]

Author: Mitch Phillips
Date: 2021-01-14T11:14:11-08:00
New Revision: a8520f6970fd4d44ceae1ec5969563a0dbe30f54

URL: 
https://github.com/llvm/llvm-project/commit/a8520f6970fd4d44ceae1ec5969563a0dbe30f54
DIFF: 
https://github.com/llvm/llvm-project/commit/a8520f6970fd4d44ceae1ec5969563a0dbe30f54.diff

LOG: [GWP-ASan] Minor refactor of optional components.

In preparation for the inbuilt options parser, this is a minor refactor
of optional components including:
 - Putting certain optional elements in the right header files,
 according to their function and their dependencies.
 - Cleaning up some old and mostly-dead code.
 - Moving some functions into anonymous namespaces to prevent symbol
 export.

Reviewed By: cryptoad, eugenis

Differential Revision: https://reviews.llvm.org/D94117

Added: 
compiler-rt/lib/gwp_asan/optional/printf.h
compiler-rt/lib/gwp_asan/tests/platform_specific/printf_sanitizer_common.cpp

Modified: 
compiler-rt/lib/gwp_asan/optional/backtrace.h
compiler-rt/lib/gwp_asan/optional/backtrace_fuchsia.cpp
compiler-rt/lib/gwp_asan/optional/backtrace_linux_libc.cpp
compiler-rt/lib/gwp_asan/optional/backtrace_sanitizer_common.cpp
compiler-rt/lib/gwp_asan/optional/segv_handler.h
compiler-rt/lib/gwp_asan/optional/segv_handler_fuchsia.cpp
compiler-rt/lib/gwp_asan/optional/segv_handler_posix.cpp
compiler-rt/lib/gwp_asan/tests/CMakeLists.txt
compiler-rt/lib/gwp_asan/tests/harness.h
compiler-rt/lib/scudo/scudo_allocator.cpp
compiler-rt/lib/scudo/standalone/combined.h

Removed: 
compiler-rt/lib/gwp_asan/tests/optional/printf_sanitizer_common.cpp



diff  --git a/compiler-rt/lib/gwp_asan/optional/backtrace.h 
b/compiler-rt/lib/gwp_asan/optional/backtrace.h
index 3a72eb3d08e8..9bb12af206a5 100644
--- a/compiler-rt/lib/gwp_asan/optional/backtrace.h
+++ b/compiler-rt/lib/gwp_asan/optional/backtrace.h
@@ -9,21 +9,45 @@
 #ifndef GWP_ASAN_OPTIONAL_BACKTRACE_H_
 #define GWP_ASAN_OPTIONAL_BACKTRACE_H_
 
-#include "gwp_asan/optional/segv_handler.h"
+#include "gwp_asan/optional/printf.h"
 #include "gwp_asan/options.h"
 
 namespace gwp_asan {
-namespace options {
-// Functions to get the platform-specific and implementation-specific backtrace
-// and backtrace printing functions when RTGwpAsanBacktraceLibc or
-// RTGwpAsanBacktraceSanitizerCommon are linked. Use these functions to get the
-// backtrace function for populating the Options::Backtrace and
-// Options::PrintBacktrace when initialising the GuardedPoolAllocator. Please
-// note any thread-safety descriptions for the implementation of these 
functions
-// that you use.
-Backtrace_t getBacktraceFunction();
-crash_handler::PrintBacktrace_t getPrintBacktraceFunction();
-} // namespace options
+namespace backtrace {
+//  Description 

+// This function shall take the backtrace provided in `TraceBuffer`, and print
+// it in a human-readable format using `Print`. Generally, this function shall
+// resolve raw pointers to section offsets and print them with the following
+// sanitizer-common format:
+//  "  #{frame_number} {pointer} in {function name} ({binary 
name}+{offset}"
+// e.g. "  #5 0x420459 in _start (/tmp/uaf+0x420459)"
+// This format allows the backtrace to be symbolized offline successfully using
+// llvm-symbolizer.
+// === Notes 
===
+// This function may directly or indirectly call malloc(), as the
+// GuardedPoolAllocator contains a reentrancy barrier to prevent infinite
+// recursion. Any allocation made inside this function will be served by the
+// supporting allocator, and will not have GWP-ASan protections.
+typedef void (*PrintBacktrace_t)(uintptr_t *TraceBuffer, size_t TraceLength,
+ Printf_t Print);
+
+// Returns a function pointer to a backtrace function that's suitable for
+// unwinding through a signal handler. This is important primarily for frame-
+// pointer based unwinders, DWARF or other unwinders can simply provide the
+// normal backtrace function as the implementation here. On POSIX, 
SignalContext
+// should be the `ucontext_t` from the signal handler.
+typedef size_t (*SegvBacktrace_t)(uintptr_t *TraceBuffer, size_t Size,
+  void *SignalContext);
+
+// Returns platform-specific provided implementations of Backtrace_t for use
+// inside the GWP-ASan core allocator.
+options::Backtrace_t getBacktraceFunction();
+
+// Returns platform-specific provided implementations of PrintBacktrace_t and
+// SegvBacktrace_t for use in the optional SEGV handler.
+PrintBacktrace_t getPrintBacktraceFunction();
+SegvBacktrace_t getSegvBacktraceFunction();
+} // namespace backtrace
 } // namespace gwp_asan
 
 #endif // GWP_ASAN_OPTIONAL_BACKTRACE_H_

diff  --git a/compiler-rt/lib/gwp_asan/optional/backtrace_fuchsia.cp

[llvm-branch-commits] [llvm] ca98baa - [openacc] Rename generated file from ACC.cpp.inc to ACC.inc to match D92955

[via llvm-branch-commits]

Author: Valentin Clement
Date: 2021-01-14T14:19:53-05:00
New Revision: ca98baa042538e1a8654dd86b24d1602df9a1aec

URL: 
https://github.com/llvm/llvm-project/commit/ca98baa042538e1a8654dd86b24d1602df9a1aec
DIFF: 
https://github.com/llvm/llvm-project/commit/ca98baa042538e1a8654dd86b24d1602df9a1aec.diff

LOG: [openacc] Rename generated file from ACC.cpp.inc to ACC.inc to match D92955

This patch rename the tablegen generated file ACC.cpp.inc to ACC.inc in order
to match what was done in D92955. This file is included in header file as well 
as .cpp
file so it make more sense.

Reviewed By: sameeranjoshi

Differential Revision: https://reviews.llvm.org/D93485

Added: 


Modified: 
flang/include/flang/Parser/dump-parse-tree.h
flang/include/flang/Parser/parse-tree.h
flang/lib/Parser/unparse.cpp
flang/lib/Semantics/check-acc-structure.h
llvm/include/llvm/Frontend/OpenACC/CMakeLists.txt
llvm/utils/gn/secondary/llvm/include/llvm/Frontend/OpenACC/BUILD.gn

Removed: 




diff  --git a/flang/include/flang/Parser/dump-parse-tree.h 
b/flang/include/flang/Parser/dump-parse-tree.h
index 60e2a2df..bc0fd388b11c 100644
--- a/flang/include/flang/Parser/dump-parse-tree.h
+++ b/flang/include/flang/Parser/dump-parse-tree.h
@@ -65,7 +65,7 @@ class ParseTreeDumper {
   NODE(parser, AccBlockDirective)
   NODE(parser, AccClause)
 #define GEN_FLANG_DUMP_PARSE_TREE_CLAUSES
-#include "llvm/Frontend/OpenACC/ACC.cpp.inc"
+#include "llvm/Frontend/OpenACC/ACC.inc"
   NODE(parser, AccBindClause)
   NODE(parser, AccDefaultClause)
   static std::string GetNodeName(const llvm::acc::DefaultValue &x) {

diff  --git a/flang/include/flang/Parser/parse-tree.h 
b/flang/include/flang/Parser/parse-tree.h
index 7a7b2a184004..dcc38090a3a1 100644
--- a/flang/include/flang/Parser/parse-tree.h
+++ b/flang/include/flang/Parser/parse-tree.h
@@ -3920,13 +3920,13 @@ struct AccClause {
   UNION_CLASS_BOILERPLATE(AccClause);
 
 #define GEN_FLANG_CLAUSE_PARSER_CLASSES
-#include "llvm/Frontend/OpenACC/ACC.cpp.inc"
+#include "llvm/Frontend/OpenACC/ACC.inc"
 
   CharBlock source;
 
   std::variant<
 #define GEN_FLANG_CLAUSE_PARSER_CLASSES_LIST
-#include "llvm/Frontend/OpenACC/ACC.cpp.inc"
+#include "llvm/Frontend/OpenACC/ACC.inc"
   >
   u;
 };

diff  --git a/flang/lib/Parser/unparse.cpp b/flang/lib/Parser/unparse.cpp
index 2086862551d9..5bf8db8bf0a1 100644
--- a/flang/lib/Parser/unparse.cpp
+++ b/flang/lib/Parser/unparse.cpp
@@ -1831,7 +1831,7 @@ class UnparseVisitor {
 Word(llvm::acc::getOpenACCDirectiveName(x).str());
   }
 #define GEN_FLANG_CLAUSE_UNPARSE
-#include "llvm/Frontend/OpenACC/ACC.cpp.inc"
+#include "llvm/Frontend/OpenACC/ACC.inc"
   void Unparse(const AccObjectListWithModifier &x) {
 Walk(std::get>(x.t), ":");
 Walk(std::get(x.t));

diff  --git a/flang/lib/Semantics/check-acc-structure.h 
b/flang/lib/Semantics/check-acc-structure.h
index 29d40b9cbe67..ffe468c96d86 100644
--- a/flang/lib/Semantics/check-acc-structure.h
+++ b/flang/lib/Semantics/check-acc-structure.h
@@ -27,7 +27,7 @@ using AccClauseSet =
 Fortran::common::EnumSet;
 
 #define GEN_FLANG_DIRECTIVE_CLAUSE_SETS
-#include "llvm/Frontend/OpenACC/ACC.cpp.inc"
+#include "llvm/Frontend/OpenACC/ACC.inc"
 
 namespace Fortran::semantics {
 
@@ -38,7 +38,7 @@ class AccStructureChecker
   AccStructureChecker(SemanticsContext &context)
   : DirectiveStructureChecker(context,
 #define GEN_FLANG_DIRECTIVE_CLAUSE_MAP
-#include "llvm/Frontend/OpenACC/ACC.cpp.inc"
+#include "llvm/Frontend/OpenACC/ACC.inc"
 ) {
   }
 

diff  --git a/llvm/include/llvm/Frontend/OpenACC/CMakeLists.txt 
b/llvm/include/llvm/Frontend/OpenACC/CMakeLists.txt
index 31086ec9a47b..b8332e03ff81 100644
--- a/llvm/include/llvm/Frontend/OpenACC/CMakeLists.txt
+++ b/llvm/include/llvm/Frontend/OpenACC/CMakeLists.txt
@@ -1,4 +1,4 @@
 set(LLVM_TARGET_DEFINITIONS ACC.td)
 tablegen(LLVM ACC.h.inc --gen-directive-decl)
-tablegen(LLVM ACC.cpp.inc --gen-directive-gen)
+tablegen(LLVM ACC.inc --gen-directive-gen)
 add_public_tablegen_target(acc_gen)

diff  --git 
a/llvm/utils/gn/secondary/llvm/include/llvm/Frontend/OpenACC/BUILD.gn 
b/llvm/utils/gn/secondary/llvm/include/llvm/Frontend/OpenACC/BUILD.gn
index 26c9b52a1660..995b7f29e521 100644
--- a/llvm/utils/gn/secondary/llvm/include/llvm/Frontend/OpenACC/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/include/llvm/Frontend/OpenACC/BUILD.gn
@@ -9,7 +9,7 @@ tablegen("ACC") {
 tablegen("ACCcpp") {
   visibility = [ ":acc_gen" ]
   args = [ "-gen-directive-gen" ]
-  output_name = "ACC.cpp.inc"
+  output_name = "ACC.inc"
   td_file = "ACC.td"
 }
 



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[llvm-branch-commits] [clang] 9e53c94 - [NFC] Update test to not check for 'opaque' in the file name.

[Erich Keane via llvm-branch-commits]

Author: Erich Keane
Date: 2021-01-14T11:24:06-08:00
New Revision: 9e53c94d8dd737fcedb543d6ac687ea9696db8a6

URL: 
https://github.com/llvm/llvm-project/commit/9e53c94d8dd737fcedb543d6ac687ea9696db8a6
DIFF: 
https://github.com/llvm/llvm-project/commit/9e53c94d8dd737fcedb543d6ac687ea9696db8a6.diff

LOG: [NFC] Update test to not check for 'opaque' in the file name.

The intent presumably is to avoid generating 'opaque' in the IR, but the
header contains the filename. Thus, having the workspace in a directory
with opaque in it causes this test to fail.

This just adds a 'CHECK' line on target-triple, which is the last line
of the IR-header.

Added: 


Modified: 
clang/test/CodeGen/incomplete-function-type.c

Removed: 




diff  --git a/clang/test/CodeGen/incomplete-function-type.c 
b/clang/test/CodeGen/incomplete-function-type.c
index b5b864bb11af..0ec1cf871391 100644
--- a/clang/test/CodeGen/incomplete-function-type.c
+++ b/clang/test/CodeGen/incomplete-function-type.c
@@ -1,5 +1,6 @@
 // RUN: %clang_cc1 -triple x86_64-apple-darwin -emit-llvm -o - %s | FileCheck 
%s
 // CHECK: ModuleID
+// CHECK: target triple = "
 // CHECK-NOT: opaque
 // CHECK-LABEL: define{{.*}} void @f0
 



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[llvm-branch-commits] [mlir] 1d973b7 - [MLIR][TOSA] First lowerings from Tosa to Linalg

[Rob Suderman via llvm-branch-commits]

Author: Rob Suderman
Date: 2021-01-14T11:24:23-08:00
New Revision: 1d973b7ded124dd19f766db0c8e07d1c686dfb1b

URL: 
https://github.com/llvm/llvm-project/commit/1d973b7ded124dd19f766db0c8e07d1c686dfb1b
DIFF: 
https://github.com/llvm/llvm-project/commit/1d973b7ded124dd19f766db0c8e07d1c686dfb1b.diff

LOG: [MLIR][TOSA] First lowerings from Tosa to Linalg

Initial commit to add support for lowering from TOSA to Linalg. The focus is on
the essential infrastructure for these lowerings and integration with existing
passes.

Includes lowerings for a subset of operations including:
  abs, add, sub, pow, and, or, xor, left shift, right shift, tanh

Lit tests are used to validate correctness.

Differential Revision: https://reviews.llvm.org/D94247

Added: 
mlir/include/mlir/Conversion/TosaToLinalg/TosaToLinalg.h
mlir/lib/Conversion/TosaToLinalg/CMakeLists.txt
mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir

Modified: 
mlir/include/mlir/Conversion/Passes.h
mlir/include/mlir/Conversion/Passes.td
mlir/lib/Conversion/CMakeLists.txt

Removed: 




diff  --git a/mlir/include/mlir/Conversion/Passes.h 
b/mlir/include/mlir/Conversion/Passes.h
index 64b99d33ab61..2e07a795b6c7 100644
--- a/mlir/include/mlir/Conversion/Passes.h
+++ b/mlir/include/mlir/Conversion/Passes.h
@@ -29,6 +29,7 @@
 #include "mlir/Conversion/ShapeToStandard/ShapeToStandard.h"
 #include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
 #include "mlir/Conversion/StandardToSPIRV/StandardToSPIRVPass.h"
+#include "mlir/Conversion/TosaToLinalg/TosaToLinalg.h"
 #include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
 #include "mlir/Conversion/VectorToROCDL/VectorToROCDL.h"
 #include "mlir/Conversion/VectorToSCF/VectorToSCF.h"

diff  --git a/mlir/include/mlir/Conversion/Passes.td 
b/mlir/include/mlir/Conversion/Passes.td
index 6a6ba6bbb371..e8ca058adedd 100644
--- a/mlir/include/mlir/Conversion/Passes.td
+++ b/mlir/include/mlir/Conversion/Passes.td
@@ -416,6 +416,20 @@ def ConvertStandardToSPIRV : Pass<"convert-std-to-spirv", 
"ModuleOp"> {
   let dependentDialects = ["spirv::SPIRVDialect"];
 }
 
+//===--===//
+// TosaToLinalg
+//===--===//
+
+def TosaToLinalgOnTensors : FunctionPass<"tosa-to-linalg-on-tensors"> {
+  let summary = "Lower TOSA to LinAlg on tensors";
+  let description = [{
+Pass that converts TOSA operations to the equivalent operations using the
+tensor operations in LinAlg.
+  }];
+
+  let constructor = "tosa::createTosaToLinalgOnTensors()";
+}
+
 
//===--===//
 // VectorToSCF
 
//===--===//

diff  --git a/mlir/include/mlir/Conversion/TosaToLinalg/TosaToLinalg.h 
b/mlir/include/mlir/Conversion/TosaToLinalg/TosaToLinalg.h
new file mode 100644
index ..42493a57bcc2
--- /dev/null
+++ b/mlir/include/mlir/Conversion/TosaToLinalg/TosaToLinalg.h
@@ -0,0 +1,36 @@
+//===-- TosaToLinalg.h - TOSA optimization pass declarations --*- C++
+//-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file declares the passes for the TOSA Linalg Dialect in MLIR.
+//
+//===--===//
+
+#ifndef MLIR_CONVERSION_TOSATOLINALG_TOSATOLINALG_H
+#define MLIR_CONVERSION_TOSATOLINALG_TOSATOLINALG_H
+
+#include "mlir/Pass/Pass.h"
+
+namespace mlir {
+namespace tosa {
+
+std::unique_ptr createTosaToLinalgOnTensors();
+
+/// Populates passes to convert from TOSA to Linalg on buffers. At the end of
+/// the pass, the function will only contain linalg ops or standard ops if the
+/// pipeline succeeds.
+void addTosaToLinalgOnTensorsPasses(OpPassManager &pm);
+
+/// Populates conversion passes from TOSA dialect to Linalg dialect.
+void populateTosaToLinalgOnTensorsConversionPatterns(
+MLIRContext *context, OwningRewritePatternList *patterns);
+
+} // namespace tosa
+} // namespace mlir
+
+#endif // MLIR_CONVERSION_TOSATOLINALG_TOSATOLINALG_H

diff  --git a/mlir/lib/Conversion/CMakeLists.txt 
b/mlir/lib/Conversion/CMakeLists.txt
index 421523267df2..9fc7a40d2d55 100644
--- a/mlir/lib/Conversion/CMakeLists.txt
+++ b/mlir/lib/Conversion/CMakeLists.txt
@@ -20,6 +20,7 @@ add_subdirectory(ShapeToStandard)
 add_subdirectory(SPIRVToLLVM)
 add_subdirectory(StandardToLLVM)
 add_subdirectory(StandardToSPIRV)
+add_subdirectory(TosaToLinal

[llvm-branch-commits] [mlir] d8113cd - Add newline to terminate debug message (NFC)

[Mehdi Amini via llvm-branch-commits]

Author: Mehdi Amini
Date: 2021-01-14T19:29:18Z
New Revision: d8113cda782b56477d71321027c50389f05f5d31

URL: 
https://github.com/llvm/llvm-project/commit/d8113cda782b56477d71321027c50389f05f5d31
DIFF: 
https://github.com/llvm/llvm-project/commit/d8113cda782b56477d71321027c50389f05f5d31.diff

LOG: Add newline to terminate debug message (NFC)

Added: 


Modified: 
mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp

Removed: 




diff  --git a/mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp 
b/mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
index 170f882c02d0..c1d286690c48 100644
--- a/mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
+++ b/mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
@@ -258,7 +258,7 @@ mlir::applyPatternsAndFoldGreedily(MutableArrayRef 
regions,
   bool converged = driver.simplify(regions, maxIterations);
   LLVM_DEBUG(if (!converged) {
 llvm::dbgs() << "The pattern rewrite doesn't converge after scanning "
- << maxIterations << " times";
+ << maxIterations << " times\n";
   });
   return success(converged);
 }



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[llvm-branch-commits] [llvm] a3904cc - [BasicAA] Handle recursive queries more efficiently

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-14T20:32:41+01:00
New Revision: a3904cc77f181cff7355357688edfc392a236f5d

URL: 
https://github.com/llvm/llvm-project/commit/a3904cc77f181cff7355357688edfc392a236f5d
DIFF: 
https://github.com/llvm/llvm-project/commit/a3904cc77f181cff7355357688edfc392a236f5d.diff

LOG: [BasicAA] Handle recursive queries more efficiently

An alias query currently works out roughly like this:

 * Look up location pair in cache.
 * Perform BasicAA logic (including cache lookup and insertion...)
 * Perform a recursive query using BestAAResults.
   * Look up location pair in cache (and thus do not recurse into BasicAA)
   * Query all the other AA providers.
 * Query all the other AA providers.

This is a lot of unnecessary work, all ultimately caused by the
BestAAResults query at the end of aliasCheck(). The reason we perform
it, is that aliasCheck() is getting called recursively, and we of
course want those recursive queries to also make use of other AA
providers, not just BasicAA. We can solve this by making the recursive
queries directly use BestAAResults (which will check both BasicAA
and other providers), rather than recursing into aliasCheck().

There are some tradeoffs:

 * We can no longer pass through the precomputed underlying object
   to aliasCheck(). This is not a major concern, because nowadays
   getUnderlyingObject() is quite cheap.
 * Results from other AA providers are no longer cached inside
   BasicAA. The way this worked was already a bit iffy, in that a
   result could be cached, but if it was MayAlias, we'd still end
   up re-querying other providers anyway. If we want to cache
   non-BasicAA results, we should do that in a more principled manner.

In any case, despite those tradeoffs, this works out to be a decent
compile-time improvment. I think it also simplifies the mental model
of how BasicAA works. It took me quite a while to fully understand
how these things interact.

Differential Revision: https://reviews.llvm.org/D90094

Added: 


Modified: 
llvm/include/llvm/Analysis/BasicAliasAnalysis.h
llvm/lib/Analysis/BasicAliasAnalysis.cpp
llvm/lib/Analysis/GlobalsModRef.cpp

Removed: 




diff  --git a/llvm/include/llvm/Analysis/BasicAliasAnalysis.h 
b/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
index 635c35585f81..b95365d0481f 100644
--- a/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
+++ b/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
@@ -240,18 +240,17 @@ class BasicAAResult : public AAResultBase {
   AliasResult aliasPHI(const PHINode *PN, LocationSize PNSize,
const AAMDNodes &PNAAInfo, const Value *V2,
LocationSize V2Size, const AAMDNodes &V2AAInfo,
-   const Value *UnderV2, AAQueryInfo &AAQI);
+   AAQueryInfo &AAQI);
 
   AliasResult aliasSelect(const SelectInst *SI, LocationSize SISize,
   const AAMDNodes &SIAAInfo, const Value *V2,
   LocationSize V2Size, const AAMDNodes &V2AAInfo,
-  const Value *UnderV2, AAQueryInfo &AAQI);
+  AAQueryInfo &AAQI);
 
   AliasResult aliasCheck(const Value *V1, LocationSize V1Size,
  const AAMDNodes &V1AATag, const Value *V2,
  LocationSize V2Size, const AAMDNodes &V2AATag,
- AAQueryInfo &AAQI, const Value *O1 = nullptr,
- const Value *O2 = nullptr);
+ AAQueryInfo &AAQI);
 
   AliasResult aliasCheckRecursive(const Value *V1, LocationSize V1Size,
   const AAMDNodes &V1AATag, const Value *V2,

diff  --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp 
b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index 313a85ccc4de..29fd58e6e5d7 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -798,26 +798,8 @@ AliasResult BasicAAResult::alias(const MemoryLocation 
&LocA,
  AAQueryInfo &AAQI) {
   assert(notDifferentParent(LocA.Ptr, LocB.Ptr) &&
  "BasicAliasAnalysis doesn't support interprocedural queries.");
-
-  // If we have a directly cached entry for these locations, we have recursed
-  // through this once, so just return the cached results. Notably, when this
-  // happens, we don't clear the cache.
-  AAQueryInfo::LocPair Locs(LocA, LocB);
-  if (Locs.first.Ptr > Locs.second.Ptr)
-std::swap(Locs.first, Locs.second);
-  auto CacheIt = AAQI.AliasCache.find(Locs);
-  if (CacheIt != AAQI.AliasCache.end()) {
-// This code exists to skip a second BasicAA call while recursing into
-// BestAA. Don't make use of assumptions here.
-const auto &Entry = CacheIt->second;
-return Entry.isDefinitive() ? Entry.Result : MayAlias;
-  }
-
-  AliasResult Alias = aliasCheck(LocA.Ptr, LocA.Size, LocA.AATags, LocB.Ptr,
-  

[llvm-branch-commits] [mlir] 00a61b3 - [mlir][ODS] Add new RangedTypesMatchWith operation predicate

[River Riddle via llvm-branch-commits]

Author: River Riddle
Date: 2021-01-14T11:35:49-08:00
New Revision: 00a61b327dd8a7071ce0baadd16ea4c7b7e31e73

URL: 
https://github.com/llvm/llvm-project/commit/00a61b327dd8a7071ce0baadd16ea4c7b7e31e73
DIFF: 
https://github.com/llvm/llvm-project/commit/00a61b327dd8a7071ce0baadd16ea4c7b7e31e73.diff

LOG: [mlir][ODS] Add new RangedTypesMatchWith operation predicate

This is a variant of TypesMatchWith that provides support for variadic 
arguments. This is necessary because ranges generally can't use the default 
operator== comparators for checking equality.

Differential Revision: https://reviews.llvm.org/D94574

Added: 


Modified: 
mlir/include/mlir/IR/OpBase.td
mlir/test/lib/Dialect/Test/TestOps.td
mlir/test/mlir-tblgen/op-format.mlir
mlir/tools/mlir-tblgen/OpFormatGen.cpp

Removed: 




diff  --git a/mlir/include/mlir/IR/OpBase.td b/mlir/include/mlir/IR/OpBase.td
index 73ddbc1d56eb..3b55e51d8178 100644
--- a/mlir/include/mlir/IR/OpBase.td
+++ b/mlir/include/mlir/IR/OpBase.td
@@ -2191,16 +2191,28 @@ class AllTypesMatch names> :
 AllMatchSameOperatorTrait;
 
 // A type constraint that denotes `transform(lhs.getType()) == rhs.getType()`.
+// An optional comparator function may be provided that changes the above form
+// into: `comparator(transform(lhs.getType()), rhs.getType())`.
 class TypesMatchWith :
-PredOpTrait> {
+ string transform, string comparator = "std::equal_to<>()">
+  : PredOpTrait> {
   string lhs = lhsArg;
   string rhs = rhsArg;
   string transformer = transform;
 }
 
+// Special variant of `TypesMatchWith` that provides a comparator suitable for
+// ranged arguments.
+class RangedTypesMatchWith
+  : TypesMatchWith;
+
 // Type Constraint operand `idx`'s Element type is `type`.
 class TCopVTEtIs : And<[
CPred<"$_op.getNumOperands() > " # idx>,

diff  --git a/mlir/test/lib/Dialect/Test/TestOps.td 
b/mlir/test/lib/Dialect/Test/TestOps.td
index 1fc419cc375f..d1cbe77ac21b 100644
--- a/mlir/test/lib/Dialect/Test/TestOps.td
+++ b/mlir/test/lib/Dialect/Test/TestOps.td
@@ -1733,6 +1733,15 @@ def FormatTypesMatchVarOp : 
TEST_Op<"format_types_match_var", [
   let assemblyFormat = "attr-dict $value `:` type($value)";
 }
 
+def FormatTypesMatchVariadicOp : TEST_Op<"format_types_match_variadic", [
+RangedTypesMatchWith<"result type matches operand", "value", "result",
+ "llvm::make_range($_self.begin(), $_self.end())">
+  ]> {
+  let arguments = (ins Variadic:$value);
+  let results = (outs Variadic:$result);
+  let assemblyFormat = "attr-dict $value `:` type($value)";
+}
+
 def FormatTypesMatchAttrOp : TEST_Op<"format_types_match_attr", [
 TypesMatchWith<"result type matches constant", "value", "result", "$_self">
   ]> {

diff  --git a/mlir/test/mlir-tblgen/op-format.mlir 
b/mlir/test/mlir-tblgen/op-format.mlir
index 334313debda1..4eb64772aee2 100644
--- a/mlir/test/mlir-tblgen/op-format.mlir
+++ b/mlir/test/mlir-tblgen/op-format.mlir
@@ -308,5 +308,8 @@ test.format_infer_variadic_type_from_non_variadic %i64, 
%i64 : i64
 // CHECK: test.format_types_match_var %[[I64]] : i64
 %ignored_res3 = test.format_types_match_var %i64 : i64
 
+// CHECK: test.format_types_match_variadic %[[I64]], %[[I64]], %[[I64]] : i64, 
i64, i64
+%ignored_res4:3 = test.format_types_match_variadic %i64, %i64, %i64 : i64, 
i64, i64
+
 // CHECK: test.format_types_match_attr 1 : i64
-%ignored_res4 = test.format_types_match_attr 1 : i64
+%ignored_res5 = test.format_types_match_attr 1 : i64

diff  --git a/mlir/tools/mlir-tblgen/OpFormatGen.cpp 
b/mlir/tools/mlir-tblgen/OpFormatGen.cpp
index 749ef1613c14..bba796f9b492 100644
--- a/mlir/tools/mlir-tblgen/OpFormatGen.cpp
+++ b/mlir/tools/mlir-tblgen/OpFormatGen.cpp
@@ -1287,10 +1287,16 @@ void OperationFormat::genParserTypeResolution(Operator 
&op,
 if (Optional val = resolver.getBuilderIdx()) {
   body << "odsBuildableType" << *val;
 } else if (const NamedTypeConstraint *var = resolver.getVariable()) {
-  if (Optional tform = resolver.getVarTransformer())
-body << tgfmt(*tform, &FmtContext().withSelf(var->name + "Types[0]"));
-  else
+  if (Optional tform = resolver.getVarTransformer()) {
+FmtContext fmtContext;
+if (var->isVariadic())
+  fmtContext.withSelf(var->name + "Types");
+else
+  fmtContext.withSelf(var->name + "Types[0]");
+body << tgfmt(*tform, &fmtContext);
+  } else {
 body << var->name << "Types";
+  }
 } else if (const NamedAttribute *attr = resolver.getAttribute()) {
   if (Optional tform = resolver.getVarTransformer())
 body << tgfmt(*tform,



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[llvm-branch-commits] [clang] e3b9af9 - [Driver] -gsplit-dwarf: Produce .dwo regardless of -gN for IR input

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2021-01-14T11:46:22-08:00
New Revision: e3b9af92a4821fec25c207e2d1e443e09ff6b11e

URL: 
https://github.com/llvm/llvm-project/commit/e3b9af92a4821fec25c207e2d1e443e09ff6b11e
DIFF: 
https://github.com/llvm/llvm-project/commit/e3b9af92a4821fec25c207e2d1e443e09ff6b11e.diff

LOG: [Driver] -gsplit-dwarf: Produce .dwo regardless of -gN for IR input

This generalizes D94647 to IR input, as suggested by @tejohnson.
Ideally the driver should just forward split dwarf options, but doing this 
currently will cause `clang -gsplit-dwarf -c a.c` to create a .dwo with just 
`.strtab`.

Reviewed By: dblaikie, tejohnson

Differential Revision: https://reviews.llvm.org/D94655

Added: 


Modified: 
clang/lib/Driver/ToolChains/Clang.cpp
clang/test/Driver/split-debug.c

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/Clang.cpp 
b/clang/lib/Driver/ToolChains/Clang.cpp
index 0c821b85c229..8d6e8c42053f 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -3728,9 +3728,10 @@ static DwarfFissionKind getDebugFissionKind(const Driver 
&D,
   return DwarfFissionKind::None;
 }
 
-static void RenderDebugOptions(const ToolChain &TC, const Driver &D,
+static void renderDebugOptions(const ToolChain &TC, const Driver &D,
const llvm::Triple &T, const ArgList &Args,
-   bool EmitCodeView, ArgStringList &CmdArgs,
+   bool EmitCodeView, bool IRInput,
+   ArgStringList &CmdArgs,
codegenoptions::DebugInfoKind &DebugInfoKind,
DwarfFissionKind &DwarfFission) {
   if (Args.hasFlag(options::OPT_fdebug_info_for_profiling,
@@ -3754,12 +3755,10 @@ static void RenderDebugOptions(const ToolChain &TC, 
const Driver &D,
   Args.hasFlag(options::OPT_fsplit_dwarf_inlining,
options::OPT_fno_split_dwarf_inlining, false);
 
-  // Normally -gsplit-dwarf is only useful with -gN. For -gsplit-dwarf in the
-  // backend phase of a distributed ThinLTO which does object file generation
-  // and no IR generation, -gN should not be needed. So allow -gsplit-dwarf 
with
-  // either -gN or -fthinlto-index=.
-  if (Args.hasArg(options::OPT_g_Group) ||
-  Args.hasArg(options::OPT_fthinlto_index_EQ)) {
+  // Normally -gsplit-dwarf is only useful with -gN. For IR input, Clang does
+  // object file generation and no IR generation, -gN should not be needed. So
+  // allow -gsplit-dwarf with either -gN or IR input.
+  if (IRInput || Args.hasArg(options::OPT_g_Group)) {
 Arg *SplitDWARFArg;
 DwarfFission = getDebugFissionKind(D, Args, SplitDWARFArg);
 if (DwarfFission != DwarfFissionKind::None &&
@@ -4956,8 +4955,9 @@ void Clang::ConstructJob(Compilation &C, const JobAction 
&JA,
 AddClangCLArgs(Args, InputType, CmdArgs, &DebugInfoKind, &EmitCodeView);
 
   DwarfFissionKind DwarfFission = DwarfFissionKind::None;
-  RenderDebugOptions(TC, D, RawTriple, Args, EmitCodeView, CmdArgs,
- DebugInfoKind, DwarfFission);
+  renderDebugOptions(TC, D, RawTriple, Args, EmitCodeView,
+ types::isLLVMIR(InputType), CmdArgs, DebugInfoKind,
+ DwarfFission);
 
   // Add the split debug info name to the command lines here so we
   // can propagate it to the backend.

diff  --git a/clang/test/Driver/split-debug.c b/clang/test/Driver/split-debug.c
index 2ce4ca980c3f..d4511574da4d 100644
--- a/clang/test/Driver/split-debug.c
+++ b/clang/test/Driver/split-debug.c
@@ -26,11 +26,12 @@
 
 /// ... unless -fthinlto-index= is specified.
 // RUN: echo > %t.bc
-// RUN: %clang -### -c -target x86_64 -fthinlto-index=dummy -gsplit-dwarf 
%t.bc 2>&1 | FileCheck %s --check-prefix=THINLTO
+// RUN: %clang -### -c -target x86_64 -fthinlto-index=dummy -gsplit-dwarf 
%t.bc 2>&1 | FileCheck %s --check-prefix=IR
+// RUN: %clang -### -c -target x86_64 -gsplit-dwarf -x ir %t.bc 2>&1 | 
FileCheck %s --check-prefix=IR
 
-// THINLTO-NOT:  "-debug-info-kind=
-// THINLTO:  "-ggnu-pubnames"
-// THINLTO-SAME: "-split-dwarf-file" "{{.*}}.dwo" "-split-dwarf-output" 
"{{.*}}.dwo"
+// IR-NOT:  "-debug-info-kind=
+// IR:  "-ggnu-pubnames"
+// IR-SAME: "-split-dwarf-file" "{{.*}}.dwo" "-split-dwarf-output" "{{.*}}.dwo"
 
 /// -gno-split-dwarf disables debug fission.
 // RUN: %clang -### -c -target x86_64 -gsplit-dwarf -g -gno-split-dwarf %s 
2>&1 | FileCheck %s --check-prefix=NOSPLIT



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[llvm-branch-commits] [llvm] 387d3c2 - [RISCV] Merge Utils library into MCTargetDesc

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-14T11:47:30-08:00
New Revision: 387d3c24792f7ab5f2f8aab37d64948f42523825

URL: 
https://github.com/llvm/llvm-project/commit/387d3c24792f7ab5f2f8aab37d64948f42523825
DIFF: 
https://github.com/llvm/llvm-project/commit/387d3c24792f7ab5f2f8aab37d64948f42523825.diff

LOG: [RISCV] Merge Utils library into MCTargetDesc

MCTargetDesc includes headers from Utils and Utils includes headers
from MCTargetDesc. So from a library layering perspective it makes sense
for them to be in the same library. I guess the other option might be to
move the tablegen includes from RISCVMCTargetDesc.h to RISCVBaseInfo.h
so that RISCVBaseInfo.h didn't need to include RISCVMCTargetDesc.h.
Everything else that depends on Utils also depends on MCTargetDesc so
having one library seemed simpler.

Differential Revision: https://reviews.llvm.org/D93168

Added: 
llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.h

Modified: 
llvm/lib/Target/RISCV/AsmParser/CMakeLists.txt
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/CMakeLists.txt
llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt
llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
llvm/lib/Target/RISCV/RISCV.h
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
llvm/lib/Target/RISCV/RISCVSubtarget.h
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp

Removed: 
llvm/lib/Target/RISCV/Utils/CMakeLists.txt
llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp
llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h
llvm/lib/Target/RISCV/Utils/RISCVMatInt.cpp
llvm/lib/Target/RISCV/Utils/RISCVMatInt.h



diff  --git a/llvm/lib/Target/RISCV/AsmParser/CMakeLists.txt 
b/llvm/lib/Target/RISCV/AsmParser/CMakeLists.txt
index ca1b0b6f6016..0c99b500749c 100644
--- a/llvm/lib/Target/RISCV/AsmParser/CMakeLists.txt
+++ b/llvm/lib/Target/RISCV/AsmParser/CMakeLists.txt
@@ -6,7 +6,6 @@ add_llvm_component_library(LLVMRISCVAsmParser
   MCParser
   RISCVDesc
   RISCVInfo
-  RISCVUtils
   Support
 
   ADD_TO_COMPONENT

diff  --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp 
b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 257d2f05ee3c..43772fa8734d 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -7,13 +7,13 @@
 
//===--===//
 
 #include "MCTargetDesc/RISCVAsmBackend.h"
+#include "MCTargetDesc/RISCVBaseInfo.h"
 #include "MCTargetDesc/RISCVInstPrinter.h"
 #include "MCTargetDesc/RISCVMCExpr.h"
 #include "MCTargetDesc/RISCVMCTargetDesc.h"
+#include "MCTargetDesc/RISCVMatInt.h"
 #include "MCTargetDesc/RISCVTargetStreamer.h"
 #include "TargetInfo/RISCVTargetInfo.h"
-#include "Utils/RISCVBaseInfo.h"
-#include "Utils/RISCVMatInt.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SmallBitVector.h"
 #include "llvm/ADT/SmallString.h"

diff  --git a/llvm/lib/Target/RISCV/CMakeLists.txt 
b/llvm/lib/Target/RISCV/CMakeLists.txt
index 471cf59ba7ff..c4f3d3124d29 100644
--- a/llvm/lib/Target/RISCV/CMakeLists.txt
+++ b/llvm/lib/Target/RISCV/CMakeLists.txt
@@ -47,7 +47,6 @@ add_llvm_target(RISCVCodeGen
   MC
   RISCVDesc
   RISCVInfo
-  RISCVUtils
   SelectionDAG
   Support
   Target
@@ -61,4 +60,3 @@ add_subdirectory(AsmParser)
 add_subdirectory(Disassembler)
 add_subdirectory(MCTargetDesc)
 add_subdirectory(TargetInfo)
-add_subdirectory(Utils)

diff  --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp 
b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 50c45e34e36d..623552390f53 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -10,9 +10,9 @@
 //
 
//===--===//
 
+#include "MCTargetDesc/RISCVBaseInfo.h"
 #include "MCTargetDesc/RISCVMCTargetDesc.h"
 #include "TargetInfo/RISCVTargetInfo.h"
-#include "Utils/RISCVBaseInfo.h"
 #include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCDisassembler/MCDisassembler.h"
 #include "llvm/MC/MCFixedLenDisassembler.h"

diff  --git a/llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt 
b/llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt
index d17457ff4c5a..5f2928c921e1 100644
--- a/llvm/lib/Tar

[llvm-branch-commits] [mlir] c8fb6ee - [mlir][PatternRewriter] Add a new hook to selectively replace uses of an operation

[River Riddle via llvm-branch-commits]

Author: River Riddle
Date: 2021-01-14T11:58:21-08:00
New Revision: c8fb6ee34151b18bcc9ed1a6b8f502a0b40a414e

URL: 
https://github.com/llvm/llvm-project/commit/c8fb6ee34151b18bcc9ed1a6b8f502a0b40a414e
DIFF: 
https://github.com/llvm/llvm-project/commit/c8fb6ee34151b18bcc9ed1a6b8f502a0b40a414e.diff

LOG: [mlir][PatternRewriter] Add a new hook to selectively replace uses of an 
operation

This revision adds a new `replaceOpWithIf` hook that replaces uses of an 
operation that satisfy a given functor. If all uses are replaced, the operation 
gets erased in a similar manner to `replaceOp`. DialectConversion support will 
be added in a followup as this requires adjusting how replacements are tracked 
there.

Differential Revision: https://reviews.llvm.org/D94632

Added: 
mlir/test/Transforms/test-pattern-selective-replacement.mlir

Modified: 
mlir/include/mlir/IR/PatternMatch.h
mlir/include/mlir/Transforms/DialectConversion.h
mlir/lib/IR/PatternMatch.cpp
mlir/lib/Transforms/Utils/DialectConversion.cpp
mlir/test/lib/Dialect/Test/TestPatterns.cpp

Removed: 




diff  --git a/mlir/include/mlir/IR/PatternMatch.h 
b/mlir/include/mlir/IR/PatternMatch.h
index d97b328cdc01..1a306e6ba58c 100644
--- a/mlir/include/mlir/IR/PatternMatch.h
+++ b/mlir/include/mlir/IR/PatternMatch.h
@@ -11,6 +11,7 @@
 
 #include "mlir/IR/Builders.h"
 #include "mlir/IR/BuiltinOps.h"
+#include "llvm/ADT/FunctionExtras.h"
 
 namespace mlir {
 
@@ -447,6 +448,30 @@ class PatternRewriter : public OpBuilder, public 
OpBuilder::Listener {
  Region::iterator before);
   void cloneRegionBefore(Region ®ion, Block *before);
 
+  /// This method replaces the uses of the results of `op` with the values in
+  /// `newValues` when the provided `functor` returns true for a specific use.
+  /// The number of values in `newValues` is required to match the number of
+  /// results of `op`. `allUsesReplaced`, if non-null, is set to true if all of
+  /// the uses of `op` were replaced. Note that in some pattern rewriters, the
+  /// given 'functor' may be stored beyond the lifetime of the pattern being
+  /// applied. As such, the function should not capture by reference and 
instead
+  /// use value capture as necessary.
+  virtual void
+  replaceOpWithIf(Operation *op, ValueRange newValues, bool *allUsesReplaced,
+  llvm::unique_function functor);
+  void replaceOpWithIf(Operation *op, ValueRange newValues,
+   llvm::unique_function functor) 
{
+replaceOpWithIf(op, newValues, /*allUsesReplaced=*/nullptr,
+std::move(functor));
+  }
+
+  /// This method replaces the uses of the results of `op` with the values in
+  /// `newValues` when a use is nested within the given `block`. The number of
+  /// values in `newValues` is required to match the number of results of `op`.
+  /// If all uses of this operation are replaced, the operation is erased.
+  void replaceOpWithinBlock(Operation *op, ValueRange newValues, Block *block,
+bool *allUsesReplaced = nullptr);
+
   /// This method performs the final replacement for a pattern, where the
   /// results of the operation are updated to use the specified list of SSA
   /// values.

diff  --git a/mlir/include/mlir/Transforms/DialectConversion.h 
b/mlir/include/mlir/Transforms/DialectConversion.h
index 51c7788ffb14..ca28c175fbdd 100644
--- a/mlir/include/mlir/Transforms/DialectConversion.h
+++ b/mlir/include/mlir/Transforms/DialectConversion.h
@@ -470,6 +470,12 @@ class ConversionPatternRewriter final : public 
PatternRewriter {
   // PatternRewriter Hooks
   
//======//
 
+  /// PatternRewriter hook for replacing the results of an operation when the
+  /// given functor returns true.
+  void replaceOpWithIf(
+  Operation *op, ValueRange newValues, bool *allUsesReplaced,
+  llvm::unique_function functor) override;
+
   /// PatternRewriter hook for replacing the results of an operation.
   void replaceOp(Operation *op, ValueRange newValues) override;
   using PatternRewriter::replaceOp;

diff  --git a/mlir/lib/IR/PatternMatch.cpp b/mlir/lib/IR/PatternMatch.cpp
index 6558fcf4606d..44f22ceeb3cf 100644
--- a/mlir/lib/IR/PatternMatch.cpp
+++ b/mlir/lib/IR/PatternMatch.cpp
@@ -155,6 +155,41 @@ PatternRewriter::~PatternRewriter() {
   // Out of line to provide a vtable anchor for the class.
 }
 
+/// This method replaces the uses of the results of `op` with the values in
+/// `newValues` when the provided `functor` returns true for a specific use.
+/// The number of values in `newValues` is required to match the number of
+/// results of `op`.
+void PatternRewriter::replaceOpWithIf(
+Operation *op, ValueRange newValues, bool *allUsesReplaced,
+llvm::unique_function functor) {
+  assert(op->getNumResults() == newValues.size() &&
+   

[llvm-branch-commits] [mlir] 5cf2696 - [mlir] Remove TosaToLinalg dependency on all Passes

[Tres Popp via llvm-branch-commits]

Author: Tres Popp
Date: 2021-01-14T21:08:32+01:00
New Revision: 5cf2696317afb0631a4a09414ae40a4e226a905e

URL: 
https://github.com/llvm/llvm-project/commit/5cf2696317afb0631a4a09414ae40a4e226a905e
DIFF: 
https://github.com/llvm/llvm-project/commit/5cf2696317afb0631a4a09414ae40a4e226a905e.diff

LOG: [mlir] Remove TosaToLinalg dependency on all Passes

TosaToLinalg was depending on its header file indirectly through
Passes.h rather than directly. This removes that indirection.

Differential Revision: https://reviews.llvm.org/D94706

Added: 


Modified: 
mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp

Removed: 




diff  --git a/mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp 
b/mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
index 98fd534a0bb6..6ad5a256f98a 100644
--- a/mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
+++ b/mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
@@ -10,7 +10,7 @@
 //
 
//===--===//
 
-#include "mlir/Conversion/Passes.h"
+#include "mlir/Conversion/TosaToLinalg/TosaToLinalg.h"
 #include "mlir/Dialect/Linalg/IR/LinalgOps.h"
 #include "mlir/Dialect/StandardOps/IR/Ops.h"
 #include "mlir/Dialect/Tosa/IR/TosaOps.h"



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[llvm-branch-commits] [clang] a71877e - [clang] Do not crash when CXXRecordDecl has a non-CXXRecordDecl base.

[Adam Czachorowski via llvm-branch-commits]

Author: Adam Czachorowski
Date: 2021-01-14T21:20:06+01:00
New Revision: a71877edfbb7094584f6d20d93f6091e7d374024

URL: 
https://github.com/llvm/llvm-project/commit/a71877edfbb7094584f6d20d93f6091e7d374024
DIFF: 
https://github.com/llvm/llvm-project/commit/a71877edfbb7094584f6d20d93f6091e7d374024.diff

LOG: [clang] Do not crash when CXXRecordDecl has a non-CXXRecordDecl base.

This can happen on some invalid code, like the included test case.

Differential Revision: https://reviews.llvm.org/D94704

Added: 


Modified: 
clang/lib/Sema/SemaDeclCXX.cpp
clang/test/SemaTemplate/temp_class_spec.cpp

Removed: 




diff  --git a/clang/lib/Sema/SemaDeclCXX.cpp b/clang/lib/Sema/SemaDeclCXX.cpp
index 27679ac6f8d3..8bfaa46162bc 100644
--- a/clang/lib/Sema/SemaDeclCXX.cpp
+++ b/clang/lib/Sema/SemaDeclCXX.cpp
@@ -5520,8 +5520,9 @@ 
Sema::MarkBaseAndMemberDestructorsReferenced(SourceLocation Location,
 
   // Bases.
   for (const auto &Base : ClassDecl->bases()) {
-// Bases are always records in a well-formed non-dependent class.
 const RecordType *RT = Base.getType()->getAs();
+if (!RT)
+  continue;
 
 // Remember direct virtual bases.
 if (Base.isVirtual()) {

diff  --git a/clang/test/SemaTemplate/temp_class_spec.cpp 
b/clang/test/SemaTemplate/temp_class_spec.cpp
index 8a07fd7292c2..f92c52e9624e 100644
--- a/clang/test/SemaTemplate/temp_class_spec.cpp
+++ b/clang/test/SemaTemplate/temp_class_spec.cpp
@@ -361,3 +361,17 @@ namespace PR6181 {
   };
   
 }
+
+// Check that we do not crash on invalid code that leads to invalid base.
+namespace {
+template 
+class Foo {};
+
+template 
+class Bar;
+
+template 
+class Bar<0> : public Foo { // expected-error{{partial specialization of 
'Bar' does not use any of its template parameters}}
+  Bar() : Foo() {}
+};
+} // namespace



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[llvm-branch-commits] [mlir] e2d7d3c - [mlir][docs] Bring bufferization docs up to date.

[Sean Silva via llvm-branch-commits]

Author: Sean Silva
Date: 2021-01-14T12:28:35-08:00
New Revision: e2d7d3cb0eade079690c3938f694c8f7ef2b686b

URL: 
https://github.com/llvm/llvm-project/commit/e2d7d3cb0eade079690c3938f694c8f7ef2b686b
DIFF: 
https://github.com/llvm/llvm-project/commit/e2d7d3cb0eade079690c3938f694c8f7ef2b686b.diff

LOG: [mlir][docs] Bring bufferization docs up to date.

This spilts out BufferDeallocationInternals.md, since buffer
deallocation is not part of bufferization per se.

Differential Revision: https://reviews.llvm.org/D94351

Added: 
mlir/docs/BufferDeallocationInternals.md

Modified: 
mlir/docs/Bufferization.md

Removed: 




diff  --git a/mlir/docs/BufferDeallocationInternals.md 
b/mlir/docs/BufferDeallocationInternals.md
new file mode 100644
index ..acc775fd9f30
--- /dev/null
+++ b/mlir/docs/BufferDeallocationInternals.md
@@ -0,0 +1,786 @@
+# Buffer Deallocation - Internals
+
+This section covers the internal functionality of the BufferDeallocation
+transformation. The transformation consists of several passes. The main pass
+called BufferDeallocation can be applied via “-buffer-deallocation” on MLIR
+programs.
+
+## Requirements
+
+In order to use BufferDeallocation on an arbitrary dialect, several
+control-flow interfaces have to be implemented when using custom operations.
+This is particularly important to understand the implicit control-flow
+dependencies between 
diff erent parts of the input program. Without implementing
+the following interfaces, control-flow relations cannot be discovered properly
+and the resulting program can become invalid:
+
+* Branch-like terminators should implement the `BranchOpInterface` to query and
+manipulate associated operands.
+* Operations involving structured control flow have to implement the
+`RegionBranchOpInterface` to model inter-region control flow.
+* Terminators yielding values to their parent operation (in particular in the
+scope of nested regions within `RegionBranchOpInterface`-based operations),
+should implement the `ReturnLike` trait to represent logical “value returns”.
+
+Example dialects that are fully compatible are the “std” and “scf” dialects
+with respect to all implemented interfaces.
+
+## Detection of Buffer Allocations
+
+The first step of the BufferDeallocation transformation is to identify
+manageable allocation operations that implement the `SideEffects` interface.
+Furthermore, these ops need to apply the effect `MemoryEffects::Allocate` to a
+particular result value while not using the resource
+`SideEffects::AutomaticAllocationScopeResource` (since it is currently reserved
+for allocations, like `Alloca` that will be automatically deallocated by a
+parent scope). Allocations that have not been detected in this phase will not
+be tracked internally, and thus, not deallocated automatically. However,
+BufferDeallocation is fully compatible with “hybrid” setups in which tracked
+and untracked allocations are mixed:
+
+```mlir
+func @mixedAllocation(%arg0: i1) {
+   %0 = alloca() : memref<2xf32>  // aliases: %2
+   %1 = alloc() : memref<2xf32>  // aliases: %2
+   cond_br %arg0, ^bb1, ^bb2
+^bb1:
+  use(%0)
+  br ^bb3(%0 : memref<2xf32>)
+^bb2:
+  use(%1)
+  br ^bb3(%1 : memref<2xf32>)
+^bb3(%2: memref<2xf32>):
+  ...
+}
+```
+
+Example of using a conditional branch with alloc and alloca. BufferDeallocation
+can detect and handle the 
diff erent allocation types that might be intermixed.
+
+Note: the current version does not support allocation operations returning
+multiple result buffers.
+
+## Conversion from AllocOp to AllocaOp
+
+The PromoteBuffersToStack-pass converts AllocOps to AllocaOps, if possible. In
+some cases, it can be useful to use such stack-based buffers instead of
+heap-based buffers. The conversion is restricted to several constraints like:
+
+* Control flow
+* Buffer Size
+* Dynamic Size
+
+If a buffer is leaving a block, we are not allowed to convert it into an
+alloca. If the size of the buffer is large, we could convert it, but regarding
+stack overflow, it makes sense to limit the size of these buffers and only
+convert small ones. The size can be set via a pass option. The current default
+value is 1KB. Furthermore, we can not convert buffers with dynamic size, since
+the dimension is not known a priori.
+
+## Movement and Placement of Allocations
+
+Using the buffer hoisting pass, all buffer allocations are moved as far upwards
+as possible in order to group them and make upcoming optimizations easier by
+limiting the search space. Such a movement is shown in the following graphs.
+In addition, we are able to statically free an alloc, if we move it into a
+dominator of all of its uses. This simplifies further optimizations (e.g.
+buffer fusion) in the future. However, movement of allocations is limited by
+external data dependencies (in particular in the case of allocations of
+dynamically shaped types). Furthermore, a

[llvm-branch-commits] [llvm] 0f588ac - [PowerPC] Only use some extend mne if assembler is modern enough

[Jinsong Ji via llvm-branch-commits]

Author: Jinsong Ji
Date: 2021-01-14T20:36:10Z
New Revision: 0f588ac03e15a204b68f0214dda2b9f67410ff62

URL: 
https://github.com/llvm/llvm-project/commit/0f588ac03e15a204b68f0214dda2b9f67410ff62
DIFF: 
https://github.com/llvm/llvm-project/commit/0f588ac03e15a204b68f0214dda2b9f67410ff62.diff

LOG: [PowerPC] Only use some extend mne if assembler is modern enough

Legacy AIX assembly might not support all extended mnes,
add one feature bit to control the generation in MC,
and avoid generating them by default on AIX.

Reviewed By: sfertile

Differential Revision: https://reviews.llvm.org/D94458

Added: 
llvm/test/MC/PowerPC/modern-aix-as.s

Modified: 
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
llvm/lib/Target/PowerPC/PPC.td
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/lib/Target/PowerPC/PPCSubtarget.h
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt

Removed: 




diff  --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp 
b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
index 7629fe565bfd..bf9c6feb541e 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
@@ -78,7 +78,17 @@ static MCRegisterInfo *createPPCMCRegisterInfo(const Triple 
&TT) {
 
 static MCSubtargetInfo *createPPCMCSubtargetInfo(const Triple &TT,
  StringRef CPU, StringRef FS) {
-  return createPPCMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
+  // Set some default feature to MC layer.
+  std::string FullFS = std::string(FS);
+
+  if (TT.isOSAIX()) {
+if (!FullFS.empty())
+  FullFS = "+aix," + FullFS;
+else
+  FullFS = "+aix";
+  }
+
+  return createPPCMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FullFS);
 }
 
 static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI,

diff  --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td
index f60adecf65ee..1e6ded231585 100644
--- a/llvm/lib/Target/PowerPC/PPC.td
+++ b/llvm/lib/Target/PowerPC/PPC.td
@@ -57,6 +57,10 @@ def DirectivePwrFuture
 
 def Feature64Bit : SubtargetFeature<"64bit","Has64BitSupport", "true",
 "Enable 64-bit instructions">;
+def AIXOS: SubtargetFeature<"aix", "IsAIX", "true", "AIX OS">;
+def FeatureModernAIXAs
+: SubtargetFeature<"modern-aix-as", "HasModernAIXAs", "true",
+   "AIX system assembler is modern enough to support new 
mnes">;
 def FeatureHardFloat : SubtargetFeature<"hard-float", "HasHardFloat", "true",
   "Enable floating-point instructions">;
 def Feature64BitRegs : SubtargetFeature<"64bitregs","Use64BitRegs", "true",

diff  --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td 
b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
index e19ea6a07a0d..03e9d6970a30 100644
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -987,8 +987,11 @@ def : InstAlias<"cntlzw. $rA, $rS", (CNTLZW8_rec g8rc:$rA, 
g8rc:$rS)>;
 def : InstAlias<"mtxer $Rx", (MTSPR8 1, g8rc:$Rx)>;
 def : InstAlias<"mfxer $Rx", (MFSPR8 g8rc:$Rx, 1)>;
 
-def : InstAlias<"mtudscr $Rx", (MTSPR8 3, g8rc:$Rx)>;
-def : InstAlias<"mfudscr $Rx", (MFSPR8 g8rc:$Rx, 3)>;
+//Disable this alias on AIX for now because as does not support them.
+let Predicates = [ModernAs] in {
+  def : InstAlias<"mtudscr $Rx", (MTSPR8 3, g8rc:$Rx)>;
+  def : InstAlias<"mfudscr $Rx", (MFSPR8 g8rc:$Rx, 3)>;
+}
 
 def : InstAlias<"mfrtcu $Rx", (MFSPR8 g8rc:$Rx, 4)>;
 def : InstAlias<"mfrtcl $Rx", (MFSPR8 g8rc:$Rx, 5)>;

diff  --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td 
b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index 018fb8ffe16c..724af23542d7 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -1120,6 +1120,10 @@ def HasFPU : Predicate<"Subtarget->hasFPU()">;
 def PCRelativeMemops : Predicate<"Subtarget->hasPCRelativeMemops()">;
 def IsNotISA3_1 : Predicate<"!Subtarget->isISA3_1()">;
 
+// AIX assembler may not be modern enough to support some extended mne.
+def ModernAs: Predicate<"!Subtarget->isAIXABI() || 
Subtarget->HasModernAIXAs">, 
+ AssemblerPredicate<(any_of (not AIXOS), FeatureModernAIXAs)>;
+
 
//===--===//
 // PowerPC Multiclass Definitions.
 
@@ -4649,8 +4653,11 @@ def : InstAlias<"mtmsr $RS", (MTMSR gprc:$RS, 0)>;
 def : InstAlias<"mtxer $Rx", (MTSPR 1, gprc:$Rx)>;
 def : InstAlias<"mfxer $Rx", (MFSPR gprc:$Rx, 1)>;
 
+//Disable this alias on AIX for now because as does not support them.
+let Predicates = [ModernAs] in {
 def : InstAlias<"mtudscr $Rx", (MTSPR 3, gprc:$Rx)>;
 def : InstAlias<"mfudscr $Rx", (MFSPR gp

[llvm-branch-commits] [llvm] 0975604 - [gn build] (manually) port 387d3c24792f

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2021-01-14T16:19:25-05:00
New Revision: 0975604cc013b51ef2435199bd74a6d635b11150

URL: 
https://github.com/llvm/llvm-project/commit/0975604cc013b51ef2435199bd74a6d635b11150
DIFF: 
https://github.com/llvm/llvm-project/commit/0975604cc013b51ef2435199bd74a6d635b11150.diff

LOG: [gn build] (manually) port 387d3c24792f

Added: 


Modified: 
llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn
llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn
llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn

Removed: 
llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn



diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn 
b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn
index 5469696c0de3..55f10cd5c82b 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn
@@ -18,7 +18,6 @@ static_library("AsmParser") {
 "//llvm/lib/Support",
 "//llvm/lib/Target/RISCV:RISCVGenCompressInstEmitter",
 "//llvm/lib/Target/RISCV/MCTargetDesc",
-"//llvm/lib/Target/RISCV/Utils",
   ]
   include_dirs = [ ".." ]
   sources = [ "RISCVAsmParser.cpp" ]

diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn 
b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
index c63ab84d9baf..366623cb0fad 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
@@ -50,7 +50,6 @@ static_library("LLVMRISCVCodeGen") {
 "AsmParser:RISCVGenAsmMatcher",
 "MCTargetDesc",
 "TargetInfo",
-"Utils",
 "//llvm/include/llvm/Config:llvm-config",
 "//llvm/lib/CodeGen",
 "//llvm/lib/CodeGen/AsmPrinter",
@@ -97,6 +96,5 @@ group("RISCV") {
 "Disassembler",
 "MCTargetDesc",
 "TargetInfo",
-"Utils",
   ]
 }

diff  --git 
a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn 
b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn
index 09a5a367164a..cb579221fd36 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn
@@ -13,7 +13,6 @@ static_library("Disassembler") {
 "//llvm/lib/MC/MCDisassembler",
 "//llvm/lib/Support",
 "//llvm/lib/Target/RISCV/MCTargetDesc",
-"//llvm/lib/Target/RISCV/Utils",
   ]
   include_dirs = [ ".." ]
   sources = [ "RISCVDisassembler.cpp" ]

diff  --git 
a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn 
b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn
index f6326a596920..47d526840fe0 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn
@@ -24,6 +24,12 @@ tablegen("RISCVGenRegisterInfo") {
   td_file = "../RISCV.td"
 }
 
+tablegen("RISCVGenSearchableTables") {
+  visibility = [ ":tablegen" ]
+  args = [ "-gen-searchable-tables" ]
+  td_file = "../RISCV.td"
+}
+
 tablegen("RISCVGenSubtargetInfo") {
   visibility = [ ":tablegen" ]
   args = [ "-gen-subtarget" ]
@@ -36,11 +42,11 @@ tablegen("RISCVGenSubtargetInfo") {
 group("tablegen") {
   visibility = [
 ":MCTargetDesc",
-"../Utils",
   ]
   public_deps = [
 ":RISCVGenInstrInfo",
 ":RISCVGenRegisterInfo",
+":RISCVGenSearchableTables",
 ":RISCVGenSubtargetInfo",
   ]
 }
@@ -54,11 +60,11 @@ static_library("MCTargetDesc") {
 "//llvm/lib/MC",
 "//llvm/lib/Support",
 "//llvm/lib/Target/RISCV:RISCVGenCompressInstEmitter",
-"//llvm/lib/Target/RISCV/Utils",
   ]
   include_dirs = [ ".." ]
   sources = [
 "RISCVAsmBackend.cpp",
+"RISCVBaseInfo.cpp",
 "RISCVELFObjectWriter.cpp",
 "RISCVELFStreamer.cpp",
 "RISCVInstPrinter.cpp",
@@ -66,6 +72,7 @@ static_library("MCTargetDesc") {
 "RISCVMCCodeEmitter.cpp",
 "RISCVMCExpr.cpp",
 "RISCVMCTargetDesc.cpp",
+"RISCVMatInt.cpp",
 "RISCVTargetStreamer.cpp",
   ]
 }

diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn 
b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn
deleted file mode 100644
index 5bce835f1dd2..
--- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn
+++ /dev/null
@@ -1,27 +0,0 @@
-import("//llvm/utils/TableGen/tablegen.gni")
-
-# Generates RISCVGenSearchableTables.inc
-tablegen("RISCVGenSearchableTables") {
-  visibility = [ ":Utils" ]
-  args = [ "-gen-searchable-tables" ]
-  td_file = "../RISCV.td"
-}
-
-static_library("Utils") {
-  output_name = "LLVMRISCVUtils"
-  public_deps = [ ":RISCVGenSearchableTables" ]
-  deps = [
-"//llvm/lib/MC",
-"//llvm/lib/Support",
-
-# MCTargetDesc depends on Utils, so we can't de

[llvm-branch-commits] [libc] e722806 - [libc] Use #undef isascii in specific header

[Roland McGrath via llvm-branch-commits]

Author: Roland McGrath
Date: 2021-01-14T13:25:05-08:00
New Revision: e7228062b2bb87abf762abcb77668452a1ed35d4

URL: 
https://github.com/llvm/llvm-project/commit/e7228062b2bb87abf762abcb77668452a1ed35d4
DIFF: 
https://github.com/llvm/llvm-project/commit/e7228062b2bb87abf762abcb77668452a1ed35d4.diff

LOG: [libc] Use #undef isascii in specific header

Standard C allows all standard headers to declare macros for all
their functions.  So after possibly including any standard header
like , it's perfectly normal for any and all of the
functions it declares to be defined as macros.  Standard C requires
explicit `#undef` before using that identifier in a way that is not
compatible with function-like macro definitions.

The C standard's rules for this are extended to POSIX as well for
the interfaces it defines, and it's the expected norm for
nonstandard extensions declared by standard C library headers too.

So far the only place this has come up for llvm-libc's code is with
the isascii function in Fuchsia's libc.  But other cases can arise
for any standard (or common extension) function names that source
code in llvm-libc is using in nonstandard ways, i.e. as C++
identifiers.

The only correct and robust way to handle the possible inclusion of
standard C library headers when building llvm-libc source code is to
use `#undef` explicitly for each identifier before using it.  The
easy and obvious place to do that is in the per-function header.
This requires that all code, such as test code, that might include
any standard C library headers, e.g. via utils/UnitTest/Test.h, make
sure to include those *first* before the per-function header.

This change does that for isascii and its test.  But it should be
done uniformly for all the code and documented as a consistent
convention so new implementation files are sure to get this right.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D94642

Added: 


Modified: 
libc/src/ctype/isascii.h
libc/test/src/ctype/isascii_test.cpp
libc/utils/UnitTest/FuchsiaTest.h

Removed: 




diff  --git a/libc/src/ctype/isascii.h b/libc/src/ctype/isascii.h
index 8ec304489b37..7e31b3c6ca4d 100644
--- a/libc/src/ctype/isascii.h
+++ b/libc/src/ctype/isascii.h
@@ -9,6 +9,8 @@
 #ifndef LLVM_LIBC_SRC_CTYPE_ISASCII_H
 #define LLVM_LIBC_SRC_CTYPE_ISASCII_H
 
+#undef isascii
+
 namespace __llvm_libc {
 
 int isascii(int c);

diff  --git a/libc/test/src/ctype/isascii_test.cpp 
b/libc/test/src/ctype/isascii_test.cpp
index b5f66d7aef57..e0a15a0a5a29 100644
--- a/libc/test/src/ctype/isascii_test.cpp
+++ b/libc/test/src/ctype/isascii_test.cpp
@@ -6,10 +6,10 @@
 //
 
//===--===//
 
-#include "src/ctype/isascii.h"
-
 #include "utils/UnitTest/Test.h"
 
+#include "src/ctype/isascii.h"
+
 TEST(IsAscii, DefaultLocale) {
   // Loops through all characters, verifying that ascii characters
   //(which are all 7 bit unsigned integers)

diff  --git a/libc/utils/UnitTest/FuchsiaTest.h 
b/libc/utils/UnitTest/FuchsiaTest.h
index 0a19a986fb5a..b7b5b48538b8 100644
--- a/libc/utils/UnitTest/FuchsiaTest.h
+++ b/libc/utils/UnitTest/FuchsiaTest.h
@@ -10,11 +10,5 @@
 #define LLVM_LIBC_UTILS_UNITTEST_FUCHSIATEST_H
 
 #include 
-// isascii is being undef'd because Fuchsia's headers define a macro for
-// isascii. that macro causes errors when isascii_test.cpp references
-// __llvm_libc::isascii since the macro is applied first.
-#ifdef isascii
-#undef isascii
-#endif
 
 #endif // LLVM_LIBC_UTILS_UNITTEST_FUCHSIATEST_H



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[llvm-branch-commits] [clang-tools-extra] f85b153 - Add -fexceptions to test as it uses them and fails on platforms where it is not on by default (like the PS4).

[Douglas Yung via llvm-branch-commits]

Author: Douglas Yung
Date: 2021-01-14T13:27:06-08:00
New Revision: f85b1531666d12e6ca9b29217b5c5da30dfd93cf

URL: 
https://github.com/llvm/llvm-project/commit/f85b1531666d12e6ca9b29217b5c5da30dfd93cf
DIFF: 
https://github.com/llvm/llvm-project/commit/f85b1531666d12e6ca9b29217b5c5da30dfd93cf.diff

LOG: Add -fexceptions to test as it uses them and fails on platforms where it 
is not on by default (like the PS4).

Added: 


Modified: 

clang-tools-extra/test/clang-tidy/checkers/readability-function-cognitive-complexity.cpp

Removed: 




diff  --git 
a/clang-tools-extra/test/clang-tidy/checkers/readability-function-cognitive-complexity.cpp
 
b/clang-tools-extra/test/clang-tidy/checkers/readability-function-cognitive-complexity.cpp
index 0916acd8e675..79bc0c3dc4de 100644
--- 
a/clang-tools-extra/test/clang-tidy/checkers/readability-function-cognitive-complexity.cpp
+++ 
b/clang-tools-extra/test/clang-tidy/checkers/readability-function-cognitive-complexity.cpp
@@ -1,4 +1,4 @@
-// RUN: %check_clang_tidy %s readability-function-cognitive-complexity %t -- 
-config='{CheckOptions: [{key: 
readability-function-cognitive-complexity.Threshold, value: 0}]}' -- -std=c++11 
-fblocks -w
+// RUN: %check_clang_tidy %s readability-function-cognitive-complexity %t -- 
-config='{CheckOptions: [{key: 
readability-function-cognitive-complexity.Threshold, value: 0}]}' -- -std=c++11 
-fblocks -fexceptions -w
 
 // any function should be checked.
 



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[llvm-branch-commits] [llvm] b894a9f - [RISCV] Optimize select_cc after fp compare expansion

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-14T13:41:40-08:00
New Revision: b894a9fb237345db64d14ce3881d3195e124df0d

URL: 
https://github.com/llvm/llvm-project/commit/b894a9fb237345db64d14ce3881d3195e124df0d
DIFF: 
https://github.com/llvm/llvm-project/commit/b894a9fb237345db64d14ce3881d3195e124df0d.diff

LOG: [RISCV] Optimize select_cc after fp compare expansion

Some FP compares expand to a sequence ending with (xor X, 1) to invert the 
result. If
the consumer is a select_cc we can likely get rid of this xor by fixing
up the select_cc condition.

This patch combines (select_cc (xor X, 1), 0, setne, trueV, falseV) -
(select_cc X, 0, seteq, trueV, falseV) if we can prove X is 0/1.

Reviewed By: lenary

Differential Revision: https://reviews.llvm.org/D94546

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/test/CodeGen/RISCV/double-select-fcmp.ll
llvm/test/CodeGen/RISCV/float-select-fcmp.ll
llvm/test/CodeGen/RISCV/half-select-fcmp.ll

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp 
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 74f936b13c23..9b034e594f63 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -1828,6 +1828,27 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,
 if (auto GORC = combineORToGORC(SDValue(N, 0), DCI.DAG, Subtarget))
   return GORC;
 break;
+  case RISCVISD::SELECT_CC: {
+// Transform
+// (select_cc (xor X, 1), 0, setne, trueV, falseV) ->
+// (select_cc X, 0, seteq, trueV, falseV) if we can prove X is 0/1.
+// This can occur when legalizing some floating point comparisons.
+SDValue LHS = N->getOperand(0);
+SDValue RHS = N->getOperand(1);
+auto CCVal = static_cast(N->getConstantOperandVal(2));
+APInt Mask = APInt::getBitsSetFrom(LHS.getValueSizeInBits(), 1);
+if ((CCVal == ISD::SETNE || CCVal == ISD::SETEQ) && isNullConstant(RHS) &&
+LHS.getOpcode() == ISD::XOR && isOneConstant(LHS.getOperand(1)) &&
+DAG.MaskedValueIsZero(LHS.getOperand(0), Mask)) {
+  SDLoc DL(N);
+  CCVal = ISD::getSetCCInverse(CCVal, LHS.getValueType());
+  SDValue TargetCC = DAG.getConstant(CCVal, DL, Subtarget.getXLenVT());
+  return DAG.getNode(RISCVISD::SELECT_CC, DL, N->getValueType(0),
+ {LHS.getOperand(0), RHS, TargetCC, N->getOperand(3),
+  N->getOperand(4)});
+}
+break;
+  }
   }
 
   return SDValue();

diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h 
b/llvm/lib/Target/RISCV/RISCVISelLowering.h
index d7de7e4016b3..081d62a33ef0 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.h
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h
@@ -28,6 +28,12 @@ enum NodeType : unsigned {
   SRET_FLAG,
   MRET_FLAG,
   CALL,
+  /// Select with condition operator - This selects between a true value and
+  /// a false value (ops #3 and #4) based on the boolean result of comparing
+  /// the lhs and rhs (ops #0 and #1) of a conditional expression with the
+  /// condition code in op #2, a XLenVT constant from the ISD::CondCode enum.
+  /// The lhs and rhs are XLenVT integers. The true and false values can be
+  /// integer or floating point.
   SELECT_CC,
   BuildPairF64,
   SplitF64,

diff  --git a/llvm/test/CodeGen/RISCV/double-select-fcmp.ll 
b/llvm/test/CodeGen/RISCV/double-select-fcmp.ll
index 0481ca9ba90e..aa59ef06c587 100644
--- a/llvm/test/CodeGen/RISCV/double-select-fcmp.ll
+++ b/llvm/test/CodeGen/RISCV/double-select-fcmp.ll
@@ -300,8 +300,7 @@ define double @select_fcmp_ueq(double %a, double %b) 
nounwind {
 ; RV32IFD-NEXT:flt.d a0, ft1, ft0
 ; RV32IFD-NEXT:flt.d a1, ft0, ft1
 ; RV32IFD-NEXT:or a0, a1, a0
-; RV32IFD-NEXT:xori a0, a0, 1
-; RV32IFD-NEXT:bnez a0, .LBB8_2
+; RV32IFD-NEXT:beqz a0, .LBB8_2
 ; RV32IFD-NEXT:  # %bb.1:
 ; RV32IFD-NEXT:fmv.d ft1, ft0
 ; RV32IFD-NEXT:  .LBB8_2:
@@ -318,8 +317,7 @@ define double @select_fcmp_ueq(double %a, double %b) 
nounwind {
 ; RV64IFD-NEXT:flt.d a0, ft0, ft1
 ; RV64IFD-NEXT:flt.d a1, ft1, ft0
 ; RV64IFD-NEXT:or a0, a1, a0
-; RV64IFD-NEXT:xori a0, a0, 1
-; RV64IFD-NEXT:bnez a0, .LBB8_2
+; RV64IFD-NEXT:beqz a0, .LBB8_2
 ; RV64IFD-NEXT:  # %bb.1:
 ; RV64IFD-NEXT:fmv.d ft0, ft1
 ; RV64IFD-NEXT:  .LBB8_2:
@@ -341,8 +339,7 @@ define double @select_fcmp_ugt(double %a, double %b) 
nounwind {
 ; RV32IFD-NEXT:sw a1, 12(sp)
 ; RV32IFD-NEXT:fld ft1, 8(sp)
 ; RV32IFD-NEXT:fle.d a0, ft1, ft0
-; RV32IFD-NEXT:xori a0, a0, 1
-; RV32IFD-NEXT:bnez a0, .LBB9_2
+; RV32IFD-NEXT:beqz a0, .LBB9_2
 ; RV32IFD-NEXT:  # %bb.1:
 ; RV32IFD-NEXT:fmv.d ft1, ft0
 ; RV32IFD-NEXT:  .LBB9_2:
@@ -357,8 +354,7 @@ define double @select_fcmp_ugt(double %a, double %b) 
nounwind {
 ; RV64IFD-NEXT:fmv.d.x ft1, a1
 ; RV64IFD-NEXT:  

[llvm-branch-commits] [llvm] 4fcb255 - Re-land [Support] On Windows, take the affinity mask into account

[Alexandre Ganea via llvm-branch-commits]

Author: Alexandre Ganea
Date: 2021-01-14T17:03:22-05:00
New Revision: 4fcb25583c3ccbe10c4367d02086269e5fa0bb87

URL: 
https://github.com/llvm/llvm-project/commit/4fcb25583c3ccbe10c4367d02086269e5fa0bb87
DIFF: 
https://github.com/llvm/llvm-project/commit/4fcb25583c3ccbe10c4367d02086269e5fa0bb87.diff

LOG: Re-land [Support] On Windows, take the affinity mask into account

The number of hardware threads available to a ThreadPool can be limited if 
setting an affinity mask.
For example:

> start /B /AFFINITY 0xF lld-link.exe ...

Would let LLD only use 4 hyper-threads.

Previously, there was an outstanding issue on Windows Server 2019 on dual-CPU 
machines, which was preventing from using both CPU sockets. In normal 
conditions, when no affinity mask was set, ProcessorGroup::AllThreads was 
different from ProcessorGroup::UsableThreads. The previous code in 
llvm/lib/Support/Windows/Threading.inc L201 was improperly assuming those two 
values to be equal, and consequently was limiting the execution to only one CPU 
socket.

Differential Revision: https://reviews.llvm.org/D92419

Added: 


Modified: 
llvm/include/llvm/Support/Program.h
llvm/lib/Support/Program.cpp
llvm/lib/Support/Unix/Program.inc
llvm/lib/Support/Windows/Program.inc
llvm/lib/Support/Windows/Threading.inc
llvm/unittests/Support/ThreadPool.cpp

Removed: 




diff  --git a/llvm/include/llvm/Support/Program.h 
b/llvm/include/llvm/Support/Program.h
index b32de47adb57..bfd271958788 100644
--- a/llvm/include/llvm/Support/Program.h
+++ b/llvm/include/llvm/Support/Program.h
@@ -14,6 +14,7 @@
 #define LLVM_SUPPORT_PROGRAM_H
 
 #include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/Optional.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Config/llvm-config.h"
@@ -125,9 +126,11 @@ namespace sys {
   ///< string is non-empty upon return an error occurred while invoking the
   ///< program.
   bool *ExecutionFailed = nullptr,
-  Optional *ProcStat = nullptr ///< If non-zero, 
provides
-  /// a pointer to a structure in which process execution statistics will 
be
-  /// stored.
+  Optional *ProcStat = nullptr, ///< If non-zero,
+  /// provides a pointer to a structure in which process execution
+  /// statistics will be stored.
+  BitVector *AffinityMask = nullptr ///< CPUs or processors the new
+/// program shall run on.
   );
 
   /// Similar to ExecuteAndWait, but returns immediately.
@@ -140,7 +143,8 @@ namespace sys {
 ArrayRef> Redirects = {},
 unsigned MemoryLimit = 0,
 std::string *ErrMsg = nullptr,
-bool *ExecutionFailed = nullptr);
+bool *ExecutionFailed = nullptr,
+BitVector *AffinityMask = nullptr);
 
   /// Return true if the given arguments fit within system-specific
   /// argument length limits.

diff  --git a/llvm/lib/Support/Program.cpp b/llvm/lib/Support/Program.cpp
index 5294f65bd5a5..c7a59642b27e 100644
--- a/llvm/lib/Support/Program.cpp
+++ b/llvm/lib/Support/Program.cpp
@@ -26,17 +26,20 @@ using namespace sys;
 static bool Execute(ProcessInfo &PI, StringRef Program,
 ArrayRef Args, Optional> 
Env,
 ArrayRef> Redirects,
-unsigned MemoryLimit, std::string *ErrMsg);
+unsigned MemoryLimit, std::string *ErrMsg,
+BitVector *AffinityMask);
 
 int sys::ExecuteAndWait(StringRef Program, ArrayRef Args,
 Optional> Env,
 ArrayRef> Redirects,
 unsigned SecondsToWait, unsigned MemoryLimit,
 std::string *ErrMsg, bool *ExecutionFailed,
-Optional *ProcStat) {
+Optional *ProcStat,
+BitVector *AffinityMask) {
   assert(Redirects.empty() || Redirects.size() == 3);
   ProcessInfo PI;
-  if (Execute(PI, Program, Args, Env, Redirects, MemoryLimit, ErrMsg)) {
+  if (Execute(PI, Program, Args, Env, Redirects, MemoryLimit, ErrMsg,
+  AffinityMask)) {
 if (ExecutionFailed)
   *ExecutionFailed = false;
 ProcessInfo Result =
@@ -55,12 +58,13 @@ ProcessInfo sys::ExecuteNoWait(StringRef Program, 
ArrayRef Args,
Optional> Env,
ArrayRef> Redirects,
unsigned MemoryLimit, std::string *ErrMsg,
-   bool *ExecutionFailed) {
+   bool *ExecutionFailed, BitVector *AffinityMask) 
{
   assert(Redirects.empty() || Redirects.size() == 3);
   ProcessInfo PI;
   if (ExecutionFailed)
 *ExecutionFailed = false;
-  if (!Execute(PI, Program, Args, Env, Redi

[llvm-branch-commits] [lld] 5b42fd8 - [LTO] Test format fix (NFC)

[Teresa Johnson via llvm-branch-commits]

Author: Teresa Johnson
Date: 2021-01-14T14:09:50-08:00
New Revision: 5b42fd8dd4e7e29125a09a41a33af7c9cb57d144

URL: 
https://github.com/llvm/llvm-project/commit/5b42fd8dd4e7e29125a09a41a33af7c9cb57d144
DIFF: 
https://github.com/llvm/llvm-project/commit/5b42fd8dd4e7e29125a09a41a33af7c9cb57d144.diff

LOG: [LTO] Test format fix (NFC)

As requested in D91583, use ';;' instead of ';' to preceed comments in
lld test. I did this in the equivalent gold test as well.

Added: 


Modified: 
lld/test/ELF/lto/devirt_vcall_vis_public.ll
llvm/test/tools/gold/X86/devirt_vcall_vis_public.ll

Removed: 




diff  --git a/lld/test/ELF/lto/devirt_vcall_vis_public.ll 
b/lld/test/ELF/lto/devirt_vcall_vis_public.ll
index 46e23537d4fa..3a8219a64ce8 100644
--- a/lld/test/ELF/lto/devirt_vcall_vis_public.ll
+++ b/lld/test/ELF/lto/devirt_vcall_vis_public.ll
@@ -1,24 +1,24 @@
 ; REQUIRES: x86
-; Test that --lto-whole-program-visibility enables devirtualization.
+;; Test that --lto-whole-program-visibility enables devirtualization.
 
-; Note that the --export-dynamic used below is simply to ensure symbols are
-; retained during linking.
+;; Note that the --export-dynamic used below is simply to ensure symbols are
+;; retained during linking.
 
-; Index based WPD
-; Generate unsplit module with summary for ThinLTO index-based WPD.
+;; Index based WPD
+;; Generate unsplit module with summary for ThinLTO index-based WPD.
 ; RUN: opt --thinlto-bc -o %t2.o %s
 ; RUN: ld.lld %t2.o -o %t3 -save-temps --lto-whole-program-visibility \
 ; RUN:  -mllvm -pass-remarks=. --export-dynamic 2>&1 | FileCheck %s 
--check-prefix=REMARK
 ; RUN: llvm-dis %t2.o.4.opt.bc -o - | FileCheck %s --check-prefix=CHECK-IR
 
-; Hybrid WPD
-; Generate split module with summary for hybrid Thin/Regular LTO WPD.
+;; Hybrid WPD
+;; Generate split module with summary for hybrid Thin/Regular LTO WPD.
 ; RUN: opt --thinlto-bc --thinlto-split-lto-unit -o %t.o %s
 ; RUN: ld.lld %t.o -o %t3 -save-temps --lto-whole-program-visibility \
 ; RUN:  -mllvm -pass-remarks=. --export-dynamic 2>&1 | FileCheck %s 
--check-prefix=REMARK
 ; RUN: llvm-dis %t.o.4.opt.bc -o - | FileCheck %s --check-prefix=CHECK-IR
 
-; Regular LTO WPD
+;; Regular LTO WPD
 ; RUN: opt -o %t4.o %s
 ; RUN: ld.lld %t4.o -o %t3 -save-temps --lto-whole-program-visibility \
 ; RUN:  -mllvm -pass-remarks=. --export-dynamic 2>&1 | FileCheck %s 
--check-prefix=REMARK
@@ -27,24 +27,24 @@
 ; REMARK-DAG: single-impl: devirtualized a call to _ZN1A1nEi
 ; REMARK-DAG: single-impl: devirtualized a call to _ZN1D1mEi
 
-; Try everything again but without -whole-program-visibility to confirm
-; WPD fails
+;; Try everything again but without -whole-program-visibility to confirm
+;; WPD fails
 
-; Index based WPD
+;; Index based WPD
 ; RUN: ld.lld %t2.o -o %t3 -save-temps \
 ; RUN:  -mllvm -pass-remarks=. --export-dynamic 2>&1 | FileCheck %s 
--implicit-check-not single-impl --allow-empty
 ; RUN: llvm-dis %t2.o.4.opt.bc -o - | FileCheck %s 
--check-prefix=CHECK-NODEVIRT-IR
-; Ensure --no-lto-whole-program-visibility overrides explicit 
--lto-whole-program-visibility.
+;; Ensure --no-lto-whole-program-visibility overrides explicit 
--lto-whole-program-visibility.
 ; RUN: ld.lld %t2.o -o %t3 -save-temps --lto-whole-program-visibility 
--no-lto-whole-program-visibility \
 ; RUN:  -mllvm -pass-remarks=. --export-dynamic 2>&1 | FileCheck %s 
--implicit-check-not single-impl --allow-empty
 ; RUN: llvm-dis %t2.o.4.opt.bc -o - | FileCheck %s 
--check-prefix=CHECK-NODEVIRT-IR
 
-; Hybrid WPD
+;; Hybrid WPD
 ; RUN: ld.lld %t.o -o %t3 -save-temps \
 ; RUN:  -mllvm -pass-remarks=. --export-dynamic 2>&1 | FileCheck %s 
--implicit-check-not single-impl --allow-empty
 ; RUN: llvm-dis %t.o.4.opt.bc -o - | FileCheck %s 
--check-prefix=CHECK-NODEVIRT-IR
 
-; Regular LTO WPD
+;; Regular LTO WPD
 ; RUN: ld.lld %t4.o -o %t3 -save-temps \
 ; RUN:  -mllvm -pass-remarks=. --export-dynamic 2>&1 | FileCheck %s 
--implicit-check-not single-impl --allow-empty
 ; RUN: llvm-dis %t3.0.4.opt.bc -o - | FileCheck %s 
--check-prefix=CHECK-NODEVIRT-IR
@@ -74,7 +74,7 @@ entry:
   %2 = bitcast i8** %fptrptr to i32 (%struct.A*, i32)**
   %fptr1 = load i32 (%struct.A*, i32)*, i32 (%struct.A*, i32)** %2, align 8
 
-  ; Check that the call was devirtualized.
+  ;; Check that the call was devirtualized.
   ; CHECK-IR: %call = tail call i32 @_ZN1A1nEi
   ; CHECK-NODEVIRT-IR: %call = tail call i32 %fptr1
   %call = tail call i32 %fptr1(%struct.A* nonnull %obj, i32 %a)
@@ -82,7 +82,7 @@ entry:
   %3 = bitcast i8** %vtable to i32 (%struct.A*, i32)**
   %fptr22 = load i32 (%struct.A*, i32)*, i32 (%struct.A*, i32)** %3, align 8
 
-  ; We still have to call it as virtual.
+  ;; We still have to call it as virtual.
   ; CHECK-IR: %call3 = tail call i32 %fptr22
   ; CHECK-NODEVIRT-IR: %call3 = tail call i32 %fptr22
   %call3 = tail cal

[llvm-branch-commits] [llvm] 8a53a73 - [RISCV][NFC] Regenerate Calling Convention Tests

[Sam Elliott via llvm-branch-commits]

Author: Sam Elliott
Date: 2021-01-14T22:35:17Z
New Revision: 8a53a7375a86a5a89ba124de9e17aa5701544104

URL: 
https://github.com/llvm/llvm-project/commit/8a53a7375a86a5a89ba124de9e17aa5701544104
DIFF: 
https://github.com/llvm/llvm-project/commit/8a53a7375a86a5a89ba124de9e17aa5701544104.diff

LOG: [RISCV][NFC] Regenerate Calling Convention Tests

This regenerates these tests using utils/update_llc_test_checks.py so
that future changes in this area don't have the noise of lots of `@plt`
lines being added.

I also removed the `nounwind`s from the stack-realignment.ll test to
increase coverage on the generated call frame information.

Added: 


Modified: 
llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
llvm/test/CodeGen/RISCV/calling-conv-ilp32.ll
llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
llvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll
llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-common.ll
llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
llvm/test/CodeGen/RISCV/calling-conv-lp64.ll
llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll
llvm/test/CodeGen/RISCV/stack-realignment.ll
llvm/test/CodeGen/RISCV/vararg.ll

Removed: 




diff  --git a/llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll 
b/llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
index e213d1f3b594..d8d904ac85c6 100644
--- a/llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
+++ b/llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
@@ -629,7 +629,7 @@ define void @caller() nounwind {
 ; ILP32-NEXT:fsw ft0, 8(sp) # 4-byte Folded Spill
 ; ILP32-NEXT:flw ft0, 124(s1)
 ; ILP32-NEXT:fsw ft0, 4(sp) # 4-byte Folded Spill
-; ILP32-NEXT:call callee
+; ILP32-NEXT:call callee@plt
 ; ILP32-NEXT:flw ft0, 4(sp) # 4-byte Folded Reload
 ; ILP32-NEXT:fsw ft0, 124(s1)
 ; ILP32-NEXT:flw ft0, 8(sp) # 4-byte Folded Reload
@@ -772,7 +772,7 @@ define void @caller() nounwind {
 ; LP64-NEXT:fsw ft0, 12(sp) # 4-byte Folded Spill
 ; LP64-NEXT:flw ft0, 124(s1)
 ; LP64-NEXT:fsw ft0, 8(sp) # 4-byte Folded Spill
-; LP64-NEXT:call callee
+; LP64-NEXT:call callee@plt
 ; LP64-NEXT:flw ft0, 8(sp) # 4-byte Folded Reload
 ; LP64-NEXT:fsw ft0, 124(s1)
 ; LP64-NEXT:flw ft0, 12(sp) # 4-byte Folded Reload
@@ -915,7 +915,7 @@ define void @caller() nounwind {
 ; ILP32F-NEXT:flw fs5, 116(s1)
 ; ILP32F-NEXT:flw fs6, 120(s1)
 ; ILP32F-NEXT:flw fs7, 124(s1)
-; ILP32F-NEXT:call callee
+; ILP32F-NEXT:call callee@plt
 ; ILP32F-NEXT:fsw fs7, 124(s1)
 ; ILP32F-NEXT:fsw fs6, 120(s1)
 ; ILP32F-NEXT:fsw fs5, 116(s1)
@@ -1058,7 +1058,7 @@ define void @caller() nounwind {
 ; LP64F-NEXT:flw fs5, 116(s1)
 ; LP64F-NEXT:flw fs6, 120(s1)
 ; LP64F-NEXT:flw fs7, 124(s1)
-; LP64F-NEXT:call callee
+; LP64F-NEXT:call callee@plt
 ; LP64F-NEXT:fsw fs7, 124(s1)
 ; LP64F-NEXT:fsw fs6, 120(s1)
 ; LP64F-NEXT:fsw fs5, 116(s1)
@@ -1201,7 +1201,7 @@ define void @caller() nounwind {
 ; ILP32D-NEXT:flw fs5, 116(s1)
 ; ILP32D-NEXT:flw fs6, 120(s1)
 ; ILP32D-NEXT:flw fs7, 124(s1)
-; ILP32D-NEXT:call callee
+; ILP32D-NEXT:call callee@plt
 ; ILP32D-NEXT:fsw fs7, 124(s1)
 ; ILP32D-NEXT:fsw fs6, 120(s1)
 ; ILP32D-NEXT:fsw fs5, 116(s1)
@@ -1344,7 +1344,7 @@ define void @caller() nounwind {
 ; LP64D-NEXT:flw fs5, 116(s1)
 ; LP64D-NEXT:flw fs6, 120(s1)
 ; LP64D-NEXT:flw fs7, 124(s1)
-; LP64D-NEXT:call callee
+; LP64D-NEXT:call callee@plt
 ; LP64D-NEXT:fsw fs7, 124(s1)
 ; LP64D-NEXT:fsw fs6, 120(s1)
 ; LP64D-NEXT:fsw fs5, 116(s1)

diff  --git a/llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll 
b/llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
index efd0455a821d..e18cb5953492 100644
--- a/llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
+++ b/llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
@@ -433,7 +433,7 @@ define void @caller() nounwind {
 ; ILP32-NEXT:fsd ft0, 8(sp) # 8-byte Folded Spill
 ; ILP32-NEXT:fld ft0, 248(s1)
 ; ILP32-NEXT:fsd ft0, 0(sp) # 8-byte Folded Spill
-; ILP32-NEXT:call callee
+; ILP32-NEXT:call callee@plt
 ; ILP32-NEXT:fld ft0, 0(sp) # 8-byte Folded Reload
 ; ILP32-NEXT:fsd ft0, 248(s1)
 ; ILP32-NEXT:fld ft0, 8(sp) # 8-byte Folded Reload
@@ -576,7 +576,7 @@ define void @caller() nounwind {
 ; LP64-NEXT:fsd ft0, 16(sp) # 8-byte Folded Spill
 ; LP64-NEXT:fld ft0, 248(s1)
 ; LP64-NEXT:fsd ft0, 8(sp) # 8-byte Folded Spill
-; LP64-NEXT:call callee
+; LP64-NEXT:call callee@plt
 ; LP64-NEXT:fld ft0, 8(sp) # 8-byte Folded Reload
 ; LP64-NEXT:fsd ft0, 248(s1)
 ; LP64-NEXT:fld ft0, 16(sp) # 8-byte Folded 

[llvm-branch-commits] [mlir] a55a0a3 - [mlir] Remove over specified memory effects

[Andrew Young via llvm-branch-commits]

Author: Andrew Young
Date: 2021-01-14T14:49:41-08:00
New Revision: a55a0a3056b8163d9e709b534bd737730fbb5d44

URL: 
https://github.com/llvm/llvm-project/commit/a55a0a3056b8163d9e709b534bd737730fbb5d44
DIFF: 
https://github.com/llvm/llvm-project/commit/a55a0a3056b8163d9e709b534bd737730fbb5d44.diff

LOG: [mlir] Remove over specified memory effects

The standard and gpu dialect both have `alloc` operations which use the
memory effect `MemAlloc`.  In both cases, it is specified on both  the
operation itself and on the result.  This results in two memory effects
being created for these operations.  When `MemAlloc` is defined on an
operation, it represents some background effect which the compiler
cannot reason about, and  inhibits the ability of the compiler to
remove dead `std.alloc` operations.  This change removes the uneeded
`MemAlloc` effect from these operations and leaves the effect on the
result, which allows dead allocs to be erased.

There is the same problem, but to a lesser extent, with MemFree, MemRead
and MemWrite. Over-specifying these traits is not currently inhibiting
any optimization.

Differential Revision: https://reviews.llvm.org/D94662

Added: 


Modified: 
mlir/docs/Interfaces.md
mlir/include/mlir/Dialect/GPU/GPUOps.td
mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
mlir/test/Dialect/Linalg/sparse_1d.mlir
mlir/test/Dialect/Linalg/sparse_2d.mlir
mlir/test/Dialect/Linalg/sparse_3d.mlir
mlir/test/Transforms/canonicalize.mlir

Removed: 




diff  --git a/mlir/docs/Interfaces.md b/mlir/docs/Interfaces.md
index 4fe8421295ec..7f2920bae775 100644
--- a/mlir/docs/Interfaces.md
+++ b/mlir/docs/Interfaces.md
@@ -118,7 +118,7 @@ access to derived objects by providing a virtual interface 
that must be
 implemented. As an example, many analyses and transformations want to reason
 about the side effects of an operation to improve performance and correctness.
 The side effects of an operation are generally tied to the semantics of a
-specific operation, for example an `affine.load` operation has a `write` effect
+specific operation, for example an `affine.load` operation has a `read` effect
 (as the name may suggest).
 
 These interfaces are defined by overriding the

diff  --git a/mlir/include/mlir/Dialect/GPU/GPUOps.td 
b/mlir/include/mlir/Dialect/GPU/GPUOps.td
index 457477f7f3c1..915347e0647e 100644
--- a/mlir/include/mlir/Dialect/GPU/GPUOps.td
+++ b/mlir/include/mlir/Dialect/GPU/GPUOps.td
@@ -806,8 +806,7 @@ def GPU_WaitOp : GPU_Op<"wait", [GPU_AsyncOpInterface]> {
 
 def GPU_AllocOp : GPU_Op<"alloc", [
 GPU_AsyncOpInterface,
-AttrSizedOperandSegments,
-MemoryEffects<[MemAlloc]>
+AttrSizedOperandSegments
   ]> {
 
   let summary = "GPU memory allocation operation.";
@@ -831,7 +830,7 @@ def GPU_AllocOp : GPU_Op<"alloc", [
 
   let arguments = (ins Variadic:$asyncDependencies,
Variadic:$dynamicSizes, 
Variadic:$symbolOperands);
-  let results = (outs Res]>:$memref,
+  let results = (outs Res:$memref,
  Optional:$asyncToken);
 
   let extraClassDeclaration = [{
@@ -844,9 +843,7 @@ def GPU_AllocOp : GPU_Op<"alloc", [
   }];
 }
 
-def GPU_DeallocOp : GPU_Op<"dealloc", [
-GPU_AsyncOpInterface, MemoryEffects<[MemFree]>
-  ]> {
+def GPU_DeallocOp : GPU_Op<"dealloc", [GPU_AsyncOpInterface]> {
 
   let summary = "GPU memory deallocation operation";
 
@@ -879,9 +876,7 @@ def GPU_DeallocOp : GPU_Op<"dealloc", [
   }];
 }
 
-def GPU_MemcpyOp : GPU_Op<"memcpy", [
-GPU_AsyncOpInterface, MemoryEffects<[MemRead, MemWrite]>
-  ]> {
+def GPU_MemcpyOp : GPU_Op<"memcpy", [GPU_AsyncOpInterface]> {
 
   let summary = "GPU memcpy operation";
 

diff  --git a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td 
b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
index 3ae7ad54b80f..6eabe1179234 100644
--- a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
+++ b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
@@ -170,7 +170,6 @@ class AllocLikeOp traits = []> :
 Std_Op]>,
   AttrSizedOperandSegments
 ], traits)> {
 
@@ -1507,8 +1506,7 @@ def SinOp : FloatUnaryOp<"sin"> {
 // DeallocOp
 
//===--===//
 
-def DeallocOp : Std_Op<"dealloc",
-[MemoryEffects<[MemFree]>, MemRefsNormalizable]> {
+def DeallocOp : Std_Op<"dealloc", [MemRefsNormalizable]> {
   let summary = "memory deallocation operation";
   let description = [{
 The `dealloc` operation frees the region of memory referenced by a memref

diff  --git a/mlir/test/Dialect/Linalg/sparse_1d.mlir 
b/mlir/test/Dialect/Linalg/sparse_1d.mlir
index 0d471244f77a..9f7fbe471409 100644
--- a/mlir/test/Dialect/Linalg/sparse_1d.mlir
+++ b/mlir/test/Dialect/Linalg/sparse_1d.mlir
@@ -863,7 +863,6 @@ func @two_way_inv_alt(%arga: tensor<16xf32>,
 // CHECK:   %[[VAL_3:.*]] = constant 0 : index
 // CHECK:   %[[VAL_4:.*]] = c

[llvm-branch-commits] [mlir] a55a0a3 - [mlir] Remove over specified memory effects

[Andrew Young via llvm-branch-commits]

Author: Andrew Young
Date: 2021-01-14T14:49:41-08:00
New Revision: a55a0a3056b8163d9e709b534bd737730fbb5d44

URL: 
https://github.com/llvm/llvm-project/commit/a55a0a3056b8163d9e709b534bd737730fbb5d44
DIFF: 
https://github.com/llvm/llvm-project/commit/a55a0a3056b8163d9e709b534bd737730fbb5d44.diff

LOG: [mlir] Remove over specified memory effects

The standard and gpu dialect both have `alloc` operations which use the
memory effect `MemAlloc`.  In both cases, it is specified on both  the
operation itself and on the result.  This results in two memory effects
being created for these operations.  When `MemAlloc` is defined on an
operation, it represents some background effect which the compiler
cannot reason about, and  inhibits the ability of the compiler to
remove dead `std.alloc` operations.  This change removes the uneeded
`MemAlloc` effect from these operations and leaves the effect on the
result, which allows dead allocs to be erased.

There is the same problem, but to a lesser extent, with MemFree, MemRead
and MemWrite. Over-specifying these traits is not currently inhibiting
any optimization.

Differential Revision: https://reviews.llvm.org/D94662

Added: 


Modified: 
mlir/docs/Interfaces.md
mlir/include/mlir/Dialect/GPU/GPUOps.td
mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
mlir/test/Dialect/Linalg/sparse_1d.mlir
mlir/test/Dialect/Linalg/sparse_2d.mlir
mlir/test/Dialect/Linalg/sparse_3d.mlir
mlir/test/Transforms/canonicalize.mlir

Removed: 




diff  --git a/mlir/docs/Interfaces.md b/mlir/docs/Interfaces.md
index 4fe8421295ec..7f2920bae775 100644
--- a/mlir/docs/Interfaces.md
+++ b/mlir/docs/Interfaces.md
@@ -118,7 +118,7 @@ access to derived objects by providing a virtual interface 
that must be
 implemented. As an example, many analyses and transformations want to reason
 about the side effects of an operation to improve performance and correctness.
 The side effects of an operation are generally tied to the semantics of a
-specific operation, for example an `affine.load` operation has a `write` effect
+specific operation, for example an `affine.load` operation has a `read` effect
 (as the name may suggest).
 
 These interfaces are defined by overriding the

diff  --git a/mlir/include/mlir/Dialect/GPU/GPUOps.td 
b/mlir/include/mlir/Dialect/GPU/GPUOps.td
index 457477f7f3c1..915347e0647e 100644
--- a/mlir/include/mlir/Dialect/GPU/GPUOps.td
+++ b/mlir/include/mlir/Dialect/GPU/GPUOps.td
@@ -806,8 +806,7 @@ def GPU_WaitOp : GPU_Op<"wait", [GPU_AsyncOpInterface]> {
 
 def GPU_AllocOp : GPU_Op<"alloc", [
 GPU_AsyncOpInterface,
-AttrSizedOperandSegments,
-MemoryEffects<[MemAlloc]>
+AttrSizedOperandSegments
   ]> {
 
   let summary = "GPU memory allocation operation.";
@@ -831,7 +830,7 @@ def GPU_AllocOp : GPU_Op<"alloc", [
 
   let arguments = (ins Variadic:$asyncDependencies,
Variadic:$dynamicSizes, 
Variadic:$symbolOperands);
-  let results = (outs Res]>:$memref,
+  let results = (outs Res:$memref,
  Optional:$asyncToken);
 
   let extraClassDeclaration = [{
@@ -844,9 +843,7 @@ def GPU_AllocOp : GPU_Op<"alloc", [
   }];
 }
 
-def GPU_DeallocOp : GPU_Op<"dealloc", [
-GPU_AsyncOpInterface, MemoryEffects<[MemFree]>
-  ]> {
+def GPU_DeallocOp : GPU_Op<"dealloc", [GPU_AsyncOpInterface]> {
 
   let summary = "GPU memory deallocation operation";
 
@@ -879,9 +876,7 @@ def GPU_DeallocOp : GPU_Op<"dealloc", [
   }];
 }
 
-def GPU_MemcpyOp : GPU_Op<"memcpy", [
-GPU_AsyncOpInterface, MemoryEffects<[MemRead, MemWrite]>
-  ]> {
+def GPU_MemcpyOp : GPU_Op<"memcpy", [GPU_AsyncOpInterface]> {
 
   let summary = "GPU memcpy operation";
 

diff  --git a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td 
b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
index 3ae7ad54b80f..6eabe1179234 100644
--- a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
+++ b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
@@ -170,7 +170,6 @@ class AllocLikeOp traits = []> :
 Std_Op]>,
   AttrSizedOperandSegments
 ], traits)> {
 
@@ -1507,8 +1506,7 @@ def SinOp : FloatUnaryOp<"sin"> {
 // DeallocOp
 
//===--===//
 
-def DeallocOp : Std_Op<"dealloc",
-[MemoryEffects<[MemFree]>, MemRefsNormalizable]> {
+def DeallocOp : Std_Op<"dealloc", [MemRefsNormalizable]> {
   let summary = "memory deallocation operation";
   let description = [{
 The `dealloc` operation frees the region of memory referenced by a memref

diff  --git a/mlir/test/Dialect/Linalg/sparse_1d.mlir 
b/mlir/test/Dialect/Linalg/sparse_1d.mlir
index 0d471244f77a..9f7fbe471409 100644
--- a/mlir/test/Dialect/Linalg/sparse_1d.mlir
+++ b/mlir/test/Dialect/Linalg/sparse_1d.mlir
@@ -863,7 +863,6 @@ func @two_way_inv_alt(%arga: tensor<16xf32>,
 // CHECK:   %[[VAL_3:.*]] = constant 0 : index
 // CHECK:   %[[VAL_4:.*]] = c

[llvm-branch-commits] [clang-tools-extra] 4183999 - [clangd] Reduce logspam for CDB scanning

[Sam McCall via llvm-branch-commits]

Author: Sam McCall
Date: 2021-01-14T23:55:02+01:00
New Revision: 4183999e0fe1ffbc8bdb2f06f2e5f210a0c94e35

URL: 
https://github.com/llvm/llvm-project/commit/4183999e0fe1ffbc8bdb2f06f2e5f210a0c94e35
DIFF: 
https://github.com/llvm/llvm-project/commit/4183999e0fe1ffbc8bdb2f06f2e5f210a0c94e35.diff

LOG: [clangd] Reduce logspam for CDB scanning

Added: 


Modified: 
clang-tools-extra/clangd/GlobalCompilationDatabase.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp 
b/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
index 9a74ef0d5c2f..d983f76e227f 100644
--- a/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
+++ b/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
@@ -350,7 +350,7 @@ bool 
DirectoryBasedGlobalCompilationDatabase::DirectoryCache::load(
 }
 // Don't log Error here, it's usually just "couldn't find ".
   }
-  vlog("No compilation database at {0}", Path);
+  dlog("No compilation database at {0}", Path);
   return true;
 }
 



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[llvm-branch-commits] [mlir] 722ae10 - [mlir][Linalg] Add canonicalization to remove no-op linalg operations.

[via llvm-branch-commits]

Author: MaheshRavishankar
Date: 2021-01-14T14:59:24-08:00
New Revision: 722ae10907e06a0bafa00c557e5242b53419a3ce

URL: 
https://github.com/llvm/llvm-project/commit/722ae10907e06a0bafa00c557e5242b53419a3ce
DIFF: 
https://github.com/llvm/llvm-project/commit/722ae10907e06a0bafa00c557e5242b53419a3ce.diff

LOG: [mlir][Linalg] Add canonicalization to remove no-op linalg operations.

linalg.generic/indexed_generic operations on tensors whose body is
just yielding the (non-induction variable) arguments of the operation
can be canonicalized by replacing uses of the result with the
corresponding arguments.

Differential Revision: https://reviews.llvm.org/D94581

Added: 


Modified: 
mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
mlir/test/Dialect/Linalg/canonicalize.mlir

Removed: 




diff  --git a/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp 
b/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
index 8732065bb042..b74e44d91176 100644
--- a/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
+++ b/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
@@ -2119,6 +2119,54 @@ struct DeduplicateInputs : public RewritePattern {
   }
 };
 
+/// Remove generic/indexed_generic operations (on tensors) that are just 
copying
+/// the values from inputs to the results. Requirements are
+/// 1) All iterator types are parallel
+/// 2) The body contains just a yield operation with the yielded values being
+///the arguments corresponding to the operands.
+struct RemoveIdentityLinalgOps : public RewritePattern {
+  RemoveIdentityLinalgOps(PatternBenefit benefit = 1)
+  : RewritePattern(benefit, MatchAnyOpTypeTag()) {}
+
+  LogicalResult matchAndRewrite(Operation *op,
+PatternRewriter &rewriter) const override {
+if (!isa(op))
+  return failure();
+LinalgOp genericOp = cast(op);
+if (!genericOp.hasTensorSemantics())
+  return failure();
+// Check all indexing maps are identity.
+if (llvm::any_of(genericOp.getIndexingMaps(),
+ [](AffineMap map) { return !map.isIdentity(); }))
+  return failure();
+
+// Check that the body of the linalg operation is just a linalg.yield
+// operation.
+Block &body = op->getRegion(0).front();
+if (!llvm::hasSingleElement(body))
+  return failure();
+auto yieldOp = dyn_cast(body.getTerminator());
+if (!yieldOp)
+  return failure();
+
+// Get the argument number of the returned values. That is the operand
+// number to use for replacing uses of this operation.
+unsigned numIndexArgs = genericOp.getNumPayloadInductionVariables();
+SmallVector returnedArgs;
+for (Value yieldVal : yieldOp.values()) {
+  auto yieldArg = yieldVal.dyn_cast();
+  if (!yieldArg)
+return failure();
+  unsigned argumentNumber = yieldArg.getArgNumber();
+  if (argumentNumber < numIndexArgs)
+return failure();
+  returnedArgs.push_back(op->getOperand(argumentNumber - numIndexArgs));
+}
+rewriter.replaceOp(genericOp, returnedArgs);
+return success();
+  }
+};
+
 /// Canonicalize a `linalgOp` -> `dim` pattern by replacing the `dim` arg
 /// with the corresponding output tensor argument of the linalg op.
 struct ReplaceDimOfLinalgResult : public OpRewritePattern {
@@ -2143,7 +2191,8 @@ struct ReplaceDimOfLinalgResult : public 
OpRewritePattern {
 #define CANONICALIZERS_AND_FOLDERS(XXX)
\
   void XXX::getCanonicalizationPatterns(OwningRewritePatternList &results, 
\
 MLIRContext *context) {
\
-results.insert();  
\
+results.insert(); 
\
 results.insert(context); 
\
   }
\

\

diff  --git a/mlir/test/Dialect/Linalg/canonicalize.mlir 
b/mlir/test/Dialect/Linalg/canonicalize.mlir
index 6b806c801341..b2de3fdc6c8e 100644
--- a/mlir/test/Dialect/Linalg/canonicalize.mlir
+++ b/mlir/test/Dialect/Linalg/canonicalize.mlir
@@ -249,8 +249,10 @@ func @dce_zero_memref(%arg0 : memref<0xf32>, %arg1: 
tensor<0xf32>) -> tensor<0xf
   return %1: tensor<0xf32>
 }
 // CHECK-LABEL: @dce_zero_memref
+//  CHECK-SAME:   %[[ARG0:[a-zA-Z0-9_]+]]: memref<0xf32>
+//  CHECK-SAME:   %[[ARG1:[a-zA-Z0-9_]+]]: tensor<0xf32>
 //   CHECK-NOT:   linalg.copy
-//  CHECK-NEXT:   linalg.generic
+//  CHECK-NEXT:   return %[[ARG1]]
 
 // -
 
@@ -449,3 +451,30 @@ func @init_tensor_reshape_collapse(%arg0 : index) -> 
tensor<6x5x?xf32> {
 //  CHECK:   %[[T0:.+]] = muli %[[ARG0]], %[[C28]]
 //  CHECK:   %[[T1:.+]] = linalg.init_tensor [6, 5, %[[T0]]]
 //  CHECK:   return %[[T1]]
+
+// -
+
+#map = affine_map<(d0, d1, d2) -> (d0, d1, d2)>
+func @remove_no_op(%arg0 : tensor, %arg1 : tensor)
+  -> (tensor, te

[llvm-branch-commits] [llvm] b21905d - [SLP] remove unnecessary state in matching reductions

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2021-01-14T18:32:37-05:00
New Revision: b21905dfe3797289791443661540b72cb43dfdf3

URL: 
https://github.com/llvm/llvm-project/commit/b21905dfe3797289791443661540b72cb43dfdf3
DIFF: 
https://github.com/llvm/llvm-project/commit/b21905dfe3797289791443661540b72cb43dfdf3.diff

LOG: [SLP] remove unnecessary state in matching reductions

This is NFC-intended. I'm still trying to figure out
how the loop where this is used works. It does not
seem like we require this data at all, but it's
hard to confirm given the complicated predicates.

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp 
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 0f3f74b63860..3f1279b67519 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -6679,9 +6679,6 @@ class HorizontalReduction {
   /// The operation data of the reduction operation.
   OperationData RdxTreeInst;
 
-  /// The operation data for the leaf values that we perform a reduction on.
-  OperationData RdxLeafVal;
-
   /// Checks if the ParentStackElem.first should be marked as a reduction
   /// operation with an extra argument or as extra argument itself.
   void markExtraArg(std::pair &ParentStackElem,
@@ -6825,9 +6822,11 @@ class HorizontalReduction {
 if (!isValidElementType(Ty) || Ty->isPointerTy())
   return false;
 
-RdxLeafVal.clear();
 ReductionRoot = B;
 
+// The operation data for the leaf values that we perform a reduction on.
+OperationData RdxLeafVal;
+
 // Post order traverse the reduction tree starting at B. We only handle 
true
 // trees containing only binary operators.
 SmallVector, 32> Stack;



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[llvm-branch-commits] [openmp] 547b032 - [OpenMP] Remove omptarget-nvptx from deps as it is no longer a valid target

[Shilei Tian via llvm-branch-commits]

Author: Shilei Tian
Date: 2021-01-14T19:16:11-05:00
New Revision: 547b032ccc8e1da5d1716afeb0afa8988e129fd0

URL: 
https://github.com/llvm/llvm-project/commit/547b032ccc8e1da5d1716afeb0afa8988e129fd0
DIFF: 
https://github.com/llvm/llvm-project/commit/547b032ccc8e1da5d1716afeb0afa8988e129fd0.diff

LOG: [OpenMP] Remove omptarget-nvptx from deps as it is no longer a valid target

`omptarget-nvptx` is still a dependence for `check-libomptarget-nvtpx`
although it has been removed by D94573.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D94725

Added: 


Modified: 
openmp/libomptarget/deviceRTLs/nvptx/test/CMakeLists.txt

Removed: 




diff  --git a/openmp/libomptarget/deviceRTLs/nvptx/test/CMakeLists.txt 
b/openmp/libomptarget/deviceRTLs/nvptx/test/CMakeLists.txt
index 1eabeb25ff98..df6f665329ea 100644
--- a/openmp/libomptarget/deviceRTLs/nvptx/test/CMakeLists.txt
+++ b/openmp/libomptarget/deviceRTLs/nvptx/test/CMakeLists.txt
@@ -3,7 +3,7 @@ if(NOT OPENMP_TEST_COMPILER_ID STREQUAL "Clang")
   return()
 endif()
 
-set(deps omptarget-nvptx omptarget omp)
+set(deps omptarget omp)
 if(LIBOMPTARGET_NVPTX_ENABLE_BCLIB)
   set(deps ${deps} omptarget-nvptx-bc)
 endif()



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[llvm-branch-commits] [mlir] 774c9c6 - [mlir][Linalg] Add canonicalization of linalg op -> dim op.

[via llvm-branch-commits]

Author: MaheshRavishankar
Date: 2021-01-14T16:17:08-08:00
New Revision: 774c9c6ef3addc735939a388965a0a694bbd4f57

URL: 
https://github.com/llvm/llvm-project/commit/774c9c6ef3addc735939a388965a0a694bbd4f57
DIFF: 
https://github.com/llvm/llvm-project/commit/774c9c6ef3addc735939a388965a0a694bbd4f57.diff

LOG: [mlir][Linalg] Add canonicalization of linalg op -> dim op.

Add canonicalization to replace use of the result of a linalg
operation on tensors in a dim operation, to use one of the operands of
the linalg operations instead. This allows the linalg op itself to be
deleted when all its non-dim uses are removed (say through tiling, etc.)

Differential Revision: https://reviews.llvm.org/D93076

Added: 


Modified: 
mlir/include/mlir/Dialect/Linalg/IR/LinalgBase.td
mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
mlir/include/mlir/Dialect/Linalg/IR/LinalgTypes.h
mlir/include/mlir/IR/AffineExprVisitor.h
mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
mlir/lib/Dialect/Linalg/IR/LinalgTypes.cpp
mlir/test/Dialect/Linalg/canonicalize.mlir

Removed: 




diff  --git a/mlir/include/mlir/Dialect/Linalg/IR/LinalgBase.td 
b/mlir/include/mlir/Dialect/Linalg/IR/LinalgBase.td
index 8ac82b768ad3..a706d67d2988 100644
--- a/mlir/include/mlir/Dialect/Linalg/IR/LinalgBase.td
+++ b/mlir/include/mlir/Dialect/Linalg/IR/LinalgBase.td
@@ -32,6 +32,9 @@ def Linalg_Dialect : Dialect {
 the op semantics.
   }];
   let cppNamespace = "::mlir::linalg";
+  let dependentDialects = [
+"AffineDialect", "StandardOpsDialect", "tensor::TensorDialect"
+  ];
 }
 
 // Whether a type is a RangeType.

diff  --git 
a/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td 
b/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
index f3b7181d71a5..85133604cda0 100644
--- a/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
+++ b/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
@@ -946,6 +946,56 @@ def LinalgStructuredInterface : OpInterface<"LinalgOp"> {
 return inversePermutation(getLoopsToShapesMap());
   }]
 >,
+InterfaceMethod<
+  /*desc=*/[{
+Return the position in the results of the affine map computed
+by getLoopsToShapesMap() that represents the shape of an
+operand (input or output) at a dimension.
+  }],
+  /*retTy=*/"Optional",
+  /*methodName=*/"getOperandDimPositionInLoopsToShapeMap",
+  /*args=*/(ins "unsigned":$operandIdx, "unsigned":$dim),
+  /*methodBody=*/"",
+  /*defaultImplementation=*/[{
+unsigned pos = 0;
+for (auto type : llvm::enumerate(getShapedOperandTypes())) {
+  if (type.index() == operandIdx) return pos + dim;
+  pos += type.value().getRank();
+}
+return {};
+  }]
+>,
+InterfaceMethod<
+  /*desc=*/[{
+Return the position in the results of the affine map computed
+by getLoopsToShapesMap() that represents the shape of an
+input operand at a dimension.
+  }],
+  /*retTy=*/"Optional",
+  /*methodName=*/"getInputValueDimPositionInLoopsToShapeMap",
+  /*args=*/(ins "unsigned":$inputIdx, "unsigned":$dim),
+  /*methodBody=*/"",
+  /*defaultImplementation=*/[{
+if (inputIdx >= getNumInputs()) return {};
+return getOperandDimPositionInLoopsToShapeMap(inputIdx, dim);
+  }]
+>,
+InterfaceMethod<
+  /*desc=*/[{
+Return the position in the results of the affine map computed
+by getLoopsToShapesMap() that represents the shape of the
+result value at a dimension.
+  }],
+  /*retTy=*/"Optional",
+  /*methodName=*/"getResultValueDimPositionInLoopsToShapeMap",
+  /*args=*/(ins "unsigned":$resultIdx, "unsigned":$dim),
+  /*methodBody=*/"",
+  /*defaultImplementation=*/[{
+if (resultIdx >= getNumOutputs()) return {};
+return getOperandDimPositionInLoopsToShapeMap(
+getNumInputs() + resultIdx, dim);
+  }]
+>,
 
 
//===--===//
 // Other static interface methods.
@@ -1027,6 +1077,12 @@ def LinalgStructuredInterface : OpInterface<"LinalgOp"> {
   }
   return res;
 }
+
+/// Returns the value that expresses the shape of the output in terms of
+/// shape of the input operands where possible
+Optional inferResultDimFromInputShapes
+  (OpBuilder &b, Location loc, unsigned resultIdx, unsigned im);
+
 
////
 // Helper functions to mutate the `operand_segment_sizes` attribute.
 // These are useful when cloning and changing operand types.

diff  --git a/mlir/include/mlir/Dialect/Linalg/IR/LinalgTypes.h 
b/mlir/include/mlir/Dialect/Linalg/IR/LinalgTypes.h
index a4e32b9263e8..71ac60197

[llvm-branch-commits] [mlir] 42444d0 - [mlir][Linalg] NFC: Verify tiling on linalg.generic operation on tensors.

[via llvm-branch-commits]

Author: MaheshRavishankar
Date: 2021-01-14T16:17:08-08:00
New Revision: 42444d0cf0c9cf92f89acf16f11f3b7242d81619

URL: 
https://github.com/llvm/llvm-project/commit/42444d0cf0c9cf92f89acf16f11f3b7242d81619
DIFF: 
https://github.com/llvm/llvm-project/commit/42444d0cf0c9cf92f89acf16f11f3b7242d81619.diff

LOG: [mlir][Linalg] NFC: Verify tiling on linalg.generic operation on tensors.

With the recent changes to linalg on tensor semantics, the tiling
operations works out-of-the-box for generic operations. Add a test to
verify that and some minor refactoring.

Differential Revision: https://reviews.llvm.org/D93077

Added: 


Modified: 
mlir/include/mlir/IR/AffineMap.h
mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
mlir/test/Dialect/Linalg/tile-tensors.mlir

Removed: 




diff  --git a/mlir/include/mlir/IR/AffineMap.h 
b/mlir/include/mlir/IR/AffineMap.h
index f1f267ff0fc2..4e50a9599767 100644
--- a/mlir/include/mlir/IR/AffineMap.h
+++ b/mlir/include/mlir/IR/AffineMap.h
@@ -327,6 +327,21 @@ AffineMap inversePermutation(AffineMap map);
 /// ```
 AffineMap concatAffineMaps(ArrayRef maps);
 
+/// Returns the map that results from projecting out the dimensions specified 
in
+/// `projectedDimensions`. The projected dimensions are set to 0.
+///
+/// Example:
+/// 1) map  : affine_map<(d0, d1, d2) -> (d0, d1)>
+///projected_dimensions : {2}
+///result   : affine_map<(d0, d1) -> (d0, d1)>
+///
+/// 2) map  : affine_map<(d0, d1) -> (d0 + d1)>
+///projected_dimensions : {1}
+///result   : affine_map<(d0) -> (d0)>
+///
+/// 3) map  : affine_map<(d0, d1, d2) -> (d0, d1)>
+///projected_dimensions : {1}
+///result   : affine_map<(d0, d1) -> (d0, 0)>
 AffineMap getProjectedMap(AffineMap map,
   ArrayRef projectedDimensions);
 

diff  --git a/mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp 
b/mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
index f323d2e50435..eb8c9bb6a6fc 100644
--- a/mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
+++ b/mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
@@ -221,9 +221,8 @@ static bool isTiled(AffineMap map, ValueRange tileSizes) {
 
 static SmallVector
 makeTiledShapes(OpBuilder &b, Location loc, LinalgOp linalgOp,
-ValueRange operands, AffineMap map, ValueRange ivs,
+ArrayRef tiledOperands, AffineMap map, ValueRange ivs,
 ValueRange tileSizes, ValueRange allShapeSizes) {
-  assert(operands.size() == linalgOp.getShapedOperands().size());
   assert(ivs.size() == static_cast(llvm::count_if(
llvm::make_range(tileSizes.begin(), 
tileSizes.end()),
[](Value v) { return !isZero(v); })) &&
@@ -243,11 +242,9 @@ makeTiledShapes(OpBuilder &b, Location loc, LinalgOp 
linalgOp,
 subShapeSizes.push_back(size - std_constant_index(1));
   }
 
-  auto *op = linalgOp.getOperation();
-
   SmallVector res;
-  res.reserve(op->getNumOperands());
-  for (auto en : llvm::enumerate(operands)) {
+  res.reserve(tiledOperands.size());
+  for (auto en : llvm::enumerate(tiledOperands)) {
 Value shapedOp = en.value();
 ShapedType shapedType = shapedOp.getType().cast();
 unsigned rank = shapedType.getRank();
@@ -342,6 +339,7 @@ tileLinalgOpImpl(OpBuilder &b, LinalgOp op, ValueRange 
tileSizes,
   LoopIndexToRangeIndexMap loopIndexToRangeIndex;
   std::tie(loopRanges, loopIndexToRangeIndex) = makeTiledLoopRanges(
   b, op.getLoc(), shapeSizesToLoopsMap, allShapeSizes, tileSizes);
+
   SmallVector iteratorTypes;
   for (auto attr :
enumerate(op.iterator_types().cast().getValue())) {
@@ -574,10 +572,10 @@ void 
mlir::linalg::populateLinalgTilingCanonicalizationPatterns(
 static void insertTilingPatterns(OwningRewritePatternList &patterns,
  const LinalgTilingOptions &options,
  MLIRContext *ctx) {
-  RewritePatternList<
+  RewritePatternList::insert(patterns, options, ctx);
+ >::insert(patterns, options, ctx);
 }
 
 static void applyTilingToLoopPatterns(LinalgTilingLoopType loopType,

diff  --git a/mlir/test/Dialect/Linalg/tile-tensors.mlir 
b/mlir/test/Dialect/Linalg/tile-tensors.mlir
index 787ea8d2b395..f52d7fefa8be 100644
--- a/mlir/test/Dialect/Linalg/tile-tensors.mlir
+++ b/mlir/test/Dialect/Linalg/tile-tensors.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=2,3,4" | FileCheck %s
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=2,3,4" -split-input-file | 
FileCheck %s
 
 // CHECK-LABEL: func @matmul_tensors(
 // CHECK-SAME:%[[TA:[0-9a-z]+]]: tensor
@@ -26,3 +26,97 @@ func @matmul_tensors(
 //  CHECK: return %[[TD0]] : tensor
   return %0 : tensor
 }
+
+// -
+
+func @generic_op_tensors(
+  %arg0 : tensor, %arg1 : tensor) -> tensor {
+  %c0 = constant 0 : 

[llvm-branch-commits] [llvm] bc3606d - [AArch64][GlobalISel] Assign FPR banks to loads which are used by integer->float conversions.

[Amara Emerson via llvm-branch-commits]

Author: Amara Emerson
Date: 2021-01-14T16:14:59-08:00
New Revision: bc3606d0b27b2ba13a826b5c3fcba81f7e737387

URL: 
https://github.com/llvm/llvm-project/commit/bc3606d0b27b2ba13a826b5c3fcba81f7e737387
DIFF: 
https://github.com/llvm/llvm-project/commit/bc3606d0b27b2ba13a826b5c3fcba81f7e737387.diff

LOG: [AArch64][GlobalISel] Assign FPR banks to loads which are used by 
integer->float conversions.

G_[US]ITOFP users of loads on AArch64 can operate on both gpr and fpr banks for 
scalars.
Because of this, if their source is a load, then that load can be assigned to 
an fpr
bank and therefore avoid having to do a cross bank copy via a gpr->fpr 
conversion.

Differential Revision: https://reviews.llvm.org/D94701

Added: 


Modified: 
llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir

Removed: 




diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp 
b/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
index eeb7d5bc6eb7..c76c43389b37 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
@@ -680,11 +680,18 @@ AArch64RegisterBankInfo::getInstrMapping(const 
MachineInstr &MI) const {
 break;
   }
   case TargetOpcode::G_SITOFP:
-  case TargetOpcode::G_UITOFP:
+  case TargetOpcode::G_UITOFP: {
 if (MRI.getType(MI.getOperand(0).getReg()).isVector())
   break;
-OpRegBankIdx = {PMI_FirstFPR, PMI_FirstGPR};
+// Integer to FP conversions don't necessarily happen between GPR -> FPR
+// regbanks. They can also be done within an FPR register.
+Register SrcReg = MI.getOperand(1).getReg();
+if (getRegBank(SrcReg, MRI, TRI) == &AArch64::FPRRegBank)
+  OpRegBankIdx = {PMI_FirstFPR, PMI_FirstFPR};
+else
+  OpRegBankIdx = {PMI_FirstFPR, PMI_FirstGPR};
 break;
+  }
   case TargetOpcode::G_FPTOSI:
   case TargetOpcode::G_FPTOUI:
 if (MRI.getType(MI.getOperand(0).getReg()).isVector())
@@ -722,7 +729,8 @@ AArch64RegisterBankInfo::getInstrMapping(const MachineInstr 
&MI) const {
 // assume this was a floating point load in the IR.
 // If it was not, we would have had a bitcast before
 // reaching that instruction.
-if (onlyUsesFP(UseMI, MRI, TRI)) {
+// Int->FP conversion operations are also captured in onlyDefinesFP().
+if (onlyUsesFP(UseMI, MRI, TRI) || onlyDefinesFP(UseMI, MRI, TRI)) {
   OpRegBankIdx[0] = PMI_FirstFPR;
   break;
 }

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir 
b/llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
index a7aae275fa5d..46177b4f1b1f 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
@@ -4,7 +4,7 @@
 # Check that we correctly assign register banks based off of instructions which
 # only use or only define FPRs.
 #
-# For example, G_SITOFP takes in a GPR, but only ever produces values on FPRs.
+# For example, G_SITOFP may take in a GPR, but only ever produces values on 
FPRs.
 # Some instructions can have inputs/outputs on either FPRs or GPRs. If one of
 # those instructions takes in the result of a G_SITOFP as a source, we should
 # put that source on a FPR.
@@ -361,3 +361,47 @@ body: |
 %phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %unmerge_1(s32), %bb.1
 $s0 = COPY %phi(s32)
 RET_ReallyLR implicit $s0
+
+...
+---
+name:load_used_by_sitofp
+legalized:   true
+tracksRegLiveness: true
+body: |
+  bb.0:
+liveins: $x0
+; The load should be assigned an fpr bank because it's used by the sitofp.
+; The sitofp should assign both src and dest to FPR, resulting in no 
copies.
+; CHECK-LABEL: name: load_used_by_sitofp
+; CHECK: liveins: $x0
+; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0
+; CHECK: [[LOAD:%[0-9]+]]:fpr(s32) = G_LOAD [[COPY]](p0) :: (load 4)
+; CHECK: [[SITOFP:%[0-9]+]]:fpr(s32) = G_SITOFP [[LOAD]](s32)
+; CHECK: $s0 = COPY [[SITOFP]](s32)
+; CHECK: RET_ReallyLR implicit $s0
+%0:_(p0) = COPY $x0
+%1:_(s32) = G_LOAD %0 :: (load 4)
+%2:_(s32) = G_SITOFP %1:_(s32)
+$s0 = COPY %2(s32)
+RET_ReallyLR implicit $s0
+...
+---
+name:load_used_by_uitofp
+legalized:   true
+tracksRegLiveness: true
+body: |
+  bb.0:
+liveins: $x0
+; CHECK-LABEL: name: load_used_by_uitofp
+; CHECK: liveins: $x0
+; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0
+; CHECK: [[LOAD:%[0-9]+]]:fpr(s32) = G_LOAD [[COPY]](p0) :: (load 4)
+; CHECK: [[UITOFP:%[0-9]+]]:fpr(s32) = G_UITOFP [[LOAD]](s32)
+; CHECK: $s0 = COPY [[UITOFP]](s32)
+; CHECK: RET_ReallyLR implicit $s0
+%0:_(p0) = COPY $x0
+%1:_(s32) = G_LOAD %0 :: (load 4)
+%2:_(s32) = G_UITOFP %1:_(s32)
+$s0 = COPY %2

[llvm-branch-commits] [openmp] 6e7094c - [libomptarget][nvptx][nfc] Move target_impl functions out of header

[Jon Chesterfield via llvm-branch-commits]

Author: Jon Chesterfield
Date: 2021-01-15T00:19:48Z
New Revision: 6e7094c14b22a202c15959316033c164d7a84122

URL: 
https://github.com/llvm/llvm-project/commit/6e7094c14b22a202c15959316033c164d7a84122
DIFF: 
https://github.com/llvm/llvm-project/commit/6e7094c14b22a202c15959316033c164d7a84122.diff

LOG: [libomptarget][nvptx][nfc] Move target_impl functions out of header

[libomptarget][nvptx][nfc] Move target_impl functions out of header

This removes most of the differences between the two target_impl.h.

Also change name mangling from C to C++ for __kmpc_impl_*_lock.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D94728

Added: 


Modified: 
openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.h

Removed: 




diff  --git a/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu 
b/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
index 50867bc4010a..7e81aba4152d 100644
--- a/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
+++ b/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
@@ -14,19 +14,135 @@
 #include "common/debug.h"
 #include "common/target_atomic.h"
 
+#include 
+
+DEVICE void __kmpc_impl_unpack(uint64_t val, uint32_t &lo, uint32_t &hi) {
+  asm volatile("mov.b64 {%0,%1}, %2;" : "=r"(lo), "=r"(hi) : "l"(val));
+}
+
+DEVICE uint64_t __kmpc_impl_pack(uint32_t lo, uint32_t hi) {
+  uint64_t val;
+  asm volatile("mov.b64 %0, {%1,%2};" : "=l"(val) : "r"(lo), "r"(hi));
+  return val;
+}
+
+DEVICE __kmpc_impl_lanemask_t __kmpc_impl_lanemask_lt() {
+  __kmpc_impl_lanemask_t res;
+  asm("mov.u32 %0, %%lanemask_lt;" : "=r"(res));
+  return res;
+}
+
+DEVICE __kmpc_impl_lanemask_t __kmpc_impl_lanemask_gt() {
+  __kmpc_impl_lanemask_t res;
+  asm("mov.u32 %0, %%lanemask_gt;" : "=r"(res));
+  return res;
+}
+
+DEVICE uint32_t __kmpc_impl_smid() {
+  uint32_t id;
+  asm("mov.u32 %0, %%smid;" : "=r"(id));
+  return id;
+}
+
+DEVICE double __kmpc_impl_get_wtick() {
+  // Timer precision is 1ns
+  return ((double)1E-9);
+}
+
+DEVICE double __kmpc_impl_get_wtime() {
+  unsigned long long nsecs;
+  asm("mov.u64  %0, %%globaltimer;" : "=l"(nsecs));
+  return (double)nsecs * __kmpc_impl_get_wtick();
+}
+
+// In Cuda 9.0, __ballot(1) from Cuda 8.0 is replaced with __activemask().
+
+DEVICE __kmpc_impl_lanemask_t __kmpc_impl_activemask() {
+#if CUDA_VERSION >= 9000
+  return __activemask();
+#else
+  return __ballot(1);
+#endif
+}
+
+// In Cuda 9.0, the *_sync() version takes an extra argument 'mask'.
+
+DEVICE int32_t __kmpc_impl_shfl_sync(__kmpc_impl_lanemask_t Mask, int32_t Var,
+ int32_t SrcLane) {
+#if CUDA_VERSION >= 9000
+  return __shfl_sync(Mask, Var, SrcLane);
+#else
+  return __shfl(Var, SrcLane);
+#endif // CUDA_VERSION
+}
+
+DEVICE int32_t __kmpc_impl_shfl_down_sync(__kmpc_impl_lanemask_t Mask,
+  int32_t Var, uint32_t Delta,
+  int32_t Width) {
+#if CUDA_VERSION >= 9000
+  return __shfl_down_sync(Mask, Var, Delta, Width);
+#else
+  return __shfl_down(Var, Delta, Width);
+#endif // CUDA_VERSION
+}
+
+DEVICE void __kmpc_impl_syncthreads() {
+  // Use original __syncthreads if compiled by nvcc or clang >= 9.0.
+#if !defined(__clang__) || __clang_major__ >= 9
+  __syncthreads();
+#else
+  asm volatile("bar.sync %0;" : : "r"(0) : "memory");
+#endif // __clang__
+}
+
+DEVICE void __kmpc_impl_syncwarp(__kmpc_impl_lanemask_t Mask) {
+#if CUDA_VERSION >= 9000
+  __syncwarp(Mask);
+#else
+  // In Cuda < 9.0 no need to sync threads in warps.
+#endif // CUDA_VERSION
+}
+
+// NVPTX specific kernel initialization
+DEVICE void __kmpc_impl_target_init() { /* nvptx needs no extra setup */
+}
+
+// Barrier until num_threads arrive.
+DEVICE void __kmpc_impl_named_sync(uint32_t num_threads) {
+  // The named barrier for active parallel threads of a team in an L1 parallel
+  // region to synchronize with each other.
+  int barrier = 1;
+  asm volatile("bar.sync %0, %1;"
+   :
+   : "r"(barrier), "r"(num_threads)
+   : "memory");
+}
+
+DEVICE void __kmpc_impl_threadfence() { __threadfence(); }
+DEVICE void __kmpc_impl_threadfence_block() { __threadfence_block(); }
+DEVICE void __kmpc_impl_threadfence_system() { __threadfence_system(); }
+
+// Calls to the NVPTX layer (assuming 1D layout)
+DEVICE int GetThreadIdInBlock() { return threadIdx.x; }
+DEVICE int GetBlockIdInKernel() { return blockIdx.x; }
+DEVICE int GetNumberOfBlocksInKernel() { return gridDim.x; }
+DEVICE int GetNumberOfThreadsInBlock() { return blockDim.x; }
+DEVICE unsigned GetWarpId() { return GetThreadIdInBlock() / WARPSIZE; }
+DEVICE unsigned GetLaneId() { return GetThreadIdInBlock() & (WARPSIZE - 1); }
+
 #define __OMP_SPIN 1000
 #define UNSET 0u
 #define SET 1u
 
-EXTERN void __kmpc_impl_init_lock(omp_lock_t *

[llvm-branch-commits] [flang] d6acf3c - [flang] Fix use-associated procedure in generic

[Tim Keith via llvm-branch-commits]

Author: Tim Keith
Date: 2021-01-14T16:31:52-08:00
New Revision: d6acf3c2012b00f06a422e8704609676be7729b2

URL: 
https://github.com/llvm/llvm-project/commit/d6acf3c2012b00f06a422e8704609676be7729b2
DIFF: 
https://github.com/llvm/llvm-project/commit/d6acf3c2012b00f06a422e8704609676be7729b2.diff

LOG: [flang] Fix use-associated procedure in generic

When a use-associated procedure was included in a generic, we weren't
correctly recording that fact. The ultimate symbol was added rather than
the local symbol.

Also, improve the message emitted for the specific procedure by
mentioning the module it came from.

This fixes one of the problems in https://bugs.llvm.org/show_bug.cgi?id=48648.

Differential Revision: https://reviews.llvm.org/D94696

Added: 


Modified: 
flang/lib/Semantics/resolve-names.cpp
flang/test/Semantics/modfile07.f90
flang/test/Semantics/resolve53.f90

Removed: 




diff  --git a/flang/lib/Semantics/resolve-names.cpp 
b/flang/lib/Semantics/resolve-names.cpp
index d66f561fc3c5..cef4f0010302 100644
--- a/flang/lib/Semantics/resolve-names.cpp
+++ b/flang/lib/Semantics/resolve-names.cpp
@@ -2603,36 +2603,43 @@ void InterfaceVisitor::ResolveSpecificsInGeneric(Symbol 
&generic) {
   Say(*name, "Procedure '%s' not found"_err_en_US);
   continue;
 }
-symbol = &symbol->GetUltimate();
 if (symbol == &generic) {
   if (auto *specific{generic.get().specific()}) {
 symbol = specific;
   }
 }
-if (!symbol->has() &&
-!symbol->has()) {
+const Symbol &ultimate{symbol->GetUltimate()};
+if (!ultimate.has() &&
+!ultimate.has()) {
   Say(*name, "'%s' is not a subprogram"_err_en_US);
   continue;
 }
 if (kind == ProcedureKind::ModuleProcedure) {
-  if (const auto *nd{symbol->detailsIf()}) {
+  if (const auto *nd{ultimate.detailsIf()}) {
 if (nd->kind() != SubprogramKind::Module) {
   Say(*name, "'%s' is not a module procedure"_err_en_US);
 }
   } else {
 // USE-associated procedure
-const auto *sd{symbol->detailsIf()};
+const auto *sd{ultimate.detailsIf()};
 CHECK(sd);
-if (symbol->owner().kind() != Scope::Kind::Module ||
+if (ultimate.owner().kind() != Scope::Kind::Module ||
 sd->isInterface()) {
   Say(*name, "'%s' is not a module procedure"_err_en_US);
 }
   }
 }
-if (!symbolsSeen.insert(*symbol).second) {
-  Say(name->source,
-  "Procedure '%s' is already specified in generic '%s'"_err_en_US,
-  name->source, MakeOpName(generic.name()));
+if (!symbolsSeen.insert(ultimate).second) {
+  if (symbol == &ultimate) {
+Say(name->source,
+"Procedure '%s' is already specified in generic '%s'"_err_en_US,
+name->source, MakeOpName(generic.name()));
+  } else {
+Say(name->source,
+"Procedure '%s' from module '%s' is already specified in generic 
'%s'"_err_en_US,
+ultimate.name(), ultimate.owner().GetName().value(),
+MakeOpName(generic.name()));
+  }
   continue;
 }
 details.AddSpecificProc(*symbol, name->source);

diff  --git a/flang/test/Semantics/modfile07.f90 
b/flang/test/Semantics/modfile07.f90
index f3e98bf195f9..878e342ff16a 100644
--- a/flang/test/Semantics/modfile07.f90
+++ b/flang/test/Semantics/modfile07.f90
@@ -598,3 +598,29 @@ module m10d
 ! end interface
 ! private::operator(.ne.)
 !end
+
+module m11a
+contains
+  subroutine s1()
+  end
+end
+!Expect: m11a.mod
+!module m11a
+!contains
+! subroutine s1()
+! end
+!end
+
+module m11b
+  use m11a
+  interface g
+module procedure s1
+  end interface
+end
+!Expect: m11b.mod
+!module m11b
+! use m11a,only:s1
+! interface g
+!  procedure::s1
+! end interface
+!end

diff  --git a/flang/test/Semantics/resolve53.f90 
b/flang/test/Semantics/resolve53.f90
index 1487873bd86b..64b0d536fa17 100644
--- a/flang/test/Semantics/resolve53.f90
+++ b/flang/test/Semantics/resolve53.f90
@@ -471,11 +471,11 @@ real function f(x)
 subroutine s1()
   use m20
   interface operator(.not.)
-!ERROR: Procedure 'f' is already specified in generic 'OPERATOR(.NOT.)'
+!ERROR: Procedure 'f' from module 'm20' is already specified in generic 
'OPERATOR(.NOT.)'
 procedure f
   end interface
   interface operator(+)
-!ERROR: Procedure 'f' is already specified in generic 'OPERATOR(+)'
+!ERROR: Procedure 'f' from module 'm20' is already specified in generic 
'OPERATOR(+)'
 procedure f
   end interface
 end subroutine s1



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[llvm-branch-commits] [llvm] 036bc79 - [AArch64][GlobalISel] Assign FPR banks to loads which are used by integer->float conversions.

[Amara Emerson via llvm-branch-commits]

Author: Amara Emerson
Date: 2021-01-14T16:33:34-08:00
New Revision: 036bc798f2ae4d266fe01e70778afe0b3381c088

URL: 
https://github.com/llvm/llvm-project/commit/036bc798f2ae4d266fe01e70778afe0b3381c088
DIFF: 
https://github.com/llvm/llvm-project/commit/036bc798f2ae4d266fe01e70778afe0b3381c088.diff

LOG: [AArch64][GlobalISel] Assign FPR banks to loads which are used by 
integer->float conversions.

G_[US]ITOFP users of loads on AArch64 can operate on both gpr and fpr banks for 
scalars.
Because of this, if their source is a load, then that load can be assigned to 
an fpr
bank and therefore avoid having to do a cross bank copy via a gpr->fpr 
conversion.

Differential Revision: https://reviews.llvm.org/D94701

Added: 


Modified: 
llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir

Removed: 




diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp 
b/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
index eeb7d5bc6eb7..c76c43389b37 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
@@ -680,11 +680,18 @@ AArch64RegisterBankInfo::getInstrMapping(const 
MachineInstr &MI) const {
 break;
   }
   case TargetOpcode::G_SITOFP:
-  case TargetOpcode::G_UITOFP:
+  case TargetOpcode::G_UITOFP: {
 if (MRI.getType(MI.getOperand(0).getReg()).isVector())
   break;
-OpRegBankIdx = {PMI_FirstFPR, PMI_FirstGPR};
+// Integer to FP conversions don't necessarily happen between GPR -> FPR
+// regbanks. They can also be done within an FPR register.
+Register SrcReg = MI.getOperand(1).getReg();
+if (getRegBank(SrcReg, MRI, TRI) == &AArch64::FPRRegBank)
+  OpRegBankIdx = {PMI_FirstFPR, PMI_FirstFPR};
+else
+  OpRegBankIdx = {PMI_FirstFPR, PMI_FirstGPR};
 break;
+  }
   case TargetOpcode::G_FPTOSI:
   case TargetOpcode::G_FPTOUI:
 if (MRI.getType(MI.getOperand(0).getReg()).isVector())
@@ -722,7 +729,8 @@ AArch64RegisterBankInfo::getInstrMapping(const MachineInstr 
&MI) const {
 // assume this was a floating point load in the IR.
 // If it was not, we would have had a bitcast before
 // reaching that instruction.
-if (onlyUsesFP(UseMI, MRI, TRI)) {
+// Int->FP conversion operations are also captured in onlyDefinesFP().
+if (onlyUsesFP(UseMI, MRI, TRI) || onlyDefinesFP(UseMI, MRI, TRI)) {
   OpRegBankIdx[0] = PMI_FirstFPR;
   break;
 }

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir 
b/llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
index a7aae275fa5d..46177b4f1b1f 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
@@ -4,7 +4,7 @@
 # Check that we correctly assign register banks based off of instructions which
 # only use or only define FPRs.
 #
-# For example, G_SITOFP takes in a GPR, but only ever produces values on FPRs.
+# For example, G_SITOFP may take in a GPR, but only ever produces values on 
FPRs.
 # Some instructions can have inputs/outputs on either FPRs or GPRs. If one of
 # those instructions takes in the result of a G_SITOFP as a source, we should
 # put that source on a FPR.
@@ -361,3 +361,47 @@ body: |
 %phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %unmerge_1(s32), %bb.1
 $s0 = COPY %phi(s32)
 RET_ReallyLR implicit $s0
+
+...
+---
+name:load_used_by_sitofp
+legalized:   true
+tracksRegLiveness: true
+body: |
+  bb.0:
+liveins: $x0
+; The load should be assigned an fpr bank because it's used by the sitofp.
+; The sitofp should assign both src and dest to FPR, resulting in no 
copies.
+; CHECK-LABEL: name: load_used_by_sitofp
+; CHECK: liveins: $x0
+; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0
+; CHECK: [[LOAD:%[0-9]+]]:fpr(s32) = G_LOAD [[COPY]](p0) :: (load 4)
+; CHECK: [[SITOFP:%[0-9]+]]:fpr(s32) = G_SITOFP [[LOAD]](s32)
+; CHECK: $s0 = COPY [[SITOFP]](s32)
+; CHECK: RET_ReallyLR implicit $s0
+%0:_(p0) = COPY $x0
+%1:_(s32) = G_LOAD %0 :: (load 4)
+%2:_(s32) = G_SITOFP %1:_(s32)
+$s0 = COPY %2(s32)
+RET_ReallyLR implicit $s0
+...
+---
+name:load_used_by_uitofp
+legalized:   true
+tracksRegLiveness: true
+body: |
+  bb.0:
+liveins: $x0
+; CHECK-LABEL: name: load_used_by_uitofp
+; CHECK: liveins: $x0
+; CHECK: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0
+; CHECK: [[LOAD:%[0-9]+]]:fpr(s32) = G_LOAD [[COPY]](p0) :: (load 4)
+; CHECK: [[UITOFP:%[0-9]+]]:fpr(s32) = G_UITOFP [[LOAD]](s32)
+; CHECK: $s0 = COPY [[UITOFP]](s32)
+; CHECK: RET_ReallyLR implicit $s0
+%0:_(p0) = COPY $x0
+%1:_(s32) = G_LOAD %0 :: (load 4)
+%2:_(s32) = G_UITOFP %1:_(s32)
+$s0 = COPY %2

[llvm-branch-commits] [llvm] 9dfeec8 - Reland "[AsmParser] make .ascii support spaces as separators"

[Jian Cai via llvm-branch-commits]

Author: Jian Cai
Date: 2021-01-14T17:51:47-08:00
New Revision: 9dfeec853008109b1cbe926c22675c96226040d9

URL: 
https://github.com/llvm/llvm-project/commit/9dfeec853008109b1cbe926c22675c96226040d9
DIFF: 
https://github.com/llvm/llvm-project/commit/9dfeec853008109b1cbe926c22675c96226040d9.diff

LOG: Reland "[AsmParser] make .ascii support spaces as separators"

This relands commit e0963ae274be5b071d1e1b00f5e4e019483c09e9, which was
reverted on commit 82c4153e66fa284729da86a8d6c302d4b8cec86c due to a
test failure, which turned out to be a false positive.

Added: 


Modified: 
llvm/lib/MC/MCParser/AsmParser.cpp
llvm/test/MC/AsmParser/directive_ascii.s

Removed: 




diff  --git a/llvm/lib/MC/MCParser/AsmParser.cpp 
b/llvm/lib/MC/MCParser/AsmParser.cpp
index 42ac0b66ec2a..c5ff241ead74 100644
--- a/llvm/lib/MC/MCParser/AsmParser.cpp
+++ b/llvm/lib/MC/MCParser/AsmParser.cpp
@@ -3008,13 +3008,20 @@ bool AsmParser::parseAngleBracketString(std::string 
&Data) {
 }
 
 /// parseDirectiveAscii:
-///   ::= ( .ascii | .asciz | .string ) [ "string" ( , "string" )* ]
+//::= .ascii [ "string"+ ( , "string"+ )* ]
+///   ::= ( .asciz | .string ) [ "string" ( , "string" )* ]
 bool AsmParser::parseDirectiveAscii(StringRef IDVal, bool ZeroTerminated) {
   auto parseOp = [&]() -> bool {
 std::string Data;
-if (checkForValidSection() || parseEscapedString(Data))
+if (checkForValidSection())
   return true;
-getStreamer().emitBytes(Data);
+// Only support spaces as separators for .ascii directive for now. See the
+// discusssion at https://reviews.llvm.org/D91460 for more details.
+do {
+  if (parseEscapedString(Data))
+return true;
+  getStreamer().emitBytes(Data);
+} while (!ZeroTerminated && getTok().is(AsmToken::String));
 if (ZeroTerminated)
   getStreamer().emitBytes(StringRef("\0", 1));
 return false;

diff  --git a/llvm/test/MC/AsmParser/directive_ascii.s 
b/llvm/test/MC/AsmParser/directive_ascii.s
index ea988879819b..e34aa7a8a561 100644
--- a/llvm/test/MC/AsmParser/directive_ascii.s
+++ b/llvm/test/MC/AsmParser/directive_ascii.s
@@ -48,3 +48,11 @@ TEST6:
 TEST7:
 .ascii "\x64\Xa6B"
 .ascii "\xface\x0Fe"
+
+# CHECK-LABEL: TEST8:
+# CHECK-NEXT: .byte 65
+# CHECK-NEXT: .byte 66
+# CHECK-NEXT: .byte 67
+# CHECK-NEXT: .byte 68
+TEST8:
+.ascii "A", "B" "C", "D"



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[llvm-branch-commits] [openmp] 214387c - [libomptarget][nvptx] Reduce calls to cuda header

[Jon Chesterfield via llvm-branch-commits]

Author: Jon Chesterfield
Date: 2021-01-15T02:16:33Z
New Revision: 214387c2c694c92fec713f7ad224f10c1aebc1cf

URL: 
https://github.com/llvm/llvm-project/commit/214387c2c694c92fec713f7ad224f10c1aebc1cf
DIFF: 
https://github.com/llvm/llvm-project/commit/214387c2c694c92fec713f7ad224f10c1aebc1cf.diff

LOG: [libomptarget][nvptx] Reduce calls to cuda header

[libomptarget][nvptx] Reduce calls to cuda header

Remove use of clock_t in favour of a builtin. Drop a preprocessor branch.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94731

Added: 


Modified: 
openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu

Removed: 




diff  --git a/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu 
b/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
index 7e81aba4152d..b68d3265a758 100644
--- a/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
+++ b/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
@@ -56,7 +56,6 @@ DEVICE double __kmpc_impl_get_wtime() {
 }
 
 // In Cuda 9.0, __ballot(1) from Cuda 8.0 is replaced with __activemask().
-
 DEVICE __kmpc_impl_lanemask_t __kmpc_impl_activemask() {
 #if CUDA_VERSION >= 9000
   return __activemask();
@@ -66,7 +65,6 @@ DEVICE __kmpc_impl_lanemask_t __kmpc_impl_activemask() {
 }
 
 // In Cuda 9.0, the *_sync() version takes an extra argument 'mask'.
-
 DEVICE int32_t __kmpc_impl_shfl_sync(__kmpc_impl_lanemask_t Mask, int32_t Var,
  int32_t SrcLane) {
 #if CUDA_VERSION >= 9000
@@ -86,14 +84,7 @@ DEVICE int32_t 
__kmpc_impl_shfl_down_sync(__kmpc_impl_lanemask_t Mask,
 #endif // CUDA_VERSION
 }
 
-DEVICE void __kmpc_impl_syncthreads() {
-  // Use original __syncthreads if compiled by nvcc or clang >= 9.0.
-#if !defined(__clang__) || __clang_major__ >= 9
-  __syncthreads();
-#else
-  asm volatile("bar.sync %0;" : : "r"(0) : "memory");
-#endif // __clang__
-}
+DEVICE void __kmpc_impl_syncthreads() { __syncthreads(); }
 
 DEVICE void __kmpc_impl_syncwarp(__kmpc_impl_lanemask_t Mask) {
 #if CUDA_VERSION >= 9000
@@ -145,11 +136,11 @@ DEVICE void __kmpc_impl_destroy_lock(omp_lock_t *lock) {
 DEVICE void __kmpc_impl_set_lock(omp_lock_t *lock) {
   // TODO: not sure spinning is a good idea here..
   while (__kmpc_atomic_cas(lock, UNSET, SET) != UNSET) {
-clock_t start = clock();
-clock_t now;
+int32_t start = __nvvm_read_ptx_sreg_clock();
+int32_t now;
 for (;;) {
-  now = clock();
-  clock_t cycles = now > start ? now - start : now + (0x - start);
+  now = __nvvm_read_ptx_sreg_clock();
+  int32_t cycles = now > start ? now - start : now + (0x - start);
   if (cycles >= __OMP_SPIN * GetBlockIdInKernel()) {
 break;
   }



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[llvm-branch-commits] [clang] 1fabe6e - [libTooling] Change `addInclude` to use expansion locs.

[Yitzhak Mandelbaum via llvm-branch-commits]

Author: Yitzhak Mandelbaum
Date: 2021-01-15T03:08:56Z
New Revision: 1fabe6e51917bcd7a1242294069c682fe6dffa45

URL: 
https://github.com/llvm/llvm-project/commit/1fabe6e51917bcd7a1242294069c682fe6dffa45
DIFF: 
https://github.com/llvm/llvm-project/commit/1fabe6e51917bcd7a1242294069c682fe6dffa45.diff

LOG: [libTooling] Change `addInclude` to use expansion locs.

This patch changes the default range used to anchor the include insertion to use
an expansion loc.  This ensures that the location is valid, when the user relies
on the default range.

Driveby: extend a FIXME for a problem that was emphasized by this change; fix 
some spellings.

Differential Revision: https://reviews.llvm.org/D93703

Added: 


Modified: 
clang/include/clang/Tooling/Transformer/RewriteRule.h
clang/lib/Tooling/Transformer/RewriteRule.cpp

Removed: 




diff  --git a/clang/include/clang/Tooling/Transformer/RewriteRule.h 
b/clang/include/clang/Tooling/Transformer/RewriteRule.h
index 355b3249d3bc..ac93db8446df 100644
--- a/clang/include/clang/Tooling/Transformer/RewriteRule.h
+++ b/clang/include/clang/Tooling/Transformer/RewriteRule.h
@@ -213,10 +213,12 @@ ASTEdit addInclude(RangeSelector Target, StringRef Header,
IncludeFormat Format = IncludeFormat::Quoted);
 
 /// Adds an include directive for the given header to the file associated with
-/// `RootID`.
+/// `RootID`. If `RootID` matches inside a macro expansion, will add the
+/// directive to the file in which the macro was expanded (as opposed to the
+/// file in which the macro is defined).
 inline ASTEdit addInclude(StringRef Header,
   IncludeFormat Format = IncludeFormat::Quoted) {
-  return addInclude(node(RootID), Header, Format);
+  return addInclude(expansion(node(RootID)), Header, Format);
 }
 
 // FIXME: If `Metadata` returns an `llvm::Expected` the `AnyGenerator` will
@@ -312,8 +314,8 @@ inline RewriteRule 
makeRule(ast_matchers::internal::DynTypedMatcher M,
 /// \code
 ///   auto R = makeRule(callExpr(callee(functionDecl(hasName("foo",
 ///changeTo(cat("bar()")));
-///   AddInclude(R, "path/to/bar_header.h");
-///   AddInclude(R, "vector", IncludeFormat::Angled);
+///   addInclude(R, "path/to/bar_header.h");
+///   addInclude(R, "vector", IncludeFormat::Angled);
 /// \endcode
 void addInclude(RewriteRule &Rule, llvm::StringRef Header,
 IncludeFormat Format = IncludeFormat::Quoted);

diff  --git a/clang/lib/Tooling/Transformer/RewriteRule.cpp 
b/clang/lib/Tooling/Transformer/RewriteRule.cpp
index acff1e83c4e1..93bd7e91dba7 100644
--- a/clang/lib/Tooling/Transformer/RewriteRule.cpp
+++ b/clang/lib/Tooling/Transformer/RewriteRule.cpp
@@ -42,7 +42,12 @@ translateEdits(const MatchResult &Result, ArrayRef 
ASTEdits) {
 llvm::Optional EditRange =
 tooling::getRangeForEdit(*Range, *Result.Context);
 // FIXME: let user specify whether to treat this case as an error or ignore
-// it as is currently done.
+// it as is currently done. This behavior is problematic in that it hides
+// failures from bad ranges. Also, the behavior here 
diff ers from
+// `flatten`. Here, we abort (without error), whereas flatten, if it hits 
an
+// empty list, does not abort. As a result, `editList({A,B})` is not
+// equivalent to `flatten(edit(A), edit(B))`. The former will abort if `A`
+// produces a bad range, whereas the latter will simply ignore A.
 if (!EditRange)
   return SmallVector();
 auto Replacement = E.Replacement->eval(Result);



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[llvm-branch-commits] [llvm] 8f283ca - [AArch64][GlobalISel] Add selection support for fpr bank source variants of G_SITOFP and G_UITOFP.

[Amara Emerson via llvm-branch-commits]

Author: Amara Emerson
Date: 2021-01-14T19:31:19-08:00
New Revision: 8f283cafddfa8d6d01a94b48cdc5d25817569e91

URL: 
https://github.com/llvm/llvm-project/commit/8f283cafddfa8d6d01a94b48cdc5d25817569e91
DIFF: 
https://github.com/llvm/llvm-project/commit/8f283cafddfa8d6d01a94b48cdc5d25817569e91.diff

LOG: [AArch64][GlobalISel] Add selection support for fpr bank source variants 
of G_SITOFP and G_UITOFP.

In order to import patterns for these, we need to define new ops that can map to
the AArch64ISD::[SU]ITOF nodes. We then transform fpr->fpr variants of the 
generic
opcodes to these custom opcodes in preisel-lowering. We have to do it here and
not the PostLegalizer combiner because this has to run after regbankselect.

Differential Revision: https://reviews.llvm.org/D94702

Added: 


Modified: 
llvm/lib/Target/AArch64/AArch64InstrGISel.td
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
llvm/test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir

Removed: 




diff  --git a/llvm/lib/Target/AArch64/AArch64InstrGISel.td 
b/llvm/lib/Target/AArch64/AArch64InstrGISel.td
index eadb6847ceb6..25656fac1d2f 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrGISel.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrGISel.td
@@ -146,6 +146,16 @@ def G_VLSHR : AArch64GenericInstruction {
   let InOperandList = (ins type0:$src1, untyped_imm_0:$imm);
 }
 
+// Represents an integer to FP conversion on the FPR bank.
+def G_SITOF : AArch64GenericInstruction {
+  let OutOperandList = (outs type0:$dst);
+  let InOperandList = (ins type0:$src);
+}
+def G_UITOF : AArch64GenericInstruction {
+  let OutOperandList = (outs type0:$dst);
+  let InOperandList = (ins type0:$src);
+}
+
 def : GINodeEquiv;
 def : GINodeEquiv;
 def : GINodeEquiv;
@@ -163,6 +173,8 @@ def : GINodeEquiv;
 def : GINodeEquiv;
 def : GINodeEquiv;
 def : GINodeEquiv;
+def : GINodeEquiv;
+def : GINodeEquiv;
 
 def : GINodeEquiv;
 

diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp 
b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 6dc0d1fb97e2..c2e3d9484207 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -1941,6 +1941,24 @@ bool 
AArch64InstructionSelector::preISelLower(MachineInstr &I) {
 I.getOperand(1).setReg(NewSrc.getReg(0));
 return true;
   }
+  case TargetOpcode::G_UITOFP:
+  case TargetOpcode::G_SITOFP: {
+// If both source and destination regbanks are FPR, then convert the opcode
+// to G_SITOF so that the importer can select it to an fpr variant.
+// Otherwise, it ends up matching an fpr/gpr variant and adding a 
cross-bank
+// copy.
+Register SrcReg = I.getOperand(1).getReg();
+if (MRI.getType(SrcReg).isVector())
+  return false;
+if (RBI.getRegBank(SrcReg, MRI, TRI)->getID() == AArch64::FPRRegBankID) {
+  if (I.getOpcode() == TargetOpcode::G_SITOFP)
+I.setDesc(TII.get(AArch64::G_SITOF));
+  else
+I.setDesc(TII.get(AArch64::G_UITOF));
+  return true;
+}
+return false;
+  }
   default:
 return false;
   }

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir 
b/llvm/test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir
index aea10c5c6c9d..aad71bd99f8f 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir
@@ -218,7 +218,7 @@ body: |
 ...
 
 ---
-name:sitofp_s32_s32_fpr
+name:sitofp_s32_s32_fpr_gpr
 legalized:   true
 regBankSelected: true
 
@@ -230,7 +230,7 @@ body: |
   bb.0:
 liveins: $w0
 
-; CHECK-LABEL: name: sitofp_s32_s32_fpr
+; CHECK-LABEL: name: sitofp_s32_s32_fpr_gpr
 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
 ; CHECK: [[SCVTFUWSri:%[0-9]+]]:fpr32 = SCVTFUWSri [[COPY]]
 ; CHECK: $s0 = COPY [[SCVTFUWSri]]
@@ -239,6 +239,50 @@ body: |
 $s0 = COPY %1(s32)
 ...
 
+---
+name:sitofp_s32_s32_fpr_fpr
+legalized:   true
+regBankSelected: true
+
+registers:
+  - { id: 0, class: fpr }
+  - { id: 1, class: fpr }
+
+body: |
+  bb.0:
+liveins: $s0
+
+; CHECK-LABEL: name: sitofp_s32_s32_fpr_fpr
+; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0
+; CHECK: [[SCVTFv1i32:%[0-9]+]]:fpr32 = SCVTFv1i32 [[COPY]]
+; CHECK: $s0 = COPY [[SCVTFv1i32]]
+%0(s32) = COPY $s0
+%1(s32) = G_SITOFP %0
+$s0 = COPY %1(s32)
+...
+
+---
+name:uitofp_s32_s32_fpr_fpr
+legalized:   true
+regBankSelected: true
+
+registers:
+  - { id: 0, class: fpr }
+  - { id: 1, class: fpr }
+
+body: |
+  bb.0:
+liveins: $s0
+
+; CHECK-LABEL: name: uitofp_s32_s32_fpr_fpr
+; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0
+; CHECK: [[UCVTFv1i32:%[0-9]+]]:fpr32 = UCVTFv1i32 [[COPY]]
+; CHECK: $s0 = COPY [[UCVTFv1

[llvm-branch-commits] [libc] 2423ec5 - [libc] Add memmove implementation.

[Cheng Wang via llvm-branch-commits]

Author: Cheng Wang
Date: 2021-01-15T12:08:25+08:00
New Revision: 2423ec583761304f93b5d01493a26aeb11cb5b8f

URL: 
https://github.com/llvm/llvm-project/commit/2423ec583761304f93b5d01493a26aeb11cb5b8f
DIFF: 
https://github.com/llvm/llvm-project/commit/2423ec583761304f93b5d01493a26aeb11cb5b8f.diff

LOG: [libc] Add memmove implementation.

Use `memcpy` rather than copying bytes one by one, for there might be large
size structs to move.

Reviewed By: gchatelet, sivachandra

Differential Revision: https://reviews.llvm.org/D93195

Added: 
libc/src/string/memmove.cpp
libc/src/string/memmove.h
libc/test/src/string/memmove_test.cpp

Modified: 
libc/config/linux/aarch64/entrypoints.txt
libc/config/linux/x86_64/entrypoints.txt
libc/src/string/CMakeLists.txt
libc/test/src/string/CMakeLists.txt

Removed: 




diff  --git a/libc/config/linux/aarch64/entrypoints.txt 
b/libc/config/linux/aarch64/entrypoints.txt
index 2b70cafd6fbf..4e20903ad260 100644
--- a/libc/config/linux/aarch64/entrypoints.txt
+++ b/libc/config/linux/aarch64/entrypoints.txt
@@ -30,6 +30,7 @@ set(TARGET_LIBC_ENTRYPOINTS
 libc.src.string.memchr
 libc.src.string.memcmp
 libc.src.string.memcpy
+libc.src.string.memmove
 libc.src.string.memset
 libc.src.string.memrchr
 libc.src.string.strcat

diff  --git a/libc/config/linux/x86_64/entrypoints.txt 
b/libc/config/linux/x86_64/entrypoints.txt
index 7c5367a9d528..d073e63d715f 100644
--- a/libc/config/linux/x86_64/entrypoints.txt
+++ b/libc/config/linux/x86_64/entrypoints.txt
@@ -52,6 +52,7 @@ set(TARGET_LIBC_ENTRYPOINTS
 libc.src.string.memchr
 libc.src.string.memcmp
 libc.src.string.memcpy
+libc.src.string.memmove
 libc.src.string.memrchr
 libc.src.string.memset
 libc.src.string.strcat

diff  --git a/libc/src/string/CMakeLists.txt b/libc/src/string/CMakeLists.txt
index 683b85720c60..e40eeb16b907 100644
--- a/libc/src/string/CMakeLists.txt
+++ b/libc/src/string/CMakeLists.txt
@@ -66,6 +66,18 @@ add_entrypoint_object(
 memcmp.h
 )
 
+add_entrypoint_object(
+  memmove
+  SRCS
+memmove.cpp
+  HDRS
+memmove.h
+  DEPENDS
+libc.include.unistd
+libc.src.stdlib.abs_utils
+libc.src.string.memcpy
+)
+
 add_entrypoint_object(
   strchr
   SRCS

diff  --git a/libc/src/string/memmove.cpp b/libc/src/string/memmove.cpp
new file mode 100644
index ..8958027d1d58
--- /dev/null
+++ b/libc/src/string/memmove.cpp
@@ -0,0 +1,61 @@
+//===-- Implementation of memmove 
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "src/string/memmove.h"
+#include "src/__support/common.h"
+#include "src/stdlib/abs_utils.h"
+#include "src/string/memcpy.h"
+#include  // size_t, ptr
diff _t
+#include  // ssize_t
+
+namespace __llvm_libc {
+
+// src_m and dest_m might be the beginning or end.
+static inline void move_byte(unsigned char *dest_m, const unsigned char *src_m,
+ size_t count, ssize_t direction) {
+  for (ssize_t offset = 0; count; --count, offset += direction)
+dest_m[offset] = src_m[offset];
+}
+
+LLVM_LIBC_FUNCTION(void *, memmove,
+   (void *dest, const void *src, size_t count)) {
+  unsigned char *dest_c = reinterpret_cast(dest);
+  const unsigned char *src_c = reinterpret_cast(src);
+
+  // If the distance between src_c and dest_c is equal to or greater
+  // than count (integer_abs(src_c - dest_c) >= count), they would not overlap.
+  // e.g.   greater equal   overlapping
+  //[12345678]  [12345678]  [12345678]
+  // src_c: [_ab_]  [_ab_]  [_ab_]
+  // dest_c:[_yz_]  [___yz___]  [__yz]
+
+  // Use memcpy if src_c and dest_c do not overlap.
+  if (__llvm_libc::integer_abs(src_c - dest_c) >= static_cast(count))
+return __llvm_libc::memcpy(dest_c, src_c, count);
+
+  // Overlap cases.
+  // If dest_c starts before src_c (dest_c < src_c), copy forward(pointer add 
1)
+  // from beginning to end.
+  // If dest_c starts after src_c (dest_c > src_c), copy backward(pointer add
+  // -1) from end to beginning.
+  // If dest_c and src_c start at the same address (dest_c == src_c),
+  // just return dest.
+  // e.g.forward  backward
+  // *--><--*
+  // src_c : [___abcde_]  [_abcde___]
+  // dest_c: [_abc--___]  [___--cde_]
+
+  // TODO: Optimize `move_byte(...)` function.
+  if (dest_c < src_c)
+move_byte(dest_c, src_c, count, /*pointer add*/ 1);
+  if (dest_c > src_c)
+move_byte(dest_c + count - 1, src_c + count - 1, count, /*pointer add*/ 
-1);
+  return dest;
+}
+
+} // namespace __llvm_libc

diff  --git a/libc/src/string/m

[llvm-branch-commits] [llvm] 9bcc0d1 - [CodeGen, Transforms] Use llvm::sort (NFC)

[Kazu Hirata via llvm-branch-commits]

Author: Kazu Hirata
Date: 2021-01-14T20:30:31-08:00
New Revision: 9bcc0d1040ddd63b7f82e309c0d5feb4e0c9005e

URL: 
https://github.com/llvm/llvm-project/commit/9bcc0d1040ddd63b7f82e309c0d5feb4e0c9005e
DIFF: 
https://github.com/llvm/llvm-project/commit/9bcc0d1040ddd63b7f82e309c0d5feb4e0c9005e.diff

LOG: [CodeGen, Transforms] Use llvm::sort (NFC)

Added: 


Modified: 
llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
llvm/lib/CodeGen/RDFLiveness.cpp
llvm/lib/CodeGen/RegAllocFast.cpp
llvm/lib/Transforms/Coroutines/CoroFrame.cpp
llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
llvm/lib/Transforms/Scalar/NewGVN.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp 
b/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
index 86b804774696..1c9131edab83 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
@@ -242,7 +242,7 @@ void DbgValueHistoryMap::trimLocationRanges(
   if (ReferenceCount[i] <= 0 && HistoryMapEntries[i].isClobber())
 ToRemove.push_back(i);
 
-std::sort(ToRemove.begin(), ToRemove.end());
+llvm::sort(ToRemove);
 
 // Build an offset map so we can update the EndIndex of the remaining
 // entries.

diff  --git a/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp 
b/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
index 34a494cef9c5..1171e4b9519d 100644
--- a/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
+++ b/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
@@ -301,7 +301,7 @@ class FrameIndexesCache {
   void sortRegisters(SmallVectorImpl &Regs) {
 if (!FixupSCSExtendSlotSize)
   return;
-llvm::sort(Regs.begin(), Regs.end(), [&](Register &A, Register &B) {
+llvm::sort(Regs, [&](Register &A, Register &B) {
   return getRegisterSize(TRI, A) > getRegisterSize(TRI, B);
 });
   }

diff  --git a/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp 
b/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
index b6f46daf8bba..18ffe8ba0669 100644
--- a/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
+++ b/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
@@ -2282,7 +2282,7 @@ InstrRefBasedLDV::mlocJoin(MachineBasicBlock &MBB,
   auto Cmp = [&](const MachineBasicBlock *A, const MachineBasicBlock *B) {
 return BBToOrder.find(A)->second < BBToOrder.find(B)->second;
   };
-  llvm::sort(BlockOrders.begin(), BlockOrders.end(), Cmp);
+  llvm::sort(BlockOrders, Cmp);
 
   // Skip entry block.
   if (BlockOrders.size() == 0)
@@ -2649,7 +2649,7 @@ std::tuple InstrRefBasedLDV::vlocJoin(
 return BBToOrder[A] < BBToOrder[B];
   };
 
-  llvm::sort(BlockOrders.begin(), BlockOrders.end(), Cmp);
+  llvm::sort(BlockOrders, Cmp);
 
   unsigned CurBlockRPONum = BBToOrder[&MBB];
 
@@ -2991,7 +2991,7 @@ void InstrRefBasedLDV::vlocDataflow(
   for (auto *MBB : BlocksToExplore)
 BlockOrders.push_back(const_cast(MBB));
 
-  llvm::sort(BlockOrders.begin(), BlockOrders.end(), Cmp);
+  llvm::sort(BlockOrders, Cmp);
   unsigned NumBlocks = BlockOrders.size();
 
   // Allocate some vectors for storing the live ins and live outs. Large.
@@ -3170,7 +3170,7 @@ void InstrRefBasedLDV::emitLocations(
   // in the middle.
   for (auto &P : TTracker->Transfers) {
 // Sort them according to appearance order.
-llvm::sort(P.Insts.begin(), P.Insts.end(), OrderDbgValues);
+llvm::sort(P.Insts, OrderDbgValues);
 // Insert either before or after the designated point...
 if (P.MBB) {
   MachineBasicBlock &MBB = *P.MBB;

diff  --git a/llvm/lib/CodeGen/RDFLiveness.cpp 
b/llvm/lib/CodeGen/RDFLiveness.cpp
index a8b254061b41..76bf0c280970 100644
--- a/llvm/lib/CodeGen/RDFLiveness.cpp
+++ b/llvm/lib/CodeGen/RDFLiveness.cpp
@@ -230,11 +230,11 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR,
 TmpBB.push_back(Bucket.first);
 if (Bucket.second.size() > 2)
   GetOrder(*Bucket.first);
-llvm::sort(Bucket.second.begin(), Bucket.second.end(), Precedes);
+llvm::sort(Bucket.second, Precedes);
   }
 
   // Sort the blocks with respect to dominance.
-  llvm::sort(TmpBB.begin(), TmpBB.end(),
+  llvm::sort(TmpBB,
  [this](auto A, auto B) { return MDT.properlyDominates(A, B); });
 
   std::vector TmpInst;

diff  --git a/llvm/lib/CodeGen/RegAllocFast.cpp 
b/llvm/lib/CodeGen/RegAllocFast.cpp
index d6c5e11fd0c5..6e548d4a93c8 100644
--- a/llvm/lib/CodeGen/RegAllocFast.cpp
+++ b/llvm/lib/CodeGen/RegAllocFast.cpp
@@ -1157,8 +1157,7 @@ void RegAllocFast::allocateInstruction(MachineInstr &MI) {
   }
 }
 
-llvm::sort(DefOperandIndexes.begin(), DefOperandIndexes.end(),
-   [&](uint16_t I0

[llvm-branch-commits] [llvm] 2efcbe2 - [llvm] Use llvm::drop_begin (NFC)

[Kazu Hirata via llvm-branch-commits]

Author: Kazu Hirata
Date: 2021-01-14T20:30:33-08:00
New Revision: 2efcbe24a75b2a9ff6d59d242f560dca96e5f7e0

URL: 
https://github.com/llvm/llvm-project/commit/2efcbe24a75b2a9ff6d59d242f560dca96e5f7e0
DIFF: 
https://github.com/llvm/llvm-project/commit/2efcbe24a75b2a9ff6d59d242f560dca96e5f7e0.diff

LOG: [llvm] Use llvm::drop_begin (NFC)

Added: 


Modified: 
llvm/lib/Analysis/LazyCallGraph.cpp
llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
llvm/lib/Analysis/VFABIDemangling.cpp
llvm/lib/CodeGen/CodeGenPrepare.cpp
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
llvm/lib/Target/X86/X86MCInstLower.cpp
llvm/lib/Transforms/IPO/OpenMPOpt.cpp
llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
llvm/tools/llvm-xray/xray-stacks.cpp

Removed: 




diff  --git a/llvm/lib/Analysis/LazyCallGraph.cpp 
b/llvm/lib/Analysis/LazyCallGraph.cpp
index ef16f94822a3..f2c85a69f125 100644
--- a/llvm/lib/Analysis/LazyCallGraph.cpp
+++ b/llvm/lib/Analysis/LazyCallGraph.cpp
@@ -866,7 +866,7 @@ LazyCallGraph::RefSCC::switchInternalEdgeToRef(Node 
&SourceN, Node &TargetN) {
 PendingSCCStack.clear();
 while (!DFSStack.empty())
   OldSCC.Nodes.push_back(DFSStack.pop_back_val().first);
-for (Node &N : make_range(OldSCC.begin() + OldSize, OldSCC.end())) 
{
+for (Node &N : drop_begin(OldSCC, OldSize)) {
   N.DFSNumber = N.LowLink = -1;
   G->SCCMap[&N] = &OldSCC;
 }

diff  --git a/llvm/lib/Analysis/ModuleSummaryAnalysis.cpp 
b/llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
index 7d06aac08619..ed544c284990 100644
--- a/llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
+++ b/llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
@@ -145,7 +145,7 @@ static void addVCallToSet(DevirtCallSite Call, 
GlobalValue::GUID Guid,
   SetVector &ConstVCalls) 
{
   std::vector Args;
   // Start from the second argument to skip the "this" pointer.
-  for (auto &Arg : make_range(Call.CB.arg_begin() + 1, Call.CB.arg_end())) {
+  for (auto &Arg : drop_begin(Call.CB.args(), 1)) {
 auto *CI = dyn_cast(Arg);
 if (!CI || CI->getBitWidth() > 64) {
   VCalls.insert({Guid, Call.Offset});

diff  --git a/llvm/lib/Analysis/VFABIDemangling.cpp 
b/llvm/lib/Analysis/VFABIDemangling.cpp
index 4cdffa63135f..27b48b310af4 100644
--- a/llvm/lib/Analysis/VFABIDemangling.cpp
+++ b/llvm/lib/Analysis/VFABIDemangling.cpp
@@ -290,9 +290,9 @@ bool verifyAllVectorsHaveSameWidth(FunctionType *Signature) 
{
 
   assert(VecTys.size() > 1 && "Invalid number of elements.");
   const ElementCount EC = VecTys[0]->getElementCount();
-  return llvm::all_of(
-  llvm::make_range(VecTys.begin() + 1, VecTys.end()),
-  [&EC](VectorType *VTy) { return (EC == VTy->getElementCount()); });
+  return llvm::all_of(llvm::drop_begin(VecTys, 1), [&EC](VectorType *VTy) {
+return (EC == VTy->getElementCount());
+  });
 }
 
 #endif // NDEBUG

diff  --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp 
b/llvm/lib/CodeGen/CodeGenPrepare.cpp
index 564a3d7d9bc8..2c636e1ac04f 100644
--- a/llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -661,7 +661,7 @@ bool CodeGenPrepare::eliminateFallThrough(Function &F) {
   // Use a temporary array to avoid iterator being invalidated when
   // deleting blocks.
   SmallVector Blocks;
-  for (auto &Block : llvm::make_range(std::next(F.begin()), F.end()))
+  for (auto &Block : llvm::drop_begin(F, 1))
 Blocks.push_back(&Block);
 
   SmallSet Preds;
@@ -747,7 +747,7 @@ bool CodeGenPrepare::eliminateMostlyEmptyBlocks(Function 
&F) {
   // as we remove them.
   // Note that this intentionally skips the entry block.
   SmallVector Blocks;
-  for (auto &Block : llvm::make_range(std::next(F.begin()), F.end()))
+  for (auto &Block : llvm::drop_begin(F, 1))
 Blocks.push_back(&Block);
 
   for (auto &Block : Blocks) {

diff  --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp 
b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
index f9f342a07f6d..fa12fe1da448 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
@@ -110,7 +110,7 @@ HexagonMCInstrInfo::bundleInstructions(MCInstrInfo const 
&MCII,
 iterator_range
 HexagonMCInstrInfo::bundleInstructions(MCInst const &MCI) {
   assert(isBundle(MCI));
-  return make_range(MCI.begin() + bundleInstructionsOffset, MCI.end());
+  return drop_begin(MCI, bundleInstructionsOffset);
 }
 
 size_t HexagonMCInstrInfo::bundleSize(MCInst const &MCI) {

diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 
b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index c693bef6d325..e348bba2b04c 100644
--- a/llvm/lib/Target/WebAssembly/WebAssembl

[llvm-branch-commits] [llvm] 7dc3575 - [llvm] Remove redundant return and continue statements (NFC)

[Kazu Hirata via llvm-branch-commits]

Author: Kazu Hirata
Date: 2021-01-14T20:30:34-08:00
New Revision: 7dc3575ef2dc85d92aa3ad916d0eb73a0aa088c9

URL: 
https://github.com/llvm/llvm-project/commit/7dc3575ef2dc85d92aa3ad916d0eb73a0aa088c9
DIFF: 
https://github.com/llvm/llvm-project/commit/7dc3575ef2dc85d92aa3ad916d0eb73a0aa088c9.diff

LOG: [llvm] Remove redundant return and continue statements (NFC)

Identified with readability-redundant-control-flow.

Added: 


Modified: 
llvm/include/llvm/CodeGen/LiveRegUnits.h
llvm/lib/CodeGen/MachinePipeliner.cpp
llvm/lib/Demangle/MicrosoftDemangleNodes.cpp
llvm/lib/FileCheck/FileCheck.cpp
llvm/lib/IR/AutoUpgrade.cpp
llvm/lib/Passes/StandardInstrumentations.cpp
llvm/lib/Support/Unix/Path.inc
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
llvm/lib/Target/X86/X86IndirectThunks.cpp
llvm/lib/TextAPI/MachO/InterfaceFile.cpp
llvm/lib/Transforms/Coroutines/CoroFrame.cpp
llvm/lib/Transforms/IPO/AttributorAttributes.cpp
llvm/lib/Transforms/IPO/IROutliner.cpp
llvm/lib/Transforms/IPO/OpenMPOpt.cpp
llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
llvm/tools/llvm-mca/CodeRegion.cpp
llvm/tools/llvm-pdbutil/DumpOutputStyle.cpp
llvm/tools/llvm-profdata/llvm-profdata.cpp
llvm/tools/llvm-profgen/ProfiledBinary.cpp
llvm/utils/TableGen/X86FoldTablesEmitter.cpp

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/LiveRegUnits.h 
b/llvm/include/llvm/CodeGen/LiveRegUnits.h
index e20e04cad35c..39a1ec461ef6 100644
--- a/llvm/include/llvm/CodeGen/LiveRegUnits.h
+++ b/llvm/include/llvm/CodeGen/LiveRegUnits.h
@@ -67,7 +67,6 @@ class LiveRegUnits {
 UsedRegUnits.addReg(Reg);
   }
 }
-return;
   }
 
   /// Initialize and clear the set.

diff  --git a/llvm/lib/CodeGen/MachinePipeliner.cpp 
b/llvm/lib/CodeGen/MachinePipeliner.cpp
index 9564192761d2..d0fe29f65ede 100644
--- a/llvm/lib/CodeGen/MachinePipeliner.cpp
+++ b/llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -1751,7 +1751,6 @@ void SwingSchedulerDAG::checkNodeSets(NodeSetType 
&NodeSets) {
   }
   NodeSets.clear();
   LLVM_DEBUG(dbgs() << "Clear recurrence node-sets\n");
-  return;
 }
 
 /// Add the nodes that do not belong to a recurrence set into groups

diff  --git a/llvm/lib/Demangle/MicrosoftDemangleNodes.cpp 
b/llvm/lib/Demangle/MicrosoftDemangleNodes.cpp
index 9cee975231a2..8b15ffcee778 100644
--- a/llvm/lib/Demangle/MicrosoftDemangleNodes.cpp
+++ b/llvm/lib/Demangle/MicrosoftDemangleNodes.cpp
@@ -649,5 +649,4 @@ void SpecialTableSymbolNode::output(OutputStream &OS, 
OutputFlags Flags) const {
 TargetName->output(OS, Flags);
 OS << "'}";
   }
-  return;
 }

diff  --git a/llvm/lib/FileCheck/FileCheck.cpp 
b/llvm/lib/FileCheck/FileCheck.cpp
index c6a5b69e2055..2a213fcfe901 100644
--- a/llvm/lib/FileCheck/FileCheck.cpp
+++ b/llvm/lib/FileCheck/FileCheck.cpp
@@ -2318,7 +2318,6 @@ bool FileCheckString::CheckNot(const SourceMgr &SM, 
StringRef Buffer,
 PrintMatch(false, SM, Prefix, Pat->getLoc(), *Pat, 1, Buffer, Pos, 
MatchLen,
Req, Diags);
 DirectiveFail = true;
-continue;
   }
 
   return DirectiveFail;

diff  --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp
index e863f8e52a26..23e7af6287b6 100644
--- a/llvm/lib/IR/AutoUpgrade.cpp
+++ b/llvm/lib/IR/AutoUpgrade.cpp
@@ -1769,7 +1769,6 @@ void llvm::UpgradeInlineAsmString(std::string *AsmStr) {
   (Pos = AsmStr->find("# marker")) != std::string::npos) {
 AsmStr->replace(Pos, 1, ";");
   }
-  return;
 }
 
 /// Upgrade a call to an old intrinsic. All argument and return casting must be

diff  --git a/llvm/lib/Passes/StandardInstrumentations.cpp 
b/llvm/lib/Passes/StandardInstrumentations.cpp
index 04ff0af2f804..a8bfe02d4432 100644
--- a/llvm/lib/Passes/StandardInstrumentations.cpp
+++ b/llvm/lib/Passes/StandardInstrumentations.cpp
@@ -501,7 +501,6 @@ void PrintIRInstrumentation::printBeforePass(StringRef 
PassID, Any IR) {
 
   SmallString<20> Banner = formatv("*** IR Dump Before {0} ***", PassID);
   unwrapAndPrint(dbgs(), IR, Banner, forcePrintModuleIR());
-  return;
 }
 
 void PrintIRInstrumentation::printAfterPass(StringRef PassID, Any IR) {

diff  --git a/llvm/lib/Support/Unix/Path.inc b/llvm/lib/Support/Unix/Path.inc
index 8b1dbdb08a14..77f3f54bd881 100644
--- a/llvm/lib/Support/Unix/Path.inc
+++ b/llvm/lib/Support/Unix/Path.inc
@@ -685,8 +685,6 @@ void expand_tilde(const Twine &path, SmallVectorImpl 
&dest) {

[llvm-branch-commits] [flang] 39665d9 - Add Semantic check for Flang OpenMP 4.5 - 2.7.1 Do Loop restrictions on single directive and firstprivate clause.

[via llvm-branch-commits]

Author: Yashaswini
Date: 2021-01-15T11:16:25+05:30
New Revision: 39665d9aabb7cd92d58f8ba45b32a1899922ec01

URL: 
https://github.com/llvm/llvm-project/commit/39665d9aabb7cd92d58f8ba45b32a1899922ec01
DIFF: 
https://github.com/llvm/llvm-project/commit/39665d9aabb7cd92d58f8ba45b32a1899922ec01.diff

LOG: Add Semantic check for Flang OpenMP 4.5 - 2.7.1  Do Loop restrictions on 
single directive and firstprivate clause.

Semantic checks added to check the worksharing 'single' region closely nested 
inside a worksharing 'do' region. And also to check whether the 'do' iteration 
variable is a variable in 'Firstprivate' clause.

Files:
check-directive-structure.h
check-omp-structure.h
check-omp-structure.cpp

Testcases:
omp-do01-positivecase.f90
omp-do01.f90
omp-do05-positivecase.f90
omp-do05.f90

Reviewed by: Kiran Chandramohan @kiranchandramohan , Valentin Clement 
@clementval

Differential Revision: https://reviews.llvm.org/D93205

Added: 
flang/test/Semantics/omp-do01-positivecase.f90
flang/test/Semantics/omp-do05-positivecase.f90

Modified: 
flang/lib/Semantics/check-directive-structure.h
flang/lib/Semantics/check-omp-structure.cpp
flang/lib/Semantics/check-omp-structure.h
flang/test/Semantics/omp-do01.f90
flang/test/Semantics/omp-do05.f90

Removed: 




diff  --git a/flang/lib/Semantics/check-directive-structure.h 
b/flang/lib/Semantics/check-directive-structure.h
index 76157ac93925..44b41c14fc22 100644
--- a/flang/lib/Semantics/check-directive-structure.h
+++ b/flang/lib/Semantics/check-directive-structure.h
@@ -139,8 +139,11 @@ class DirectiveStructureChecker : public virtual 
BaseChecker {
 const PC *clause{nullptr};
 std::multimap clauseInfo;
 std::list actualClauses;
+Symbol *loopIV{nullptr};
   };
 
+  void SetLoopIv(Symbol *symbol) { GetContext().loopIV = symbol; }
+
   // back() is the top of the stack
   DirectiveContext &GetContext() {
 CHECK(!dirContext_.empty());
@@ -160,6 +163,7 @@ class DirectiveStructureChecker : public virtual 
BaseChecker {
 GetContext().allowedExclusiveClauses = {};
 GetContext().requiredClauses = {};
 GetContext().clauseInfo = {};
+GetContext().loopIV = {nullptr};
   }
 
   void SetContextDirectiveSource(const parser::CharBlock &directive) {

diff  --git a/flang/lib/Semantics/check-omp-structure.cpp 
b/flang/lib/Semantics/check-omp-structure.cpp
index 773f5b2aeb21..ff0db2c5182c 100644
--- a/flang/lib/Semantics/check-omp-structure.cpp
+++ b/flang/lib/Semantics/check-omp-structure.cpp
@@ -93,6 +93,22 @@ void OmpStructureChecker::Enter(const 
parser::OpenMPLoopConstruct &x) {
 llvm::omp::Directive::OMPD_master});
 PushContextAndClauseSets(beginDir.source, llvm::omp::Directive::OMPD_do);
   }
+  SetLoopInfo(x);
+}
+const parser::Name OmpStructureChecker::GetLoopIndex(
+const parser::DoConstruct *x) {
+  using Bounds = parser::LoopControl::Bounds;
+  return std::get(x->GetLoopControl()->u).name.thing;
+}
+void OmpStructureChecker::SetLoopInfo(const parser::OpenMPLoopConstruct &x) {
+  if (const auto &loopConstruct{
+  std::get>(x.t)}) {
+const parser::DoConstruct *loop{&*loopConstruct};
+if (loop && loop->IsDoNormal()) {
+  const parser::Name &itrVal{GetLoopIndex(loop)};
+  SetLoopIv(itrVal.symbol);
+}
+  }
 }
 
 void OmpStructureChecker::Leave(const parser::OpenMPLoopConstruct &) {
@@ -124,6 +140,13 @@ void OmpStructureChecker::Enter(const 
parser::OpenMPBlockConstruct &x) {
 
   CheckMatching(beginDir, endDir);
 
+  // TODO: This check needs to be extended while implementing nesting of 
regions
+  // checks.
+  if (beginDir.v == llvm::omp::Directive::OMPD_single) {
+HasInvalidWorksharingNesting(
+beginDir.source, {llvm::omp::Directive::OMPD_do});
+  }
+
   PushContextAndClauseSets(beginDir.source, beginDir.v);
   CheckNoBranching(block, beginDir.v, beginDir.source);
 }
@@ -401,7 +424,6 @@ CHECK_SIMPLE_CLAUSE(Copyprivate, OMPC_copyprivate)
 CHECK_SIMPLE_CLAUSE(Default, OMPC_default)
 CHECK_SIMPLE_CLAUSE(Device, OMPC_device)
 CHECK_SIMPLE_CLAUSE(Final, OMPC_final)
-CHECK_SIMPLE_CLAUSE(Firstprivate, OMPC_firstprivate)
 CHECK_SIMPLE_CLAUSE(From, OMPC_from)
 CHECK_SIMPLE_CLAUSE(Inbranch, OMPC_inbranch)
 CHECK_SIMPLE_CLAUSE(IsDevicePtr, OMPC_is_device_ptr)
@@ -487,6 +509,23 @@ void OmpStructureChecker::CheckIsVarPartOfAnotherVar(
 ompObject.u);
   }
 }
+void OmpStructureChecker::Enter(const parser::OmpClause::Firstprivate &x) {
+  CheckAllowed(llvm::omp::Clause::OMPC_firstprivate);
+  CheckIsLoopIvPartOfClause(llvmOmpClause::OMPC_firstprivate, x.v);
+}
+void OmpStructureChecker::CheckIsLoopIvPartOfClause(
+llvmOmpClause clause, const parser::OmpObjectList &ompObjectList) {
+  for (const auto &ompObject : ompObjectList.v) {
+if (const parser::Name * name{parser::Unwrap(ompObject)}) {
+  if (name->symbol == GetContext().loopIV) {
+context_.Say(name->sou

[llvm-branch-commits] [mlir] 5508516 - [mlir][sparse] retry sparse-only for cyclic iteration graphs

[Aart Bik via llvm-branch-commits]

Author: Aart Bik
Date: 2021-01-14T22:39:29-08:00
New Revision: 5508516b06633e95fb5c2d6a5e196e4dcaa72c8d

URL: 
https://github.com/llvm/llvm-project/commit/5508516b06633e95fb5c2d6a5e196e4dcaa72c8d
DIFF: 
https://github.com/llvm/llvm-project/commit/5508516b06633e95fb5c2d6a5e196e4dcaa72c8d.diff

LOG: [mlir][sparse] retry sparse-only for cyclic iteration graphs

This is a very minor improvement during iteration graph construction.
If the first attempt considering the dimension order of all tensors fails,
a second attempt is made using the constraints of sparse tensors only.
Dense tensors prefer dimension order (locality) but provide random access
if needed, enabling the compilation of more sparse kernels.

Reviewed By: penpornk

Differential Revision: https://reviews.llvm.org/D94709

Added: 
mlir/test/Dialect/Linalg/sparse_nd.mlir

Modified: 
mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp

Removed: 




diff  --git a/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp 
b/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
index 7ba0a2f63071..84c71e84c42e 100644
--- a/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
+++ b/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
@@ -274,6 +274,11 @@ class Merger {
 return false;
   }
 
+  // Returns true if tensor has any sparse dimension.
+  bool isSparseTensor(unsigned t) const {
+return llvm::any_of(dims[t], [](Dim d) { return d == Dim::kSparse; });
+  }
+
   // Setter
   void setDim(unsigned t, unsigned i, Dim d) { dims[t][i] = d; }
 
@@ -382,17 +387,22 @@ static bool topSortDFS(unsigned i, std::vector 
&visit,
 /// for sparse storage formats since these only support access along fixed
 /// dimensions. Even for dense storage formats, however, the natural index
 /// order yields innermost unit-stride access with better spatial locality.
-static bool computeIterationGraph(linalg::GenericOp op,
-  std::vector &topSort) {
+static bool computeIterationGraph(Merger &merger, linalg::GenericOp op,
+  std::vector &topSort,
+  bool sparseOnly) {
   // Set up an n x n from/to adjacency matrix of the iteration graph
   // for the implicit loop indices i_0 .. i_n-1.
   unsigned n = op.getNumLoops();
   std::vector> adjM(n, std::vector(n, false));
 
   // Iterate over the indexing maps of every tensor in the tensor expression.
-  for (auto imap : llvm::enumerate(op.indexing_maps())) {
-auto map = imap.value().template cast().getValue();
+  unsigned numTensors = op.getNumShapedOperands();
+  for (unsigned t = 0; t < numTensors; t++) {
+auto map = op.getIndexingMap(t);
 assert(map.getNumDims() == n);
+// Skip dense tensor constraints when sparse only is requested.
+if (sparseOnly && !merger.isSparseTensor(t))
+  continue;
 // At the moment, we take the index variables in the tensor access
 // expression in the order in which they appear (conceptually a
 // "row-major" layout of every tensor). So, a tensor access A_ijk
@@ -407,6 +417,7 @@ static bool computeIterationGraph(linalg::GenericOp op,
 
   // Topologically sort the iteration graph to determine loop order.
   // Report failure for a cyclic iteration graph.
+  topSort.clear();
   topSort.reserve(n);
   std::vector visit(n, 0);
   for (unsigned i = 0; i < n; i++)
@@ -1207,10 +1218,9 @@ struct GenericOpSparsifier : public 
OpRewritePattern {
 // tensors are visited in natural index order. Fails on cycles.
 // This assumes that higher-level passes have already put the
 // tensors in each tensor expression in a feasible order.
-// TODO: try again without *dense* constraints on failure or
-//   even try to insert sparse reorderings to resolve cycles
 std::vector topSort;
-if (!computeIterationGraph(op, topSort))
+if (!computeIterationGraph(merger, op, topSort, /*sparseOnly=*/false) &&
+!computeIterationGraph(merger, op, topSort, /*sparseOnly=*/true))
   return failure();
 
 // Finds the terminating yield statement and builds the tensor

diff  --git a/mlir/test/Dialect/Linalg/sparse_nd.mlir 
b/mlir/test/Dialect/Linalg/sparse_nd.mlir
new file mode 100644
index ..2b0762b1bf37
--- /dev/null
+++ b/mlir/test/Dialect/Linalg/sparse_nd.mlir
@@ -0,0 +1,94 @@
+// NOTE: Assertions have been autogenerated by utils/generate-test-checks.py
+// RUN: mlir-opt %s -test-sparsification | FileCheck %s
+
+// Example with cyclic iteration graph with sparse and dense constraints,
+// but an acyclic iteration graph using sparse constraints only.
+#trait_mul = {
+  indexing_maps = [
+affine_map<(i,j,k,l,m,n,o,p) -> (i,j,k,l,m,n,o,p)>,  // A
+affine_map<(i,j,k,l,m,n,o,p) -> (p,o,n,m,l,k,j,i)>,  // B
+affine_map<(i,j,k,l,m,n,o,p) -> (i,j,k,l,m,n,o,p)>   // X
+  ],
+  sparse = [
+[ "D", "D", "D", "D", "D", "D", "D", "D" ],  // a
+