Author: Nico Weber Date: 2021-01-14T16:19:25-05:00 New Revision: 0975604cc013b51ef2435199bd74a6d635b11150
URL: https://github.com/llvm/llvm-project/commit/0975604cc013b51ef2435199bd74a6d635b11150 DIFF: https://github.com/llvm/llvm-project/commit/0975604cc013b51ef2435199bd74a6d635b11150.diff LOG: [gn build] (manually) port 387d3c24792f Added: Modified: llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn Removed: llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn ################################################################################ diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn index 5469696c0de3..55f10cd5c82b 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn @@ -18,7 +18,6 @@ static_library("AsmParser") { "//llvm/lib/Support", "//llvm/lib/Target/RISCV:RISCVGenCompressInstEmitter", "//llvm/lib/Target/RISCV/MCTargetDesc", - "//llvm/lib/Target/RISCV/Utils", ] include_dirs = [ ".." ] sources = [ "RISCVAsmParser.cpp" ] diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn index c63ab84d9baf..366623cb0fad 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn @@ -50,7 +50,6 @@ static_library("LLVMRISCVCodeGen") { "AsmParser:RISCVGenAsmMatcher", "MCTargetDesc", "TargetInfo", - "Utils", "//llvm/include/llvm/Config:llvm-config", "//llvm/lib/CodeGen", "//llvm/lib/CodeGen/AsmPrinter", @@ -97,6 +96,5 @@ group("RISCV") { "Disassembler", "MCTargetDesc", "TargetInfo", - "Utils", ] } diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn index 09a5a367164a..cb579221fd36 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn @@ -13,7 +13,6 @@ static_library("Disassembler") { "//llvm/lib/MC/MCDisassembler", "//llvm/lib/Support", "//llvm/lib/Target/RISCV/MCTargetDesc", - "//llvm/lib/Target/RISCV/Utils", ] include_dirs = [ ".." ] sources = [ "RISCVDisassembler.cpp" ] diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn index f6326a596920..47d526840fe0 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn @@ -24,6 +24,12 @@ tablegen("RISCVGenRegisterInfo") { td_file = "../RISCV.td" } +tablegen("RISCVGenSearchableTables") { + visibility = [ ":tablegen" ] + args = [ "-gen-searchable-tables" ] + td_file = "../RISCV.td" +} + tablegen("RISCVGenSubtargetInfo") { visibility = [ ":tablegen" ] args = [ "-gen-subtarget" ] @@ -36,11 +42,11 @@ tablegen("RISCVGenSubtargetInfo") { group("tablegen") { visibility = [ ":MCTargetDesc", - "../Utils", ] public_deps = [ ":RISCVGenInstrInfo", ":RISCVGenRegisterInfo", + ":RISCVGenSearchableTables", ":RISCVGenSubtargetInfo", ] } @@ -54,11 +60,11 @@ static_library("MCTargetDesc") { "//llvm/lib/MC", "//llvm/lib/Support", "//llvm/lib/Target/RISCV:RISCVGenCompressInstEmitter", - "//llvm/lib/Target/RISCV/Utils", ] include_dirs = [ ".." ] sources = [ "RISCVAsmBackend.cpp", + "RISCVBaseInfo.cpp", "RISCVELFObjectWriter.cpp", "RISCVELFStreamer.cpp", "RISCVInstPrinter.cpp", @@ -66,6 +72,7 @@ static_library("MCTargetDesc") { "RISCVMCCodeEmitter.cpp", "RISCVMCExpr.cpp", "RISCVMCTargetDesc.cpp", + "RISCVMatInt.cpp", "RISCVTargetStreamer.cpp", ] } diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn deleted file mode 100644 index 5bce835f1dd2..000000000000 --- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn +++ /dev/null @@ -1,27 +0,0 @@ -import("//llvm/utils/TableGen/tablegen.gni") - -# Generates RISCVGenSearchableTables.inc -tablegen("RISCVGenSearchableTables") { - visibility = [ ":Utils" ] - args = [ "-gen-searchable-tables" ] - td_file = "../RISCV.td" -} - -static_library("Utils") { - output_name = "LLVMRISCVUtils" - public_deps = [ ":RISCVGenSearchableTables" ] - deps = [ - "//llvm/lib/MC", - "//llvm/lib/Support", - - # MCTargetDesc depends on Utils, so we can't depend on the full - # MCTargetDesc target here: it would form a cycle. - "//llvm/lib/Target/RISCV/MCTargetDesc:tablegen", - ] - - include_dirs = [ ".." ] - sources = [ - "RISCVBaseInfo.cpp", - "RISCVMatInt.cpp", - ] -} _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
