[PATCH v3 0/3] ARC: Set of patches for IRQ subsystem
First 2 patches fix misuse of IRQ numbers. In some places of the Linux kernel for ARC hardware IRQ numbers are used as virtual IRQ numbers and obviously it is wrong. The third patch forces the kernel to set a simple distribution mode for common interrupts in cases when such interrupts are routed to a single core. Yuriy Kolerov (3): ARC: SMP: Register IPI handler using virq but not hwirq ARCv2: MCIP: Use hwirq instead of virq for resolution of IDU IRQ handlers ARCv2: MCIP: Use IDU_M_DISTRI_DEST mode if there is only 1 destination core arch/arc/include/asm/smp.h | 4 ++-- arch/arc/kernel/mcip.c | 33 - arch/arc/kernel/smp.c | 13 + 3 files changed, 31 insertions(+), 19 deletions(-) -- 2.7.4 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH v3 3/3] ARCv2: MCIP: Use IDU_M_DISTRI_DEST mode if there is only 1 destination core
ARC linux uses 2 distribution modes for common interrupts: round robin
mode (IDU_M_DISTRI_RR) and a simple destination mode (IDU_M_DISTRI_DEST).
The first one is used when more than 1 cores may handle a common interrupt
and the second one is used when only 1 core may handle a common interrupt.
However idu_irq_set_affinity always sets IDU_M_DISTRI_RR for all affinity
values. But there is no sense in setting of such mode if only 1 core must
handle a common interrupt.
Signed-off-by: Yuriy Kolerov
---
arch/arc/kernel/mcip.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c
index 4f4f04b..90f9934 100644
--- a/arch/arc/kernel/mcip.c
+++ b/arch/arc/kernel/mcip.c
@@ -193,6 +193,8 @@ idu_irq_set_affinity(struct irq_data *data, const struct
cpumask *cpumask,
{
unsigned long flags;
cpumask_t online;
+ unsigned int destination_bits;
+ unsigned int distribution_mode;
/* errout if no online cpu per @cpumask */
if (!cpumask_and(&online, cpumask, cpu_online_mask))
@@ -200,8 +202,15 @@ idu_irq_set_affinity(struct irq_data *data, const struct
cpumask *cpumask,
raw_spin_lock_irqsave(&mcip_lock, flags);
- idu_set_dest(data->hwirq, cpumask_bits(&online)[0]);
- idu_set_mode(data->hwirq, IDU_M_TRIG_LEVEL, IDU_M_DISTRI_RR);
+ destination_bits = cpumask_bits(&online)[0];
+ idu_set_dest(data->hwirq, destination_bits);
+
+ if (ffs(destination_bits) == fls(destination_bits))
+ distribution_mode = IDU_M_DISTRI_DEST;
+ else
+ distribution_mode = IDU_M_DISTRI_RR;
+
+ idu_set_mode(data->hwirq, IDU_M_TRIG_LEVEL, distribution_mode);
raw_spin_unlock_irqrestore(&mcip_lock, flags);
--
2.7.4
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[PATCH v3 2/3] ARCv2: MCIP: Use hwirq instead of virq for resolution of IDU IRQ handlers
Multicore ARC configurations use IDU (Interrupt Distribution Unit) for
distributing of common interrupts. In fact IDU is a interrupt controller
on top of main per core interrupt controller.
All common IRQs are physically and linearly mapped to per core
interrupts. E.g. <0, 1, 2, 3> common IDU interrupts may be mapped to per
core <24, 25, 26, 27> interrupts. An initialization code of IDU
controller (idu_of_init) creates mappings for all parent interrupts
<24, 25, ...> and sets a chained IDU handler for them. In the same
time idu_of_init must save the first met parent hwirq (idu_first_irq)
thus in future it is possible to figure out what common hwirq has come
by subtracting of idu_first_irq from the current parent hwirq (see
idu_cascade_isr).
The problem is that idu_of_init and idu_cascade_isr use parent virtual
IRQs as hardware IRQs and perform all the above-described manipulations
on virtual IRQs. But it is wrong and hardware IRQs must be used instead.
Signed-off-by: Yuriy Kolerov
---
arch/arc/kernel/mcip.c | 20 +---
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c
index 72f9179..4f4f04b 100644
--- a/arch/arc/kernel/mcip.c
+++ b/arch/arc/kernel/mcip.c
@@ -219,16 +219,14 @@ static struct irq_chip idu_irq_chip = {
};
-static int idu_first_irq;
+static irq_hw_number_t idu_first_hwirq;
static void idu_cascade_isr(struct irq_desc *desc)
{
- struct irq_domain *domain = irq_desc_get_handler_data(desc);
- unsigned int core_irq = irq_desc_get_irq(desc);
- unsigned int idu_irq;
-
- idu_irq = core_irq - idu_first_irq;
- generic_handle_irq(irq_find_mapping(domain, idu_irq));
+ struct irq_domain *idu_domain = irq_desc_get_handler_data(desc);
+ irq_hw_number_t core_hwirq = irqd_to_hwirq(irq_desc_get_irq_data(desc));
+ irq_hw_number_t idu_hwirq = core_hwirq - idu_first_hwirq;
+ generic_handle_irq(irq_find_mapping(idu_domain, idu_hwirq));
}
static int idu_irq_map(struct irq_domain *d, unsigned int virq,
irq_hw_number_t hwirq)
@@ -294,7 +292,7 @@ idu_of_init(struct device_node *intc, struct device_node
*parent)
struct irq_domain *domain;
/* Read IDU BCR to confirm nr_irqs */
int nr_irqs = of_irq_count(intc);
- int i, irq;
+ int i, virq;
if (!idu_detected)
panic("IDU not detected, but DeviceTree using it");
@@ -312,11 +310,11 @@ idu_of_init(struct device_node *intc, struct device_node
*parent)
* however we need it to get the parent virq and set IDU handler
* as first level isr
*/
- irq = irq_of_parse_and_map(intc, i);
+ virq = irq_of_parse_and_map(intc, i);
if (!i)
- idu_first_irq = irq;
+ idu_first_hwirq = irqd_to_hwirq(irq_get_irq_data(virq));
- irq_set_chained_handler_and_data(irq, idu_cascade_isr, domain);
+ irq_set_chained_handler_and_data(virq, idu_cascade_isr, domain);
}
__mcip_cmd(CMD_IDU_ENABLE, 0);
--
2.7.4
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[PATCH v3 1/3] ARC: SMP: Register IPI handler using virq but not hwirq
smp_ipi_irq_setup takes a cpu number and a hwirq number for the per core
local interrupt line in the root interrupt controller and registers an
appropriate IPI handler per cpu. However this function tries to bind a
handler to the hwirq as virtual IRQ number and it is a wrong behavior.
It is necessary to find a mapping of hwirq in the root IRQ domain to
the actual virq using irq_find_mapping.
Also a declaration of smp_ipi_irq_setup is corrected to denote that
this function takes a hardware IRQ number but not a virtual IRQ number.
Signed-off-by: Yuriy Kolerov
---
arch/arc/include/asm/smp.h | 4 ++--
arch/arc/kernel/smp.c | 13 +
2 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/arch/arc/include/asm/smp.h b/arch/arc/include/asm/smp.h
index 89fdd1b..0861007 100644
--- a/arch/arc/include/asm/smp.h
+++ b/arch/arc/include/asm/smp.h
@@ -37,9 +37,9 @@ extern const char *arc_platform_smp_cpuinfo(void);
* API expected BY platform smp code (FROM arch smp code)
*
* smp_ipi_irq_setup:
- * Takes @cpu and @irq to which the arch-common ISR is hooked up
+ * Takes @cpu and @hwirq to which the arch-common ISR is hooked up
*/
-extern int smp_ipi_irq_setup(int cpu, int irq);
+extern int smp_ipi_irq_setup(int cpu, irq_hw_number_t hwirq);
/*
* struct plat_smp_ops - SMP callbacks provided by platform to ARC SMP
diff --git a/arch/arc/kernel/smp.c b/arch/arc/kernel/smp.c
index f183cc6..692ca51 100644
--- a/arch/arc/kernel/smp.c
+++ b/arch/arc/kernel/smp.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -351,20 +352,24 @@ irqreturn_t do_IPI(int irq, void *dev_id)
*/
static DEFINE_PER_CPU(int, ipi_dev);
-int smp_ipi_irq_setup(int cpu, int irq)
+int smp_ipi_irq_setup(int cpu, irq_hw_number_t hwirq)
{
int *dev = per_cpu_ptr(&ipi_dev, cpu);
+ unsigned int virq = irq_find_mapping(NULL, hwirq);
+
+ if (!virq)
+ panic("Cannot find virq for root domain and hwirq=%lu", hwirq);
/* Boot cpu calls request, all call enable */
if (!cpu) {
int rc;
- rc = request_percpu_irq(irq, do_IPI, "IPI Interrupt", dev);
+ rc = request_percpu_irq(virq, do_IPI, "IPI Interrupt", dev);
if (rc)
- panic("Percpu IRQ request failed for %d\n", irq);
+ panic("Percpu IRQ request failed for %u\n", virq);
}
- enable_percpu_irq(irq, 0);
+ enable_percpu_irq(virq, 0);
return 0;
}
--
2.7.4
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[PATCH v2] arc: Implement arch-specific dma_map_ops.mmap
We used to use generic implementation of dma_map_ops.mmap which is
dma_common_mmap() but that only worked for simpler cached mappings when
vaddr = paddr.
If a driver requests uncached DMA buffer kernel maps it to virtual
address so that MMU gets involved and page uncached status takes into
account. In that case usage of dma_common_mmap() lead to mapping of
vaddr to vaddr for user-space which is obviously wrong. For more detals
please refer to verbose explanation here [1].
So here we implement our own version of mmap() which always deals
with dma_addr and maps underlying memory to user-space properly
(note that DMA buffer mapped to user-space is always uncached
because there's no way to properly manage cache from user-space).
[1] https://lkml.org/lkml/2016/10/26/973
Signed-off-by: Alexey Brodkin
Reviewed-by: Catalin Marinas
Cc: Marek Szyprowski
Cc: Vineet Gupta
Cc:
---
Changes v1 -> v2:
* Added plat_dma_to_phys wrapper around dma_addr
arch/arc/mm/dma.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arc/mm/dma.c b/arch/arc/mm/dma.c
index 20afc65e22dc..9288851d43a0 100644
--- a/arch/arc/mm/dma.c
+++ b/arch/arc/mm/dma.c
@@ -105,6 +105,31 @@ static void arc_dma_free(struct device *dev, size_t size,
void *vaddr,
__free_pages(page, get_order(size));
}
+static int arc_dma_mmap(struct device *dev, struct vm_area_struct *vma,
+ void *cpu_addr, dma_addr_t dma_addr, size_t size,
+ unsigned long attrs)
+{
+ unsigned long user_count = vma_pages(vma);
+ unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
+ unsigned long pfn = __phys_to_pfn(plat_dma_to_phys(dev, dma_addr));
+ unsigned long off = vma->vm_pgoff;
+ int ret = -ENXIO;
+
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+
+ if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
+ return ret;
+
+ if (off < count && user_count <= (count - off)) {
+ ret = remap_pfn_range(vma, vma->vm_start,
+ pfn + off,
+ user_count << PAGE_SHIFT,
+ vma->vm_page_prot);
+ }
+
+ return ret;
+}
+
/*
* streaming DMA Mapping API...
* CPU accesses page via normal paddr, thus needs to explicitly made
@@ -193,6 +218,7 @@ static int arc_dma_supported(struct device *dev, u64
dma_mask)
struct dma_map_ops arc_dma_ops = {
.alloc = arc_dma_alloc,
.free = arc_dma_free,
+ .mmap = arc_dma_mmap,
.map_page = arc_dma_map_page,
.map_sg = arc_dma_map_sg,
.sync_single_for_device = arc_dma_sync_single_for_device,
--
2.7.4
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stmmac: GMAC_RGSMIIIS reports bogus values
Hello,
I'm seeing pretty strange issue with GMAC reporting a lot of link state changes
based on bits in GMAC_RGSMIIIS. It looks like that:
-->8---
Link is Down
Link is Up - 10/Full
Link is Down
Link is Up - 10/Half
Link is Down
Link is Down
Link is Up - 10/Half
Link is Up -
1000/Half
Link is Down
Link is Down
Link is Down
Link is Down
Link is Up - 10/Half
Link is Down
Link is Down
Link is Up -
1000/Half
Link is Up - 1000/Full
-->8---
What's especially interesting my board with GMAC is connected to 100Mbit device
which means there's no chance for 1Gb mode to be set.
Also this has nothing to do with link state detected and reported by PHY via
MDIO.
So obviously GMAC_RGSMIIIS bits are wrong. But given the fact that
GMAC_RGSMIIIS bits
are set based on state of RXD[3:0] lines of RGMII I may only thing that it's
PHY (in my case DP83865) who's sending random data on the RXD during
inter-frame gap.
Note data transferred through that networking connection is perfectly correct
and
actually I haven't see those link state prints before kernel v4.8 basically
because the prints in question were implemented with pr_debug() and then with
[1]
we got pr_info() that made prints visible by default.
Since I don't have any means to capture all required GMII signals to do better
analysis and my data is not corrupted in the end I'm thinking about way how to
mute these pretty senseless messages.
One thing I may think of we may disable checking of GMAC_RGSMIIIS if a
particular
board uses MDIO for PHY setup. Something like that:
-->8---
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -337,7 +337,7 @@ static int dwmac1000_irq_status(struct mac_device_info *hw,
dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x);
- if (intr_status & PCS_RGSMIIIS_IRQ)
+ if (!priv->use_mdio && (intr_status & PCS_RGSMIIIS_IRQ))
dwmac1000_rgsmii(ioaddr, x);
return ret;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 6c85b61aaa0b..34e9de0450ba 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -3356,11 +3356,13 @@ int stmmac_dvr_probe(struct device *device,
stmmac_check_pcs_mode(priv);
+ priv->use_mdio = 0;
if (priv->hw->pcs != STMMAC_PCS_RGMII &&
priv->hw->pcs != STMMAC_PCS_TBI &&
priv->hw->pcs != STMMAC_PCS_RTBI) {
/* MDIO bus Registration */
ret = stmmac_mdio_register(ndev);
+ priv->use_mdio = 1;
if (ret < 0) {
pr_debug("%s: MDIO bus (id: %d) registration failed",
__func__, priv->plat->bus_id);
-->8---
Any thoughts on that are much appreciated!
Regards,
Alexey
[1]
http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=70523e639bf8ca09b3357371c3546cee55c06351
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Re: [PATCH 9/9] clocksource: import ARC timer driver
On 11/01/2016 06:03 PM, Vineet Gupta wrote: >>> Because of the git mv you, diff didn't include bulk of driver code which >>> would >>> >> make for bulk of review anyways. So perhaps in v2 I don't do the git mv. >>> >> OK ? >> > >> > That means I will review and comment existing code. It is not a problem >> > for me >> > if you agree to do the changes. > Sure, the whole point is to make things better as an outcome of review. I > have no > issues changing code provided we don't add major performance regressions. So just wondering if I could have some comments on the initial import of driver before I send out a v2. The issue is git mv didn't show bulk of code being moved. Shall I send a v2 with a different ordering so I introduce the driver first, with new headers, new Kconfig items etc and then as a subsequent patch prune those bits from arch/arc/* ? -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 9/9] clocksource: import ARC timer driver
On Thu, Nov 03, 2016 at 09:40:23AM -0700, Vineet Gupta wrote: > On 11/01/2016 06:03 PM, Vineet Gupta wrote: > >>> Because of the git mv you, diff didn't include bulk of driver code which > >>> would > >>> >> make for bulk of review anyways. So perhaps in v2 I don't do the git > >>> >> mv. OK ? > >> > > >> > That means I will review and comment existing code. It is not a problem > >> > for me > >> > if you agree to do the changes. > > Sure, the whole point is to make things better as an outcome of review. I > > have no > > issues changing code provided we don't add major performance regressions. > > So just wondering if I could have some comments on the initial import of > driver > before I send out a v2. Yeah, ok. Let me comment the other patches of the series and then you can send a V2. > The issue is git mv didn't show bulk of code being moved. Shall I send a v2 > with a > different ordering so I introduce the driver first, with new headers, new > Kconfig > items etc and then as a subsequent patch prune those bits from arch/arc/* ? > > -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 1/9] ARC: timer: gfrc, rtc: Read BCR to detect whether hardware exists ...
On Mon, Oct 31, 2016 at 03:48:08PM -0700, Vineet Gupta wrote:
> ... don't rely on cpuinfo populated in arc boot code. This paves wat for
> moving this code in drivers/clocksource/
>
> Signed-off-by: Vineet Gupta
> ---
> arch/arc/kernel/time.c | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
> index f927b8dc6edd..a2db010cde18 100644
> --- a/arch/arc/kernel/time.c
> +++ b/arch/arc/kernel/time.c
> @@ -118,10 +118,11 @@ static struct clocksource arc_counter_gfrc = {
>
> static int __init arc_cs_setup_gfrc(struct device_node *node)
> {
> - int exists = cpuinfo_arc700[0].extn.gfrc;
> + struct mcip_bcr mp;
> int ret;
>
> - if (WARN(!exists, "Global-64-bit-Ctr clocksource not detected"))
> + READ_BCR(ARC_REG_MCIP_BCR, mp);
> + if (WARN(!mp.gfrc, "Global-64-bit-Ctr clocksource not detected"))
Take the opportunity to replace this WARN by a pr_err.
> return -ENXIO;
>
> ret = arc_get_timer_clk(node);
> @@ -174,10 +175,11 @@ static struct clocksource arc_counter_rtc = {
>
> static int __init arc_cs_setup_rtc(struct device_node *node)
> {
> - int exists = cpuinfo_arc700[smp_processor_id()].extn.rtc;
> + struct bcr_timer timer;
> int ret;
>
> - if (WARN(!exists, "Local-64-bit-Ctr clocksource not detected"))
> + READ_BCR(ARC_REG_TIMERS_BCR, timer);
> + if (WARN(!timer.rtc, "Local-64-bit-Ctr clocksource not detected"))
> return -ENXIO;o
Ditto and^^
So the READ_BCR() is only there to check the timer is physically present ?
> /* Local to CPU hence not usable in SMP */
> --
> 2.7.4
>
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Re: [PATCH 2/9] ARC: timer: rtc: implement read loop in "C" vs. inline asm
On Mon, Oct 31, 2016 at 03:48:09PM -0700, Vineet Gupta wrote:
> To allow for easy movement into drivers/clocksource
>
> Signed-off-by: Vineet Gupta
> ---
> arch/arc/kernel/time.c | 13 +
> 1 file changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
> index a2db010cde18..2c51e3cafad0 100644
> --- a/arch/arc/kernel/time.c
> +++ b/arch/arc/kernel/time.c
> @@ -153,14 +153,11 @@ static cycle_t arc_read_rtc(struct clocksource *cs)
> cycle_t full;
> } stamp;
>
> -
> - __asm__ __volatile(
> - "1: \n"
> - " lr %0, [AUX_RTC_LOW] \n"
> - " lr %1, [AUX_RTC_HIGH] \n"
> - " lr %2, [AUX_RTC_CTRL] \n"
> - " bbit0.nt%2, 31, 1b \n"
> - : "=r" (stamp.low), "=r" (stamp.high), "=r" (status));
> + do {
> + stamp.low = read_aux_reg(AUX_RTC_LOW);
> + stamp.high = read_aux_reg(AUX_RTC_HIGH);
> + status = read_aux_reg(AUX_RTC_CTRL);
> + } while (!(status & 0x8000UL));
Replace the literal 0x8000UL by a macro.
What is the 'status' for ?
> return stamp.full;
> }
> --
> 2.7.4
>
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Re: [PATCH v2] arc: Implement arch-specific dma_map_ops.mmap
On 11/03/2016 08:06 AM, Alexey Brodkin wrote:
> We used to use generic implementation of dma_map_ops.mmap which is
> dma_common_mmap() but that only worked for simpler cached mappings when
> vaddr = paddr.
>
> If a driver requests uncached DMA buffer kernel maps it to virtual
> address so that MMU gets involved and page uncached status takes into
> account. In that case usage of dma_common_mmap() lead to mapping of
> vaddr to vaddr for user-space which is obviously wrong. For more detals
> please refer to verbose explanation here [1].
>
> So here we implement our own version of mmap() which always deals
> with dma_addr and maps underlying memory to user-space properly
> (note that DMA buffer mapped to user-space is always uncached
> because there's no way to properly manage cache from user-space).
>
> [1] https://lkml.org/lkml/2016/10/26/973
>
> Signed-off-by: Alexey Brodkin
> Reviewed-by: Catalin Marinas
> Cc: Marek Szyprowski
> Cc: Vineet Gupta
> Cc:
I've added a stable 4.5+, since ARC didn't use dma ops until 4.5-rc1.
Pushed to for-curr !
Thx,
-Vineet
> ---
>
> Changes v1 -> v2:
> * Added plat_dma_to_phys wrapper around dma_addr
>
> arch/arc/mm/dma.c | 26 ++
> 1 file changed, 26 insertions(+)
>
> diff --git a/arch/arc/mm/dma.c b/arch/arc/mm/dma.c
> index 20afc65e22dc..9288851d43a0 100644
> --- a/arch/arc/mm/dma.c
> +++ b/arch/arc/mm/dma.c
> @@ -105,6 +105,31 @@ static void arc_dma_free(struct device *dev, size_t
> size, void *vaddr,
> __free_pages(page, get_order(size));
> }
>
> +static int arc_dma_mmap(struct device *dev, struct vm_area_struct *vma,
> + void *cpu_addr, dma_addr_t dma_addr, size_t size,
> + unsigned long attrs)
> +{
> + unsigned long user_count = vma_pages(vma);
> + unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
> + unsigned long pfn = __phys_to_pfn(plat_dma_to_phys(dev, dma_addr));
> + unsigned long off = vma->vm_pgoff;
> + int ret = -ENXIO;
> +
> + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
> +
> + if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
> + return ret;
> +
> + if (off < count && user_count <= (count - off)) {
> + ret = remap_pfn_range(vma, vma->vm_start,
> + pfn + off,
> + user_count << PAGE_SHIFT,
> + vma->vm_page_prot);
> + }
> +
> + return ret;
> +}
> +
> /*
> * streaming DMA Mapping API...
> * CPU accesses page via normal paddr, thus needs to explicitly made
> @@ -193,6 +218,7 @@ static int arc_dma_supported(struct device *dev, u64
> dma_mask)
> struct dma_map_ops arc_dma_ops = {
> .alloc = arc_dma_alloc,
> .free = arc_dma_free,
> + .mmap = arc_dma_mmap,
> .map_page = arc_dma_map_page,
> .map_sg = arc_dma_map_sg,
> .sync_single_for_device = arc_dma_sync_single_for_device,
>
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Re: [PATCH 3/9] ARC: timer: gfrc: boot print alongside other timers
On Mon, Oct 31, 2016 at 03:48:10PM -0700, Vineet Gupta wrote: > Signed-off-by: Vineet Gupta Why not add a message in drivers/clocksource/clksrc-probe.c when a timer inits successfully ? and then get rid of this code. > --- > arch/arc/kernel/setup.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c > index 0385df77a697..595d06900061 100644 > --- a/arch/arc/kernel/setup.c > +++ b/arch/arc/kernel/setup.c > @@ -234,11 +234,11 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, > int len) > is_isa_arcompact() ? "ARCompact" : "ARCv2", > IS_AVAIL1(cpu->isa.be, "[Big-Endian]")); > > - n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ", > + n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: > ", > IS_AVAIL1(cpu->extn.timer0, "Timer0 "), > IS_AVAIL1(cpu->extn.timer1, "Timer1 "), > -IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ", > - CONFIG_ARC_HAS_RTC)); > +IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", > CONFIG_ARC_HAS_RTC), > +IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", > CONFIG_ARC_HAS_GFRC)); > > n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s", > IS_AVAIL2(cpu->isa.atomic, "atomic ", > CONFIG_ARC_HAS_LLSC), > -- > 2.7.4 > ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 4/9] ARC: time: move time_init() out of the driver
On Mon, Oct 31, 2016 at 03:48:11PM -0700, Vineet Gupta wrote: > Signed-off-by: Vineet Gupta > --- Acked-by: Daniel Lezcano ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 6/9] ARC: move mcip.h into include/soc and adjust the includes
On Mon, Oct 31, 2016 at 03:48:13PM -0700, Vineet Gupta wrote:
> Also remove the depedency on ARCv2, to increase compile coverage for
> !ARCV2 builds
s/depedency/dependency/
Acked-by: Daniel Lezcano
> Signed-off-by: Vineet Gupta
> ---
> arch/arc/kernel/mcip.c | 2 +-
> arch/arc/kernel/time.c | 2 +-
> arch/arc/plat-axs10x/axs10x.c| 2 +-
> {arch/arc/include/asm => include/soc/arc}/mcip.h | 8 ++--
> 4 files changed, 5 insertions(+), 9 deletions(-)
> rename {arch/arc/include/asm => include/soc/arc}/mcip.h (96%)
>
> diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c
> index c424d5abc318..0651e0a2e8b1 100644
> --- a/arch/arc/kernel/mcip.c
> +++ b/arch/arc/kernel/mcip.c
> @@ -11,8 +11,8 @@
> #include
> #include
> #include
> +#include
> #include
> -#include
> #include
>
> static DEFINE_RAW_SPINLOCK(mcip_lock);
> diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
> index 00ece39a8ae7..f1ebe45bfcdf 100644
> --- a/arch/arc/kernel/time.c
> +++ b/arch/arc/kernel/time.c
> @@ -40,7 +40,7 @@
> #include
> #include
>
> -#include
> +#include
>
> /* Timer related Aux registers */
> #define ARC_REG_TIMER0_LIMIT 0x23/* timer 0 limit */
> diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
> index 86548701023c..38ff349d7f2a 100644
> --- a/arch/arc/plat-axs10x/axs10x.c
> +++ b/arch/arc/plat-axs10x/axs10x.c
> @@ -21,7 +21,7 @@
> #include
> #include
> #include
> -#include
> +#include
>
> #define AXS_MB_CGU 0xE001
> #define AXS_MB_CREG 0xE0011000
> diff --git a/arch/arc/include/asm/mcip.h b/include/soc/arc/mcip.h
> similarity index 96%
> rename from arch/arc/include/asm/mcip.h
> rename to include/soc/arc/mcip.h
> index fc28d0944801..6902c2a8bd23 100644
> --- a/arch/arc/include/asm/mcip.h
> +++ b/include/soc/arc/mcip.h
> @@ -8,10 +8,8 @@
> * published by the Free Software Foundation.
> */
>
> -#ifndef __ASM_MCIP_H
> -#define __ASM_MCIP_H
> -
> -#ifdef CONFIG_ISA_ARCV2
> +#ifndef __SOC_ARC_MCIP_H
> +#define __SOC_ARC_MCIP_H
>
> #include
>
> @@ -103,5 +101,3 @@ static inline void __mcip_cmd_data(unsigned int cmd,
> unsigned int param,
> }
>
> #endif
> -
> -#endif
> --
> 2.7.4
>
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Re: [PATCH 7/9] ARC: breakout timer stuff into a seperate header
s/seperate/separate/
On Mon, Oct 31, 2016 at 03:48:14PM -0700, Vineet Gupta wrote:
> Signed-off-by: Vineet Gupta
> ---
> arch/arc/include/asm/arcregs.h | 9 +
> arch/arc/kernel/time.c | 2 +-
> include/soc/arc/timers.h | 24
> 3 files changed, 26 insertions(+), 9 deletions(-)
> create mode 100644 include/soc/arc/timers.h
>
> diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
> index ccf5dc96713b..a17aa4558832 100644
> --- a/arch/arc/include/asm/arcregs.h
> +++ b/arch/arc/include/asm/arcregs.h
> @@ -20,7 +20,6 @@
> #define ARC_REG_FP_V2_BCR0xc8/* ARCv2 FPU */
> #define ARC_REG_SLC_BCR 0xce
> #define ARC_REG_DCCM_BUILD 0x74/* DCCM size (common) */
> -#define ARC_REG_TIMERS_BCR 0x75
> #define ARC_REG_AP_BCR 0x76
> #define ARC_REG_ICCM_BUILD 0x78/* ICCM size (common) */
> #define ARC_REG_XY_MEM_BCR 0x79
> @@ -206,13 +205,7 @@ struct bcr_fp_arcv2 {
> #endif
> };
>
> -struct bcr_timer {
> -#ifdef CONFIG_CPU_BIG_ENDIAN
> - unsigned int pad2:15, rtsc:1, pad1:5, rtc:1, t1:1, t0:1, ver:8;
> -#else
> - unsigned int ver:8, t0:1, t1:1, rtc:1, pad1:5, rtsc:1, pad2:15;
> -#endif
> -};
> +#include
>
> struct bcr_bpu_arcompact {
> #ifdef CONFIG_CPU_BIG_ENDIAN
> diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
> index f1ebe45bfcdf..dad3a9933c4c 100644
> --- a/arch/arc/kernel/time.c
> +++ b/arch/arc/kernel/time.c
> @@ -38,8 +38,8 @@
> #include
> #include
> #include
> -#include
>
> +#include
> #include
>
> /* Timer related Aux registers */
> diff --git a/include/soc/arc/timers.h b/include/soc/arc/timers.h
> new file mode 100644
> index ..79484fafabfa
> --- /dev/null
> +++ b/include/soc/arc/timers.h
> @@ -0,0 +1,24 @@
> +/*
> + * Copyright (C) 2016-17 Synopsys, Inc. (www.synopsys.com)
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#ifndef __SOC_ARC_TIMERS_H
> +#define __SOC_ARC_TIMERS_H
> +
> +#include
> +
> +#define ARC_REG_TIMERS_BCR 0x75
> +
> +struct bcr_timer {
> +#ifdef CONFIG_CPU_BIG_ENDIAN
> + unsigned int pad2:15, rtsc:1, pad1:5, rtc:1, t1:1, t0:1, ver:8;
> +#else
> + unsigned int ver:8, t0:1, t1:1, rtc:1, pad1:5, rtsc:1, pad2:15;
> +#endif
> +};
> +
> +#endif
> --
> 2.7.4
>
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Re: [PATCH 0/9] Move ARC timer code into drivers/clocksource/
On Mon, Oct 31, 2016 at 03:48:07PM -0700, Vineet Gupta wrote: > Hi, > > This series addresses the long pending move of ARC timer code into > drivers/clocksource/. > > - patches [1-4]/9 are improvements to arc code, paving way for later code > motion. > - patches [5-8]/9 refactor the arc headers to be shared between arc and > drivers > - patch 9/9 moves out the driver code/build/Kconfig bits > > As review progresses/concludes, I'd like to merge [1-8] for this merge window > and > clocksource maintainers can pick up the actual switch for 4.10 or even 4.9 as > they > prefer. > The different patches deserve a longer change description. ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 9/9] clocksource: import ARC timer driver
On Tue, Nov 01, 2016 at 01:57:05PM -0700, Vineet Gupta wrote: > Hi Daniel, > > On 11/01/2016 01:42 PM, Daniel Lezcano wrote: > > Please stay consistent with the rest of the Kconfig. > > > > config ARC_TIMER_RTC > > bool "64-bit cycle counter in HS38 cores" if COMPILE_TEST > > select CLKSRC_OF > > help > > This counter provides 64-bit resolution vs. the 32-bit TIMER1. > > It is implemented inside the core thus can't be used in SMP systems. > > > > config ARC_TIMER_GFRC > > bool "64-bit cycle counter in ARConnect block in HS38x cores" if > > COMPILE_TEST > > select CLKSRC_OF > > help > > This counter can be used as clocksource in SMP HS38 SoCs. > > It sits outside the core thus can be used in SMP systems > > > > Yes I did so already :-) Although I also added a default y if ARC to both, > but as > you say that is better done in ARC Kconfig. > > > Then in the ARC's Kconfig you select ARC_TIMER_RTC or ARC_TIMER_GFRC > > depending > > it is SMP or not. > > > > One question: > > > > Why ARC_TIMER_RTC can't be used in a SMP system ? Doesn't have each core its > > own clocksource ? It seems you are assuming a clocksource can be used on SMP > > only if the clocksource is unique and shared across the cores. > As now the clksrc-probe is correctly handling the errors, if the rtc and the gfrc are both defined in the DT, you can fail to init the rtc one with a simple test in the init function: if (IS_DEFINED(CONFIG_SMP)) return -EINVAL; So, you can inconditionaly compile in both RTC and GFRC, no ? That would be cleaner and prevent a different kernel config. ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 1/9] ARC: timer: gfrc, rtc: Read BCR to detect whether hardware exists ...
On 11/03/2016 10:00 AM, Daniel Lezcano wrote:
> On Mon, Oct 31, 2016 at 03:48:08PM -0700, Vineet Gupta wrote:
>> ... don't rely on cpuinfo populated in arc boot code. This paves wat for
>> moving this code in drivers/clocksource/
>>
>> Signed-off-by: Vineet Gupta
>> ---
>> arch/arc/kernel/time.c | 10 ++
>> 1 file changed, 6 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
>> index f927b8dc6edd..a2db010cde18 100644
>> --- a/arch/arc/kernel/time.c
>> +++ b/arch/arc/kernel/time.c
>> @@ -118,10 +118,11 @@ static struct clocksource arc_counter_gfrc = {
>>
>> static int __init arc_cs_setup_gfrc(struct device_node *node)
>> {
>> -int exists = cpuinfo_arc700[0].extn.gfrc;
>> +struct mcip_bcr mp;
>> int ret;
>>
>> -if (WARN(!exists, "Global-64-bit-Ctr clocksource not detected"))
>> +READ_BCR(ARC_REG_MCIP_BCR, mp);
>> +if (WARN(!mp.gfrc, "Global-64-bit-Ctr clocksource not detected"))
>
> Take the opportunity to replace this WARN by a pr_err.
OK.
>
>> return -ENXIO;
>>
>> ret = arc_get_timer_clk(node);
>> @@ -174,10 +175,11 @@ static struct clocksource arc_counter_rtc = {
>>
>> static int __init arc_cs_setup_rtc(struct device_node *node)
>> {
>> -int exists = cpuinfo_arc700[smp_processor_id()].extn.rtc;
>> +struct bcr_timer timer;
>> int ret;
>>
>> -if (WARN(!exists, "Local-64-bit-Ctr clocksource not detected"))
>> +READ_BCR(ARC_REG_TIMERS_BCR, timer);
>> +if (WARN(!timer.rtc, "Local-64-bit-Ctr clocksource not detected"))
>> return -ENXIO;o
>
> Ditto and^^
>
> So the READ_BCR() is only there to check the timer is physically present ?
Yep, due to configurable nature of cores, we have Build Config Registers to
detect
at runtime what is present or not. This allows for boot printing at the minimum.
This is defined in arcregs.h and in newly introduced soc/arc/aux.h
>
>> /* Local to CPU hence not usable in SMP */
>> --
>> 2.7.4
>>
>
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Re: [PATCH 2/9] ARC: timer: rtc: implement read loop in "C" vs. inline asm
On 11/03/2016 10:02 AM, Daniel Lezcano wrote:
> On Mon, Oct 31, 2016 at 03:48:09PM -0700, Vineet Gupta wrote:
>> To allow for easy movement into drivers/clocksource
>>
>> Signed-off-by: Vineet Gupta
>> ---
>> arch/arc/kernel/time.c | 13 +
>> 1 file changed, 5 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
>> index a2db010cde18..2c51e3cafad0 100644
>> --- a/arch/arc/kernel/time.c
>> +++ b/arch/arc/kernel/time.c
>> @@ -153,14 +153,11 @@ static cycle_t arc_read_rtc(struct clocksource *cs)
>> cycle_t full;
>> } stamp;
>>
>> -
>> -__asm__ __volatile(
>> -"1: \n"
>> -" lr %0, [AUX_RTC_LOW] \n"
>> -" lr %1, [AUX_RTC_HIGH] \n"
>> -" lr %2, [AUX_RTC_CTRL] \n"
>> -" bbit0.nt%2, 31, 1b \n"
>> -: "=r" (stamp.low), "=r" (stamp.high), "=r" (status));
>> +do {
>> +stamp.low = read_aux_reg(AUX_RTC_LOW);
>> +stamp.high = read_aux_reg(AUX_RTC_HIGH);
>> +status = read_aux_reg(AUX_RTC_CTRL);
>> +} while (!(status & 0x8000UL));
>
> Replace the literal 0x8000UL by a macro.
OK !
> What is the 'status' for ?
Hardware keeps a internal state machine for atomic readout of low/high. So if an
interrupt is taken between reading low and high, or if high increments after low
is read, then the bit forces a loop to retry.
>
>> return stamp.full;
>> }
>> --
>> 2.7.4
>>
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Re: [PATCH 3/9] ARC: timer: gfrc: boot print alongside other timers
On 11/03/2016 10:09 AM, Daniel Lezcano wrote: > On Mon, Oct 31, 2016 at 03:48:10PM -0700, Vineet Gupta wrote: >> Signed-off-by: Vineet Gupta > > Why not add a message in drivers/clocksource/clksrc-probe.c when a timer inits > successfully ? and then get rid of this code. At boot I have bunch of cod which prints all the major hardware blocks and thus would like to print it. We also print if a feature is present but not supported etc. So I like to keep all of that here. Also same code is used for /proc/cpuinfo. > >> --- >> arch/arc/kernel/setup.c | 6 +++--- >> 1 file changed, 3 insertions(+), 3 deletions(-) >> >> diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c >> index 0385df77a697..595d06900061 100644 >> --- a/arch/arc/kernel/setup.c >> +++ b/arch/arc/kernel/setup.c >> @@ -234,11 +234,11 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, >> int len) >> is_isa_arcompact() ? "ARCompact" : "ARCv2", >> IS_AVAIL1(cpu->isa.be, "[Big-Endian]")); >> >> -n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ", >> +n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: >> ", >> IS_AVAIL1(cpu->extn.timer0, "Timer0 "), >> IS_AVAIL1(cpu->extn.timer1, "Timer1 "), >> - IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ", >> - CONFIG_ARC_HAS_RTC)); >> + IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", >> CONFIG_ARC_HAS_RTC), >> + IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", >> CONFIG_ARC_HAS_GFRC)); >> >> n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s", >> IS_AVAIL2(cpu->isa.atomic, "atomic ", >> CONFIG_ARC_HAS_LLSC), >> -- >> 2.7.4 >> > ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 3/9] ARC: timer: gfrc: boot print alongside other timers
On Thu, Nov 03, 2016 at 10:47:19AM -0700, Vineet Gupta wrote: > On 11/03/2016 10:09 AM, Daniel Lezcano wrote: > > On Mon, Oct 31, 2016 at 03:48:10PM -0700, Vineet Gupta wrote: > >> Signed-off-by: Vineet Gupta > > > > Why not add a message in drivers/clocksource/clksrc-probe.c when a timer > > inits > > successfully ? and then get rid of this code. > > At boot I have bunch of cod which prints all the major hardware blocks and > thus > would like to print it. We also print if a feature is present but not > supported > etc. So I like to keep all of that here. > > Also same code is used for /proc/cpuinfo. Ok, I see. Thanks for the clarification. ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 9/9] clocksource: import ARC timer driver
Hi Daniel, On 11/03/2016 09:50 AM, Daniel Lezcano wrote: > On Thu, Nov 03, 2016 at 09:40:23AM -0700, Vineet Gupta wrote: >> On 11/01/2016 06:03 PM, Vineet Gupta wrote: > Because of the git mv you, diff didn't include bulk of driver code which > would >>> make for bulk of review anyways. So perhaps in v2 I don't do the git >>> mv. OK ? > > That means I will review and comment existing code. It is not a problem > for me > if you agree to do the changes. >>> Sure, the whole point is to make things better as an outcome of review. I >>> have no >>> issues changing code provided we don't add major performance regressions. >> >> So just wondering if I could have some comments on the initial import of >> driver >> before I send out a v2. > > Yeah, ok. Let me comment the other patches of the series and then you can > send a V2. Thx for taking a quick look - this is a good start. How about the actual driver itself, do you want to take a quick look there as well before v2 ? > >> The issue is git mv didn't show bulk of code being moved. Shall I send a v2 >> with a >> different ordering so I introduce the driver first, with new headers, new >> Kconfig >> items etc and then as a subsequent patch prune those bits from arch/arc/* ? ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 9/9] clocksource: import ARC timer driver
On Thu, Nov 03, 2016 at 10:57:48AM -0700, Vineet Gupta wrote: > Hi Daniel, > > On 11/03/2016 09:50 AM, Daniel Lezcano wrote: > > On Thu, Nov 03, 2016 at 09:40:23AM -0700, Vineet Gupta wrote: > >> On 11/01/2016 06:03 PM, Vineet Gupta wrote: > > Because of the git mv you, diff didn't include bulk of driver code > > which would > >>> make for bulk of review anyways. So perhaps in v2 I don't do the git > >>> mv. OK ? > > > > That means I will review and comment existing code. It is not a problem > > for me > > if you agree to do the changes. > >>> Sure, the whole point is to make things better as an outcome of review. I > >>> have no > >>> issues changing code provided we don't add major performance regressions. > >> > >> So just wondering if I could have some comments on the initial import of > >> driver > >> before I send out a v2. > > > > Yeah, ok. Let me comment the other patches of the series and then you can > > send a V2. > > Thx for taking a quick look - this is a good start. How about the actual > driver > itself, do you want to take a quick look there as well before v2 ? At the first glance, with your changes it is acceptable to be moved. Perhaps, you can have a look to remove the BIG_ENDIAN stuff in the clock read function. ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 9/9] clocksource: import ARC timer driver
On Thu, Nov 03, 2016 at 06:33:17PM +0100, Daniel Lezcano wrote: [ ... ] > As now the clksrc-probe is correctly handling the errors, if the rtc and the > gfrc are both defined in the DT, you can fail to init the rtc one with a > simple > test in the init function: > > if (IS_DEFINED(CONFIG_SMP)) > return -EINVAL; > > So, you can inconditionaly compile in both RTC and GFRC, no ? That would be > cleaner and prevent a different kernel config. Ah, actually I suggested something which is already there :) Perhaps, the if SMP does not make sense in the Kconfig, no ? ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 9/9] clocksource: import ARC timer driver
On 11/03/2016 11:11 AM, Daniel Lezcano wrote: >> Thx for taking a quick look - this is a good start. How about the actual >> driver >> > itself, do you want to take a quick look there as well before v2 ? > At the first glance, with your changes it is acceptable to be moved. Perhaps, > you can have a look to remove the BIG_ENDIAN stuff in the clock read function. > OK addressed that as well ! ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH 9/9] clocksource: import ARC timer driver
On 11/03/2016 10:33 AM, Daniel Lezcano wrote: > As now the clksrc-probe is correctly handling the errors, if the rtc and the > gfrc are both defined in the DT, you can fail to init the rtc one with a > simple > test in the init function: > > if (IS_DEFINED(CONFIG_SMP)) > return -EINVAL; > > So, you can inconditionaly compile in both RTC and GFRC, no ? That would be > cleaner and prevent a different kernel config. That's a very good idea. So now I envision CONFIG_ARC_TIMERS # legacy TIMER0 / TIMER1 CONFIG_ARC_64BIT_TIMERS # rtc, gfrc I need this distinction at the min to be able to select them from ARC Kconfig. -Vineet ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH v2 00/10] Move ARC timer code into drivers/clocksource/
Hi,
This series addresses the long pending move of ARC timer code into
drivers/clocksource/.
Thx,
-Vineet
v1 -> v2
- Now 10 patches instead of 9 to handle BIG ENDIAN in arch agnostic way
- Moved fix for RTC (v1 2/9) ahead of queue (v2 1/10) to allow for easier
stable backport
- Folded the Kconfig items for RTC and GFRC into single ARC_TIMERS_64BIT
So no special casing for UP/SMP in Kconfig.
Driver already handles the UP vs. SMP at runtime as needed
- convert WARN() to pr_warn() [Daniel]
- Use of _BITUL() vs. constant 0x8000_ [Daniel]
- changelog spellos:[Daniel]
s/depedency/dependency/
s/seperate/separate/
v1: http://lists.infradead.org/pipermail/linux-snps-arc/2016-October/001676.html
Vineet Gupta (10):
ARC: timer: rtc: implement read loop in "C" vs. inline asm
ARC: timer: gfrc, rtc: deuglify big endian code
ARC: timer: gfrc, rtc: Read BCR to detect whether hardware exists ...
ARC: timer: gfrc: boot print alongside other timers
ARC: time: move time_init() out of the driver
ARC: timer: Build gfrc, rtc under same option (64-bit timers)
ARC: breakout aux handling into a separate header
ARC: move mcip.h into include/soc and adjust the includes
ARC: breakout timer include code into separate header ...
clocksource: import ARC timer driver
MAINTAINERS| 1 +
arch/arc/Kconfig | 13 +--
arch/arc/configs/nsimosci_hs_smp_defconfig | 2 +-
arch/arc/configs/vdk_hs38_smp_defconfig| 2 +-
arch/arc/include/asm/arcregs.h | 94 +--
arch/arc/kernel/Makefile | 2 +-
arch/arc/kernel/mcip.c | 2 +-
arch/arc/kernel/setup.c| 17 ++-
arch/arc/plat-axs10x/axs10x.c | 2 +-
drivers/clocksource/Kconfig| 19 +++
drivers/clocksource/Makefile | 1 +
.../time.c => drivers/clocksource/arc_timer.c | 129 +++--
include/soc/arc/aux.h | 52 +
{arch/arc/include/asm => include/soc/arc}/mcip.h | 10 +-
include/soc/arc/timers.h | 38 ++
include/soc/nps/common.h | 4 +-
16 files changed, 181 insertions(+), 207 deletions(-)
rename arch/arc/kernel/time.c => drivers/clocksource/arc_timer.c (71%)
create mode 100644 include/soc/arc/aux.h
rename {arch/arc/include/asm => include/soc/arc}/mcip.h (95%)
create mode 100644 include/soc/arc/timers.h
--
2.7.4
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[PATCH v2 00/10] Move ARC timer code into drivers/clocksource/
Hi,
This series addresses the long pending move of ARC timer code into
drivers/clocksource/.
Thx,
-Vineet
v1 -> v2
- Now 10 patches instead of 9 to handle BIG ENDIAN in arch agnostic way
- Moved fix for RTC (v1 2/9) ahead of queue (v2 1/10) to allow for easier
stable backport
- Folded the Kconfig items for RTC and GFRC into single ARC_TIMERS_64BIT
So no special casing for UP/SMP in Kconfig.
Driver already handles the UP vs. SMP at runtime as needed
- convert WARN() to pr_warn() [Daniel]
- Use of _BITUL() vs. constant 0x8000_ [Daniel]
- changelog spellos:[Daniel]
s/depedency/dependency/
s/seperate/separate/
v1: http://lists.infradead.org/pipermail/linux-snps-arc/2016-October/001676.html
Vineet Gupta (10):
ARC: timer: rtc: implement read loop in "C" vs. inline asm
ARC: timer: gfrc, rtc: deuglify big endian code
ARC: timer: gfrc, rtc: Read BCR to detect whether hardware exists ...
ARC: timer: gfrc: boot print alongside other timers
ARC: time: move time_init() out of the driver
ARC: timer: Build gfrc, rtc under same option (64-bit timers)
ARC: breakout aux handling into a separate header
ARC: move mcip.h into include/soc and adjust the includes
ARC: breakout timer include code into separate header ...
clocksource: import ARC timer driver
MAINTAINERS| 1 +
arch/arc/Kconfig | 13 +--
arch/arc/configs/nsimosci_hs_smp_defconfig | 2 +-
arch/arc/configs/vdk_hs38_smp_defconfig| 2 +-
arch/arc/include/asm/arcregs.h | 94 +--
arch/arc/kernel/Makefile | 2 +-
arch/arc/kernel/mcip.c | 2 +-
arch/arc/kernel/setup.c| 17 ++-
arch/arc/plat-axs10x/axs10x.c | 2 +-
drivers/clocksource/Kconfig| 19 +++
drivers/clocksource/Makefile | 1 +
.../time.c => drivers/clocksource/arc_timer.c | 129 +++--
include/soc/arc/aux.h | 52 +
{arch/arc/include/asm => include/soc/arc}/mcip.h | 10 +-
include/soc/arc/timers.h | 38 ++
include/soc/nps/common.h | 4 +-
16 files changed, 181 insertions(+), 207 deletions(-)
rename arch/arc/kernel/time.c => drivers/clocksource/arc_timer.c (71%)
create mode 100644 include/soc/arc/aux.h
rename {arch/arc/include/asm => include/soc/arc}/mcip.h (95%)
create mode 100644 include/soc/arc/timers.h
--
2.7.4
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Re: [PATCH v2 00/10] Move ARC timer code into drivers/clocksource/
On 11/03/2016 02:21 PM, Vineet Gupta wrote: > Hi, > > This series addresses the long pending move of ARC timer code into > drivers/clocksource/. > > Thx, > -Vineet Sorry patch sending got aborted, git send-email SNAFU - tripping on '#' below CC: stable #4.2+ ---> likes [4.2+] ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH v2 00/10] Move ARC timer code into drivers/clocksource/
Hi,
This series addresses the long pending move of ARC timer code into
drivers/clocksource/.
Thx,
-Vineet
v1 -> v2
- Now 10 patches instead of 9 to handle BIG ENDIAN in arch agnostic way
- Moved fix for RTC (v1 2/9) ahead of queue (v2 1/10) to allow for easier
stable backport
- Folded the Kconfig items for RTC and GFRC into single ARC_TIMERS_64BIT
So no special casing for UP/SMP in Kconfig.
Driver already handles the UP vs. SMP at runtime as needed
- convert WARN() to pr_warn() [Daniel]
- Use of _BITUL() vs. constant 0x8000_ [Daniel]
- changelog spellos:[Daniel]
s/depedency/dependency/
s/seperate/separate/
v1: http://lists.infradead.org/pipermail/linux-snps-arc/2016-October/001676.html
Vineet Gupta (10):
ARC: timer: rtc: implement read loop in "C" vs. inline asm
ARC: timer: gfrc, rtc: deuglify big endian code
ARC: timer: gfrc, rtc: Read BCR to detect whether hardware exists ...
ARC: timer: gfrc: boot print alongside other timers
ARC: time: move time_init() out of the driver
ARC: timer: Build gfrc, rtc under same option (64-bit timers)
ARC: breakout aux handling into a separate header
ARC: move mcip.h into include/soc and adjust the includes
ARC: breakout timer include code into separate header ...
clocksource: import ARC timer driver
MAINTAINERS| 1 +
arch/arc/Kconfig | 13 +--
arch/arc/configs/nsimosci_hs_smp_defconfig | 2 +-
arch/arc/configs/vdk_hs38_smp_defconfig| 2 +-
arch/arc/include/asm/arcregs.h | 94 +--
arch/arc/kernel/Makefile | 2 +-
arch/arc/kernel/mcip.c | 2 +-
arch/arc/kernel/setup.c| 17 ++-
arch/arc/plat-axs10x/axs10x.c | 2 +-
drivers/clocksource/Kconfig| 19 +++
drivers/clocksource/Makefile | 1 +
.../time.c => drivers/clocksource/arc_timer.c | 129 +++--
include/soc/arc/aux.h | 52 +
{arch/arc/include/asm => include/soc/arc}/mcip.h | 10 +-
include/soc/arc/timers.h | 38 ++
include/soc/nps/common.h | 4 +-
16 files changed, 181 insertions(+), 207 deletions(-)
rename arch/arc/kernel/time.c => drivers/clocksource/arc_timer.c (71%)
create mode 100644 include/soc/arc/aux.h
rename {arch/arc/include/asm => include/soc/arc}/mcip.h (95%)
create mode 100644 include/soc/arc/timers.h
--
2.7.4
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[PATCH v2 08/10] ARC: move mcip.h into include/soc and adjust the includes
Also remove the dependency on ARCv2, to increase compile coverage for
!ARCV2 builds
Acked-by: Daniel Lezcano
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/mcip.c | 2 +-
arch/arc/kernel/time.c | 2 +-
arch/arc/plat-axs10x/axs10x.c| 2 +-
{arch/arc/include/asm => include/soc/arc}/mcip.h | 8 ++--
4 files changed, 5 insertions(+), 9 deletions(-)
rename {arch/arc/include/asm => include/soc/arc}/mcip.h (96%)
diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c
index c424d5abc318..0651e0a2e8b1 100644
--- a/arch/arc/kernel/mcip.c
+++ b/arch/arc/kernel/mcip.c
@@ -11,8 +11,8 @@
#include
#include
#include
+#include
#include
-#include
#include
static DEFINE_RAW_SPINLOCK(mcip_lock);
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 9bb7e3105ca9..f0b6e6bc1e36 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -40,7 +40,7 @@
#include
#include
-#include
+#include
/* Timer related Aux registers */
#define ARC_REG_TIMER0_LIMIT 0x23/* timer 0 limit */
diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
index 86548701023c..38ff349d7f2a 100644
--- a/arch/arc/plat-axs10x/axs10x.c
+++ b/arch/arc/plat-axs10x/axs10x.c
@@ -21,7 +21,7 @@
#include
#include
#include
-#include
+#include
#define AXS_MB_CGU 0xE001
#define AXS_MB_CREG0xE0011000
diff --git a/arch/arc/include/asm/mcip.h b/include/soc/arc/mcip.h
similarity index 96%
rename from arch/arc/include/asm/mcip.h
rename to include/soc/arc/mcip.h
index fc28d0944801..6902c2a8bd23 100644
--- a/arch/arc/include/asm/mcip.h
+++ b/include/soc/arc/mcip.h
@@ -8,10 +8,8 @@
* published by the Free Software Foundation.
*/
-#ifndef __ASM_MCIP_H
-#define __ASM_MCIP_H
-
-#ifdef CONFIG_ISA_ARCV2
+#ifndef __SOC_ARC_MCIP_H
+#define __SOC_ARC_MCIP_H
#include
@@ -103,5 +101,3 @@ static inline void __mcip_cmd_data(unsigned int cmd,
unsigned int param,
}
#endif
-
-#endif
--
2.7.4
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[PATCH v2 07/10] ARC: breakout aux handling into a separate header
ARC timers use aux registers for programming and this paves way for
moving ARC timer drivers into drivers/clocksource
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/arcregs.h | 85 +-
arch/arc/include/asm/mcip.h| 2 +-
include/soc/arc/aux.h | 52 ++
include/soc/nps/common.h | 4 +-
4 files changed, 56 insertions(+), 87 deletions(-)
create mode 100644 include/soc/arc/aux.h
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 7f3f9f63708c..ccf5dc96713b 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -110,90 +110,7 @@
#ifndef __ASSEMBLY__
-/*
- **
- * Inline ASM macros to read/write AUX Regs
- * Essentially invocation of lr/sr insns from "C"
- */
-
-#if 1
-
-#define read_aux_reg(reg) __builtin_arc_lr(reg)
-
-/* gcc builtin sr needs reg param to be long immediate */
-#define write_aux_reg(reg_immed, val) \
- __builtin_arc_sr((unsigned int)(val), reg_immed)
-
-#else
-
-#define read_aux_reg(reg) \
-({ \
- unsigned int __ret; \
- __asm__ __volatile__( \
- " lr%0, [%1]" \
- : "=r"(__ret) \
- : "i"(reg));\
- __ret; \
-})
-
-/*
- * Aux Reg address is specified as long immediate by caller
- * e.g.
- *write_aux_reg(0x69, some_val);
- * This generates tightest code.
- */
-#define write_aux_reg(reg_imm, val)\
-({ \
- __asm__ __volatile__( \
- " sr %0, [%1] \n" \
- : \
- : "ir"(val), "i"(reg_imm)); \
-})
-
-/*
- * Aux Reg address is specified in a variable
- * * e.g.
- * reg_num = 0x69
- * write_aux_reg2(reg_num, some_val);
- * This has to generate glue code to load the reg num from
- * memory to a reg hence not recommended.
- */
-#define write_aux_reg2(reg_in_var, val)\
-({ \
- unsigned int tmp; \
- \
- __asm__ __volatile__( \
- " ld %0, [%2] \n\t" \
- " sr %1, [%0] \n\t" \
- : "=&r"(tmp)\
- : "r"(val), "memory"(®_in_var)); \
-})
-
-#endif
-
-#define READ_BCR(reg, into)\
-{ \
- unsigned int tmp; \
- tmp = read_aux_reg(reg);\
- if (sizeof(tmp) == sizeof(into)) { \
- into = *((typeof(into) *)&tmp); \
- } else {\
- extern void bogus_undefined(void); \
- bogus_undefined(); \
- } \
-}
-
-#define WRITE_AUX(reg, into) \
-{ \
- unsigned int tmp; \
- if (sizeof(tmp) == sizeof(into)) { \
- tmp = (*(unsigned int *)&(into)); \
- write_aux_reg(reg, tmp);\
- } else { \
- extern void bogus_undefined(void); \
- bogus_undefined(); \
- } \
-}
+#include
/* Helpers */
#define TO_KB(bytes) ((bytes) >> 10)
diff --git a/arch/arc/include/asm/mcip.h b/arch/arc/include/asm/mcip.h
index c8fbe4114bad..fc28d0944801 100644
--- a/arch/arc/include/asm/mcip.h
+++ b/arch/arc/include/asm/mcip.h
@@ -13,7 +13,7 @@
#ifdef CONFIG_ISA_ARCV2
-#include
+#include
#define ARC_REG_MCIP_BCR 0x0d0
#define ARC_REG_MCIP_CMD 0x600
diff --git a/include/soc/arc/aux.h b/include/soc/arc/aux.h
new file mode 100644
index ..8c41c096a51b
--- /dev/null
+++ b/include/soc/arc/aux.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (C) 2016-2017 Synopsys, Inc. (www.synopsys.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __SOC_ARC_AUX_H__
+#define __SOC_ARC_AUX_H__
+
+#ifdef CONFIG_ARC
+
+#define read_aux_reg(r)__builtin_arc_lr(r)
+
+/* gcc builtin sr needs reg param to be long immediate */
+#define write_aux_reg(r, v)__builtin_arc_sr((unsigned int)(v), r)
+
+#else
+
+#define read_aux_reg(r)0
+#define write_aux_reg(r, v)
+
+#endif
+
+#define READ_BC
[PATCH v2 06/10] ARC: timer: Build gfrc, rtc under same option (64-bit timers)
The original distinction was done as they were deveoped at different
times and primarily becuse they are specific to UP (RTC) and SMP (GFRC).
But given that driver now handles that at runtime, (i.e. not allowing
RTC as clocksource in SMP), we can simplify things a bit.
Signed-off-by: Vineet Gupta
---
arch/arc/Kconfig | 10 ++
arch/arc/configs/nsimosci_hs_smp_defconfig | 2 +-
arch/arc/configs/vdk_hs38_smp_defconfig| 2 +-
arch/arc/kernel/setup.c| 4 ++--
arch/arc/kernel/time.c | 6 +-
5 files changed, 7 insertions(+), 17 deletions(-)
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index bd204bfa29ed..bde3e558d8bc 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -410,15 +410,9 @@ config ARC_HAS_DIV_REM
bool "Insn: div, divu, rem, remu"
default y
-config ARC_HAS_RTC
- bool "Local 64-bit r/o cycle counter"
- default n
- depends on !SMP
-
-config ARC_HAS_GFRC
- bool "SMP synchronized 64-bit cycle counter"
+config ARC_TIMERS_64BIT
+ bool "64-bit r/o cycle counters RTC (up) and GFRC (smp)"
default y
- depends on SMP
config ARC_NUMBER_OF_INTERRUPTS
int "Number of interrupts"
diff --git a/arch/arc/configs/nsimosci_hs_smp_defconfig
b/arch/arc/configs/nsimosci_hs_smp_defconfig
index 6da71ba253a9..155add7761ed 100644
--- a/arch/arc/configs/nsimosci_hs_smp_defconfig
+++ b/arch/arc/configs/nsimosci_hs_smp_defconfig
@@ -21,7 +21,7 @@ CONFIG_MODULES=y
CONFIG_ARC_PLAT_SIM=y
CONFIG_ISA_ARCV2=y
CONFIG_SMP=y
-# CONFIG_ARC_HAS_GFRC is not set
+# CONFIG_ARC_TIMERS_64BIT is not set
CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci_hs_idu"
CONFIG_PREEMPT=y
# CONFIG_COMPACTION is not set
diff --git a/arch/arc/configs/vdk_hs38_smp_defconfig
b/arch/arc/configs/vdk_hs38_smp_defconfig
index 969b206d6c67..573028f19de7 100644
--- a/arch/arc/configs/vdk_hs38_smp_defconfig
+++ b/arch/arc/configs/vdk_hs38_smp_defconfig
@@ -15,7 +15,7 @@ CONFIG_ARC_PLAT_AXS10X=y
CONFIG_AXS103=y
CONFIG_ISA_ARCV2=y
CONFIG_SMP=y
-# CONFIG_ARC_HAS_GFRC is not set
+# CONFIG_ARC_TIMERS_64BIT is not set
CONFIG_ARC_UBOOT_SUPPORT=y
CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38_smp"
CONFIG_PREEMPT=y
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 5865bd34a7fa..3093fa898a23 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -239,8 +239,8 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int
len)
n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t:
",
IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
- IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ",
CONFIG_ARC_HAS_RTC),
- IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ",
CONFIG_ARC_HAS_GFRC));
+ IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ",
CONFIG_ARC_TIMERS_64BIT),
+ IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ",
CONFIG_ARC_TIMERS_64BIT));
n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
IS_AVAIL2(cpu->isa.atomic, "atomic ",
CONFIG_ARC_HAS_LLSC),
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 05a583414c65..9bb7e3105ca9 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -81,7 +81,7 @@ static int noinline arc_get_timer_clk(struct device_node
*node)
/** Clock Source Device */
-#ifdef CONFIG_ARC_HAS_GFRC
+#ifdef CONFIG_ARC_TIMERS_64BIT
static cycle_t arc_read_gfrc(struct clocksource *cs)
{
@@ -128,10 +128,6 @@ static int __init arc_cs_setup_gfrc(struct device_node
*node)
}
CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
-#endif
-
-#ifdef CONFIG_ARC_HAS_RTC
-
#define AUX_RTC_CTRL 0x103
#define AUX_RTC_LOW0x104
#define AUX_RTC_HIGH 0x105
--
2.7.4
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[PATCH v2 04/10] ARC: timer: gfrc: boot print alongside other timers
Signed-off-by: Vineet Gupta --- arch/arc/kernel/setup.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c index 0385df77a697..595d06900061 100644 --- a/arch/arc/kernel/setup.c +++ b/arch/arc/kernel/setup.c @@ -234,11 +234,11 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len) is_isa_arcompact() ? "ARCompact" : "ARCv2", IS_AVAIL1(cpu->isa.be, "[Big-Endian]")); - n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ", + n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: ", IS_AVAIL1(cpu->extn.timer0, "Timer0 "), IS_AVAIL1(cpu->extn.timer1, "Timer1 "), - IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ", -CONFIG_ARC_HAS_RTC)); + IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_HAS_RTC), + IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_HAS_GFRC)); n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s", IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC), -- 2.7.4 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH v2 03/10] ARC: timer: gfrc, rtc: Read BCR to detect whether hardware exists ...
... don't rely on cpuinfo populated in arc boot code. This paves way for
moving this code in drivers/clocksource/
And while at it, convert the WARN() to pr_warn() as sugested by Daniel
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/time.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 71bcdc1f9bd0..d2335ca49c80 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -111,11 +111,14 @@ static struct clocksource arc_counter_gfrc = {
static int __init arc_cs_setup_gfrc(struct device_node *node)
{
- int exists = cpuinfo_arc700[0].extn.gfrc;
+ struct mcip_bcr mp;
int ret;
- if (WARN(!exists, "Global-64-bit-Ctr clocksource not detected"))
+ READ_BCR(ARC_REG_MCIP_BCR, mp);
+ if (!mp.gfrc) {
+ pr_warn("Global-64-bit-Ctr clocksource not detected");
return -ENXIO;
+ }
ret = arc_get_timer_clk(node);
if (ret)
@@ -163,15 +166,20 @@ static struct clocksource arc_counter_rtc = {
static int __init arc_cs_setup_rtc(struct device_node *node)
{
- int exists = cpuinfo_arc700[smp_processor_id()].extn.rtc;
+ struct bcr_timer timer;
int ret;
- if (WARN(!exists, "Local-64-bit-Ctr clocksource not detected"))
+ READ_BCR(ARC_REG_TIMERS_BCR, timer);
+ if (!timer.rtc) {
+ pr_warn("Local-64-bit-Ctr clocksource not detected");
return -ENXIO;
+ }
/* Local to CPU hence not usable in SMP */
- if (WARN(IS_ENABLED(CONFIG_SMP), "Local-64-bit-Ctr not usable in SMP"))
+ if (IS_ENABLED(CONFIG_SMP)) {
+ pr_warn("Local-64-bit-Ctr not usable in SMP");
return -EINVAL;
+ }
ret = arc_get_timer_clk(node);
if (ret)
--
2.7.4
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[PATCH v2 05/10] ARC: time: move time_init() out of the driver
to allow future git mv of the driver into drivers/clocksource
Acked-by: Daniel Lezcano
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/setup.c | 11 +++
arch/arc/kernel/time.c | 9 -
2 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 595d06900061..5865bd34a7fa 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -10,6 +10,8 @@
#include
#include
#include
+#include
+#include
#include
#include
#include
@@ -449,6 +451,15 @@ void __init setup_arch(char **cmdline_p)
arc_unwind_init();
}
+/*
+ * Called from start_kernel() - boot CPU only
+ */
+void __init time_init(void)
+{
+ of_clk_init(NULL);
+ clocksource_probe();
+}
+
static int __init customize_machine(void)
{
if (machine_desc->init_machine)
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index d2335ca49c80..05a583414c65 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -365,12 +365,3 @@ static int __init arc_of_timer_init(struct device_node *np)
return ret;
}
CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_of_timer_init);
-
-/*
- * Called from start_kernel() - boot CPU only
- */
-void __init time_init(void)
-{
- of_clk_init(NULL);
- clocksource_probe();
-}
--
2.7.4
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[PATCH v2 01/10] ARC: timer: rtc: implement read loop in "C" vs. inline asm
The current code doesn't even compile
CC: sta...@vger.kernel.org
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/time.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index f927b8dc6edd..1a117b999c0c 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -152,14 +152,17 @@ static cycle_t arc_read_rtc(struct clocksource *cs)
cycle_t full;
} stamp;
-
- __asm__ __volatile(
- "1: \n"
- " lr %0, [AUX_RTC_LOW] \n"
- " lr %1, [AUX_RTC_HIGH] \n"
- " lr %2, [AUX_RTC_CTRL] \n"
- " bbit0.nt%2, 31, 1b \n"
- : "=r" (stamp.low), "=r" (stamp.high), "=r" (status));
+/*
+ * hardware has an internal state machine which tracks readout of
+ * low/high and updates the CTRL.status if
+ * - interrupt/exception taken between the two reads
+ * - high increments after low has been read
+ */
+ do {
+ stamp.low = read_aux_reg(AUX_RTC_LOW);
+ stamp.high = read_aux_reg(AUX_RTC_HIGH);
+ status = read_aux_reg(AUX_RTC_CTRL);
+ } while (!(status & _BITUL(31)));
return stamp.full;
}
--
2.7.4
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[PATCH v2 02/10] ARC: timer: gfrc, rtc: deuglify big endian code
A standard "C" shift will be handled appropriately by the compiler
dependin gon the endian used fo rbuild. So we don't need the
explicit distinction in code
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/time.c | 30 --
1 file changed, 8 insertions(+), 22 deletions(-)
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 1a117b999c0c..71bcdc1f9bd0 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -86,26 +86,19 @@ static int noinline arc_get_timer_clk(struct device_node
*node)
static cycle_t arc_read_gfrc(struct clocksource *cs)
{
unsigned long flags;
- union {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- struct { u32 h, l; };
-#else
- struct { u32 l, h; };
-#endif
- cycle_t full;
- } stamp;
+ u32 l, h;
local_irq_save(flags);
__mcip_cmd(CMD_GFRC_READ_LO, 0);
- stamp.l = read_aux_reg(ARC_REG_MCIP_READBACK);
+ l = read_aux_reg(ARC_REG_MCIP_READBACK);
__mcip_cmd(CMD_GFRC_READ_HI, 0);
- stamp.h = read_aux_reg(ARC_REG_MCIP_READBACK);
+ h = read_aux_reg(ARC_REG_MCIP_READBACK);
local_irq_restore(flags);
- return stamp.full;
+ return (((cycle_t)h) << 32) | l;
}
static struct clocksource arc_counter_gfrc = {
@@ -143,14 +136,7 @@ CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc",
arc_cs_setup_gfrc);
static cycle_t arc_read_rtc(struct clocksource *cs)
{
unsigned long status;
- union {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- struct { u32 high, low; };
-#else
- struct { u32 low, high; };
-#endif
- cycle_t full;
- } stamp;
+ u32 l, h;
/*
* hardware has an internal state machine which tracks readout of
@@ -159,12 +145,12 @@ static cycle_t arc_read_rtc(struct clocksource *cs)
* - high increments after low has been read
*/
do {
- stamp.low = read_aux_reg(AUX_RTC_LOW);
- stamp.high = read_aux_reg(AUX_RTC_HIGH);
+ l = read_aux_reg(AUX_RTC_LOW);
+ h = read_aux_reg(AUX_RTC_HIGH);
status = read_aux_reg(AUX_RTC_CTRL);
} while (!(status & _BITUL(31)));
- return stamp.full;
+ return (((cycle_t)h) << 32) | l;
}
static struct clocksource arc_counter_rtc = {
--
2.7.4
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[PATCH v2 10/10] clocksource: import ARC timer driver
This adds support for - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP from @CNT to @LIMIT, before optionally triggering an interrupt. These are programmed using ARC auxiliary register interface. These are present in all ARC cores (ARC700 and ARC HS38) TIMER0 serves as clockevent for all ARC linux builds. TIMER1 is used for clocksource in arc700 builds. - CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in ARC HS38 cores. These are independnet IP blocks with different programming model respectively. Signed-off-by: Vineet Gupta --- MAINTAINERS| 1 + arch/arc/Kconfig | 7 ++ arch/arc/kernel/Makefile | 2 +- drivers/clocksource/Kconfig| 19 ++ drivers/clocksource/Makefile | 1 + .../time.c => drivers/clocksource/arc_timer.c | 29 ++ 6 files changed, 31 insertions(+), 28 deletions(-) rename arch/arc/kernel/time.c => drivers/clocksource/arc_timer.c (90%) diff --git a/MAINTAINERS b/MAINTAINERS index 3d838cf49f81..57b56ff1dd68 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11632,6 +11632,7 @@ S: Supported F: arch/arc/ F: Documentation/devicetree/bindings/arc/* F: Documentation/devicetree/bindings/interrupt-controller/snps,arc* +F: drivers/clocksource/arc_timer.c F: drivers/tty/serial/arc_uart.c T: git git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index bde3e558d8bc..ab12723d39a0 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -8,9 +8,9 @@ config ARC def_bool y + select ARC_TIMERS select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC select BUILDTIME_EXTABLE_SORT - select CLKSRC_OF select CLONE_BACKWARDS select COMMON_CLK select GENERIC_ATOMIC64 if !ISA_ARCV2 || !(ARC_HAS_LL64 && ARC_HAS_LLSC) @@ -115,6 +115,7 @@ config ISA_ARCOMPACT config ISA_ARCV2 bool "ARC ISA v2" + select ARC_TIMERS_64BIT help ISA for the Next Generation ARC-HS cores @@ -410,10 +411,6 @@ config ARC_HAS_DIV_REM bool "Insn: div, divu, rem, remu" default y -config ARC_TIMERS_64BIT - bool "64-bit r/o cycle counters RTC (up) and GFRC (smp)" - default y - config ARC_NUMBER_OF_INTERRUPTS int "Number of interrupts" range 8 240 diff --git a/arch/arc/kernel/Makefile b/arch/arc/kernel/Makefile index cfcdedf52ff8..8942c5c3b4c5 100644 --- a/arch/arc/kernel/Makefile +++ b/arch/arc/kernel/Makefile @@ -8,7 +8,7 @@ # Pass UTS_MACHINE for user_regset definition CFLAGS_ptrace.o+= -DUTS_MACHINE='"$(UTS_MACHINE)"' -obj-y := arcksyms.o setup.o irq.o time.o reset.o ptrace.o process.o devtree.o +obj-y := arcksyms.o setup.o irq.o reset.o ptrace.o process.o devtree.o obj-y += signal.o traps.o sys.o troubleshoot.o stacktrace.o disasm.o obj-$(CONFIG_ISA_ARCOMPACT)+= entry-compact.o intc-compact.o obj-$(CONFIG_ISA_ARCV2)+= entry-arcv2.o intc-arcv2.o diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index e2c6e43cf8ca..a53bd50164e7 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -282,6 +282,25 @@ config CLKSRC_MPS2 select CLKSRC_MMIO select CLKSRC_OF +config ARC_TIMERS + bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST + depends on GENERIC_CLOCKEVENTS + select CLKSRC_OF + help + These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores + (ARC700 as well as ARC HS38). + TIMER0 serves as clockevent while TIMER1 provides clocksource + +config ARC_TIMERS_64BIT + bool "Support for 64-bit counters in ARC HS38 cores" if COMPILE_TEST + depends on GENERIC_CLOCKEVENTS + select CLKSRC_OF + help + This enables 2 different 64-bit timers: RTC (for UP) and GFRC (for SMP) + RTC is implemented inside the core, while GFRC sits outside the core in + ARConnect IP block. Driver automatically picks one of them for clocksource + as appropriate. + config ARM_ARCH_TIMER bool select CLKSRC_OF if OF diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index cf87f407f1ad..a14111e1f087 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -51,6 +51,7 @@ obj-$(CONFIG_CLKSRC_TI_32K) += timer-ti-32k.o obj-$(CONFIG_CLKSRC_NPS) += timer-nps.o obj-$(CONFIG_OXNAS_RPS_TIMER) += timer-oxnas-rps.o +obj-$(CONFIG_ARC_TIMERS) += arc_timer.o obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o obj-$(CONFIG_ARMV7M_SYSTICK) += armv7m_systick.o diff --git a/arch/arc/kernel/time.c b/driv
[PATCH v2 09/10] ARC: breakout timer include code into separate header ...
... which allows for use in drivers/clocksource later
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/arcregs.h | 9 +
arch/arc/kernel/time.c | 18 +++---
include/soc/arc/timers.h | 38 ++
3 files changed, 42 insertions(+), 23 deletions(-)
create mode 100644 include/soc/arc/timers.h
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index ccf5dc96713b..a17aa4558832 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -20,7 +20,6 @@
#define ARC_REG_FP_V2_BCR 0xc8/* ARCv2 FPU */
#define ARC_REG_SLC_BCR0xce
#define ARC_REG_DCCM_BUILD 0x74/* DCCM size (common) */
-#define ARC_REG_TIMERS_BCR 0x75
#define ARC_REG_AP_BCR 0x76
#define ARC_REG_ICCM_BUILD 0x78/* ICCM size (common) */
#define ARC_REG_XY_MEM_BCR 0x79
@@ -206,13 +205,7 @@ struct bcr_fp_arcv2 {
#endif
};
-struct bcr_timer {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- unsigned int pad2:15, rtsc:1, pad1:5, rtc:1, t1:1, t0:1, ver:8;
-#else
- unsigned int ver:8, t0:1, t1:1, rtc:1, pad1:5, rtsc:1, pad2:15;
-#endif
-};
+#include
struct bcr_bpu_arcompact {
#ifdef CONFIG_CPU_BIG_ENDIAN
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index f0b6e6bc1e36..878c71dda8b9 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -38,22 +38,10 @@
#include
#include
#include
-#include
+#include
#include
-/* Timer related Aux registers */
-#define ARC_REG_TIMER0_LIMIT 0x23/* timer 0 limit */
-#define ARC_REG_TIMER0_CTRL0x22/* timer 0 control */
-#define ARC_REG_TIMER0_CNT 0x21/* timer 0 count */
-#define ARC_REG_TIMER1_LIMIT 0x102 /* timer 1 limit */
-#define ARC_REG_TIMER1_CTRL0x101 /* timer 1 control */
-#define ARC_REG_TIMER1_CNT 0x100 /* timer 1 count */
-
-#define TIMER_CTRL_IE (1 << 0) /* Interrupt when Count reaches limit */
-#define TIMER_CTRL_NH (1 << 1) /* Count only when CPU NOT halted */
-
-#define ARC_TIMER_MAX 0x
static unsigned long arc_timer_freq;
@@ -218,7 +206,7 @@ static int __init arc_cs_setup_timer1(struct device_node
*node)
if (ret)
return ret;
- write_aux_reg(ARC_REG_TIMER1_LIMIT, ARC_TIMER_MAX);
+ write_aux_reg(ARC_REG_TIMER1_LIMIT, ARC_TIMERN_MAX);
write_aux_reg(ARC_REG_TIMER1_CNT, 0);
write_aux_reg(ARC_REG_TIMER1_CTRL, TIMER_CTRL_NH);
@@ -296,7 +284,7 @@ static int arc_timer_starting_cpu(unsigned int cpu)
evt->cpumask = cpumask_of(smp_processor_id());
- clockevents_config_and_register(evt, arc_timer_freq, 0, ARC_TIMER_MAX);
+ clockevents_config_and_register(evt, arc_timer_freq, 0, ARC_TIMERN_MAX);
enable_percpu_irq(arc_timer_irq, 0);
return 0;
}
diff --git a/include/soc/arc/timers.h b/include/soc/arc/timers.h
new file mode 100644
index ..a20ed2fbc432
--- /dev/null
+++ b/include/soc/arc/timers.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2016-17 Synopsys, Inc. (www.synopsys.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __SOC_ARC_TIMERS_H
+#define __SOC_ARC_TIMERS_H
+
+#include
+
+/* Timer related Aux registers */
+#define ARC_REG_TIMER0_LIMIT 0x23/* timer 0 limit */
+#define ARC_REG_TIMER0_CTRL0x22/* timer 0 control */
+#define ARC_REG_TIMER0_CNT 0x21/* timer 0 count */
+#define ARC_REG_TIMER1_LIMIT 0x102 /* timer 1 limit */
+#define ARC_REG_TIMER1_CTRL0x101 /* timer 1 control */
+#define ARC_REG_TIMER1_CNT 0x100 /* timer 1 count */
+
+/* CTRL reg bits */
+#define TIMER_CTRL_IE (1 << 0) /* Interrupt when Count reaches limit
*/
+#define TIMER_CTRL_NH (1 << 1) /* Count only when CPU NOT halted */
+
+#define ARC_TIMERN_MAX 0x
+
+#define ARC_REG_TIMERS_BCR 0x75
+
+struct bcr_timer {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+ unsigned int pad2:15, rtsc:1, pad1:5, rtc:1, t1:1, t0:1, ver:8;
+#else
+ unsigned int ver:8, t0:1, t1:1, rtc:1, pad1:5, rtsc:1, pad2:15;
+#endif
+};
+
+#endif
--
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Re: [PATCH v2 01/10] ARC: timer: rtc: implement read loop in "C" vs. inline asm
On Thu, Nov 03, 2016 at 02:31:32PM -0700, Vineet Gupta wrote:
> The current code doesn't even compile
Give a better description in the log, especially if this patch is supposed to
go to stable@
> CC: sta...@vger.kernel.org
> Signed-off-by: Vineet Gupta
> ---
> arch/arc/kernel/time.c | 19 +++
> 1 file changed, 11 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
> index f927b8dc6edd..1a117b999c0c 100644
> --- a/arch/arc/kernel/time.c
> +++ b/arch/arc/kernel/time.c
> @@ -152,14 +152,17 @@ static cycle_t arc_read_rtc(struct clocksource *cs)
> cycle_t full;
> } stamp;
>
> -
> - __asm__ __volatile(
> - "1: \n"
> - " lr %0, [AUX_RTC_LOW] \n"
> - " lr %1, [AUX_RTC_HIGH] \n"
> - " lr %2, [AUX_RTC_CTRL] \n"
> - " bbit0.nt%2, 31, 1b \n"
> - : "=r" (stamp.low), "=r" (stamp.high), "=r" (status));
> +/*
> + * hardware has an internal state machine which tracks readout of
> + * low/high and updates the CTRL.status if
> + * - interrupt/exception taken between the two reads
> + * - high increments after low has been read
> + */
> + do {
> + stamp.low = read_aux_reg(AUX_RTC_LOW);
> + stamp.high = read_aux_reg(AUX_RTC_HIGH);
> + status = read_aux_reg(AUX_RTC_CTRL);
> + } while (!(status & _BITUL(31)));
Is the condition correct ? If I refer to your previous answer, the bit will be
set for status if the counter wrapped up. So in this case, we won't exit the
loop until we wrap up, no ?
> return stamp.full;
> }
> --
> 2.7.4
>
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Re: [PATCH v2 02/10] ARC: timer: gfrc, rtc: deuglify big endian code
On Thu, Nov 03, 2016 at 02:31:33PM -0700, Vineet Gupta wrote: > A standard "C" shift will be handled appropriately by the compiler > dependin gon the endian used fo rbuild. So we don't need the s/dependin gon/depending on/ s/fo rbuild/for build/ > explicit distinction in code > > Signed-off-by: Vineet Gupta > --- ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v2 06/10] ARC: timer: Build gfrc, rtc under same option (64-bit timers)
On Thu, Nov 03, 2016 at 02:31:37PM -0700, Vineet Gupta wrote: > The original distinction was done as they were deveoped at different s/deveoped/developed/ > times and primarily becuse they are specific to UP (RTC) and SMP (GFRC). s/becuse/because/ > > But given that driver now handles that at runtime, (i.e. not allowing > RTC as clocksource in SMP), we can simplify things a bit. > > Signed-off-by: Vineet Gupta > --- ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v2 02/10] ARC: timer: gfrc, rtc: deuglify big endian code
On 11/03/2016 02:55 PM, Daniel Lezcano wrote: > On Thu, Nov 03, 2016 at 02:31:33PM -0700, Vineet Gupta wrote: >> A standard "C" shift will be handled appropriately by the compiler >> dependin gon the endian used fo rbuild. So we don't need the > > s/dependin gon/depending on/ > s/fo rbuild/for build/ Sorry for fat fingering those. Fixed now. > >> explicit distinction in code >> >> Signed-off-by: Vineet Gupta >> --- > ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v2 01/10] ARC: timer: rtc: implement read loop in "C" vs. inline asm
On 11/03/2016 02:52 PM, Daniel Lezcano wrote:
> On Thu, Nov 03, 2016 at 02:31:32PM -0700, Vineet Gupta wrote:
>> The current code doesn't even compile
>
> Give a better description in the log, especially if this patch is supposed to
> go to stable@
OK.
>
>> CC: sta...@vger.kernel.org
>> Signed-off-by: Vineet Gupta
>> ---
>> arch/arc/kernel/time.c | 19 +++
>> 1 file changed, 11 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
>> index f927b8dc6edd..1a117b999c0c 100644
>> --- a/arch/arc/kernel/time.c
>> +++ b/arch/arc/kernel/time.c
>> @@ -152,14 +152,17 @@ static cycle_t arc_read_rtc(struct clocksource *cs)
>> cycle_t full;
>> } stamp;
>>
>> -
>> -__asm__ __volatile(
>> -"1: \n"
>> -" lr %0, [AUX_RTC_LOW] \n"
>> -" lr %1, [AUX_RTC_HIGH] \n"
>> -" lr %2, [AUX_RTC_CTRL] \n"
>> -" bbit0.nt%2, 31, 1b \n"
>> -: "=r" (stamp.low), "=r" (stamp.high), "=r" (status));
>> +/*
>> + * hardware has an internal state machine which tracks readout of
>> + * low/high and updates the CTRL.status if
>> + * - interrupt/exception taken between the two reads
>> + * - high increments after low has been read
>> + */
>> +do {
>> +stamp.low = read_aux_reg(AUX_RTC_LOW);
>> +stamp.high = read_aux_reg(AUX_RTC_HIGH);
>> +status = read_aux_reg(AUX_RTC_CTRL);
>> +} while (!(status & _BITUL(31)));
>
> Is the condition correct ? If I refer to your previous answer, the bit will be
> set for status if the counter wrapped up. So in this case, we won't exit the
> loop until we wrap up, no ?
No thats not what I meant. Bit being set there means things are fine (no
interrupt
taken, no increment of high after low was readetc). All I changed here was use
of
0x8000_ to the macro. BBIT0 in assembler means branch if bit was clear.
>
>> return stamp.full;
>> }
>> --
>> 2.7.4
>>
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Re: [PATCH v2 01/10] ARC: timer: rtc: implement read loop in "C" vs. inline asm
On Thu, Nov 03, 2016 at 03:23:09PM -0700, Vineet Gupta wrote: > On 11/03/2016 02:52 PM, Daniel Lezcano wrote: > > On Thu, Nov 03, 2016 at 02:31:32PM -0700, Vineet Gupta wrote: > >> The current code doesn't even compile > > > > Give a better description in the log, especially if this patch is supposed > > to > > go to stable@ > > OK. [ ... ] > > Is the condition correct ? If I refer to your previous answer, the bit will > > be > > set for status if the counter wrapped up. So in this case, we won't exit the > > loop until we wrap up, no ? > > No thats not what I meant. Bit being set there means things are fine (no > interrupt > taken, no increment of high after low was readetc). All I changed here was > use of > 0x8000_ to the macro. BBIT0 in assembler means branch if bit was clear. Fair enough. So the logic is inverted 'status' == 0 means 'not fine'. ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v2 10/10] clocksource: import ARC timer driver
On Thu, Nov 03, 2016 at 02:31:41PM -0700, Vineet Gupta wrote: > This adds support for > > - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP >from @CNT to @LIMIT, before optionally triggering an interrupt. >These are programmed using ARC auxiliary register interface. >These are present in all ARC cores (ARC700 and ARC HS38) >TIMER0 serves as clockevent for all ARC linux builds. >TIMER1 is used for clocksource in arc700 builds. > > - CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in >ARC HS38 cores. These are independnet IP blocks with different >programming model respectively. > > Signed-off-by: Vineet Gupta > --- [ ... ] > #include > -#include > > #include > #include > @@ -263,7 +248,7 @@ static irqreturn_t timer_irq_handler(int irq, void > *dev_id) >* irq_set_chip_and_handler() asked for handle_percpu_devid_irq() >*/ > struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device); > - int irq_reenable = clockevent_state_periodic(evt); > + int irq_reenable __maybe_unused = clockevent_state_periodic(evt); Why is needed __maybe_unused ? I see in the previous driver 'irq_reenable' is used or is there a change in the previous patches I missed ? ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v2 01/10] ARC: timer: rtc: implement read loop in "C" vs. inline asm
On 11/03/2016 03:35 PM, Daniel Lezcano wrote: > On Thu, Nov 03, 2016 at 03:23:09PM -0700, Vineet Gupta wrote: >> On 11/03/2016 02:52 PM, Daniel Lezcano wrote: >>> On Thu, Nov 03, 2016 at 02:31:32PM -0700, Vineet Gupta wrote: The current code doesn't even compile >>> >>> Give a better description in the log, especially if this patch is supposed >>> to >>> go to stable@ >> >> OK. > > [ ... ] Here's what I added > ARC: timer: rtc: implement read loop in "C" vs. inline asm The current code doesn't even compile as somehow the inline assembly can't see the register names defined as ARC_RTC_* I'm pretty sure It worked when I first got it merged, but the tools were definitely different then. So better to write this in "C" anyways. > >>> Is the condition correct ? If I refer to your previous answer, the bit will >>> be >>> set for status if the counter wrapped up. So in this case, we won't exit the >>> loop until we wrap up, no ? >> >> No thats not what I meant. Bit being set there means things are fine (no >> interrupt >> taken, no increment of high after low was readetc). All I changed here was >> use of >> 0x8000_ to the macro. BBIT0 in assembler means branch if bit was clear. > > Fair enough. So the logic is inverted 'status' == 0 means 'not fine'. Indeed ! ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v2 01/10] ARC: timer: rtc: implement read loop in "C" vs. inline asm
On Thu, Nov 03, 2016 at 03:44:24PM -0700, Vineet Gupta wrote: > On 11/03/2016 03:35 PM, Daniel Lezcano wrote: > > On Thu, Nov 03, 2016 at 03:23:09PM -0700, Vineet Gupta wrote: > >> On 11/03/2016 02:52 PM, Daniel Lezcano wrote: > >>> On Thu, Nov 03, 2016 at 02:31:32PM -0700, Vineet Gupta wrote: > The current code doesn't even compile > >>> > >>> Give a better description in the log, especially if this patch is > >>> supposed to > >>> go to stable@ > >> > >> OK. > > > > [ ... ] > > Here's what I added > > > > ARC: timer: rtc: implement read loop in "C" vs. inline asm > > The current code doesn't even compile as somehow the inline assembly > can't see the register names defined as ARC_RTC_* > I'm pretty sure It worked when I first got it merged, but the tools were > definitely different then. > > So better to write this in "C" anyways. Acked-by: Daniel Lezcano ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v2 10/10] clocksource: import ARC timer driver
On 11/03/2016 03:38 PM, Daniel Lezcano wrote: > On Thu, Nov 03, 2016 at 02:31:41PM -0700, Vineet Gupta wrote: >> This adds support for >> >> - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP >>from @CNT to @LIMIT, before optionally triggering an interrupt. >>These are programmed using ARC auxiliary register interface. >>These are present in all ARC cores (ARC700 and ARC HS38) >>TIMER0 serves as clockevent for all ARC linux builds. >>TIMER1 is used for clocksource in arc700 builds. >> >> - CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in >>ARC HS38 cores. These are independnet IP blocks with different >>programming model respectively. >> >> Signed-off-by: Vineet Gupta >> --- > > [ ... ] > >> #include >> -#include >> >> #include >> #include >> @@ -263,7 +248,7 @@ static irqreturn_t timer_irq_handler(int irq, void >> *dev_id) >> * irq_set_chip_and_handler() asked for handle_percpu_devid_irq() >> */ >> struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device); >> -int irq_reenable = clockevent_state_periodic(evt); >> +int irq_reenable __maybe_unused = clockevent_state_periodic(evt); > > Why is needed __maybe_unused ? I see in the previous driver 'irq_reenable' is > used or is there a change in the previous patches I missed ? This is needed when not building for CONFIG_ARC (saw this when building for ARM) write_aux_reg() becomes a no-op which causes a warning: write_aux_reg(ARC_REG_TIMER0_CTRL, irq_reenable | TIMER_CTRL_NH); ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Re: [PATCH v2 10/10] clocksource: import ARC timer driver
On Thu, Nov 03, 2016 at 03:50:21PM -0700, Vineet Gupta wrote:
> On 11/03/2016 03:38 PM, Daniel Lezcano wrote:
> > On Thu, Nov 03, 2016 at 02:31:41PM -0700, Vineet Gupta wrote:
> >> This adds support for
> >>
> >> - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP
> >>from @CNT to @LIMIT, before optionally triggering an interrupt.
> >>These are programmed using ARC auxiliary register interface.
> >>These are present in all ARC cores (ARC700 and ARC HS38)
> >>TIMER0 serves as clockevent for all ARC linux builds.
> >>TIMER1 is used for clocksource in arc700 builds.
> >>
> >> - CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in
> >>ARC HS38 cores. These are independnet IP blocks with different
> >>programming model respectively.
> >>
> >> Signed-off-by: Vineet Gupta
> >> ---
> >
> > [ ... ]
> >
> >> #include
> >> -#include
> >>
> >> #include
> >> #include
> >> @@ -263,7 +248,7 @@ static irqreturn_t timer_irq_handler(int irq, void
> >> *dev_id)
> >> * irq_set_chip_and_handler() asked for handle_percpu_devid_irq()
> >> */
> >>struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
> >> - int irq_reenable = clockevent_state_periodic(evt);
> >> + int irq_reenable __maybe_unused = clockevent_state_periodic(evt);
> >
> > Why is needed __maybe_unused ? I see in the previous driver 'irq_reenable'
> > is
> > used or is there a change in the previous patches I missed ?
>
> This is needed when not building for CONFIG_ARC (saw this when building for
> ARM)
> write_aux_reg() becomes a no-op which causes a warning:
>
> write_aux_reg(ARC_REG_TIMER0_CTRL, irq_reenable | TIMER_CTRL_NH);
Instead of adding the __maybe_unused, changing in patch 7/10:
#define read_aux_reg(r) 0
#define write_aux_reg(r, v)
by
static inline int read_aux_reg(void *)
{
return 0;
}
static inline void write_aux_reg(void *, u32)
{
;
}
Should fix the warning.
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Re: [PATCH v2 10/10] clocksource: import ARC timer driver
On 11/03/2016 04:01 PM, Daniel Lezcano wrote:
> On Thu, Nov 03, 2016 at 03:50:21PM -0700, Vineet Gupta wrote:
>> On 11/03/2016 03:38 PM, Daniel Lezcano wrote:
>>> On Thu, Nov 03, 2016 at 02:31:41PM -0700, Vineet Gupta wrote:
This adds support for
- CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP
from @CNT to @LIMIT, before optionally triggering an interrupt.
These are programmed using ARC auxiliary register interface.
These are present in all ARC cores (ARC700 and ARC HS38)
TIMER0 serves as clockevent for all ARC linux builds.
TIMER1 is used for clocksource in arc700 builds.
- CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in
ARC HS38 cores. These are independnet IP blocks with different
programming model respectively.
Signed-off-by: Vineet Gupta
---
>>>
>>> [ ... ]
>>>
#include
-#include
#include
#include
@@ -263,7 +248,7 @@ static irqreturn_t timer_irq_handler(int irq, void
*dev_id)
* irq_set_chip_and_handler() asked for handle_percpu_devid_irq()
*/
struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
- int irq_reenable = clockevent_state_periodic(evt);
+ int irq_reenable __maybe_unused = clockevent_state_periodic(evt);
>>>
>>> Why is needed __maybe_unused ? I see in the previous driver 'irq_reenable'
>>> is
>>> used or is there a change in the previous patches I missed ?
>>
>> This is needed when not building for CONFIG_ARC (saw this when building for
>> ARM)
>> write_aux_reg() becomes a no-op which causes a warning:
>>
>> write_aux_reg(ARC_REG_TIMER0_CTRL, irq_reenable | TIMER_CTRL_NH);
>
> Instead of adding the __maybe_unused, changing in patch 7/10:
>
> #define read_aux_reg(r) 0
> #define write_aux_reg(r, v)
>
> by
>
> static inline int read_aux_reg(void *)
> {
> return 0;
> }
>
> static inline void write_aux_reg(void *, u32)
> {
> ;
> }
>
> Should fix the warning.
Good point, slight mod preferred as @reg argument is not really a MMIO register
so
not a pointer but a number instead so I'd prefer u32 for that as well.
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[PATCH v3 05/10] ARC: time: move time_init() out of the driver
to allow future git mv of the driver into drivers/clocksource
Acked-by: Daniel Lezcano
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/setup.c | 11 +++
arch/arc/kernel/time.c | 9 -
2 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 595d06900061..5865bd34a7fa 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -10,6 +10,8 @@
#include
#include
#include
+#include
+#include
#include
#include
#include
@@ -449,6 +451,15 @@ void __init setup_arch(char **cmdline_p)
arc_unwind_init();
}
+/*
+ * Called from start_kernel() - boot CPU only
+ */
+void __init time_init(void)
+{
+ of_clk_init(NULL);
+ clocksource_probe();
+}
+
static int __init customize_machine(void)
{
if (machine_desc->init_machine)
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index d3f3750a0d2d..7f06662f53e7 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -365,12 +365,3 @@ static int __init arc_of_timer_init(struct device_node *np)
return ret;
}
CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_of_timer_init);
-
-/*
- * Called from start_kernel() - boot CPU only
- */
-void __init time_init(void)
-{
- of_clk_init(NULL);
- clocksource_probe();
-}
--
2.7.4
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[PATCH v3 04/10] ARC: timer: gfrc: boot print alongside other timers
Signed-off-by: Vineet Gupta --- arch/arc/kernel/setup.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c index 0385df77a697..595d06900061 100644 --- a/arch/arc/kernel/setup.c +++ b/arch/arc/kernel/setup.c @@ -234,11 +234,11 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len) is_isa_arcompact() ? "ARCompact" : "ARCv2", IS_AVAIL1(cpu->isa.be, "[Big-Endian]")); - n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ", + n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: ", IS_AVAIL1(cpu->extn.timer0, "Timer0 "), IS_AVAIL1(cpu->extn.timer1, "Timer1 "), - IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ", -CONFIG_ARC_HAS_RTC)); + IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_HAS_RTC), + IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_HAS_GFRC)); n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s", IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC), -- 2.7.4 ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
[PATCH v3 03/10] ARC: timer: gfrc, rtc: Read BCR to detect whether hardware exists ...
... don't rely on cpuinfo populated in arc boot code. This paves way for
moving this code in drivers/clocksource/
And while at it, convert the WARN() to pr_warn() as sugested by Daniel
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/time.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 8d66bb446209..d3f3750a0d2d 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -111,11 +111,14 @@ static struct clocksource arc_counter_gfrc = {
static int __init arc_cs_setup_gfrc(struct device_node *node)
{
- int exists = cpuinfo_arc700[0].extn.gfrc;
+ struct mcip_bcr mp;
int ret;
- if (WARN(!exists, "Global-64-bit-Ctr clocksource not detected"))
+ READ_BCR(ARC_REG_MCIP_BCR, mp);
+ if (!mp.gfrc) {
+ pr_warn("Global-64-bit-Ctr clocksource not detected");
return -ENXIO;
+ }
ret = arc_get_timer_clk(node);
if (ret)
@@ -163,15 +166,20 @@ static struct clocksource arc_counter_rtc = {
static int __init arc_cs_setup_rtc(struct device_node *node)
{
- int exists = cpuinfo_arc700[smp_processor_id()].extn.rtc;
+ struct bcr_timer timer;
int ret;
- if (WARN(!exists, "Local-64-bit-Ctr clocksource not detected"))
+ READ_BCR(ARC_REG_TIMERS_BCR, timer);
+ if (!timer.rtc) {
+ pr_warn("Local-64-bit-Ctr clocksource not detected");
return -ENXIO;
+ }
/* Local to CPU hence not usable in SMP */
- if (WARN(IS_ENABLED(CONFIG_SMP), "Local-64-bit-Ctr not usable in SMP"))
+ if (IS_ENABLED(CONFIG_SMP)) {
+ pr_warn("Local-64-bit-Ctr not usable in SMP");
return -EINVAL;
+ }
ret = arc_get_timer_clk(node);
if (ret)
--
2.7.4
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[PATCH v3 06/10] ARC: timer: Build gfrc, rtc under same option (64-bit timers)
The original distinction was done as they were developed at different
times and primarily because they are specific to UP (RTC) and SMP (GFRC).
But given that driver handles that at runtime, (i.e. not allowing
RTC as clocksource in SMP), we can simplify things a bit.
Signed-off-by: Vineet Gupta
---
arch/arc/Kconfig | 10 ++
arch/arc/configs/nsimosci_hs_smp_defconfig | 2 +-
arch/arc/configs/vdk_hs38_smp_defconfig| 2 +-
arch/arc/kernel/setup.c| 4 ++--
arch/arc/kernel/time.c | 6 +-
5 files changed, 7 insertions(+), 17 deletions(-)
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index bd204bfa29ed..bde3e558d8bc 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -410,15 +410,9 @@ config ARC_HAS_DIV_REM
bool "Insn: div, divu, rem, remu"
default y
-config ARC_HAS_RTC
- bool "Local 64-bit r/o cycle counter"
- default n
- depends on !SMP
-
-config ARC_HAS_GFRC
- bool "SMP synchronized 64-bit cycle counter"
+config ARC_TIMERS_64BIT
+ bool "64-bit r/o cycle counters RTC (up) and GFRC (smp)"
default y
- depends on SMP
config ARC_NUMBER_OF_INTERRUPTS
int "Number of interrupts"
diff --git a/arch/arc/configs/nsimosci_hs_smp_defconfig
b/arch/arc/configs/nsimosci_hs_smp_defconfig
index 6da71ba253a9..155add7761ed 100644
--- a/arch/arc/configs/nsimosci_hs_smp_defconfig
+++ b/arch/arc/configs/nsimosci_hs_smp_defconfig
@@ -21,7 +21,7 @@ CONFIG_MODULES=y
CONFIG_ARC_PLAT_SIM=y
CONFIG_ISA_ARCV2=y
CONFIG_SMP=y
-# CONFIG_ARC_HAS_GFRC is not set
+# CONFIG_ARC_TIMERS_64BIT is not set
CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci_hs_idu"
CONFIG_PREEMPT=y
# CONFIG_COMPACTION is not set
diff --git a/arch/arc/configs/vdk_hs38_smp_defconfig
b/arch/arc/configs/vdk_hs38_smp_defconfig
index 969b206d6c67..573028f19de7 100644
--- a/arch/arc/configs/vdk_hs38_smp_defconfig
+++ b/arch/arc/configs/vdk_hs38_smp_defconfig
@@ -15,7 +15,7 @@ CONFIG_ARC_PLAT_AXS10X=y
CONFIG_AXS103=y
CONFIG_ISA_ARCV2=y
CONFIG_SMP=y
-# CONFIG_ARC_HAS_GFRC is not set
+# CONFIG_ARC_TIMERS_64BIT is not set
CONFIG_ARC_UBOOT_SUPPORT=y
CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38_smp"
CONFIG_PREEMPT=y
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 5865bd34a7fa..3093fa898a23 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -239,8 +239,8 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int
len)
n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t:
",
IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
- IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ",
CONFIG_ARC_HAS_RTC),
- IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ",
CONFIG_ARC_HAS_GFRC));
+ IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ",
CONFIG_ARC_TIMERS_64BIT),
+ IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ",
CONFIG_ARC_TIMERS_64BIT));
n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
IS_AVAIL2(cpu->isa.atomic, "atomic ",
CONFIG_ARC_HAS_LLSC),
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 7f06662f53e7..417d32e031d3 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -81,7 +81,7 @@ static int noinline arc_get_timer_clk(struct device_node
*node)
/** Clock Source Device */
-#ifdef CONFIG_ARC_HAS_GFRC
+#ifdef CONFIG_ARC_TIMERS_64BIT
static cycle_t arc_read_gfrc(struct clocksource *cs)
{
@@ -128,10 +128,6 @@ static int __init arc_cs_setup_gfrc(struct device_node
*node)
}
CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
-#endif
-
-#ifdef CONFIG_ARC_HAS_RTC
-
#define AUX_RTC_CTRL 0x103
#define AUX_RTC_LOW0x104
#define AUX_RTC_HIGH 0x105
--
2.7.4
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[PATCH v3 10/10] clocksource: import ARC timer driver
This adds support for - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP from @CNT to @LIMIT, before optionally triggering an interrupt. These are programmed using ARC auxiliary register interface. These are present in all ARC cores (ARC700 and ARC HS38) TIMER0 serves as clockevent for all ARC linux builds. TIMER1 is used for clocksource in arc700 builds. - CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in ARC HS38 cores. These are independnet IP blocks with different programming model respectively. Signed-off-by: Vineet Gupta --- MAINTAINERS| 1 + arch/arc/Kconfig | 7 ++ arch/arc/kernel/Makefile | 2 +- drivers/clocksource/Kconfig| 19 +++ drivers/clocksource/Makefile | 1 + .../time.c => drivers/clocksource/arc_timer.c | 27 +- 6 files changed, 30 insertions(+), 27 deletions(-) rename arch/arc/kernel/time.c => drivers/clocksource/arc_timer.c (90%) diff --git a/MAINTAINERS b/MAINTAINERS index 3d838cf49f81..57b56ff1dd68 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11632,6 +11632,7 @@ S: Supported F: arch/arc/ F: Documentation/devicetree/bindings/arc/* F: Documentation/devicetree/bindings/interrupt-controller/snps,arc* +F: drivers/clocksource/arc_timer.c F: drivers/tty/serial/arc_uart.c T: git git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index bde3e558d8bc..ab12723d39a0 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -8,9 +8,9 @@ config ARC def_bool y + select ARC_TIMERS select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC select BUILDTIME_EXTABLE_SORT - select CLKSRC_OF select CLONE_BACKWARDS select COMMON_CLK select GENERIC_ATOMIC64 if !ISA_ARCV2 || !(ARC_HAS_LL64 && ARC_HAS_LLSC) @@ -115,6 +115,7 @@ config ISA_ARCOMPACT config ISA_ARCV2 bool "ARC ISA v2" + select ARC_TIMERS_64BIT help ISA for the Next Generation ARC-HS cores @@ -410,10 +411,6 @@ config ARC_HAS_DIV_REM bool "Insn: div, divu, rem, remu" default y -config ARC_TIMERS_64BIT - bool "64-bit r/o cycle counters RTC (up) and GFRC (smp)" - default y - config ARC_NUMBER_OF_INTERRUPTS int "Number of interrupts" range 8 240 diff --git a/arch/arc/kernel/Makefile b/arch/arc/kernel/Makefile index cfcdedf52ff8..8942c5c3b4c5 100644 --- a/arch/arc/kernel/Makefile +++ b/arch/arc/kernel/Makefile @@ -8,7 +8,7 @@ # Pass UTS_MACHINE for user_regset definition CFLAGS_ptrace.o+= -DUTS_MACHINE='"$(UTS_MACHINE)"' -obj-y := arcksyms.o setup.o irq.o time.o reset.o ptrace.o process.o devtree.o +obj-y := arcksyms.o setup.o irq.o reset.o ptrace.o process.o devtree.o obj-y += signal.o traps.o sys.o troubleshoot.o stacktrace.o disasm.o obj-$(CONFIG_ISA_ARCOMPACT)+= entry-compact.o intc-compact.o obj-$(CONFIG_ISA_ARCV2)+= entry-arcv2.o intc-arcv2.o diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index e2c6e43cf8ca..a53bd50164e7 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -282,6 +282,25 @@ config CLKSRC_MPS2 select CLKSRC_MMIO select CLKSRC_OF +config ARC_TIMERS + bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST + depends on GENERIC_CLOCKEVENTS + select CLKSRC_OF + help + These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores + (ARC700 as well as ARC HS38). + TIMER0 serves as clockevent while TIMER1 provides clocksource + +config ARC_TIMERS_64BIT + bool "Support for 64-bit counters in ARC HS38 cores" if COMPILE_TEST + depends on GENERIC_CLOCKEVENTS + select CLKSRC_OF + help + This enables 2 different 64-bit timers: RTC (for UP) and GFRC (for SMP) + RTC is implemented inside the core, while GFRC sits outside the core in + ARConnect IP block. Driver automatically picks one of them for clocksource + as appropriate. + config ARM_ARCH_TIMER bool select CLKSRC_OF if OF diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index cf87f407f1ad..a14111e1f087 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -51,6 +51,7 @@ obj-$(CONFIG_CLKSRC_TI_32K) += timer-ti-32k.o obj-$(CONFIG_CLKSRC_NPS) += timer-nps.o obj-$(CONFIG_OXNAS_RPS_TIMER) += timer-oxnas-rps.o +obj-$(CONFIG_ARC_TIMERS) += arc_timer.o obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o obj-$(CONFIG_ARMV7M_SYSTICK) += armv7m_systick.o diff --git a/arch/arc/kernel/time.c b/dri
[PATCH v3 00/10] Move ARC timer code into drivers/clocksource/
Hi,
This series addresses the long pending move of ARC timer code into
drivers/clocksource/.
Thx,
-Vineet
v2 -> v3
- Fixed a bunch of typos in changelogs [Daniel]
- aux.h: stubs for {read,write}_aux_reg() inline functions(vs. macros)
to cleanly avoid warnings in !ARC builds [Daniel]
- Remove __maybe_used in driver given above [Daniel]
- Ran checkpatch and fixed some space/tab issues
v1 -> v2
- Now 10 patches instead of 9 to handle BIG ENDIAN in arch agnostic way
- Moved fix for RTC (v1 2/9) ahead of queue (v2 1/10) to allow for easier
stable backport
- Folded the Kconfig items for RTC and GFRC into single ARC_TIMERS_64BIT
So no special casing for UP/SMP in Kconfig.
Driver already handles the UP vs. SMP at runtime as needed
- convert WARN() to pr_warn() [Daniel]
- Use of _BITUL() vs. constant 0x8000_ [Daniel]
- changelog spellos:[Daniel]
s/depedency/dependency/
s/seperate/separate/
v2:
http://lists.infradead.org/pipermail/linux-snps-arc/2016-November/001724.html
v1: http://lists.infradead.org/pipermail/linux-snps-arc/2016-October/001676.html
Vineet Gupta (10):
ARC: timer: rtc: implement read loop in "C" vs. inline asm
ARC: timer: gfrc, rtc: deuglify big endian code
ARC: timer: gfrc, rtc: Read BCR to detect whether hardware exists ...
ARC: timer: gfrc: boot print alongside other timers
ARC: time: move time_init() out of the driver
ARC: timer: Build gfrc, rtc under same option (64-bit timers)
ARC: breakout aux handling into a separate header
ARC: move mcip.h into include/soc and adjust the includes
ARC: breakout timer include code into separate header ...
clocksource: import ARC timer driver
MAINTAINERS| 1 +
arch/arc/Kconfig | 13 +--
arch/arc/configs/nsimosci_hs_smp_defconfig | 2 +-
arch/arc/configs/vdk_hs38_smp_defconfig| 2 +-
arch/arc/include/asm/arcregs.h | 94 +---
arch/arc/kernel/Makefile | 2 +-
arch/arc/kernel/mcip.c | 2 +-
arch/arc/kernel/setup.c| 17 ++-
arch/arc/plat-axs10x/axs10x.c | 2 +-
drivers/clocksource/Kconfig| 19
drivers/clocksource/Makefile | 1 +
.../time.c => drivers/clocksource/arc_timer.c | 125 +++--
include/soc/arc/aux.h | 63 +++
{arch/arc/include/asm => include/soc/arc}/mcip.h | 10 +-
include/soc/arc/timers.h | 38 +++
include/soc/nps/common.h | 4 +-
16 files changed, 191 insertions(+), 204 deletions(-)
rename arch/arc/kernel/time.c => drivers/clocksource/arc_timer.c (72%)
create mode 100644 include/soc/arc/aux.h
rename {arch/arc/include/asm => include/soc/arc}/mcip.h (95%)
create mode 100644 include/soc/arc/timers.h
--
2.7.4
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[PATCH v3 07/10] ARC: breakout aux handling into a separate header
ARC timers use aux registers for programming and this paves way for
moving ARC timer drivers into drivers/clocksource
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/arcregs.h | 85 +-
arch/arc/include/asm/mcip.h| 2 +-
include/soc/arc/aux.h | 63 +++
include/soc/nps/common.h | 4 +-
4 files changed, 67 insertions(+), 87 deletions(-)
create mode 100644 include/soc/arc/aux.h
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 7f3f9f63708c..ccf5dc96713b 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -110,90 +110,7 @@
#ifndef __ASSEMBLY__
-/*
- **
- * Inline ASM macros to read/write AUX Regs
- * Essentially invocation of lr/sr insns from "C"
- */
-
-#if 1
-
-#define read_aux_reg(reg) __builtin_arc_lr(reg)
-
-/* gcc builtin sr needs reg param to be long immediate */
-#define write_aux_reg(reg_immed, val) \
- __builtin_arc_sr((unsigned int)(val), reg_immed)
-
-#else
-
-#define read_aux_reg(reg) \
-({ \
- unsigned int __ret; \
- __asm__ __volatile__( \
- " lr%0, [%1]" \
- : "=r"(__ret) \
- : "i"(reg));\
- __ret; \
-})
-
-/*
- * Aux Reg address is specified as long immediate by caller
- * e.g.
- *write_aux_reg(0x69, some_val);
- * This generates tightest code.
- */
-#define write_aux_reg(reg_imm, val)\
-({ \
- __asm__ __volatile__( \
- " sr %0, [%1] \n" \
- : \
- : "ir"(val), "i"(reg_imm)); \
-})
-
-/*
- * Aux Reg address is specified in a variable
- * * e.g.
- * reg_num = 0x69
- * write_aux_reg2(reg_num, some_val);
- * This has to generate glue code to load the reg num from
- * memory to a reg hence not recommended.
- */
-#define write_aux_reg2(reg_in_var, val)\
-({ \
- unsigned int tmp; \
- \
- __asm__ __volatile__( \
- " ld %0, [%2] \n\t" \
- " sr %1, [%0] \n\t" \
- : "=&r"(tmp)\
- : "r"(val), "memory"(®_in_var)); \
-})
-
-#endif
-
-#define READ_BCR(reg, into)\
-{ \
- unsigned int tmp; \
- tmp = read_aux_reg(reg);\
- if (sizeof(tmp) == sizeof(into)) { \
- into = *((typeof(into) *)&tmp); \
- } else {\
- extern void bogus_undefined(void); \
- bogus_undefined(); \
- } \
-}
-
-#define WRITE_AUX(reg, into) \
-{ \
- unsigned int tmp; \
- if (sizeof(tmp) == sizeof(into)) { \
- tmp = (*(unsigned int *)&(into)); \
- write_aux_reg(reg, tmp);\
- } else { \
- extern void bogus_undefined(void); \
- bogus_undefined(); \
- } \
-}
+#include
/* Helpers */
#define TO_KB(bytes) ((bytes) >> 10)
diff --git a/arch/arc/include/asm/mcip.h b/arch/arc/include/asm/mcip.h
index c8fbe4114bad..fc28d0944801 100644
--- a/arch/arc/include/asm/mcip.h
+++ b/arch/arc/include/asm/mcip.h
@@ -13,7 +13,7 @@
#ifdef CONFIG_ISA_ARCV2
-#include
+#include
#define ARC_REG_MCIP_BCR 0x0d0
#define ARC_REG_MCIP_CMD 0x600
diff --git a/include/soc/arc/aux.h b/include/soc/arc/aux.h
new file mode 100644
index ..8c3fb13e0452
--- /dev/null
+++ b/include/soc/arc/aux.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2016-2017 Synopsys, Inc. (www.synopsys.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __SOC_ARC_AUX_H__
+#define __SOC_ARC_AUX_H__
+
+#ifdef CONFIG_ARC
+
+#define read_aux_reg(r)__builtin_arc_lr(r)
+
+/* gcc builtin sr needs reg param to be long immediate */
+#define write_aux_reg(r, v)__builtin_arc_sr((unsigned int)(v), r)
+
+#else /* !CONFIG_ARC */
+
+static inline int read_aux_reg(u32 r)
+{
+ return 0;
+}
+
+/*
+ * fu
[PATCH v3 02/10] ARC: timer: gfrc, rtc: deuglify big endian code
A standard "C" shift will be handled appropriately by the compiler
depending on the endian for the build. So we don't need the
explicit distinction in code
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/time.c | 30 --
1 file changed, 8 insertions(+), 22 deletions(-)
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index c10390d1ddb6..8d66bb446209 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -86,26 +86,19 @@ static int noinline arc_get_timer_clk(struct device_node
*node)
static cycle_t arc_read_gfrc(struct clocksource *cs)
{
unsigned long flags;
- union {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- struct { u32 h, l; };
-#else
- struct { u32 l, h; };
-#endif
- cycle_t full;
- } stamp;
+ u32 l, h;
local_irq_save(flags);
__mcip_cmd(CMD_GFRC_READ_LO, 0);
- stamp.l = read_aux_reg(ARC_REG_MCIP_READBACK);
+ l = read_aux_reg(ARC_REG_MCIP_READBACK);
__mcip_cmd(CMD_GFRC_READ_HI, 0);
- stamp.h = read_aux_reg(ARC_REG_MCIP_READBACK);
+ h = read_aux_reg(ARC_REG_MCIP_READBACK);
local_irq_restore(flags);
- return stamp.full;
+ return (((cycle_t)h) << 32) | l;
}
static struct clocksource arc_counter_gfrc = {
@@ -143,14 +136,7 @@ CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc",
arc_cs_setup_gfrc);
static cycle_t arc_read_rtc(struct clocksource *cs)
{
unsigned long status;
- union {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- struct { u32 high, low; };
-#else
- struct { u32 low, high; };
-#endif
- cycle_t full;
- } stamp;
+ u32 l, h;
/*
* hardware has an internal state machine which tracks readout of
@@ -159,12 +145,12 @@ static cycle_t arc_read_rtc(struct clocksource *cs)
* - high increments after low has been read
*/
do {
- stamp.low = read_aux_reg(AUX_RTC_LOW);
- stamp.high = read_aux_reg(AUX_RTC_HIGH);
+ l = read_aux_reg(AUX_RTC_LOW);
+ h = read_aux_reg(AUX_RTC_HIGH);
status = read_aux_reg(AUX_RTC_CTRL);
} while (!(status & _BITUL(31)));
- return stamp.full;
+ return (((cycle_t)h) << 32) | l;
}
static struct clocksource arc_counter_rtc = {
--
2.7.4
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[PATCH v3 09/10] ARC: breakout timer include code into separate header ...
... which allows for use in drivers/clocksource later
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/arcregs.h | 9 +
arch/arc/kernel/time.c | 18 +++---
include/soc/arc/timers.h | 38 ++
3 files changed, 42 insertions(+), 23 deletions(-)
create mode 100644 include/soc/arc/timers.h
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index ccf5dc96713b..a17aa4558832 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -20,7 +20,6 @@
#define ARC_REG_FP_V2_BCR 0xc8/* ARCv2 FPU */
#define ARC_REG_SLC_BCR0xce
#define ARC_REG_DCCM_BUILD 0x74/* DCCM size (common) */
-#define ARC_REG_TIMERS_BCR 0x75
#define ARC_REG_AP_BCR 0x76
#define ARC_REG_ICCM_BUILD 0x78/* ICCM size (common) */
#define ARC_REG_XY_MEM_BCR 0x79
@@ -206,13 +205,7 @@ struct bcr_fp_arcv2 {
#endif
};
-struct bcr_timer {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- unsigned int pad2:15, rtsc:1, pad1:5, rtc:1, t1:1, t0:1, ver:8;
-#else
- unsigned int ver:8, t0:1, t1:1, rtc:1, pad1:5, rtsc:1, pad2:15;
-#endif
-};
+#include
struct bcr_bpu_arcompact {
#ifdef CONFIG_CPU_BIG_ENDIAN
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index ec1b896f27b2..94b9cd169374 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -38,22 +38,10 @@
#include
#include
#include
-#include
+#include
#include
-/* Timer related Aux registers */
-#define ARC_REG_TIMER0_LIMIT 0x23/* timer 0 limit */
-#define ARC_REG_TIMER0_CTRL0x22/* timer 0 control */
-#define ARC_REG_TIMER0_CNT 0x21/* timer 0 count */
-#define ARC_REG_TIMER1_LIMIT 0x102 /* timer 1 limit */
-#define ARC_REG_TIMER1_CTRL0x101 /* timer 1 control */
-#define ARC_REG_TIMER1_CNT 0x100 /* timer 1 count */
-
-#define TIMER_CTRL_IE (1 << 0) /* Interrupt when Count reaches limit */
-#define TIMER_CTRL_NH (1 << 1) /* Count only when CPU NOT halted */
-
-#define ARC_TIMER_MAX 0x
static unsigned long arc_timer_freq;
@@ -218,7 +206,7 @@ static int __init arc_cs_setup_timer1(struct device_node
*node)
if (ret)
return ret;
- write_aux_reg(ARC_REG_TIMER1_LIMIT, ARC_TIMER_MAX);
+ write_aux_reg(ARC_REG_TIMER1_LIMIT, ARC_TIMERN_MAX);
write_aux_reg(ARC_REG_TIMER1_CNT, 0);
write_aux_reg(ARC_REG_TIMER1_CTRL, TIMER_CTRL_NH);
@@ -296,7 +284,7 @@ static int arc_timer_starting_cpu(unsigned int cpu)
evt->cpumask = cpumask_of(smp_processor_id());
- clockevents_config_and_register(evt, arc_timer_freq, 0, ARC_TIMER_MAX);
+ clockevents_config_and_register(evt, arc_timer_freq, 0, ARC_TIMERN_MAX);
enable_percpu_irq(arc_timer_irq, 0);
return 0;
}
diff --git a/include/soc/arc/timers.h b/include/soc/arc/timers.h
new file mode 100644
index ..a20ed2fbc432
--- /dev/null
+++ b/include/soc/arc/timers.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2016-17 Synopsys, Inc. (www.synopsys.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __SOC_ARC_TIMERS_H
+#define __SOC_ARC_TIMERS_H
+
+#include
+
+/* Timer related Aux registers */
+#define ARC_REG_TIMER0_LIMIT 0x23/* timer 0 limit */
+#define ARC_REG_TIMER0_CTRL0x22/* timer 0 control */
+#define ARC_REG_TIMER0_CNT 0x21/* timer 0 count */
+#define ARC_REG_TIMER1_LIMIT 0x102 /* timer 1 limit */
+#define ARC_REG_TIMER1_CTRL0x101 /* timer 1 control */
+#define ARC_REG_TIMER1_CNT 0x100 /* timer 1 count */
+
+/* CTRL reg bits */
+#define TIMER_CTRL_IE (1 << 0) /* Interrupt when Count reaches limit
*/
+#define TIMER_CTRL_NH (1 << 1) /* Count only when CPU NOT halted */
+
+#define ARC_TIMERN_MAX 0x
+
+#define ARC_REG_TIMERS_BCR 0x75
+
+struct bcr_timer {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+ unsigned int pad2:15, rtsc:1, pad1:5, rtc:1, t1:1, t0:1, ver:8;
+#else
+ unsigned int ver:8, t0:1, t1:1, rtc:1, pad1:5, rtsc:1, pad2:15;
+#endif
+};
+
+#endif
--
2.7.4
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[PATCH v3 08/10] ARC: move mcip.h into include/soc and adjust the includes
Also remove the dependency on ARCv2, to increase compile coverage for
!ARCV2 builds
Acked-by: Daniel Lezcano
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/mcip.c | 2 +-
arch/arc/kernel/time.c | 2 +-
arch/arc/plat-axs10x/axs10x.c| 2 +-
{arch/arc/include/asm => include/soc/arc}/mcip.h | 8 ++--
4 files changed, 5 insertions(+), 9 deletions(-)
rename {arch/arc/include/asm => include/soc/arc}/mcip.h (96%)
diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c
index c424d5abc318..0651e0a2e8b1 100644
--- a/arch/arc/kernel/mcip.c
+++ b/arch/arc/kernel/mcip.c
@@ -11,8 +11,8 @@
#include
#include
#include
+#include
#include
-#include
#include
static DEFINE_RAW_SPINLOCK(mcip_lock);
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 417d32e031d3..ec1b896f27b2 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -40,7 +40,7 @@
#include
#include
-#include
+#include
/* Timer related Aux registers */
#define ARC_REG_TIMER0_LIMIT 0x23/* timer 0 limit */
diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
index 86548701023c..38ff349d7f2a 100644
--- a/arch/arc/plat-axs10x/axs10x.c
+++ b/arch/arc/plat-axs10x/axs10x.c
@@ -21,7 +21,7 @@
#include
#include
#include
-#include
+#include
#define AXS_MB_CGU 0xE001
#define AXS_MB_CREG0xE0011000
diff --git a/arch/arc/include/asm/mcip.h b/include/soc/arc/mcip.h
similarity index 96%
rename from arch/arc/include/asm/mcip.h
rename to include/soc/arc/mcip.h
index fc28d0944801..6902c2a8bd23 100644
--- a/arch/arc/include/asm/mcip.h
+++ b/include/soc/arc/mcip.h
@@ -8,10 +8,8 @@
* published by the Free Software Foundation.
*/
-#ifndef __ASM_MCIP_H
-#define __ASM_MCIP_H
-
-#ifdef CONFIG_ISA_ARCV2
+#ifndef __SOC_ARC_MCIP_H
+#define __SOC_ARC_MCIP_H
#include
@@ -103,5 +101,3 @@ static inline void __mcip_cmd_data(unsigned int cmd,
unsigned int param,
}
#endif
-
-#endif
--
2.7.4
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[PATCH v3 01/10] ARC: timer: rtc: implement read loop in "C" vs. inline asm
The current code doesn't even compile as somehow the inline assembly
can't see the register names defined as ARC_RTC_*
I'm pretty sure It worked when I first got it merged, but the tools were
definitely different then.
So better to write this in "C" anyways.
CC: sta...@vger.kernel.org
Acked-by: Daniel Lezcano
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/time.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index f927b8dc6edd..c10390d1ddb6 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -152,14 +152,17 @@ static cycle_t arc_read_rtc(struct clocksource *cs)
cycle_t full;
} stamp;
-
- __asm__ __volatile(
- "1: \n"
- " lr %0, [AUX_RTC_LOW] \n"
- " lr %1, [AUX_RTC_HIGH] \n"
- " lr %2, [AUX_RTC_CTRL] \n"
- " bbit0.nt%2, 31, 1b \n"
- : "=r" (stamp.low), "=r" (stamp.high), "=r" (status));
+ /*
+* hardware has an internal state machine which tracks readout of
+* low/high and updates the CTRL.status if
+* - interrupt/exception taken between the two reads
+* - high increments after low has been read
+*/
+ do {
+ stamp.low = read_aux_reg(AUX_RTC_LOW);
+ stamp.high = read_aux_reg(AUX_RTC_HIGH);
+ status = read_aux_reg(AUX_RTC_CTRL);
+ } while (!(status & _BITUL(31)));
return stamp.full;
}
--
2.7.4
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Re: [PATCH v3 07/10] ARC: breakout aux handling into a separate header
Hi Vineet,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.9-rc3 next-20161028]
[cannot apply to arc/for-next]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Vineet-Gupta/Move-ARC-timer-code-into-drivers-clocksource/20161104-074042
config: i386-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
drivers/irqchip/irq-eznps.c: In function 'nps400_irq_mask':
>> drivers/irqchip/irq-eznps.c:61:22: error: 'AUX_IENABLE' undeclared (first
>> use in this function)
ienb = read_aux_reg(AUX_IENABLE);
^~~
drivers/irqchip/irq-eznps.c:61:22: note: each undeclared identifier is
reported only once for each function it appears in
drivers/irqchip/irq-eznps.c: In function 'nps400_irq_unmask':
drivers/irqchip/irq-eznps.c:71:22: error: 'AUX_IENABLE' undeclared (first
use in this function)
ienb = read_aux_reg(AUX_IENABLE);
^~~
drivers/irqchip/irq-eznps.c: In function 'nps400_irq_eoi_global':
>> drivers/irqchip/irq-eznps.c:80:16: error: 'CTOP_AUX_IACK' undeclared (first
>> use in this function)
write_aux_reg(CTOP_AUX_IACK, 1 << irq);
^
drivers/irqchip/irq-eznps.c: In function 'nps400_irq_ack':
drivers/irqchip/irq-eznps.c:92:16: error: 'CTOP_AUX_IACK' undeclared (first
use in this function)
write_aux_reg(CTOP_AUX_IACK, 1 << irq);
^
vim +/AUX_IENABLE +61 drivers/irqchip/irq-eznps.c
44df427c8 Noam Camus 2015-10-29 55
44df427c8 Noam Camus 2015-10-29 56 static void nps400_irq_mask(struct
irq_data *irqd)
44df427c8 Noam Camus 2015-10-29 57 {
44df427c8 Noam Camus 2015-10-29 58 unsigned int ienb;
44df427c8 Noam Camus 2015-10-29 59 unsigned int irq = irqd_to_hwirq(irqd);
44df427c8 Noam Camus 2015-10-29 60
44df427c8 Noam Camus 2015-10-29 @61 ienb = read_aux_reg(AUX_IENABLE);
44df427c8 Noam Camus 2015-10-29 62 ienb &= ~(1 << irq);
44df427c8 Noam Camus 2015-10-29 63 write_aux_reg(AUX_IENABLE, ienb);
44df427c8 Noam Camus 2015-10-29 64 }
44df427c8 Noam Camus 2015-10-29 65
44df427c8 Noam Camus 2015-10-29 66 static void nps400_irq_unmask(struct
irq_data *irqd)
44df427c8 Noam Camus 2015-10-29 67 {
44df427c8 Noam Camus 2015-10-29 68 unsigned int ienb;
44df427c8 Noam Camus 2015-10-29 69 unsigned int irq = irqd_to_hwirq(irqd);
44df427c8 Noam Camus 2015-10-29 70
44df427c8 Noam Camus 2015-10-29 71 ienb = read_aux_reg(AUX_IENABLE);
44df427c8 Noam Camus 2015-10-29 72 ienb |= (1 << irq);
44df427c8 Noam Camus 2015-10-29 73 write_aux_reg(AUX_IENABLE, ienb);
44df427c8 Noam Camus 2015-10-29 74 }
44df427c8 Noam Camus 2015-10-29 75
44df427c8 Noam Camus 2015-10-29 76 static void nps400_irq_eoi_global(struct
irq_data *irqd)
44df427c8 Noam Camus 2015-10-29 77 {
44df427c8 Noam Camus 2015-10-29 78 unsigned int __maybe_unused irq =
irqd_to_hwirq(irqd);
44df427c8 Noam Camus 2015-10-29 79
44df427c8 Noam Camus 2015-10-29 @80 write_aux_reg(CTOP_AUX_IACK, 1 << irq);
44df427c8 Noam Camus 2015-10-29 81
44df427c8 Noam Camus 2015-10-29 82 /* Don't ack GIC before all device
access attempts are done */
44df427c8 Noam Camus 2015-10-29 83 mb();
:: The code at line 61 was first introduced by commit
:: 44df427c894a4357e43bb35769baefa7cdf09833 irqchip: add nps Internal and
external irqchips
:: TO: Noam Camus
:: CC: Vineet Gupta
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
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RE: [PATCH v2] arc: Implement arch-specific dma_map_ops.mmap
Hi Vineet, > -Original Message- > From: Vineet Gupta [mailto:vgu...@synopsys.com] > Sent: Thursday, November 03, 2016 8:04 PM > To: Alexey Brodkin ; > linux-snps-arc@lists.infradead.org > Cc: linux-ker...@vger.kernel.org; linux-a...@vger.kernel.org; Vineet Gupta > ; Marek Szyprowski > ; sta...@vger.kernel.org > Subject: Re: [PATCH v2] arc: Implement arch-specific dma_map_ops.mmap > > On 11/03/2016 08:06 AM, Alexey Brodkin wrote: > > We used to use generic implementation of dma_map_ops.mmap which is > > dma_common_mmap() but that only worked for simpler cached mappings when > > vaddr = paddr. > > > > If a driver requests uncached DMA buffer kernel maps it to virtual > > address so that MMU gets involved and page uncached status takes into > > account. In that case usage of dma_common_mmap() lead to mapping of > > vaddr to vaddr for user-space which is obviously wrong. For more detals > > please refer to verbose explanation here [1]. > > > > So here we implement our own version of mmap() which always deals > > with dma_addr and maps underlying memory to user-space properly > > (note that DMA buffer mapped to user-space is always uncached > > because there's no way to properly manage cache from user-space). > > > > [1] https://lkml.org/lkml/2016/10/26/973 > > > > Signed-off-by: Alexey Brodkin > > Reviewed-by: Catalin Marinas > > Cc: Marek Szyprowski > > Cc: Vineet Gupta > > Cc: > > I've added a stable 4.5+, since ARC didn't use dma ops until 4.5-rc1. Again I was hitting a strange problem when sending patch via "git send-email" to address " # 3.3.x". Mail server complains on wrong email. Thus I settled to just mention sta...@vger.kernel.org. Anyways, thanks for doing that! -Alexey ___ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
