[Patch, microblaze]: Add __builtin_trap instruction pattern
Implement the "trap" pattern for MicroBlaze using matching ABORT_INSTRUCTION used in glibc. Resolves recent build failure while building glibc, also encountered by ARM and AARCH64 and discussed here; https://sourceware.org/ml/libc-alpha/2013-11/msg00320.html ChangeLog 2013-11-26 David Holsgrove * gcc/config/microblaze/microblaze.md: Add trap insn and attribute. ChangeLog testsuite 2013-11-26 David Holsgrove * gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c: New test. 0001-Patch-microblaze-Add-__builtin_trap-instruction-patt.patch Description: Binary data
Re: [Patch, microblaze]: Fix bswaphi2 implementation
Hi Michael, Please find attached same patch based against latest from gcc master. Can this be applied and backported to gcc-4_8-branch when reviewed. thanks, David On 15 July 2013 14:49, David Holsgrove wrote: > MicroBlaze insn swaph swaps the contents of register rA as two > halfwords placing result in rD; > > (rD)[0:15] <- (rA)[16:31] > (rD)[16:31] <- (rA)[0:15] > > gcc bswaphi2 is intended to reverse the order of the bytes in the > half integer in rA > > (rD)[8:15] <- (rA)[0:7] > (rD)[7:0] <- (rA)[8:15] > (rD)[24:31] <- (rA)[16:23] > (rD)[16:23] <- (rA)[24:31] > > Correct the microblaze bswaphi2 insn pattern to be a swapb followed > by swaph > > Changelog entry would be: > > 2013-07-15 David Holsgrove > > * gcc/config/microblaze/microblaze.md: Fix bswaphi2 > > > Can this also be backported to the gcc-4_8-branch? > > thanks, > David 0002-Patch-microblaze-Fix-bswaphi2-implementation.patch Description: Binary data
Re: [Patch, microblaze]: Add TARGET_ASM_OUTPUT_MI_THUNK to support varargs thunk
Hi Michael, On 24 July 2013 10:29, David Holsgrove wrote: > On 24 July 2013 10:22, Michael Eager wrote: >> On 07/23/13 16:23, David Holsgrove wrote: >>> >>> On 24 July 2013 07:10, Michael Eager wrote: >>>> >>> Thanks Michael. >>> >>> I think the content of your commit doesnt line up with this Changelog >>> entry or mail though, >>> >>> http://gcc.gnu.org/git/?p=gcc.git;a=commit;h=c4fcbf4cd03c11aa1bc707b00dd95ba52f963b39 >>> >>> It looks like the atomic builtin patch which was posted as this mail; >>> http://gcc.gnu.org/ml/gcc-patches/2013-07/msg00551.html >> >> >> Yes, I picked up the wrong ChangeLog and email. I fixed the ChangeLog. >> > > No worries, thanks Michael. > In the confusion with changelogs / patches here, I dont think this change was ever applied to gcc master. I've attached an up to date version of the same patch for you to apply when ready. thanks again, David > regards, > David > >> >> -- >> Michael Eagerea...@eagercon.com >> 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077 0004-Patch-microblaze-Add-TARGET_ASM_OUTPUT_MI_THUNK-to-s.patch Description: Binary data
Re: [Patch, microblaze]: Fix ICE with mhard-float
Hi Michael, I've attached the same patch based on latest gcc master. Can this be applied to gcc-4_8-branch also. thanks, David On 15 July 2013 14:53, David Holsgrove wrote: > Add SImode to cstoresf4's comparison operator, prevents ICE during combine > rtl pass with error message; > > internal compiler error: in simplify_subreg, at simplify-rtx.c:5725 > > Use ordered_comparison_operator predicate to limit operators to > those fcmp can handle, and letting compiler reorder insns to > accommodate unordered as necessary. > > Changelog entry; > > 2013-07-15 David Holsgrove > > * gcc/config/microblaze/microblaze.md: Fix cstoresf4 and cbranchsf4 > > Can this be backported to gcc-4_8-branch also? > > thanks, > David 0003-Patch-microblaze-cstoresf4-add-mode-and-ordered_comp.patch Description: Binary data
Re: [Patch, microblaze]: Remove SECONDARY_MEMORY_NEEDED
Hi Michael, I've attached patch based on latest gcc master. Please let me know if you need anything further. thanks, David On 15 July 2013 14:44, David Holsgrove wrote: > Hi Michael, > > On 18 March 2013 22:49, David Holsgrove wrote: >> MicroBlaze doesn't have restrictions that would force us to >> reload regs via memory. Don't define SECONDARY_MEMORY_NEEDED. >> Fixes an ICE when compiling OpenSSL for linux. >> >> Changelog >> >> 2013-03-18 Edgar E. Iglesias >> >> * gcc/config/microblaze/microblaze.h: Remove SECONDARY_MEMORY_NEEDED >>definition. >> >> Signed-off-by: Edgar E. Iglesias >> Signed-off-by: Peter A. G. Crosthwaite >> > > Patch remains the same, please apply when ready. > > thanks, > David 0005-Patch-microblaze-Remove-SECONDARY_MEMORY_NEEDED.patch Description: Binary data
Re: [Patch, microblaze]: Add SIZE_TYPE and PTRDIFF_TYPE to microblaze.h
Hi Michael, I've attached patch based on latest gcc master. Please let me know if you need anything further. thanks, David On 15 July 2013 14:42, David Holsgrove wrote: > > Hi Michael, > > On 18 March 2013 22:50, David Holsgrove wrote: > > Changelog > > > > 2013-03-18 David Holsgrove > > > > * gcc/config/microblaze/microblaze.h: Define SIZE_TYPE > >and PTRDIFF_TYPE. > > > > Signed-off-by: David Holsgrove > > > > This patch remains the same, please review when ready. > > thanks, > David 0006-Patch-microblaze-Add-SIZE_TYPE-and-PTRDIFF_TYPE-to-m.patch Description: Binary data
Re: [Patch, microblaze]: Branch Compare unroll loops
Hi Michael, I've attached patch based on latest gcc master. Please apply when ready. Changelog 2013-11-26 David Holsgrove * gcc/config/microblaze/predicates.md: Add cmp_op predicate. * gcc/config/microblaze/microblaze.md: Add branch_compare instruction which uses cmp_op predicate and emits cmp insn before branch. * gcc/config/microblaze/microblaze.c (microblaze_emit_compare): Rename to microblaze_expand_conditional_branch and consolidate logic. (microblaze_expand_conditional_branch): emit branch_compare insn instead of handling cmp op separate from branch insn. thanks, David On 15 July 2013 14:58, David Holsgrove wrote: > To facilitate optimization pass understanding of the conditional > branch for microblaze, remove the UNSPEC'd signed_compare / > unsigned_compare instructions, and replace with a complete > branch_compare which will output_asm_insn the correct cmp/cmpu > depending on comparison code and signed / unsigned. > > We then return the correct branch instruction. > > cbranchsi now calls an expanded microblaze_expand_conditional_branch > function which will carry out compare against zero, compare EQ/NE, > and all other compares appropriately. > > -funroll-loops optimization pass can now proceed > > Changelog > > 2013-07-15 David Holsgrove > > * gcc/config/microblaze/predicates.md: Add cmp_op predicate. > * gcc/config/microblaze/microblaze.md: Add branch_compare >instruction which uses cmp_op predicate and emits cmp insn >before branch. > * gcc/config/microblaze/microblaze.c >(microblaze_emit_compare): Rename to >microblaze_expand_conditional_branch and consolidate logic. >(microblaze_expand_conditional_branch): emit branch_compare >insn instead of handling cmp op separate from branch insn. > > thanks, > David 0007-Patch-microblaze-Add-branch_compare-instruction.patch Description: Binary data
[Patch, microblaze]: Add optimized lshrsi3
Add optimized lshrsi3 instruction, to be used when optimizing for size with immediate values over 5 Changelog 2013-11-26 Nagaraju Mekala * gcc/config/microblaze/microblaze.md: Add size optimized lshrsi3 insn. 0008-Patch-microblaze-Add-optimized-lshrsi3.patch Description: Binary data
[Patch, microblaze]: Added load and store reverse patterns
Added the lwr/swr instructions pattern. lwr and swr instructions will load/store the data with opposite endianness. Changelog 2013-11-26 Nagaraju Mekala * gcc/config/microblaze/microblaze.md: Add movsi4_rev insn pattern. * gcc/config/microblaze/predicates.md: Add reg_or_mem_operand predicate. 0011-Patch-microblaze-Added-load-and-store-reverse-patter.patch Description: Binary data
[Patch, microblaze]: Correct names of shift instructions
Existing MicroBlaze shift instruction pattern names don't match surrounding format. ashlri_reg should be ashrsi_reg - arithmetic shift right for SI mode lshlri_reg should be lshrsi_reg - logical shift right for SI mode Changelog 2013-11-26 David Holsgrove * gcc/config/microblaze/microblaze.md: Correct ashrsi_reg / lshrsi_reg names. 0009-Patch-microblaze-Correct-names-of-shift-instructions.patch Description: Binary data
[Patch, microblaze]: Extended mcpu version format
MicroBlaze currently only supports mcpu version of format vX.YY.Z This patch extends the mcpu version format to include; vX.YY.Z vXX.YY.Z vXX.YY vX.YY.Z Changelog 2013-11-26 Nagaraju Mekala * gcc/config/microblaze/microblaze.c: Extend mcpu version format. 0010-Patch-microblaze-Extended-mcpu-version-format.patch Description: Binary data
RE: [Patch, microblaze]: Add TARGET_ASM_OUTPUT_MI_THUNK to support varargs thunk
Hi Michael, > -Original Message- > From: Michael Eager [mailto:ea...@eagerm.com] > Sent: Saturday, 13 July 2013 9:33 am > To: David Holsgrove > Cc: gcc-patches@gcc.gnu.org; Edgar Iglesias; John Williams; Vinod Kathail; > Vidhumouli Hunsigida; Nagaraju Mekala; Tom Shui > Subject: Re: [Patch, microblaze]: Add TARGET_ASM_OUTPUT_MI_THUNK to > support varargs thunk > > On 03/18/13 05:49, David Holsgrove wrote: > > Changelog > > > > 2013-03-18 David Holsgrove > > > > * gcc/config/microblaze/microblaze.c: Add microblaze_asm_output_mi_thunk > > and define TARGET_ASM_OUTPUT_MI_THUNK and > TARGET_ASM_CAN_OUTPUT_MI_THUNK > > Sorry it has taken so long to review this patch. > > The gcc microblaze-xilinx-elf build with this patch fails here: > > +microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl > ATTRIBUTE_UNUSED, > + HOST_WIDE_INT delta, HOST_WIDE_INT > vcall_offset, > + tree function) > ... > + emit_insn (gen_jump (funexp)); > > (actually, in output_operand() downstream from this statement) while compiling > c++98/strstream.cc, with an error that the "%l" operand was not a label. > > This is the first occasion when this routine is called. > I had sent a separate patch which should have been applied prior to this one which extended the jump insn to accommodate branching without the "%l" print operand, but I've since reworked our thunk support to avoid needing this second patch. Please find attached updated patch, and new Changelog entry; 2013-07-15 David Holsgrove * gcc/config/microblaze/microblaze.c: Add microblaze_asm_output_mi_thunk and define TARGET_ASM_OUTPUT_MI_THUNK and TARGET_ASM_CAN_OUTPUT_MI_THUNK I'll post updated patches on the other threads out for review now. thanks, David > -- > Michael Eager ea...@eagercon.com > 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077 0005-Patch-microblaze-Add-TARGET_ASM_OUTPUT_MI_THUNK-to-s.patch Description: 0005-Patch-microblaze-Add-TARGET_ASM_OUTPUT_MI_THUNK-to-s.patch
Re: [Patch, microblaze]: Add SIZE_TYPE and PTRDIFF_TYPE to microblaze.h
Hi Michael, On 18 March 2013 22:50, David Holsgrove wrote: > Changelog > > 2013-03-18 David Holsgrove > > * gcc/config/microblaze/microblaze.h: Define SIZE_TYPE >and PTRDIFF_TYPE. > > Signed-off-by: David Holsgrove > This patch remains the same, please review when ready. thanks, David
Re: [Patch, microblaze]: Add atomic builtin implementation
Hi Michael, On 21 March 2013 03:00, Richard Henderson wrote: > On 03/18/2013 05:48 AM, David Holsgrove wrote: >> * gcc/config/microblaze/sync.md: New file. >> * gcc/config/microblaze/microblaze.md: Add UNSPEC_SYNC_CAS, >>UNSPEC_SYNC_XCHG and include sync.md. >> * gcc/config/microblaze/microblaze.c: Add print_operand 'y'. >> * gcc/config/microblaze/constraints.md: Add memory_contraint >>'Q' which is a single register. > > Do not add new __sync implementations. Use the __atomic builtins. > > > r~ Please find attached reworked patch using __atomic builtin. Changelog entry would be; 2013-07-15 David Holsgrove * gcc/config/microblaze/sync.md: New file. * gcc/config/microblaze/microblaze.md: Include sync.md * gcc/config/microblaze/microblaze.c: Add print_operand 'y'. * gcc/config/microblaze/constraints.md: Add memory_contraint 'Q' which is a single register. thanks, David 0004-Patch-microblaze-Add-4-byte-implementation-for-atomi.patch Description: Binary data
Re: [Patch, microblaze]: Remove SECONDARY_MEMORY_NEEDED
Hi Michael, On 18 March 2013 22:49, David Holsgrove wrote: > MicroBlaze doesn't have restrictions that would force us to > reload regs via memory. Don't define SECONDARY_MEMORY_NEEDED. > Fixes an ICE when compiling OpenSSL for linux. > > Changelog > > 2013-03-18 Edgar E. Iglesias > > * gcc/config/microblaze/microblaze.h: Remove SECONDARY_MEMORY_NEEDED >definition. > > Signed-off-by: Edgar E. Iglesias > Signed-off-by: Peter A. G. Crosthwaite > Patch remains the same, please apply when ready. thanks, David
Re: [Patch, microblaze]: Extend jump insn to accept bri to SYMBOL_REFS
Hi Michael, On 18 March 2013 22:52, David Holsgrove wrote: > Changelog > > 2013-03-18 David Holsgrove > > * gcc/config/microblaze/microblaze.md (jump): >Account for jumps to SYMBOL_REFs. > > Signed-off-by: David Holsgrove > Disregard - patch no longer desired. thanks, David
Re: [Patch, microblaze]: Add -fstack-usage support
Hi Michael, On 18 March 2013 22:48, David Holsgrove wrote: > Changelog > > 2013-03-18 David Holsgrove > > * gcc/config/microblaze/microblaze.c (microblaze_expand_prologue): >Add check for flag_stack_usage to handle -fstack-usage support > > Signed-off-by: David Holsgrove > Patch remains the same, please apply when ready. thanks, David
[Patch, microblaze]: Fix bswaphi2 implementation
MicroBlaze insn swaph swaps the contents of register rA as two halfwords placing result in rD; (rD)[0:15] <- (rA)[16:31] (rD)[16:31] <- (rA)[0:15] gcc bswaphi2 is intended to reverse the order of the bytes in the half integer in rA (rD)[8:15] <- (rA)[0:7] (rD)[7:0] <- (rA)[8:15] (rD)[24:31] <- (rA)[16:23] (rD)[16:23] <- (rA)[24:31] Correct the microblaze bswaphi2 insn pattern to be a swapb followed by swaph Changelog entry would be: 2013-07-15 David Holsgrove * gcc/config/microblaze/microblaze.md: Fix bswaphi2 Can this also be backported to the gcc-4_8-branch? thanks, David 0002-Patch-microblaze-Fix-bswaphi2-implementation.patch Description: Binary data
[Patch, microblaze]: Fix ICE with mhard-float
Add SImode to cstoresf4's comparison operator, prevents ICE during combine rtl pass with error message; internal compiler error: in simplify_subreg, at simplify-rtx.c:5725 Use ordered_comparison_operator predicate to limit operators to those fcmp can handle, and letting compiler reorder insns to accommodate unordered as necessary. Changelog entry; 2013-07-15 David Holsgrove * gcc/config/microblaze/microblaze.md: Fix cstoresf4 and cbranchsf4 Can this be backported to gcc-4_8-branch also? thanks, David 0003-Patch-microblaze-cstoresf4-add-mode-and-ordered_comp.patch Description: Binary data
[Patch, microblaze]: Branch Compare unroll loops
To facilitate optimization pass understanding of the conditional branch for microblaze, remove the UNSPEC'd signed_compare / unsigned_compare instructions, and replace with a complete branch_compare which will output_asm_insn the correct cmp/cmpu depending on comparison code and signed / unsigned. We then return the correct branch instruction. cbranchsi now calls an expanded microblaze_expand_conditional_branch function which will carry out compare against zero, compare EQ/NE, and all other compares appropriately. -funroll-loops optimization pass can now proceed Changelog 2013-07-15 David Holsgrove * gcc/config/microblaze/predicates.md: Add cmp_op predicate. * gcc/config/microblaze/microblaze.md: Add branch_compare instruction which uses cmp_op predicate and emits cmp insn before branch. * gcc/config/microblaze/microblaze.c (microblaze_emit_compare): Rename to microblaze_expand_conditional_branch and consolidate logic. (microblaze_expand_conditional_branch): emit branch_compare insn instead of handling cmp op separate from branch insn. thanks, David 0009-Patch-microblaze-Add-branch_compare-instruction.patch Description: Binary data
Re: [Patch, microblaze]: Add -fstack-usage support
On 19 July 2013 02:42, Michael Eager wrote: > On 03/18/13 05:48, David Holsgrove wrote: >> >> Changelog >> >> 2013-03-18 David Holsgrove >> >> * gcc/config/microblaze/microblaze.c (microblaze_expand_prologue): >> Add check for flag_stack_usage to handle -fstack-usage support >> >> Signed-off-by: David Holsgrove > > > Applied revision 201035. Thanks Michael - did this get applied to trunk? I can't see the commit upstream. regards, David > > -- > Michael Eagerea...@eagercon.com > 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
Re: [Patch, microblaze]: Add -fstack-usage support
Hi Eric / Chung-Ju, On 21 July 2013 01:33, Chung-Ju Wu wrote: > On 7/20/13 4:14 PM, Eric Botcazou wrote: >>>> >>>> 2013-03-18 David Holsgrove >>>> >>>> * gcc/config/microblaze/microblaze.c (microblaze_expand_prologue): >>>> Add check for flag_stack_usage to handle -fstack-usage support >>>> >>>> Signed-off-by: David Holsgrove >>> >>> >>> Patch remains the same, please apply when ready. >> >> >> The patch is incorrect, please adjust it to match the other architectures. >> > > Hi, David, > > Specifically speaking, what Eric meant is to check > flag_stack_usage_info rather than flag_stack_usage > due to the changes after gcc-4.7. > Ah, thanks for the catch - patch had been sitting in my tree for quite a while, hadn't realised the variable name had changed on trunk. Patch attached which adjusts microblaze's usage to align with other archs. thanks, David > > Best regards, > jasonwucj > 0001-Patch-microblaze-Update-flag_stack_usage-variable-na.patch Description: Binary data
Re: [Patch, microblaze]: Add TARGET_ASM_OUTPUT_MI_THUNK to support varargs thunk
On 24 July 2013 07:10, Michael Eager wrote: > On 07/14/13 21:37, David Holsgrove wrote: >> >> Hi Michael, >> >>> -Original Message- >>> From: Michael Eager [mailto:ea...@eagerm.com] >>> Sent: Saturday, 13 July 2013 9:33 am >>> To: David Holsgrove >>> Cc: gcc-patches@gcc.gnu.org; Edgar Iglesias; John Williams; Vinod >>> Kathail; >>> Vidhumouli Hunsigida; Nagaraju Mekala; Tom Shui >>> Subject: Re: [Patch, microblaze]: Add TARGET_ASM_OUTPUT_MI_THUNK to >>> support varargs thunk >>> >>> On 03/18/13 05:49, David Holsgrove wrote: >>>> >>>> Changelog >>>> >>>> 2013-03-18 David Holsgrove >>>> >>>>* gcc/config/microblaze/microblaze.c: Add >>>> microblaze_asm_output_mi_thunk >>>> and define TARGET_ASM_OUTPUT_MI_THUNK and >>> >>> TARGET_ASM_CAN_OUTPUT_MI_THUNK >>> >>> Sorry it has taken so long to review this patch. >>> >>> The gcc microblaze-xilinx-elf build with this patch fails here: >>> >>> +microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl >>> ATTRIBUTE_UNUSED, >>> + HOST_WIDE_INT delta, HOST_WIDE_INT >>> vcall_offset, >>> + tree function) >>> ... >>> + emit_insn (gen_jump (funexp)); >>> >>> (actually, in output_operand() downstream from this statement) while >>> compiling >>> c++98/strstream.cc, with an error that the "%l" operand was not a label. >>> >>> This is the first occasion when this routine is called. >>> >> >> I had sent a separate patch which should have been applied prior to this >> one which >> extended the jump insn to accommodate branching without the "%l" print >> operand, >> but I've since reworked our thunk support to avoid needing this second >> patch. >> >> Please find attached updated patch, and new Changelog entry; >> >> 2013-07-15 David Holsgrove >> >> * gcc/config/microblaze/microblaze.c: Add microblaze_asm_output_mi_thunk >> and define TARGET_ASM_OUTPUT_MI_THUNK and >> TARGET_ASM_CAN_OUTPUT_MI_THUNK >> >> I'll post updated patches on the other threads out for review now. >> >> thanks, >> David > > > > Committed revision 201185. > Thanks Michael. I think the content of your commit doesnt line up with this Changelog entry or mail though, http://gcc.gnu.org/git/?p=gcc.git;a=commit;h=c4fcbf4cd03c11aa1bc707b00dd95ba52f963b39 It looks like the atomic builtin patch which was posted as this mail; http://gcc.gnu.org/ml/gcc-patches/2013-07/msg00551.html thanks, David > > -- > Michael Eagerea...@eagercon.com > 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
Re: [Patch, microblaze]: Add TARGET_ASM_OUTPUT_MI_THUNK to support varargs thunk
On 24 July 2013 10:22, Michael Eager wrote: > On 07/23/13 16:23, David Holsgrove wrote: >> >> On 24 July 2013 07:10, Michael Eager wrote: >>> >> Thanks Michael. >> >> I think the content of your commit doesnt line up with this Changelog >> entry or mail though, >> >> http://gcc.gnu.org/git/?p=gcc.git;a=commit;h=c4fcbf4cd03c11aa1bc707b00dd95ba52f963b39 >> >> It looks like the atomic builtin patch which was posted as this mail; >> http://gcc.gnu.org/ml/gcc-patches/2013-07/msg00551.html > > > Yes, I picked up the wrong ChangeLog and email. I fixed the ChangeLog. > No worries, thanks Michael. regards, David > > -- > Michael Eagerea...@eagercon.com > 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
RE: [Patch, microblaze]: Add support for swap instructions and reorder option
Hi Michael,
Thanks for the review, please find comments inline below.
> -Original Message-
> From: Michael Eager [mailto:ea...@eagerm.com]
> Sent: Wednesday, 27 February 2013 3:50 am
> To: David Holsgrove
> Cc: gcc-patches@gcc.gnu.org; Michael Eager (ea...@eagercon.com); John
> Williams; Edgar E. Iglesias (edgar.igles...@gmail.com); Vinod Kathail;
> Vidhumouli
> Hunsigida; Nagaraju Mekala; Tom Shui
> Subject: Re: [Patch, microblaze]: Add support for swap instructions and
> reorder
> option
>
> On 02/10/2013 10:39 PM, David Holsgrove wrote:
> > Add support for swap instructions and reorder option
> >
> > swapb and swaph instructions are introduced in microblaze cpu (mcpu) v8.30a,
> > but have an undocumented dependence on -mxl-pattern-compare being set.
> >
> > The conditions for their use are;
> >
> > mcpu < 8.30a; no swap insns, use of -mxl-reorder produces warning
> > and ignored
> >
> > mcpu == 8.30a and -mxl-pattern-compare specified;
> > and if -mno-xl-reorder not specified, then swap insns allowed
> >
> > mcpu > 8.30a;
> > if -mno-xl-reorder not specified, then swap insns allowed
> >
> > Changelog
> >
> > 2013-02-11 David Holsgrove
>
> Is this correct?
>
Changelog amended in light of adjustments to patch.
> >
> >* config/microblaze/microblaze.c: microblaze_has_swap = 0
> > Add version check for v8.30.a to enable microblaze_has_swap
> >* config/microblaze/microblaze.h: Add TARGET_HAS_SWAP
> >* config/microblaze/microblaze.md: New bswapsi2 and bswaphi2
> > instructions
> >* config/microblaze/microblaze.opt: New options -mxl-reorder
> > and -mno-xl-reorder
>
> Don't specify both -mxl-reorder and -mno-xl-reorder as options.
> Don't specify a "no" version with the RejectNegative option.
> GCC option handling already process the "no" prefix automatically.
>
> There is no need to have both TARGET_REORDER and TARGET_NOREORDER
> since they have exactly the same information. Define only TARGET_REORDER.
>
The use of separate -mxl-reorder / -mno-xl-reorder options was to be able to
discriminate
between the three states;
1) user passes nothing
2) user passes -mxl-reorder
3) user passes -mno-xl-reorder
I've reworked the patch to instead define the -mxl-reorder option only, but
with an
initial value of 2 (which is similar to arm's option -mfix-cortex-m3-ldrd)
GCC option handling will then create the -mno-xl-reorder option for us and set
TARGET_REORDER to 0 if -mno-xl-reorder used, or 1 if -mxl-reorder passed.
This allows detection and handling of the three separate cases above.
> How does the name of the option (-mxl-reorder) relate to using swap
> instructions? Nothing is being reordered. What are "reorder" instructions?
> How about -mxl-swap, similar to -mxl-pattern-compare or -mxl-float-sqrt?
>
The choice of the name for the option (-mxl-reorder) is driven by its use in
Xilinx's EDK
I believe, and joins the reverse load / reverse store instructions in a
'reorder'
instructions group;
(http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_4/mb_ref_guide.pdf#page=135)
>
> + else if (ver == 0)
> +{
> +if (!TARGET_NO_REORDER)
> + {
> +target_flags |= MASK_REORDER;
> +/* MicroBlaze v8.30a has an undocumented dependency on
> + pattern compare for swapb / swaph insns. */
> +if (TARGET_PATTERN_COMPARE)
> + microblaze_has_swap = 1;
> + }
> +}
> + else
> +{
> +if (!TARGET_NO_REORDER)
> + {
> +target_flags |= MASK_REORDER;
> +/* Microblaze versions greater than v8.30a will be able to use
> + swapb / swaph without pattern compare */
> +microblaze_has_swap = 1;
> + }
> +}
> +
>
> Refactor to eliminate duplicated code.
>
> Why set the MASK_REORDER flag in target_flags if this is never used?
Removed unused MASK_REORDER, and refactored this block of logic.
Default is to emit swap instructions (TARGET_REORDER != 0), unless user passes
-mno-xl-reorder, or microblaze_option_override forces TARGET_REORDER to 0.
> Options processing will set this automatically since you have
>mxl-reorder
>Target RejectNegative Mask(REORDER)
>
I've attached an updated version of this patch. Please let me know if you
have any concerns about it.
The new Changelog entry would be as follows;
Changelog
2013-02-27 David Holsgrove
* gcc/config/microblaze/microblaze.c:
Check mcpu, pcmp requirement and set TARGET_REORDER to 0 if
not met.
* gcc/config/mi
RE: [Patch, microblaze]: Add support for swap instructions and reorder option
> -Original Message-
> From: Michael Eager [mailto:ea...@eagercon.com]
> Sent: Thursday, 28 February 2013 3:06 am
> To: David Holsgrove
> Cc: Michael Eager; gcc-patches@gcc.gnu.org; John Williams; Edgar E. Iglesias
> (edgar.igles...@gmail.com); Vinod Kathail; Vidhumouli Hunsigida; Nagaraju
> Mekala; Tom Shui
> Subject: Re: [Patch, microblaze]: Add support for swap instructions and
> reorder
> option
>
> The purpose is to avoid issuing a warning for processors before 8.30.a
> unless the user explicitly specifies -mxl-reorder.
>
Warning the user who explicitly specifies -mxl-reorder with cpu before v8.30.a
is the first goal, but we also need to prevent the usage of swap instructions by
default if they are not possible to use.
> I think that the code can be reordered to make it clearer.
>
> Replace this
>
> + /* TARGET_REORDER initialised as 2 in microblaze.opt,
> + passing -mxl-reorder sets TARGET_REORDER to 1,
> + and passing -mno-xl-reorder sets TARGET_REORDER to 0. */
> + ver = MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v8.30.a");
> + if (ver < 0)
> +{
> +/* MicroBlaze prior to 8.30a didn't have swapb or swaph insns,
> + so if -mxl-reorder passed, warn and clear TARGET_REORDER. */
> +if (TARGET_REORDER == 1)
> + warning (0,
> + "-mxl-reorder can be used only with -mcpu=v8.30.a or greater");
> +TARGET_REORDER = 0;
> +}
> + else if (ver == 0)
> +{
> +/* MicroBlaze v8.30a requires pattern compare for
> + swapb / swaph insns. */
> +if (!TARGET_PATTERN_COMPARE)
> + TARGET_REORDER = 0;
> +}
>
> With this:
>
> /* TARGET_REORDER defaults to 2 if -mxl-reorder not specified. */
> if (TARGET_REORDER == 1)
> {
>ver = MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v8.30.a");
>if (ver < 0)
>{
> warning (0, "-mxl-reorder can be used only with -mcpu=v8.30.a or
> greater");
> TARGET_REORDER = 0;
>}
>else if ((ver == 0) && !TARGET_PATTERN_COMPARE)
>{
> warning (0, "-mxl-reorder requires -mxl-pattern-compare for
> -mcpu=v8.30.a");
> TARGET_REORDER = 0;
>}
> }
So if we switch to your alternative, the default case (TARGET_REORDER=2) will
not
be checked for cpu version, or use of TARGET_PATTERN_COMPARE, meaning we
emit swap instructions which aren’t valid for these situations.
Adjusting your if statement to be;
if (TARGET_REORDER)
would catch the default case along with explicit use of -mxl-reorder, but then
we
would also be issuing the warnings for every compilation where cpu is less than
v8.30.a, or the user hasn’t passed -mxl-pattern-compare.
My attached patch will warn the user if they've explicitly used -mxl-reorder and
don’t meet the requirements, and will adjust the default case silently if
required.
> +mxl-reorder
> +Target Var(TARGET_REORDER) Init(2)
> +Use reorder instructions (default)
>
> Change to
> +Use reorder instructions (swap and byte reversed load/store) (default)
>
Yes thanks, this is a clearer definition of the intent behind the option.
>
> I'll check in the patch with these changes unless you have objections.
>
thanks again for the review, please let me know if this patch is acceptable.
David
>
> --
> Michael Eager ea...@eagercon.com
> 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
0001-microblaze-add-support-for-swap-instructions-and-reo.patch
Description: 0001-microblaze-add-support-for-swap-instructions-and-reo.patch
RE: [Patch, microblaze]: Add support for swap instructions and reorder option
Hi Michal, > -Original Message- > From: Michael Eager [mailto:ea...@eagerm.com] > Sent: Monday, 4 March 2013 3:37 am > To: David Holsgrove > Cc: Michael Eager; gcc-patches@gcc.gnu.org; John Williams; Edgar E. Iglesias > (edgar.igles...@gmail.com); Vinod Kathail; Vidhumouli Hunsigida; Nagaraju > Mekala; Tom Shui > Subject: Re: [Patch, microblaze]: Add support for swap instructions and > reorder > option > > Committed revision 196415. Thanks for committing. > > Please submit a patch to update gcc/doc/invoke.texi with -mxl-reorder > description. > Please find patch attached to this mail which updates the MicroBlaze section of documentation to include -mxl-reorder. I also added -mbig-endian and -mlittle-endian as they were missed in previous patch. thanks again, David > > -- > Michael Eager ea...@eagercon.com > 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077 > 0001-Patch-microblaze-Update-gcc-doc-invoke.texi-for-Micr.patch Description: 0001-Patch-microblaze-Update-gcc-doc-invoke.texi-for-Micr.patch
RE: [Patch, microblaze]: Added fast_interrupt controller
Hi Michael,
> -Original Message-
> From: Michael Eager [mailto:ea...@eagerm.com]
> Sent: Wednesday, 27 February 2013 4:12 am
> To: David Holsgrove
> Cc: gcc-patches@gcc.gnu.org; Michael Eager (ea...@eagercon.com); John
> Williams; Edgar E. Iglesias (edgar.igles...@gmail.com); Vinod Kathail;
> Vidhumouli
> Hunsigida; Nagaraju Mekala; Tom Shui
> Subject: Re: [Patch, microblaze]: Added fast_interrupt controller
>
> On 02/10/2013 10:39 PM, David Holsgrove wrote:
> > Added fast_interrupt controller
> >
> > Changelog
> >
> > 2013-02-11 Nagaraju Mekala
> >
> >* config/microblaze/microblaze-protos.h: microblaze_is_fast_interrupt.
> >* config/microblaze/microblaze.c (microblaze_attribute_table): Add
> > microblaze_is_fast_interrupt.
> > (microblaze_fast_interrupt_function_p): New function.
> > (microblaze_is_fast_interrupt check): New function.
> > (microblaze_must_save_register): Account for fast_interrupt.
> > (save_restore_insns): Likewise.
> > (compute_frame_size): Likewise.
> > (microblaze_globalize_label): Add FAST_INTERRUPT_NAME.
> >* config/microblaze/microblaze.h: Define FAST_INTERRUPT_NAME as
> > fast_interrupt.
> >* config/microblaze/microblaze.md (movsi_status): Can be
> > fast_interrupt
> > (return): Add microblaze_is_fast_interrupt.
> > (return_internal): Likewise.
>
> +int
> +microblaze_is_fast_interrupt (void)
> +{
> + return fast_interrupt;
> +}
>
> + if (fast_interrupt)
> +{
>
> Use wrapper functions consistently. Either reference the flag everywhere
> or use the wrapper everywhere.
I've repurposed the existing 'microblaze_is_interrupt_handler' wrapper, (which
was
only used in the machine description), to be 'microblaze_is_interrupt_variant'
- true
if the function's attribute is either interrupt_handler or fast_interrupt.
>
> + if (interrupt_handler || fast_interrupt)
>
> + if (microblaze_is_interrupt_handler () || microblaze_is_fast_interrupt())
>
> There are many places in the patch where both interrupt_handler and
> fast_interrupt
> are tested. These can be eliminated by setting the interrupt_handler flag
> when
> you see fast_interrupt and checking for the correct registers to be saved in
> microblaze_must_save_register().
I've used this microblaze_is_interrupt_variant wrapper throughout, checking
specifically for the interrupt_handler or fast_interrupt flag only where it was
necessary to handle them differently.
Please let me know if the patch attached is acceptable, or if you would prefer
I refactor all the existing interrupt_handler functionality to accommodate the
fast_interrupt.
Updated Changelog;
2013-03-05 David Holsgrove
* gcc/config/microblaze/microblaze-protos.h: Rename
microblaze_is_interrupt_handler to microblaze_is_interrupt_variant.
* gcc/config/microblaze/microblaze.c (microblaze_attribute_table): Add
fast_interrupt.
(microblaze_fast_interrupt_function_p): New function.
(microblaze_is_interrupt_handler): Rename to
microblaze_is_interrupt_variant and add fast_interrupt check.
(microblaze_must_save_register): Use microblaze_is_interrupt_variant.
(save_restore_insns): Likewise.
(compute_frame_size): Likewise.
(microblaze_function_prologue): Add FAST_INTERRUPT_NAME.
(microblaze_globalize_label): Likewise.
* gcc/config/microblaze/microblaze.h: Define FAST_INTERRUPT_NAME.
* gcc/config/microblaze/microblaze.md: Use wrapper
microblaze_is_interrupt_variant.
thanks again for the reviews,
David
>
> + if ((interrupt_handler && !prologue) ||( fast_interrupt && !prologue) )
>
> + if ((interrupt_handler && prologue) || (fast_interrupt && prologue))
>
> Refactor. Fix spacing around parens.
>
> --
> Michael Eager ea...@eagercon.com
> 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
0002-Gcc-Added-fast_interrupt-controller.patch
Description: 0002-Gcc-Added-fast_interrupt-controller.patch
[Patch, microblaze]: Add support for TLS in MicroBlaze
Add support for thread local storage (general dynamic and local dynamic models) in MicroBlaze. gcc/Changelog 2013-03-13 Edgar E. Iglesias David Holsgrove * config/microblaze/microblaze-protos.h: (microblaze_cannot_force_const_mem, microblaze_tls_referenced_p, symbol_mentioned_p, label_mentioned_p): Add prototypes. * config/microblaze/microblaze.c (microblaze_address_type): Add ADDRESS_TLS and tls_reloc address types. (microblaze_address_info): Add tls_reloc. (TARGET_HAVE_TLS): Define. (get_tls_get_addr, microblaze_tls_symbol_p, microblaze_tls_operand_p_1, microblaze_tls_referenced_p, microblaze_cannot_force_const_mem, symbol_mentioned_p, label_mentioned_p, tls_mentioned_p, load_tls_operand, microblaze_call_tls_get_addr, microblaze_legitimize_tls_address): New functions. (microblaze_classify_unspec): Handle UNSPEC_TLS. (get_base_reg): Use microblaze_tls_symbol_p. (microblaze_classify_address): Handle TLS. (microblaze_legitimate_pic_operand): Use symbol_mentioned_p, label_mentioned_p and microblaze_tls_referenced_p. (microblaze_legitimize_address): Handle TLS. (microblaze_address_insns): Handle ADDRESS_TLS. (pic_address_needs_scratch): Handle TLS. (print_operand_address): Handle TLS. (microblaze_expand_prologue): Check TLS_NEEDS_GOT. (microblaze_expand_move): Handle TLS. (microblaze_legitimate_constant_p): Check microblaze_cannot_force_const_mem and microblaze_tls_symbol_p. (TARGET_CANNOT_FORCE_CONST_MEM): Define. * config/microblaze/microblaze.h (TLS_NEEDS_GOT): Define (PIC_OFFSET_TABLE_REGNUM): Set. * config/microblaze/linux.h (TLS_NEEDS_GOT): Define. * config/microblaze/microblaze.md (UNSPEC_TLS): Define. (addsi3, movsi_internal2, movdf_internal): Update constraints * config/microblaze/predicates.md (arith_plus_operand): Define (move_operand): Redefine as move_src_operand, check microblaze_tls_referenced_p. Signed-off-by: Edgar E. Iglesias Signed-off-by: David Holsgrove 0001-Patch-microblaze-Add-support-for-TLS.patch Description: 0001-Patch-microblaze-Add-support-for-TLS.patch
[Patch, microblaze]: Add MicroBlaze TLS configure support
Add test for MicroBlaze TLS support to gcc/configure.ac gcc/Changelog 2013-03-13 Edgar E. Iglesias David Holsgrove * configure.ac: Add MicroBlaze TLS support detection. * configure: Regenerate. Signed-off-by: Edgar E. Iglesias Signed-off-by: David Holsgrove 0002-Patch-microblaze-Add-MicroBlaze-TLS-configure-suppor.patch Description: 0002-Patch-microblaze-Add-MicroBlaze-TLS-configure-suppor.patch
RE: [Patch, microblaze]: Add support for TLS in MicroBlaze
Hi Michael, > -Original Message- > From: Michael Eager [mailto:ea...@eagerm.com] > Sent: Thursday, 14 March 2013 1:34 am > To: David Holsgrove > Cc: gcc-patches@gcc.gnu.org; Edgar Iglesias; John Williams; Vinod Kathail; > Vidhumouli Hunsigida; Nagaraju Mekala; Tom Shui > Subject: Re: [Patch, microblaze]: Add support for TLS in MicroBlaze > > On 03/12/2013 01:47 PM, David Holsgrove wrote: > > Add support for thread local storage (general dynamic and local dynamic > models) in MicroBlaze. > > > > > > gcc/Changelog > > > > 2013-03-13 Edgar E. Iglesias > > David Holsgrove > > [--snip--] > > > > Signed-off-by: Edgar E. Iglesias > > Signed-off-by: David Holsgrove > > Hi David -- > > The patch is OK except for a number of minor formatting problems to meet GNU > standards. > - Comments are supposed to end with ". */". > - Extra spacing around parens or between "!" and "TARGET...". > - && or || at start of line continuing a condition rather that at end of > previous line > - Some places where the indenting is incorrect > Thanks for the review, we inherited some of the style deviations when basing off of other archs TLS functions I'm afraid. I've fixed the formatting in v2 of the patch attached. > Should this patch be combined with the other patch adding TLS checking to > configure? > I've combined both patches into the attached - looking back at the ARM TLS patch it was submitted this way, so we'll follow precedence there if that’s okay with you. Updated Changelog would be; 2013-03-14 Edgar E. Iglesias David Holsgrove * configure.ac: Add MicroBlaze TLS support detection. * configure: Regenerate. * config/microblaze/microblaze-protos.h: (microblaze_cannot_force_const_mem, microblaze_tls_referenced_p, symbol_mentioned_p, label_mentioned_p): Add prototypes. * config/microblaze/microblaze.c (microblaze_address_type): Add ADDRESS_TLS and tls_reloc address types. (microblaze_address_info): Add tls_reloc. (TARGET_HAVE_TLS): Define. (get_tls_get_addr, microblaze_tls_symbol_p, microblaze_tls_operand_p_1, microblaze_tls_referenced_p, microblaze_cannot_force_const_mem, symbol_mentioned_p, label_mentioned_p, tls_mentioned_p, load_tls_operand, microblaze_call_tls_get_addr, microblaze_legitimize_tls_address): New functions. (microblaze_classify_unspec): Handle UNSPEC_TLS. (get_base_reg): Use microblaze_tls_symbol_p. (microblaze_classify_address): Handle TLS. (microblaze_legitimate_pic_operand): Use symbol_mentioned_p, label_mentioned_p and microblaze_tls_referenced_p. (microblaze_legitimize_address): Handle TLS. (microblaze_address_insns): Handle ADDRESS_TLS. (pic_address_needs_scratch): Handle TLS. (print_operand_address): Handle TLS. (microblaze_expand_prologue): Check TLS_NEEDS_GOT. (microblaze_expand_move): Handle TLS. (microblaze_legitimate_constant_p): Check microblaze_cannot_force_const_mem and microblaze_tls_symbol_p. (TARGET_CANNOT_FORCE_CONST_MEM): Define. * config/microblaze/microblaze.h (TLS_NEEDS_GOT): Define (PIC_OFFSET_TABLE_REGNUM): Set. * config/microblaze/linux.h (TLS_NEEDS_GOT): Define. * config/microblaze/microblaze.md (UNSPEC_TLS): Define. (addsi3, movsi_internal2, movdf_internal): Update constraints * config/microblaze/predicates.md (arith_plus_operand): Define (move_operand): Redefine as move_src_operand, check microblaze_tls_referenced_p. Signed-off-by: Edgar E. Iglesias Signed-off-by: David Holsgrove thanks again, David > > -- > Michael Eager ea...@eagercon.com > 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077 0001-Patch-microblaze-Add-support-for-TLS-in-MicroBlaze.patch Description: 0001-Patch-microblaze-Add-support-for-TLS-in-MicroBlaze.patch
[Patch, microblaze]: Add -fstack-usage support
Changelog 2013-03-18 David Holsgrove * gcc/config/microblaze/microblaze.c (microblaze_expand_prologue): Add check for flag_stack_usage to handle -fstack-usage support Signed-off-by: David Holsgrove 0004-Patch-microblaze-Add-fstack-usage-support.patch Description: 0004-Patch-microblaze-Add-fstack-usage-support.patch
[Patch, microblaze]: Enable DWARF exception handling support
Add DWARF exception handling support for MicroBlaze. Changelog 2013-03-18 Edgar E. Iglesias David Holsgrove * common/config/microblaze/microblaze-common.c: Remove TARGET_EXCEPT_UNWIND_INFO definition. * config/microblaze/microblaze-protos.h: Add microblaze_eh_return prototype. * gcc/config/microblaze/microblaze.c: (microblaze_must_save_register, microblaze_expand_epilogue, microblaze_return_addr): Handle calls_eh_return (microblaze_eh_return): New function. * gcc/config/microblaze/microblaze.h: Define RETURN_ADDR_OFFSET, EH_RETURN_DATA_REGNO, MB_EH_STACKADJ_REGNUM, EH_RETURN_STACKADJ_RTX, ASM_PREFERRED_EH_DATA_FORMAT * gcc/config/microblaze/microblaze.md: Define eh_return pattern. Signed-off-by: David Holsgrove Signed-off-by: Edgar E. Iglesias 0001-Patch-microblaze-Enable-DWARF-exception-handling-sup.patch Description: 0001-Patch-microblaze-Enable-DWARF-exception-handling-sup.patch
[Patch, microblaze]: Add atomic builtin implementation
Add sync_compare_and_swapsi and sync_test_and_setsi implementations for MicroBlaze. Changelog 2013-03-18 David Holsgrove * gcc/config/microblaze/sync.md: New file. * gcc/config/microblaze/microblaze.md: Add UNSPEC_SYNC_CAS, UNSPEC_SYNC_XCHG and include sync.md. * gcc/config/microblaze/microblaze.c: Add print_operand 'y'. * gcc/config/microblaze/constraints.md: Add memory_contraint 'Q' which is a single register. Signed-off-by: David Holsgrove 0002-Patch-microblaze-Add-atomic-builtin.patch Description: 0002-Patch-microblaze-Add-atomic-builtin.patch
[Patch, microblaze]: Add TARGET_ASM_OUTPUT_MI_THUNK to support varargs thunk
Changelog 2013-03-18 David Holsgrove * gcc/config/microblaze/microblaze.c: Add microblaze_asm_output_mi_thunk and define TARGET_ASM_OUTPUT_MI_THUNK and TARGET_ASM_CAN_OUTPUT_MI_THUNK Signed-off-by: David Holsgrove 0003-Patch-microblaze-Add-TARGET_ASM_OUTPUT_MI_THUNK-to-s.patch Description: 0003-Patch-microblaze-Add-TARGET_ASM_OUTPUT_MI_THUNK-to-s.patch
[Patch, microblaze]: Remove SECONDARY_MEMORY_NEEDED
MicroBlaze doesn't have restrictions that would force us to reload regs via memory. Don't define SECONDARY_MEMORY_NEEDED. Fixes an ICE when compiling OpenSSL for linux. Changelog 2013-03-18 Edgar E. Iglesias * gcc/config/microblaze/microblaze.h: Remove SECONDARY_MEMORY_NEEDED definition. Signed-off-by: Edgar E. Iglesias Signed-off-by: Peter A. G. Crosthwaite 0005-Patch-microblaze-Remove-SECONDARY_MEMORY_NEEDED.patch Description: 0005-Patch-microblaze-Remove-SECONDARY_MEMORY_NEEDED.patch
[Patch, microblaze]: Add SIZE_TYPE and PTRDIFF_TYPE to microblaze.h
Changelog 2013-03-18 David Holsgrove * gcc/config/microblaze/microblaze.h: Define SIZE_TYPE and PTRDIFF_TYPE. Signed-off-by: David Holsgrove 0006-Patch-microblaze-Add-SIZE_TYPE-and-PTRDIFF_TYPE-to-m.patch Description: 0006-Patch-microblaze-Add-SIZE_TYPE-and-PTRDIFF_TYPE-to-m.patch
[Patch, microblaze]: Extend jump insn to accept bri to SYMBOL_REFS
Changelog 2013-03-18 David Holsgrove * gcc/config/microblaze/microblaze.md (jump): Account for jumps to SYMBOL_REFs. Signed-off-by: David Holsgrove 0007-Patch-microblaze-Extend-jump-insn-to-accept-bri-to-S.patch Description: 0007-Patch-microblaze-Extend-jump-insn-to-accept-bri-to-S.patch
RE: [Patch, microblaze]: Enable DWARF exception handling support
> -Original Message- > From: Michael Eager [mailto:ea...@eagerm.com] > Sent: Wednesday, 20 March 2013 3:05 am > To: David Holsgrove > Cc: gcc-patches@gcc.gnu.org; Edgar Iglesias; John Williams; Vinod Kathail; > Vidhumouli Hunsigida; Nagaraju Mekala; Tom Shui > Subject: Re: [Patch, microblaze]: Enable DWARF exception handling support > > On 03/18/2013 05:47 AM, David Holsgrove wrote: > > Add DWARF exception handling support for MicroBlaze. > > > > Changelog > > > > 2013-03-18 Edgar E. Iglesias > > David Holsgrove > > > > * common/config/microblaze/microblaze-common.c: Remove > > TARGET_EXCEPT_UNWIND_INFO definition. > > * config/microblaze/microblaze-protos.h: Add microblaze_eh_return > prototype. > > * gcc/config/microblaze/microblaze.c: (microblaze_must_save_register, > > microblaze_expand_epilogue, microblaze_return_addr): Handle > > calls_eh_return > > (microblaze_eh_return): New function. > > * gcc/config/microblaze/microblaze.h: Define RETURN_ADDR_OFFSET, > > EH_RETURN_DATA_REGNO, MB_EH_STACKADJ_REGNUM, > EH_RETURN_STACKADJ_RTX, > > ASM_PREFERRED_EH_DATA_FORMAT > > * gcc/config/microblaze/microblaze.md: Define eh_return pattern. > > Hi David -- > > I see about 50 more failures (an increase from 137 to 189) in the g++ > regression tests after applying this patch. I haven't looked at the > failures in detail. > Hi Michael, Thanks I'll have another look at the regression tests today. We should be enabling new tests now by supporting DWARF, but I don’t think my last run with a microblaze-xilinx-linux-gnu was giving me as many failures as you see; === g++ Summary === # of expected passes26617 # of unexpected failures17 # of unexpected successes 2 # of expected failures 167 # of unresolved testcases 3 # of unsupported tests 433 thanks, David > > -- > Michael Eager ea...@eagercon.com > 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
RE: [Patch, microblaze]: Remove SECONDARY_MEMORY_NEEDED
Hi Michael, > -Original Message- > From: Michael Eager [mailto:ea...@eagerm.com] > Sent: Friday, 17 January 2014 4:44 am > To: David Holsgrove; gcc-patches@gcc.gnu.org > Cc: Edgar Iglesias; John Williams; Vidhumouli Hunsigida; Nagaraju Mekala > Subject: Re: [Patch, microblaze]: Remove SECONDARY_MEMORY_NEEDED > > On 11/25/13 23:51, David Holsgrove wrote: > > Hi Michael, > > > > I've attached patch based on latest gcc master. Please let me know if > > you need anything further. > > > > thanks, > > David > > > > On 15 July 2013 14:44, David Holsgrove wrote: > >> Hi Michael, > >> > >> On 18 March 2013 22:49, David Holsgrove > wrote: > >>> MicroBlaze doesn't have restrictions that would force us to > >>> reload regs via memory. Don't define SECONDARY_MEMORY_NEEDED. > >>> Fixes an ICE when compiling OpenSSL for linux. > >>> > >>> Changelog > >>> > >>> 2013-03-18 Edgar E. Iglesias > >>> > >>> * gcc/config/microblaze/microblaze.h: Remove > SECONDARY_MEMORY_NEEDED > >>> definition. > >>> > >>> Signed-off-by: Edgar E. Iglesias > >>> Signed-off-by: Peter A. G. Crosthwaite > >>> > >> > >> Patch remains the same, please apply when ready. > >> > >> thanks, > >> David > > Hi David -- > > Is it possible to add a test case which shows the ICE? > I'm afraid I don’t still have my test environment for this patch from last March, I'll attempt to recreate and distil into a small test case if possible, based on the error encountered whilst building openssl. I'll update again when I have some further detail. thanks, David > Thanks. > > > -- > Michael Eager ea...@eagercon.com > 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
RE: [Patch, microblaze]: Fix ICE with mhard-float
> -Original Message- > From: Michael Eager [mailto:ea...@eagerm.com] > Sent: Friday, 17 January 2014 4:36 am > To: David Holsgrove; gcc-patches@gcc.gnu.org > Cc: Edgar Iglesias; John Williams; Vidhumouli Hunsigida; Nagaraju Mekala > Subject: Re: [Patch, microblaze]: Fix ICE with mhard-float > > On 11/25/13 23:50, David Holsgrove wrote: > > Hi Michael, > > > > I've attached the same patch based on latest gcc master. > > > > Can this be applied to gcc-4_8-branch also. > > > > thanks, > > David > > > > On 15 July 2013 14:53, David Holsgrove wrote: > >> Add SImode to cstoresf4's comparison operator, prevents ICE during combine > >> rtl pass with error message; > >> > >> internal compiler error: in simplify_subreg, at simplify-rtx.c:5725 > >> > >> Use ordered_comparison_operator predicate to limit operators to > >> those fcmp can handle, and letting compiler reorder insns to > >> accommodate unordered as necessary. > >> > >> Changelog entry; > >> > >> 2013-07-15 David Holsgrove > >> > >> * gcc/config/microblaze/microblaze.md: Fix cstoresf4 and cbranchsf4 > >> > >> Can this be backported to gcc-4_8-branch also? > > > Hi David -- > > You mention that this patch fixes an ICE. Is there a failing test > case in the GCC Test Suite? Is there a GCC PR for this ICE? > If not, please add a test case to the patch. Hi Michael, Thanks for the reply. No, unfortunately there isn’t an existing test case which shows this ICE. I'm in the process of trying to recreate and distil into a small test case if possible, but the error was encountered whilst building a rather large app using microblaze linux. From the documentation though we can see that the use of comparison_operator as the predicate for these Microblaze insn patterns is too broad, as fcmp only accepts the following; http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_7/mb_ref_guide.pdf fcmp.un rD, rA, rB Unordered floating point comparison fcmp.lt rD, rA, rB Less-than floating point comparison fcmp.eq rD, rA, rB Equal floating point comparison fcmp.le rD, rA, rB Less-or-Equal floating point comparison fcmp.gt rD, rA, rB Greater-than floating point comparison fcmp.ne rD, rA, rB Not-Equal floating point comparison fcmp.ge rD, rA, rB Greater-or-Equal floating point comparison From gcc/gensupport.c we see that the comparison_operator predicate consists of the following expression codes; EQ, NE, LE, LT, GE, GT, LEU, LTU, GEU, GTU, UNORDERED, ORDERED, UNEQ, UNGE, UNGT, UNLE, UNLT, LTGT Whereas ordered_comparison_operator has; EQ, NE, LE, LT, GE, GT, LEU, LTU, GEU, GTU (microblaze.c's print_operand handles the unordered comparison modes before passing to fcmp) The GCC Internals documentation also highlights that ordered_comparison_operator should likely be used to restrict the possible comparison modes; http://gcc.gnu.org/onlinedocs/gccint/Standard-Names.html ‘cstoremode4’ These operations may FAIL, but should do so only in relatively uncommon cases; if they would FAIL for common cases involving integer comparisons, it is best to restrict the predicates to not allow these operands. Likewise if a given comparison operator will always fail, independent of the operands (for floating-point modes, the ordered_comparison_operator predicate is often useful in this case). > > Changelog entries saying "fix XYZ" are not as useful as a description > of the changes made. A better Changelog would be: > > * config/microblaze/microblaze.md (cstoresf4, cbranchsf4): Replace > comparison_operator with ordered_comparison_operator. > Thanks for the suggestion, yes indeed, a better ChangeLog entry would be; 2013-07-15 David Holsgrove * config/microblaze/microblaze.md (cstoresf4, cbranchsf4): Replace comparison_operator with ordered_comparison_operator. thanks again, David > > -- > Michael Eager ea...@eagercon.com > 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
Re: [Patch, microblaze]: Fix ICE with mhard-float
Hi Michael, On 22 January 2014 13:43, David Holsgrove wrote: >> -Original Message- >> From: Michael Eager [mailto:ea...@eagerm.com] >> Sent: Friday, 17 January 2014 4:36 am >> To: David Holsgrove; gcc-patches@gcc.gnu.org >> Cc: Edgar Iglesias; John Williams; Vidhumouli Hunsigida; Nagaraju Mekala >> Subject: Re: [Patch, microblaze]: Fix ICE with mhard-float >> >> On 11/25/13 23:50, David Holsgrove wrote: >> > Hi Michael, >> > >> > I've attached the same patch based on latest gcc master. >> > >> > Can this be applied to gcc-4_8-branch also. >> > >> > thanks, >> > David >> > >> > On 15 July 2013 14:53, David Holsgrove wrote: >> >> Add SImode to cstoresf4's comparison operator, prevents ICE during combine >> >> rtl pass with error message; >> >> >> >> internal compiler error: in simplify_subreg, at simplify-rtx.c:5725 >> >> >> >> Use ordered_comparison_operator predicate to limit operators to >> >> those fcmp can handle, and letting compiler reorder insns to >> >> accommodate unordered as necessary. >> >> >> >> Changelog entry; >> >> >> >> 2013-07-15 David Holsgrove >> >> >> >> * gcc/config/microblaze/microblaze.md: Fix cstoresf4 and cbranchsf4 >> >> >> >> Can this be backported to gcc-4_8-branch also? >> >> >> Hi David -- >> >> You mention that this patch fixes an ICE. Is there a failing test >> case in the GCC Test Suite? Is there a GCC PR for this ICE? >> If not, please add a test case to the patch. > > Hi Michael, > > Thanks for the reply. No, unfortunately there isn’t an existing test case > which shows this ICE. > > I'm in the process of trying to recreate and distil into a small test case if > possible, but the error was encountered whilst building a rather large app > using microblaze linux. > I've attached updated patch which includes a test case to check for this ICE. Tested on microblaze baremetal and microblazeel linux toolchains with / without my change. Updated ChangeLogs would be; gcc/ChangeLog 2014-01-22 David Holsgrove * config/microblaze/microblaze.md(cstoresf4, cbranchsf4): Replace comparison_operator with ordered_comparison_operator. testsuite/ChangeLog 2014-01-22 David holsgrove * testsuite/gcc.target/microblaze/isa/fcmp4.c: New file. thanks, David >> >> -- >> Michael Eager ea...@eagercon.com >> 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077 > > > 0001-Patch-microblaze-cstoresf4-add-mode-and-ordered_comp.patch Description: Binary data
Re: [Patch, microblaze]: Fix bswaphi2 implementation
Hi Michael, On 26 November 2013 17:48, David Holsgrove wrote: > Hi Michael, > > Please find attached same patch based against latest from gcc master. > > Can this be applied and backported to gcc-4_8-branch when reviewed. > > thanks, > David > > On 15 July 2013 14:49, David Holsgrove wrote: >> MicroBlaze insn swaph swaps the contents of register rA as two >> halfwords placing result in rD; >> >> (rD)[0:15] <- (rA)[16:31] >> (rD)[16:31] <- (rA)[0:15] >> >> gcc bswaphi2 is intended to reverse the order of the bytes in the >> half integer in rA >> >> (rD)[8:15] <- (rA)[0:7] >> (rD)[7:0] <- (rA)[8:15] >> (rD)[24:31] <- (rA)[16:23] >> (rD)[16:23] <- (rA)[24:31] >> >> Correct the microblaze bswaphi2 insn pattern to be a swapb followed >> by swaph >> >> Changelog entry would be: >> >> 2013-07-15 David Holsgrove >> >> * gcc/config/microblaze/microblaze.md: Fix bswaphi2 >> >> >> Can this also be backported to the gcc-4_8-branch? >> Updated patch attached which includes a testcase to check that bswaphi2 is using a swapb followed by swaph for MicroBlaze. Updated Changelogs are; gcc/Changelog 2014-01-22 David Holsgrove * gcc/config/microblaze/microblaze.md: Correct bswaphi2 / bswapsi2 insn testsuite/ChangeLog 2014-01-22 David Holsgrove * gcc/testsuite/gcc.target/microblaze/others/bswap16.c: New test. >> thanks, >> David 0001-Patch-microblaze-Fix-bswaphi2-implementation.patch Description: Binary data
RE: [Patch, microblaze]: Add optimized lshrsi3
Hi Michael, > -Original Message- > From: Michael Eager [mailto:ea...@eagerm.com] > Sent: Sunday, 9 February 2014 2:58 am > To: David Holsgrove; gcc-patches@gcc.gnu.org > Cc: Edgar Iglesias; John Williams; Vidhumouli Hunsigida; Nagaraju Mekala > Subject: Re: [Patch, microblaze]: Add optimized lshrsi3 > > On 11/25/13 23:53, David Holsgrove wrote: > > Add optimized lshrsi3 instruction, to be used when optimizing for size > > with immediate values over 5 > > > > Changelog > > > > 2013-11-26 Nagaraju Mekala > > > > * gcc/config/microblaze/microblaze.md: Add size optimized lshrsi3 insn. > > David -- > > Please put the description of the patch in the text of the email, > rather than hiding it within an attached patch. > > The patch describes a very specific situation where this patch > will have an effect. Please provide a test case. Updated version of patch attached with testcase. New Changelog entries are; Changelog 2013-11-26 David Holsgrove * gcc/config/microblaze/microblaze.md: Add size optimized lshrsi3 insn ChangeLog/testsuite 2014-02-12 David Holsgrove * gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c: New test. thanks, David > > -- > Michael Eager ea...@eagercon.com > 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077 0003-Patch-microblaze-Add-optimized-lshrsi3.patch Description: 0003-Patch-microblaze-Add-optimized-lshrsi3.patch
RE: [Patch, microblaze]: Remove SECONDARY_MEMORY_NEEDED
Hi Michael, List, > -Original Message- > From: David Holsgrove > Sent: Wednesday, 22 January 2014 1:43 pm > To: 'Michael Eager'; gcc-patches@gcc.gnu.org > Cc: Edgar Iglesias; John Williams; Vidhumouli Hunsigida; Nagaraju Mekala > Subject: RE: [Patch, microblaze]: Remove SECONDARY_MEMORY_NEEDED > > Hi Michael, > > > -Original Message- > > From: Michael Eager [mailto:ea...@eagerm.com] > > Sent: Friday, 17 January 2014 4:44 am > > To: David Holsgrove; gcc-patches@gcc.gnu.org > > Cc: Edgar Iglesias; John Williams; Vidhumouli Hunsigida; Nagaraju Mekala > > Subject: Re: [Patch, microblaze]: Remove SECONDARY_MEMORY_NEEDED > > > > On 11/25/13 23:51, David Holsgrove wrote: > > > Hi Michael, > > > > > > I've attached patch based on latest gcc master. Please let me know if > > > you need anything further. > > > > > > thanks, > > > David > > > > > > On 15 July 2013 14:44, David Holsgrove wrote: > > >> Hi Michael, > > >> > > >> On 18 March 2013 22:49, David Holsgrove > > wrote: > > >>> MicroBlaze doesn't have restrictions that would force us to > > >>> reload regs via memory. Don't define SECONDARY_MEMORY_NEEDED. > > >>> Fixes an ICE when compiling OpenSSL for linux. > > >>> > > >>> Changelog > > >>> > > >>> 2013-03-18 Edgar E. Iglesias > > >>> > > >>> * gcc/config/microblaze/microblaze.h: Remove > > SECONDARY_MEMORY_NEEDED > > >>> definition. > > >>> > > >>> Signed-off-by: Edgar E. Iglesias > > >>> Signed-off-by: Peter A. G. Crosthwaite > > >>> > > >> > > >> Patch remains the same, please apply when ready. > > >> > > >> thanks, > > >> David > > > > Hi David -- > > > > Is it possible to add a test case which shows the ICE? > > > > I'm afraid I don’t still have my test environment for this patch from last > March, I'll > attempt to recreate and distil into a small test case if possible, based on > the error > encountered whilst building openssl. > > I'll update again when I have some further detail. > I've managed to recreate the original internal compiler error whilst building openssl with microblazeel linux toolchain. I've reduced the error down to the attached testcase. It is taken directly from openssl (with no dependencies on openssl headers), so I'm unsure of the suitability of this test both technically and license wise for inclusion in gcc. Changelog entry would be; 2013-03-18 Edgar E. Iglesias * gcc/config/microblaze/microblaze.h: Remove SECONDARY_MEMORY_NEEDED definition. ChangeLog/testsuite 2014-02-13 David Holsgrove * gcc/testsuite/gcc.target/microblaze/others/mem_reload.c: New test. thanks, David > thanks, > David > > > Thanks. > > > > > > -- > > Michael Eagerea...@eagercon.com > > 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077 0002-Patch-microblaze-Remove-SECONDARY_MEMORY_NEEDED.patch Description: 0002-Patch-microblaze-Remove-SECONDARY_MEMORY_NEEDED.patch
RE: [Patch, microblaze]: Add TARGET_ASM_OUTPUT_MI_THUNK to support varargs thunk
Hi Michael,
> -Original Message-
> From: Michael Eager [mailto:ea...@eagerm.com]
> Sent: Sunday, 26 January 2014 1:57 am
> To: David Holsgrove
> Cc: gcc-patches@gcc.gnu.org; Edgar Iglesias; John Williams; Vinod Kathail;
> Vidhumouli Hunsigida; Nagaraju Mekala; Tom Shui
> Subject: Re: [Patch, microblaze]: Add TARGET_ASM_OUTPUT_MI_THUNK to
> support varargs thunk
>
> On 07/14/13 21:37, David Holsgrove wrote:
> > Hi Michael,
> >
> >> -Original Message-
> >> From: Michael Eager [mailto:ea...@eagerm.com]
> >> Sent: Saturday, 13 July 2013 9:33 am
> >> To: David Holsgrove
> >> Cc: gcc-patches@gcc.gnu.org; Edgar Iglesias; John Williams; Vinod Kathail;
> >> Vidhumouli Hunsigida; Nagaraju Mekala; Tom Shui
> >> Subject: Re: [Patch, microblaze]: Add TARGET_ASM_OUTPUT_MI_THUNK to
> >> support varargs thunk
> >>
> >> On 03/18/13 05:49, David Holsgrove wrote:
> >>> Changelog
> >>>
> >>> 2013-03-18 David Holsgrove
> >>>
> >>>* gcc/config/microblaze/microblaze.c: Add
> microblaze_asm_output_mi_thunk
> >>> and define TARGET_ASM_OUTPUT_MI_THUNK and
> >> TARGET_ASM_CAN_OUTPUT_MI_THUNK
> >>
> >> Sorry it has taken so long to review this patch.
> >>
[--snip--]
> >
> > 2013-07-15 David Holsgrove
> >
> > * gcc/config/microblaze/microblaze.c: Add microblaze_asm_output_mi_thunk
> > and define TARGET_ASM_OUTPUT_MI_THUNK and
> TARGET_ASM_CAN_OUTPUT_MI_THUNK
>
> This patch causes a number of regressions in the G++ test suite.
> For example, abi/covariant{3,4,5}.C, abi/vcall1.C,
> inherit/covariant{1,2,3,4,17,18}.C,
> inherit/thunk{7,10}.C and others.
>
>
Apologies - this patch was originally written in 2012 and submitted to this
list a year ago.
It has not been reviewed or tested for regressions in 12 months, and has taken
me a bit of time to go back to the original work and rerun the testsuite as it
stands today.
Please find attached updated patch which has no regressions. I believe the
testcase which checks the functionality of this patch is '
g++.old-deja/g++.jason/thunk3.C'
Changelog entry remains the same since March 2013.
thanks,
David
> --
> Michael Eager ea...@eagercon.com
> 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
0001-Patch-microblaze-Add-TARGET_ASM_OUTPUT_MI_THUNK-to-s.patch
Description: 0001-Patch-microblaze-Add-TARGET_ASM_OUTPUT_MI_THUNK-to-s.patch
[Patch, testsuite]: Add MicroBlaze pattern for dg-function-on-line
Hi, Attached patch adds a MicroBlaze specific pattern for checking line number and generation of function in dg-function-on-line, in line with the mips method. Changelog/testsuite 2014-02-13 David Holsgrove * gcc/testsuite/lib/scanasm.exp (dg-function-on-line): Add MicroBlaze specific pattern. thanks, David 0004-Patch-testsuite-Add-MicroBlaze-pattern-for-dg-functi.patch Description: 0004-Patch-testsuite-Add-MicroBlaze-pattern-for-dg-functi.patch
[Patch, testsuite]: Allow MicroBlaze .weakext pattern in regex match
Hi All,
I've attached a patch to extend the regex pattern to include optional 'ext' at
the end of
'.weak' to match the MicroBlaze weak label '.weakext' in two of the g++
testcases.
The only other rule in these tests was for ! { *-*-darwin* }, so I'm not sure
if it's appropriate to modify
the scan-assembler line in this fashion for a specific architecture's pattern?
ChangeLog/testsuite
2014-02-14 David Holsgrove
* gcc/testsuite/g++.dg/abi/rtti3.C: Extend scan-assembler
pattern to take optional ext after .weak.
* gcc/testsuite/g++.dg/abi/thunk4.C: Likewise.
thanks,
David
0005-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch
Description: 0005-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch
RE: [Patch, testsuite]: Allow MicroBlaze .weakext pattern in regex match
Hi Mike,
> -Original Message-
> From: Mike Stump [mailto:mikest...@comcast.net]
> Sent: Friday, 14 February 2014 6:01 pm
> To: David Holsgrove
> Cc: gcc-patches@gcc.gnu.org; Michael Eager (ea...@eagerm.com); Vidhumouli
> Hunsigida; Nagaraju Mekala; John Williams; Edgar Iglesias
> Subject: Re: [Patch, testsuite]: Allow MicroBlaze .weakext pattern in regex
> match
>
> On Feb 13, 2014, at 10:07 PM, David Holsgrove
> wrote:
> > I've attached a patch to extend the regex pattern to include optional 'ext'
> > at the
> end of
> > '.weak' to match the MicroBlaze weak label '.weakext' in two of the g++ test
> cases.
>
> I don’t feel strongly either way. I'd like think weak(_definition)?(ext)?…..
> is good
> enough, as this test doesn’t much care beyond that.
>
> spec34 does:
>
> { dg-final { scan-assembler ".weak(_definition)?\[\t \]*_?_Z2f2IiEvT_”
>
> for example. Which I think is fairly readable/maintainable.
>
> Let’s give others that might disagree with me an opportunity to do so… I’m
> happy to defer to anyone that has a stronger opinion than mine. If no one
> steps
> forward, I’ll ok either way you want to go.
>
> Wearing my hat as darwin/testsuite maintainer. :-)
Thanks for the reply, I'd be happy with reducing the number of matches in those
tests to use optional 'ext' or optional '_definition' as you suggested.
I've attached an updated patch to consolidate and remove the separate Darwin
tests, so we can go with either approach if anyone else has an opinion.
ChangeLog/testsuite
2014-02-14 David Holsgrove
* gcc/testsuite/g++.dg/abi/rtti3.C: Extend scan-assembler
pattern to take optional patterns and remove darwin test.
* gcc/testsuite/g++.dg/abi/thunk3.C: Likewise.
* gcc/testsuite/g++.dg/abi/thunk4.C: Likewise.
thanks,
David
0005-Patch-testsuite-Extend-.weak-pattern-in-regex-match.patch
Description: 0005-Patch-testsuite-Extend-.weak-pattern-in-regex-match.patch
RE: [Patch, testsuite]: Allow MicroBlaze .weakext pattern in regex match
Hi Mike S., Michael E., > -Original Message- > From: Mike Stump [mailto:mikest...@comcast.net] > Sent: Friday, 21 February 2014 6:17 am > To: David Holsgrove > Cc: gcc-patches@gcc.gnu.org; Michael Eager (ea...@eagerm.com); Vidhumouli > Hunsigida; Nagaraju Mekala; John Williams; Edgar Iglesias > Subject: Re: [Patch, testsuite]: Allow MicroBlaze .weakext pattern in regex > match > > On Feb 16, 2014, at 4:21 PM, David Holsgrove > wrote: > > I've attached an updated patch > > Ok, thanks. If no one has any objections on this updated patch, would either of you be able to approve and apply? thanks, David
[Patch, microblaze]: Add microblaze*-*-elf target
gcc/Changelog 2013-01-21 Edgar E. Iglesias * config.gcc (microblaze*-*-elf): Add new target libgcc/Changelog 2013-01-21 Edgar E. Iglesias * config.host (microblaze*-*-elf): Add new target 0002-Add-microblaze-elf-target.patch Description: Binary data
[Patch, microblaze]: PR54662 - microblaze-linux target makefile
gcc/Changelog 2013-01-21 David Holsgrove * config.gcc (microblaze*-linux*): Add tmake_file to allow building of microblaze-c.o libgcc/Changelog 2013-01-21 David Holsgrove * libgcc/config/microblaze/t-microblaze: Set LIB2FUNCS_EXCLUDE to exclude functions from being built with libgcc.c and use the microblaze assembly. 0003-PR54662-microblaze-linux-target-makefile.patch Description: Binary data
[Patch, microblaze, testsuite] Remove check for target_config_cflags
Remove test for target_config_cflags for microblaze - not set anywhere, and causes error while running testsuite; ERROR: tcl error sourcing [SNIP]/gcc/gcc/testsuite/gcc.target/microblaze/microblaze.exp. ERROR: can't read "target_config_cflags": no such variable gcc/testsuite/Changelog: 2013-01-21 David Holsgrove * gcc.target/microblaze/microblaze.exp: Remove target_config_cflags check 0001-Remove-obsolete-check-for-target_config_cflags-no-lo.patch Description: Binary data
[Patch, microblaze]: Add TARGET_OS_CPP_BUILTINS for microblaze*-linux
gcc/Changelog 2013-01-21 Edgar E. Iglesias * gcc/config/microblaze/linux.h: Add TARGET_OS_CPP_BUILTINS 0004-Add-TARGET_OS_CPP_BUILTINS-for-microblaze-linux.patch Description: Binary data
[Patch, microblaze]: Add MicroBlaze Little Endian Support
gcc/Changelog 2013-01-21 Edgar E. Iglesias * gcc/config.gcc (microblaze*-linux*): Add TARGET_BIG_ENDIAN_DEFAULT gcc/config.gcc (microblaze*-*-elf): Likewise gcc/config.gcc (microblaze*-*-*): Likewise * gcc/config/microblaze/linux.h: Add -mbig-endian / -mlittle-endian to LINK_SPEC * gcc/config/microblaze/microblaze-c.c: Add builtin defines for _LITTLE_ENDIAN and _BIG_ENDIAN * gcc/config/microblaze/microblaze.h: Add TARGET_ENDIAN_DEFAULT and add to TARGET_DEFAULT flags. Expand ASM_SPEC and LINK_SPEC. Update BYTES_BIG_ENDIAN and WORDS_BIG_ENDIAN * gcc/config/microblaze/microblaze.md: Update extendsidi2 and movdi_internal instructions to use low-order / high-order reg print_operands * gcc/config/microblaze/microblaze.opt: Add mbig-endian and mlittle-endian options and inversemask / mask of LITTLE_ENDIAN * gcc/config/microblaze/t-microblaze: Expand multilib options to include mlittle-endian (le) and update exceptions patterns * gcc/config/microblaze/t-microblaze-linux: New file - define multilibs for microblaze*-linux which dont include little endian. gcc/testsuite/Changelog 2013-01-21 Edgar E. Iglesias * 20101011-1.c: Add __MICROBLAZE__ exception to set DO_TEST 0 0005-Add-MicroBlaze-Little-Endian-Support.patch Description: Binary data
Re: [Patch, microblaze]: PR54662 - microblaze-linux target makefile
Hi Michael, On 24 January 2013 01:07, Michael Eager wrote: > On 01/20/2013 09:46 PM, David Holsgrove wrote: >> >> gcc/Changelog >> >> 2013-01-21 David Holsgrove >> >> * config.gcc (microblaze*-linux*): Add tmake_file to allow >> building >>of microblaze-c.o >> >> libgcc/Changelog >> >> 2013-01-21 David Holsgrove >> >> * libgcc/config/microblaze/t-microblaze: Set LIB2FUNCS_EXCLUDE >>to exclude functions from being built with libgcc.c and use >>the microblaze assembly. >> > > Hi David -- > > The patch is OK, but I'm confused about the PR mentioned. GCC PR54662 > doesn't seem to be related. > Apologies - thats a typo, the PR I meant to reference was PR54663. thanks, David > -- > Michael Eagerea...@eagercon.com > 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077 > >
Re: [Patch, microblaze]: Add microblaze*-*-elf target
Hi Michael, On 24 January 2013 00:58, Michael Eager wrote: > On 01/20/2013 09:42 PM, David Holsgrove wrote: >> >> gcc/Changelog >> >> 2013-01-21 Edgar E. Iglesias >> >> * config.gcc (microblaze*-*-elf): Add new target >> >> libgcc/Changelog >> >> 2013-01-21 Edgar E. Iglesias >> >> * config.host (microblaze*-*-elf): Add new target >> > > Hi David -- > > This appears to be identical the existing microblaze*-*-* target. > Why is an -elf target needed? > Its slightly different, the config.gcc -elf target adds newlib-stdint.h to the tm_file, and in libgcc/config.host we extend the extra_parts by adding crtbeginS.o, crtendS.o crtbeginT.o. It was more to keep the original generic target distinct from the developments to microblaze-*elf. thanks, David > -- > Michael Eagerea...@eagercon.com > 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077 > >
Re: [Patch, microblaze]: Add microblaze*-*-elf target
On 25 January 2013 01:38, Michael Eager wrote: > On 01/23/2013 08:24 PM, David Holsgrove wrote: >> >> Hi Michael, >> >> On 24 January 2013 00:58, Michael Eager wrote: >>> >>> On 01/20/2013 09:42 PM, David Holsgrove wrote: >>>> >>>> >>>> gcc/Changelog >>>> >>>> 2013-01-21 Edgar E. Iglesias >>>> >>>> * config.gcc (microblaze*-*-elf): Add new target >>>> >>>> libgcc/Changelog >>>> >>>> 2013-01-21 Edgar E. Iglesias >>>> >>>> * config.host (microblaze*-*-elf): Add new target >>>> >>> >>> Hi David -- > > The generic microblaze*-*-* target is currently used for > --target=microblaze-xilinx-elf. > > After adding a microblaze*-*-elf target, what targets would use > generic target? If there are no known configurations which would > match, there's little value in keeping a target which is never built. > > I don't have any objection to renaming the target from microblaze*-*-* > to microblaze-*-*-elf. > > Hi Michael, I agree, our default target would be a microblaze*-*-elf, so I can rename the target to reflect this, and update the config.gcc / config.host. I've attached an updated version of the patch for your review. I'll also reply to my patch adding Little Endian support as this will be updated also. thanks again, David > > -- > Michael Eagerea...@eagercon.com > 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077 > > 0001-Add-microblaze-elf-target.patch Description: Binary data
Re: [Patch, microblaze]: Add MicroBlaze Little Endian Support
Hi Michael, Please find attached updated patch for MicroBlaze Little Endian support to reflect removal of microblaze*-*-* target. Changelog updated as follows. thanks, David gcc/Changelog 2013-01-25 Edgar E. Iglesias * gcc/config.gcc (microblaze*-linux*): Add TARGET_BIG_ENDIAN_DEFAULT gcc/config.gcc (microblaze*-*-elf): Likewise * gcc/config/microblaze/linux.h: Add -mbig-endian / -mlittle-endian to LINK_SPEC * gcc/config/microblaze/microblaze-c.c: Add builtin defines for _LITTLE_ENDIAN and _BIG_ENDIAN * gcc/config/microblaze/microblaze.h: Add TARGET_ENDIAN_DEFAULT and add to TARGET_DEFAULT flags. Expand ASM_SPEC and LINK_SPEC. Update BYTES_BIG_ENDIAN and WORDS_BIG_ENDIAN * gcc/config/microblaze/microblaze.md: Update extendsidi2 and movdi_internal instructions to use low-order / high-order reg print_operands * gcc/config/microblaze/microblaze.opt: Add mbig-endian and mlittle-endian options and inversemask / mask of LITTLE_ENDIAN * gcc/config/microblaze/t-microblaze: Expand multilib options to include mlittle-endian (le) and update exceptions patterns gcc/testsuite/Changelog 2013-01-25 Edgar E. Iglesias * 20101011-1.c: Add __MICROBLAZE__ exception to set DO_TEST 0 0003-Add-MicroBlaze-Little-Endian-Support.patch Description: Binary data
[Patch, microblaze]: Add support for nested functions
Add MicroBlaze support for nested functions. Changelog 2013-02-11 Edgar E. Iglesias * config/microblaze/microblaze.c (microblaze_asm_trampoline_template): Replace with a microblaze version. (microblaze_trampoline_init): Adapt for microblaze. * config/microblaze/microblaze.h (TRAMPOLINE_SIZE): Adapt for microblaze. 0002-gcc-microblaze-Add-MicroBlaze-support-for-nested-fun.patch Description: 0002-gcc-microblaze-Add-MicroBlaze-support-for-nested-fun.patch
[Patch, microblaze]: Add TARGET_SUPPORTS_PIC check
Add TARGET_SUPPORTS_PIC flag and check that the flag_pic = 2 Changelog 2013-02-11 Edgar E. Iglesias * config/microblaze/linux.h (TARGET_SUPPORTS_PIC): Define as 1. * config/microblaze/microblaze.h (TARGET_SUPPORTS_PIC): Define as 1. * config/microblaze/microblaze.c (microblaze_option_override): Bail out early for PIC modes when target does not support PIC. gcc/testsuite/Changelog 2013-02-11 Edgar E. Iglesias * gcc.dg/20020312-2.c: Define MicroBlaze PIC register 0001-gcc-microblaze-Bailout-early-for-PIC-modes-when-targ.patch Description: 0001-gcc-microblaze-Bailout-early-for-PIC-modes-when-targ.patch
[Patch, microblaze]: Free variable local allocs at block ends
Free variable local allocs at block ends. Changelog 2013-02-11 Edgar E. Iglesias * config/microblaze/microblaze.md (save_stack_block): Define. (restore_stack_block): Likewise. 0003-gcc-microblaze-Free-variable-local-allocs-at-block-e.patch Description: 0003-gcc-microblaze-Free-variable-local-allocs-at-block-e.patch
[Patch, microblaze]: Handle 0x80000000 as 32bit signed dividend
Handle 0x8000 as 32bit signed dividend Changelog 2013-02-11 Edgar E. Iglesias * config/microblaze/modsi3.S (modsi3): Fix case with 0x8000 as dividend. 0004-libgcc-microblaze-Handle-0x8000-as-32bit-signed-.patch Description: 0004-libgcc-microblaze-Handle-0x8000-as-32bit-signed-.patch
[Patch, microblaze]: Avoid PC relative branches between sections
Avoid PC relative branches between sections by further checking that the symbol we are calling is declared as a function before using PC relative calls. Changelog 2013-02-11 Edgar E. Iglesias * config/microblaze/microblaze.md (call_value_intern): Check symbol is function before branching 0005-microblaze-Avoid-PC-relative-branches-between-sectio.patch Description: 0005-microblaze-Avoid-PC-relative-branches-between-sectio.patch
[Patch, microblaze]: Add support for the CLZ insn
Add support for the CLZ insn Will be used if pattern-compare is enabled and the targeted core is newer than v8.10.a. Changelog 2013-02-11 Edgar E. Iglesias * config/microblaze/microblaze.c: microblaze_has_clz = 0 Add version check for v8.10.a to enable microblaze_has_clz * config/microblaze/microblaze.h: Add TARGET_HAS_CLZ as combined version and TARGET_PATTERN_COMPARE check * config/microblaze/microblaze.md: New clzsi2 instruction 0006-microblaze-Add-support-for-the-CLZ-insn.patch Description: 0006-microblaze-Add-support-for-the-CLZ-insn.patch
[Patch, microblaze]: Add support for swap instructions and reorder option
Add support for swap instructions and reorder option swapb and swaph instructions are introduced in microblaze cpu (mcpu) v8.30a, but have an undocumented dependence on -mxl-pattern-compare being set. The conditions for their use are; mcpu < 8.30a; no swap insns, use of -mxl-reorder produces warning and ignored mcpu == 8.30a and -mxl-pattern-compare specified; and if -mno-xl-reorder not specified, then swap insns allowed mcpu > 8.30a; if -mno-xl-reorder not specified, then swap insns allowed Changelog 2013-02-11 David Holsgrove * config/microblaze/microblaze.c: microblaze_has_swap = 0 Add version check for v8.30.a to enable microblaze_has_swap * config/microblaze/microblaze.h: Add TARGET_HAS_SWAP * config/microblaze/microblaze.md: New bswapsi2 and bswaphi2 instructions * config/microblaze/microblaze.opt: New options -mxl-reorder and -mno-xl-reorder 0007-Gcc-Added-swapb-and-swaph-instructions-and-mxl-reord.patch Description: 0007-Gcc-Added-swapb-and-swaph-instructions-and-mxl-reord.patch
[Patch, microblaze]: Added fast_interrupt controller
Added fast_interrupt controller Changelog 2013-02-11 Nagaraju Mekala * config/microblaze/microblaze-protos.h: microblaze_is_fast_interrupt. * config/microblaze/microblaze.c (microblaze_attribute_table): Add microblaze_is_fast_interrupt. (microblaze_fast_interrupt_function_p): New function. (microblaze_is_fast_interrupt check): New function. (microblaze_must_save_register): Account for fast_interrupt. (save_restore_insns): Likewise. (compute_frame_size): Likewise. (microblaze_globalize_label): Add FAST_INTERRUPT_NAME. * config/microblaze/microblaze.h: Define FAST_INTERRUPT_NAME as fast_interrupt. * config/microblaze/microblaze.md (movsi_status): Can be fast_interrupt (return): Add microblaze_is_fast_interrupt. (return_internal): Likewise. 0008-Gcc-Added-fast_interrupt-controller.patch Description: 0008-Gcc-Added-fast_interrupt-controller.patch
[Patch, microblaze]: Adjustments to pcmp instruction generation
Adjustments to pcmp instruction generation avoid pcmpe insns when not valuable For pure in and equality comparisions, xor is better, Xor is a one cycle insn as pcmp. Pattern insns will still be used when you need to conditionally set something to one or zero, e.g if (a) return 1; else return 0; Define contraint for first operand in insn matching fcmp as general register Add a constraint to the cstoresf pattern forcing the use of general regs for the operands. This avoids an ICE where the compiler would crash on late usage of pseudo registers. Changelog 2013-02-11 Edgar E. Iglesias * config/microblaze/microblaze.c (microblaze_emit_compare): Use xor for EQ/NE comparisions * config/microblaze/microblaze.md (cstoresf4): Add constraints (cbranchsf4): Adjust operator to comparison_operator 0009-microblaze-Adjustments-to-pcmp-instruction-generatio.patch Description: 0009-microblaze-Adjustments-to-pcmp-instruction-generatio.patch
[Patch, microblaze]: Setup stack protection at entry.
Setup stack protection at entry. libgcc/Changelog 2013-02-11 Edgar E. Iglesias * config/microblaze/crti.S: Setup stack protection at entry 0010-microblaze-Setup-stack-protection-at-entry.patch Description: 0010-microblaze-Setup-stack-protection-at-entry.patch
[Patch, microblaze]: Add microblaze_legitimate_pic_operand method
Add microblaze_legitimate_pic_operand method Prevents ICE where insn contains an invalid address Changelog 2013-02-11 David Holsgrove * config/microblaze/microblaze.c (microblaze_valid_pic_const): New function (microblaze_legitimate_pic_operand): Likewise * config/microblaze/microblaze.h (LEGITIMATE_PIC_OPERAND_P): calls new function microblaze_legitimate_pic_operand 0012-Add-microblaze_legitimate_pic_operand-method.patch Description: 0012-Add-microblaze_legitimate_pic_operand-method.patch
[Patch, microblaze]: Dont allow unsupported target rtx into call_internal1
Dont allow unsupported target rtx into call_internal1 Fix it by adding a simplified call_insn_operand, call_insn_simple_operand that only accepts the supported rtx code types. Changelog 2013-02-11 Edgar E. Iglesias * config/microblaze/predicates.md (call_insn_simple_operand): New predicate for supported rtx code types. * config/microblaze/microblaze.md (call_internal1): Use call_insn_simple_operand predicate. 0011-microblaze-Dont-allow-unsuported-target-rtx-into-cal.patch Description: 0011-microblaze-Dont-allow-unsuported-target-rtx-into-cal.patch
