[gcc r16-540] libstdc++: Rewrite atomic builtin checks: Fix up 'GLIBCXX_ENABLE_BACKTRACE' check with 'size_t' [PR1

[Thomas Schwinge via Libstdc++-cvs]

https://gcc.gnu.org/g:4589ccbed5cad42296d4d1810b61e8dec0dadf79

commit r16-540-g4589ccbed5cad42296d4d1810b61e8dec0dadf79
Author: Thomas Schwinge 
Date:   Mon May 12 10:35:11 2025 +0200

libstdc++: Rewrite atomic builtin checks: Fix up 'GLIBCXX_ENABLE_BACKTRACE' 
check with 'size_t' [PR119667]

Fix-up for commit 86627faec10da53d7532805019e5296fcf15ac09
"libstdc++: Rewrite atomic builtin checks [PR70560]", which, for example, 
for
x86_64-pc-linux-gnu lost '-DHAVE_ATOMIC_FUNCTIONS=1' from 
'BACKTRACE_CPPFLAGS'
due to:

configure:53554: checking for atomic builtins for libbacktrace
configure:53587:  [...]/./gcc/xgcc -shared-libgcc -B[...]/./gcc 
-nostdinc++ -L[...]/x86_64-pc-linux-gnu/libstdc++-v3/src 
-L[...]/x86_64-pc-linux-gnu/libstdc++-v3/src/.libs 
-L[...]/x86_64-pc-linux-gnu/libstdc++-v3/libsupc++/.libs 
-B/x86_64-pc-linux-gnu/bin/ -B/x86_64-pc-linux-gnu/lib/ -isystem 
/x86_64-pc-linux-gnu/include -isystem /x86_64-pc-linux-gnu/sys-include-o 
conftest -O0   conftest.cpp  >&5
conftest.cpp: In function 'int main()':
conftest.cpp:265:13: error: 'size_t' was not declared in this scope
  265 | size_t s = 0;
  | ^~
conftest.cpp:1:1: note: 'size_t' is defined in header ''; this 
is probably fixable by adding '#include '
1 | /* confdefs.h */
conftest.cpp:273:31: error: 's' was not declared in this scope
  273 | __atomic_store_n(&s, s, __ATOMIC_RELEASE);
  |   ^
configure:53587: $? = 1
configure: failed program was:
| /* confdefs.h */
[...]
| int
| main ()
| {
|[...]
|  size_t s = 0;
|[...]
|  // backtrace_atomic_store_size_t
|  __atomic_store_n(&s, s, __ATOMIC_RELEASE);
|[...]
| }
configure:53595: result: no

PR libstdc++/70560
PR libstdc++/119667
libstdc++-v3/
* acinclude.m4 (GLIBCXX_ENABLE_BACKTRACE): Use '__SIZE_TYPE__'
instead of 'size_t'.
* configure: Regenerate.

Diff:
---
 libstdc++-v3/acinclude.m4 | 4 ++--
 libstdc++-v3/configure| 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/libstdc++-v3/acinclude.m4 b/libstdc++-v3/acinclude.m4
index 204bed5b27be..d1ecb1ad9566 100644
--- a/libstdc++-v3/acinclude.m4
+++ b/libstdc++-v3/acinclude.m4
@@ -5304,7 +5304,7 @@ AC_DEFUN([GLIBCXX_ENABLE_BACKTRACE], [
[AC_TRY_LINK([], [
int i = 0;
int* p = &i;
-   size_t s = 0;
+   __SIZE_TYPE__ s = 0;
// backtrace_atomic_load_pointer
void* vp = __atomic_load_n(&p, __ATOMIC_ACQUIRE);
// backtrace_atomic_load_int
@@ -5331,7 +5331,7 @@ int main()
 {
   int i = 0;
   int* p = &i;
-  size_t s = 0;
+  __SIZE_TYPE__ s = 0;
   // backtrace_atomic_load_pointer
   void* vp = __atomic_load_n(&p, __ATOMIC_ACQUIRE);
   // backtrace_atomic_load_int
diff --git a/libstdc++-v3/configure b/libstdc++-v3/configure
index 0529ff5708f1..d6891e544cfe 100755
--- a/libstdc++-v3/configure
+++ b/libstdc++-v3/configure
@@ -53568,7 +53568,7 @@ main ()
 
int i = 0;
int* p = &i;
-   size_t s = 0;
+   __SIZE_TYPE__ s = 0;
// backtrace_atomic_load_pointer
void* vp = __atomic_load_n(&p, __ATOMIC_ACQUIRE);
// backtrace_atomic_load_int
@@ -53607,7 +53607,7 @@ int main()
 {
   int i = 0;
   int* p = &i;
-  size_t s = 0;
+  __SIZE_TYPE__ s = 0;
   // backtrace_atomic_load_pointer
   void* vp = __atomic_load_n(&p, __ATOMIC_ACQUIRE);
   // backtrace_atomic_load_int

[gcc r16-536] testsuite/120222 - adjust gcc.dg/tree-ssa/gen-vect-28.c for inlining change

[Richard Biener via Gcc-cvs]

https://gcc.gnu.org/g:e64e894006eb4d82e0a80a386cf1d1714498e161

commit r16-536-ge64e894006eb4d82e0a80a386cf1d1714498e161
Author: Richard Biener 
Date:   Mon May 12 09:14:39 2025 +0200

testsuite/120222 - adjust gcc.dg/tree-ssa/gen-vect-28.c for inlining change

We now inline main_1, confusing the expected number of vectorizations.

PR testsuite/120222
* gcc.dg/tree-ssa/gen-vect-28.c: Use noipa on main_1.

Diff:
---
 gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c 
b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c
index 5c0ea58a7b00..4b3ce4eb9d4f 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c
@@ -9,7 +9,8 @@
 
 /* unaligned store.  */
 
-int main_1 (int off)
+int __attribute__((noipa))
+main_1 (int off)
 {
   int i;
   char ia[N+OFF];

[gcc r16-537] libstdc++: Make dg-require-namedlocale work for more targets [PR65909]

[Jonathan Wakely via Gcc-cvs]

https://gcc.gnu.org/g:3e2b83faeb6b14254641933525e63171e89d973f

commit r16-537-g3e2b83faeb6b14254641933525e63171e89d973f
Author: Jonathan Wakely 
Date:   Thu May 8 09:57:28 2025 +0100

libstdc++: Make dg-require-namedlocale work for more targets [PR65909]

As noted in the PR, some embedded targets do not support command-line
arguments, which means that the dg-require-namedlocale check always
fails. Use Sandra's suggestion of hardcoding the argument into the
executable instead of passing it as a command-line argument.

Realistically, those embedded targets probably don't support the named
locales anyway, but at least now the tests will be UNSUPPORTED for the
right reason.

libstdc++-v3/ChangeLog:

PR libstdc++/65909
* testsuite/lib/libstdc++.exp (check_v3_target_namedlocale):
Hardcode the locale name instead of passing it to the
executable. Do not hardcode buffer size for string.

Reviewed-by: Tomasz Kamiński 

Diff:
---
 libstdc++-v3/testsuite/lib/libstdc++.exp | 13 -
 1 file changed, 4 insertions(+), 9 deletions(-)

diff --git a/libstdc++-v3/testsuite/lib/libstdc++.exp 
b/libstdc++-v3/testsuite/lib/libstdc++.exp
index 5e958d159de2..fbc9f7f13e64 100644
--- a/libstdc++-v3/testsuite/lib/libstdc++.exp
+++ b/libstdc++-v3/testsuite/lib/libstdc++.exp
@@ -1034,7 +1034,7 @@ proc check_v3_target_namedlocale { args } {
puts $f "using namespace std;"
puts $f "char *transform_locale(const char *name)"
puts $f "{"
-   puts $f "char *result = new char\[50\];"
+   puts $f "char *result = new char\[strlen(name)+6\];"
puts $f "strcpy(result, name);"
puts $f "#if defined __FreeBSD__ || defined __DragonFly__ || defined 
__NetBSD__"
puts $f "/* fall-through */"
@@ -1045,14 +1045,9 @@ proc check_v3_target_namedlocale { args } {
puts $f "#endif"
puts $f "return result;"
puts $f "}"
-   puts $f "int main (int argc, char** argv)"
+   puts $f "int main ()"
puts $f "{"
-   puts $f "  if (argc < 2)"
-   puts $f "  {"
-   puts $f "printf(\"locale support test not supported\\n\");"
-   puts $f "return 1;"
-   puts $f "  }"
-   puts $f "  const char *namedloc = transform_locale(*(argv + 1));"
+   puts $f "  const char *namedloc = transform_locale(\"$args\");"
puts $f "  try"
puts $f "  {"
puts $f "locale((const char*)namedloc);"
@@ -1076,7 +1071,7 @@ proc check_v3_target_namedlocale { args } {
  return 0
}
 
-   set result [${tool}_load "./$exe" "$args" ""]
+   set result [${tool}_load "./$exe" "" ""]
set status [lindex $result 0]
 
verbose "check_v3_target_namedlocale <$args>: status is <$status>" 2

[gcc r16-538] libstdc++: Update rows in C++17 status table

[Jonathan Wakely via Libstdc++-cvs]

https://gcc.gnu.org/g:e0bcedba6132fa5c75cb22b9232dbe72c7b3fea0

commit r16-538-ge0bcedba6132fa5c75cb22b9232dbe72c7b3fea0
Author: Jonathan Wakely 
Date:   Thu May 8 14:48:16 2025 +0100

libstdc++: Update  rows in C++17 status table

Document that std::to_chars and std::from_chars are complete, mentioning
the libraries used for floating-point types.

libstdc++-v3/ChangeLog:

* doc/xml/manual/status_cxx2017.xml: Update status for
std::to_chars and std::from_chars.
* doc/html/manual/*: Regenerate.

Reviewed-by: Jakub Jelinek 
Reviewed-by: Björn Schäpers 

Diff:
---
 .../doc/html/manual/source_code_style.html |  2 +-
 libstdc++-v3/doc/html/manual/status.html   | 17 ++-
 libstdc++-v3/doc/xml/manual/status_cxx2017.xml | 25 ++
 3 files changed, 38 insertions(+), 6 deletions(-)

diff --git a/libstdc++-v3/doc/html/manual/source_code_style.html 
b/libstdc++-v3/doc/html/manual/source_code_style.html
index b0b22683f67c..a66e3a079471 100644
--- a/libstdc++-v3/doc/html/manual/source_code_style.html
+++ b/libstdc++-v3/doc/html/manual/source_code_style.html
@@ -474,7 +474,7 @@
 
   Examples:  _M_num_elements  _M_initialize 
()
 
-  Static data members, constants, and enumerations: _S_.*
+  Static data and function members, constants, and enumerations: _S_.*
 
   Examples: _S_max_elements  _S_default_value
 
diff --git a/libstdc++-v3/doc/html/manual/status.html 
b/libstdc++-v3/doc/html/manual/status.html
index 3d55e2652729..5668c69664cd 100644
--- a/libstdc++-v3/doc/html/manual/status.html
+++ b/libstdc++-v3/doc/html/manual/status.html
@@ -927,7 +927,22 @@ since C++14 and the implementation is complete.
23
   
General utilities
-  23.1General  23.2Utility components 
 23.2.1Header  synopsis  23.2.2OperatorsY 23.2.3swapY 23.2.4exchangeY 
23.2.5Forward/move 
helpersY 23.2.6Function templat
 e as_constY 23.2.7Function template declvalY 23.2.8Primitive numeric output 
conversionPartial 23.2.9Primitive numeric input 
conversionPartial 23.3Compile-time integer sequences  23.4PairsY 23.5TuplesY 
23.6Optional 
objectsY 23.7VariantsY 
23.8Storage for any 
typeY 23.9BitsetsY 23.10MemoryY 
23.10.1In general  23.10.2Header  synopsisY 23.10.3Pointer traitsY 
23.10.4Pointer 
safetyY <
 /tr>23.10.5AlignY 23.10.6Allocator argument tagY 23.10.7uses_allocatorY 
23.10.8Allocator 
traitsY 23.10.9The default allocatorY 23.10.10Specialized algorithmsY 23.10.11C library memory allocationY 23.11Smart pointers  23.11.1Class template unique_ptrY 23.11.2Shared-ownership pointersY 23.12Memory resources 
 23.12.1Header  
synopsisY 23.12.2Class memory_resourceY 23.12.3Class 
template polymorphic_allocatorY 23.12.4Access to
  program-wide memory_resource objectsY 23.12.5Pool resource classesY 23.12.6Class monotonic_buffer_resourceY 23.13Class 
template scoped_allocator_adaptorY 23.14Function objects 
 23.14.1Header  
synopsis  23.14.2Definitions 
 23.14.3Requirements 
 23.14.4Function template invokeY 23.14.5Class template reference_wrapperY 23.14.6Arithmetic operationY 
23.14.7ComparisonsY 23.14.8Logical operationsY 23.14.9Bitwise operationsY 23.14.10Function templa
 te not_fnY 23.14.11Function object bindersY 23.14.12Function template mem_fnY 23.14.13Polymorphic function 
wrappersY 23.14.14SearchersY 23.14.15Class template hashY 
23.15Metaprogramming and 
type traits  23.15.1Requirements  23.15.2Header  synopsisY 23.15.3Helper classesY 
23.15.4Unary Type 
TraitsY 23.15.5Type property queriesY 23.15.6Relationships between typesY 23.15.7Transformations between typesY 23.15.8Logical operator traitsY 23.16Compile-time rational 
arithmeticY 23.17.1In general 
 23.17.2Header  synopsis  23.17Time utilities 
 23.17.3Clock requirementsY 
23.17.4Time-related 
traitsY 23.17.5Class template durationY 
23.17.6Class tem
 plate time_pointY 23.17.7ClocksY 
23.17.8Header  synopsisY 23.18Class 
type_indexY 23.19Execution policies  
23.19.1In general  23.19.2Header  synopsis  23.19.3Execution policy 
 type traitY 23.19.4Sequenced execution policyY 23.19.5Parallel execution policyY 23.19.6Parallel and unsequenced execution 
policyY 23.19.7Execution policy objectsY 
+  23.1General  23.2Utility components 
 23.2.1Header  synopsis  23.2.2OperatorsY 23.2.3swapY 23.2.4exchangeY 
23.2.5Forward/move 
helpersY 23.2.6Function templat
 e as_constY 23.2.7Function template declvalY 23.2.8Primitive numeric output 
conversionY
+   Floating-point types up to 64-bit are formatted using
+   https://github.com/ulfjack/ryu"; 
target="_top">Ryu.
+   Types with greater precision are formatted using the C library
+   (sprintf and conditionally
+   strfromf128).
+   For powerpc64le-unknown-linux-gnu __sprintfieee128
+   must be provided by Glibc.
+  23.2.9Primitive 
numeric input conversionY
+   Fl

[gcc r16-539] libstdc++: Suppress GDB output from new 'skip' commands [PR118260]

[Jonathan Wakely via Libstdc++-cvs]

https://gcc.gnu.org/g:31cbac3037b7811bd0df63f4a09aa981b250c4bf

commit r16-539-g31cbac3037b7811bd0df63f4a09aa981b250c4bf
Author: Jonathan Wakely 
Date:   Fri May 9 11:39:39 2025 +0100

libstdc++: Suppress GDB output from new 'skip' commands [PR118260]

I added some gdb.execute('skip -rfu ...') commands to the Python hook
loaded with libstdc++.so but this makes GDB print output like:

Function(s) ^std::(move|forward|as_const|(__)?addressof) will be skipped 
when stepping.

This probably aren't interesting to users, so this change suppresses
that output by capturing the output into the gdb.execute return value
(which is then ignored). An exception is thrown if the gdb.execute
command fails, so this doesn't suppress any errors which might be
meaningful to users or libstdc++ developers.

libstdc++-v3/ChangeLog:

PR libstdc++/118260
* python/hook.in: Suppress output from gdb.execute calls to
register skips.

Reviewed-by: Tomasz Kamiński 

Diff:
---
 libstdc++-v3/python/hook.in | 12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/libstdc++-v3/python/hook.in b/libstdc++-v3/python/hook.in
index d63909d2af4c..74a097cd0a00 100644
--- a/libstdc++-v3/python/hook.in
+++ b/libstdc++-v3/python/hook.in
@@ -55,10 +55,14 @@ if gdb.current_objfile () is not None:
 if not dir_ in sys.path:
 sys.path.insert(0, dir_)
 
-gdb.execute('skip -rfu ^std::(move|forward|as_const|(__)?addressof)')
-gdb.execute('skip -rfu ^std::(shared|unique)_ptr<.*>::(get|operator)')
-gdb.execute('skip -rfu 
^std::(basic_string|vector|array|deque|(forward_)?list|(unordered_|flat_)?(multi)?(map|set)|span)<.*>::(c?r?(begin|end)|front|back|data|size|empty)')
-gdb.execute('skip -rfu 
^std::(basic_string|vector|array|deque|span)<.*>::operator.]')
+gdb.execute('skip -rfu ^std::(move|forward|as_const|(__)?addressof)',
+to_string=True)
+gdb.execute('skip -rfu ^std::(shared|unique)_ptr<.*>::(get|operator)',
+to_string=True)
+gdb.execute('skip -rfu 
^std::(basic_string|vector|array|deque|(forward_)?list|(unordered_|flat_)?(multi)?(map|set)|span)<.*>::(c?r?(begin|end)|front|back|data|size|empty)',
+to_string=True)
+gdb.execute('skip -rfu 
^std::(basic_string|vector|array|deque|span)<.*>::operator.]',
+to_string=True)
 
 # Call a function as a plain import would not execute body of the included file
 # on repeated reloads of this object file.

[gcc r15-9657] libstdc++: Update rows in C++17 status table

[Jonathan Wakely via Libstdc++-cvs]

https://gcc.gnu.org/g:fc135d41b1eb6a1736ac680d1928387b38db5193

commit r15-9657-gfc135d41b1eb6a1736ac680d1928387b38db5193
Author: Jonathan Wakely 
Date:   Thu May 8 14:48:16 2025 +0100

libstdc++: Update  rows in C++17 status table

Document that std::to_chars and std::from_chars are complete, mentioning
the libraries used for floating-point types.

libstdc++-v3/ChangeLog:

* doc/xml/manual/status_cxx2017.xml: Update status for
std::to_chars and std::from_chars.
* doc/html/manual/*: Regenerate.

Reviewed-by: Jakub Jelinek 
Reviewed-by: Björn Schäpers 
(cherry picked from commit e0bcedba6132fa5c75cb22b9232dbe72c7b3fea0)

Diff:
---
 .../doc/html/manual/source_code_style.html |  2 +-
 libstdc++-v3/doc/html/manual/status.html   | 17 ++-
 libstdc++-v3/doc/xml/manual/status_cxx2017.xml | 25 ++
 3 files changed, 38 insertions(+), 6 deletions(-)

diff --git a/libstdc++-v3/doc/html/manual/source_code_style.html 
b/libstdc++-v3/doc/html/manual/source_code_style.html
index b0b22683f67c..a66e3a079471 100644
--- a/libstdc++-v3/doc/html/manual/source_code_style.html
+++ b/libstdc++-v3/doc/html/manual/source_code_style.html
@@ -474,7 +474,7 @@
 
   Examples:  _M_num_elements  _M_initialize 
()
 
-  Static data members, constants, and enumerations: _S_.*
+  Static data and function members, constants, and enumerations: _S_.*
 
   Examples: _S_max_elements  _S_default_value
 
diff --git a/libstdc++-v3/doc/html/manual/status.html 
b/libstdc++-v3/doc/html/manual/status.html
index 0f095b8c858a..664c1426da71 100644
--- a/libstdc++-v3/doc/html/manual/status.html
+++ b/libstdc++-v3/doc/html/manual/status.html
@@ -927,7 +927,22 @@ since C++14 and the implementation is complete.
23
   
General utilities
-  23.1General  23.2Utility components 
 23.2.1Header  synopsis  23.2.2OperatorsY 23.2.3swapY 23.2.4exchangeY 
23.2.5Forward/move 
helpersY 23.2.6Function templat
 e as_constY 23.2.7Function template declvalY 23.2.8Primitive numeric output 
conversionPartial 23.2.9Primitive numeric input 
conversionPartial 23.3Compile-time integer sequences  23.4PairsY 23.5TuplesY 
23.6Optional 
objectsY 23.7VariantsY 
23.8Storage for any 
typeY 23.9BitsetsY 23.10MemoryY 
23.10.1In general  23.10.2Header  synopsisY 23.10.3Pointer traitsY 
23.10.4Pointer 
safetyY <
 /tr>23.10.5AlignY 23.10.6Allocator argument tagY 23.10.7uses_allocatorY 
23.10.8Allocator 
traitsY 23.10.9The default allocatorY 23.10.10Specialized algorithmsY 23.10.11C library memory allocationY 23.11Smart pointers  23.11.1Class template unique_ptrY 23.11.2Shared-ownership pointersY 23.12Memory resources 
 23.12.1Header  
synopsisY 23.12.2Class memory_resourceY 23.12.3Class 
template polymorphic_allocatorY 23.12.4Access to
  program-wide memory_resource objectsY 23.12.5Pool resource classesY 23.12.6Class monotonic_buffer_resourceY 23.13Class 
template scoped_allocator_adaptorY 23.14Function objects 
 23.14.1Header  
synopsis  23.14.2Definitions 
 23.14.3Requirements 
 23.14.4Function template invokeY 23.14.5Class template reference_wrapperY 23.14.6Arithmetic operationY 
23.14.7ComparisonsY 23.14.8Logical operationsY 23.14.9Bitwise operationsY 23.14.10Function templa
 te not_fnY 23.14.11Function object bindersY 23.14.12Function template mem_fnY 23.14.13Polymorphic function 
wrappersY 23.14.14SearchersY 23.14.15Class template hashY 
23.15Metaprogramming and 
type traits  23.15.1Requirements  23.15.2Header  synopsisY 23.15.3Helper classesY 
23.15.4Unary Type 
TraitsY 23.15.5Type property queriesY 23.15.6Relationships between typesY 23.15.7Transformations between typesY 23.15.8Logical operator traitsY 23.16Compile-time rational 
arithmeticY 23.17.1In general 
 23.17.2Header  synopsis  23.17Time utilities 
 23.17.3Clock requirementsY 
23.17.4Time-related 
traitsY 23.17.5Class template durationY 
23.17.6Class tem
 plate time_pointY 23.17.7ClocksY 
23.17.8Header  synopsisY 23.18Class 
type_indexY 23.19Execution policies  
23.19.1In general  23.19.2Header  synopsis  23.19.3Execution policy 
 type traitY 23.19.4Sequenced execution policyY 23.19.5Parallel execution policyY 23.19.6Parallel and unsequenced execution 
policyY 23.19.7Execution policy objectsY 
+  23.1General  23.2Utility components 
 23.2.1Header  synopsis  23.2.2OperatorsY 23.2.3swapY 23.2.4exchangeY 
23.2.5Forward/move 
helpersY 23.2.6Function templat
 e as_constY 23.2.7Function template declvalY 23.2.8Primitive numeric output 
conversionY
+   Floating-point types up to 64-bit are formatted using
+   https://github.com/ulfjack/ryu"; 
target="_top">Ryu.
+   Types with greater precision are formatted using the C library
+   (sprintf and conditionally
+   strfromf128).
+   For powerpc64le-unknown-linux-gnu __sprintfieee128
+   must be provi

[gcc r15-9658] libstdc++: Suppress GDB output from new 'skip' commands [PR118260]

[Jonathan Wakely via Libstdc++-cvs]

https://gcc.gnu.org/g:a341d96add049e1ebc94e7350ff59e82b03043d2

commit r15-9658-ga341d96add049e1ebc94e7350ff59e82b03043d2
Author: Jonathan Wakely 
Date:   Fri May 9 11:39:39 2025 +0100

libstdc++: Suppress GDB output from new 'skip' commands [PR118260]

I added some gdb.execute('skip -rfu ...') commands to the Python hook
loaded with libstdc++.so but this makes GDB print output like:

Function(s) ^std::(move|forward|as_const|(__)?addressof) will be skipped 
when stepping.

This probably aren't interesting to users, so this change suppresses
that output by capturing the output into the gdb.execute return value
(which is then ignored). An exception is thrown if the gdb.execute
command fails, so this doesn't suppress any errors which might be
meaningful to users or libstdc++ developers.

libstdc++-v3/ChangeLog:

PR libstdc++/118260
* python/hook.in: Suppress output from gdb.execute calls to
register skips.

Reviewed-by: Tomasz Kamiński 
(cherry picked from commit 31cbac3037b7811bd0df63f4a09aa981b250c4bf)

Diff:
---
 libstdc++-v3/python/hook.in | 12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/libstdc++-v3/python/hook.in b/libstdc++-v3/python/hook.in
index d63909d2af4c..74a097cd0a00 100644
--- a/libstdc++-v3/python/hook.in
+++ b/libstdc++-v3/python/hook.in
@@ -55,10 +55,14 @@ if gdb.current_objfile () is not None:
 if not dir_ in sys.path:
 sys.path.insert(0, dir_)
 
-gdb.execute('skip -rfu ^std::(move|forward|as_const|(__)?addressof)')
-gdb.execute('skip -rfu ^std::(shared|unique)_ptr<.*>::(get|operator)')
-gdb.execute('skip -rfu 
^std::(basic_string|vector|array|deque|(forward_)?list|(unordered_|flat_)?(multi)?(map|set)|span)<.*>::(c?r?(begin|end)|front|back|data|size|empty)')
-gdb.execute('skip -rfu 
^std::(basic_string|vector|array|deque|span)<.*>::operator.]')
+gdb.execute('skip -rfu ^std::(move|forward|as_const|(__)?addressof)',
+to_string=True)
+gdb.execute('skip -rfu ^std::(shared|unique)_ptr<.*>::(get|operator)',
+to_string=True)
+gdb.execute('skip -rfu 
^std::(basic_string|vector|array|deque|(forward_)?list|(unordered_|flat_)?(multi)?(map|set)|span)<.*>::(c?r?(begin|end)|front|back|data|size|empty)',
+to_string=True)
+gdb.execute('skip -rfu 
^std::(basic_string|vector|array|deque|span)<.*>::operator.]',
+to_string=True)
 
 # Call a function as a plain import would not execute body of the included file
 # on repeated reloads of this object file.

[gcc r16-542] arm: testsuite: remove iwmmxt tests

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:844dcbc362dead95e832685d64ed094afcf238b4

commit r16-542-g844dcbc362dead95e832685d64ed094afcf238b4
Author: Richard Earnshaw 
Date:   Mon Apr 28 11:15:16 2025 +0100

arm: testsuite: remove iwmmxt tests

These two tests were specific to iWMMXT, but we're about to remove
that code, so the tests are now redundant.

gcc/testsuite/ChangeLog:

* gcc.target/arm/mmx-1.c: Removed.
* gcc.target/arm/mmx-2.c: Removed.
* gcc.target/arm/pr64208.c: Removed.
* gcc.target/arm/pr79145.c: Removed.
* gcc.target/arm/pr99724.c: Removed.
* gcc.target/arm/pr99786.c: Removed.

Diff:
---
 gcc/testsuite/gcc.target/arm/mmx-1.c   |  26 --
 gcc/testsuite/gcc.target/arm/mmx-2.c   | 166 -
 gcc/testsuite/gcc.target/arm/pr64208.c |  25 -
 gcc/testsuite/gcc.target/arm/pr79145.c |  16 
 gcc/testsuite/gcc.target/arm/pr99724.c |  31 --
 gcc/testsuite/gcc.target/arm/pr99786.c |  30 --
 6 files changed, 294 deletions(-)

diff --git a/gcc/testsuite/gcc.target/arm/mmx-1.c 
b/gcc/testsuite/gcc.target/arm/mmx-1.c
deleted file mode 100644
index 8060dbd40af0..
--- a/gcc/testsuite/gcc.target/arm/mmx-1.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/* Verify that if IP is saved to ensure stack alignment, we don't load
-   it into sp.  */
-/* { dg-do compile } */
-/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mcpu=*" } { 
"-mcpu=iwmmxt" } } */
-/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mabi=*" } { 
"-mabi=iwmmxt" } } */
-/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-march=*" } { 
"-march=iwmmxt" } } */
-/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" 
} } */
-/* { dg-options "-O -mno-apcs-frame -mcpu=iwmmxt -mabi=iwmmxt" } */
-/* { dg-require-effective-target arm32 } */
-/* { dg-require-effective-target arm_iwmmxt_ok } */
-/* { dg-final { scan-assembler "push.*ip,\[ ]*pc" } } */
-/* { dg-skip-if "r9 is reserved in FDPIC" { arm*-*-uclinuxfdpiceabi } "*" "" } 
*/
-
-/* This function uses all the call-saved registers, namely r4, r5, r6,
-   r7, r8, r9, sl, fp.  Since we also save lr, that leaves an odd
-   number of registers, and the compiler will push ip to align the
-   stack.  Make sure that we restore ip into ip, not into sp as is
-   done when using a frame pointer.  The -mno-apcs-frame option
-   permits the frame pointer to be used as an ordinary register.  */
-
-void
-foo(void)
-{
-  __asm volatile ("" : : :
- "r4", "r5", "r6", "r7", "r8", "r9", "sl", "fp", "lr");
-}
diff --git a/gcc/testsuite/gcc.target/arm/mmx-2.c 
b/gcc/testsuite/gcc.target/arm/mmx-2.c
deleted file mode 100644
index 0540f659d1aa..
--- a/gcc/testsuite/gcc.target/arm/mmx-2.c
+++ /dev/null
@@ -1,166 +0,0 @@
-/* { dg-do compile } */
-/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mcpu=*" } { 
"-mcpu=iwmmxt" } } */
-/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mabi=*" } { 
"-mabi=iwmmxt" } } */
-/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-march=*" } { 
"-march=iwmmxt" } } */
-/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" 
} } */
-/* { dg-require-effective-target arm32 } */
-/* { dg-require-effective-target arm_iwmmxt_ok } */
-/* { dg-options "-mcpu=iwmmxt -flax-vector-conversions -std=gnu99" } */
-
-/* Internal data types for implementing the intrinsics.  */
-typedef int __v2si __attribute__ ((vector_size (8)));
-typedef short __v4hi __attribute__ ((vector_size (8)));
-typedef signed char __v8qi __attribute__ ((vector_size (8)));
-
-void
-foo(void)
-{
-  volatile int isink;
-  volatile long long llsink;
-  volatile __v8qi v8sink;
-  volatile __v4hi v4sink;
-  volatile __v2si v2sink;
-
-  isink = __builtin_arm_getwcgr0 ();
-  __builtin_arm_setwcgr0 (isink);
-  isink = __builtin_arm_getwcgr1 ();
-  __builtin_arm_setwcgr1 (isink);
-  isink = __builtin_arm_getwcgr2 ();
-  __builtin_arm_setwcgr2 (isink);
-  isink = __builtin_arm_getwcgr3 ();
-  __builtin_arm_setwcgr3 (isink);
-
-  isink = __builtin_arm_textrmsb (v8sink, 0);
-  isink = __builtin_arm_textrmsh (v4sink, 0);
-  isink = __builtin_arm_textrmsw (v2sink, 0);
-  isink = __builtin_arm_textrmub (v8sink, 0);
-  isink = __builtin_arm_textrmuh (v4sink, 0);
-  isink = __builtin_arm_textrmuw (v2sink, 0);
-  v8sink = __builtin_arm_tinsrb (v8sink, isink, 0);
-  v4sink = __builtin_arm_tinsrh (v4sink, isink, 0);
-  v2sink = __builtin_arm_tinsrw (v2sink, isink, 0);
-  llsink = __builtin_arm_tmia (llsink, isink, isink);
-  llsink = __builtin_arm_tmiabb (llsink, isink, isink);
-  llsink = __builtin_arm_tmiabt (llsink, isink, isink);
-  llsink = __builtin_arm_tmiaph (llsink, isink, isink);
-  llsink = __builtin_arm_tmiatb (llsink, isink, isink);
-  llsink = __builtin_arm_tmiatt (llsink, isink, isink);
-  isink = __builtin_arm_tmovmskb (v8sink);
-  isink = __builti

[gcc r16-543] arm: treat -mcpu/arch=iwmmxt{,2} like XScale

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:38179738abf34897eb03e17426c0507a595c9862

commit r16-543-g38179738abf34897eb03e17426c0507a595c9862
Author: Richard Earnshaw 
Date:   Mon Apr 28 14:55:43 2025 +0100

arm: treat -mcpu/arch=iwmmxt{,2} like XScale

Treat options that select iwmmxt variants as we would for xscale.  We
leave the feature bits in for now, since they are still needed
elsewhere, but they are never enabled.

Also remove the remaining testsuite framework support for iwmmxt,
since this will never trigger now.

gcc/

* config/arm/arm-cpus.in (arch iwmmxt): treat in the same
way as we would treat XScale.
(arch iwmmxt2): Likewise.
(cpu xscale): Add aliases for iwmmxt and iwmmxt2.
(cpu iwmmxt): Delete.
(cpu iwmmxt2): Delete.
* config/arm/arm-generic.md (load_ldsched_xscale): Remove references
to iwmmxt.
(load_ldsched): Likewise.
* config/arm/arm-tables.opt: Regenerated.
* config/arm/arm-tune.md: Regenerated.
* doc/sourcebuild.texi (arm_iwmmxt_ok): Delete.

gcc/testsuite/ChangeLog:

* gcc.target/arm/ivopts.c: Remove test for iwmmxt
* lib/target-supports.exp
(check_effective_target_arm_iwmmxt_ok): Delete.

Diff:
---
 gcc/config/arm/arm-cpus.in| 22 ---
 gcc/config/arm/arm-generic.md |  4 +--
 gcc/config/arm/arm-tables.opt |  6 
 gcc/config/arm/arm-tune.md| 53 +--
 gcc/doc/sourcebuild.texi  |  4 ---
 gcc/testsuite/gcc.target/arm/ivopts.c |  3 +-
 gcc/testsuite/lib/target-supports.exp | 13 -
 7 files changed, 35 insertions(+), 70 deletions(-)

diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index 1939d55b9fdb..b34c441ec76d 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -778,18 +778,19 @@ begin arch armv9-a
  option bf16 add bf16 FP_ARMv8 DOTPROD
 end arch armv9-a
 
+# We no-longer support the iwmmxt{,2} extensions, so treat these like xscale.
 begin arch iwmmxt
- tune for iwmmxt
+ tune for xscale
  tune flags LDSCHED STRONG XSCALE
  base 5TE
- isa ARMv5te xscale iwmmxt
+ isa ARMv5te xscale
 end arch iwmmxt
 
 begin arch iwmmxt2
- tune for iwmmxt2
+ tune for xscale
  tune flags LDSCHED STRONG XSCALE
  base 5TE
- isa ARMv5te xscale iwmmxt iwmmxt2
+ isa ARMv5te xscale
 end arch iwmmxt2
 
 # CPU entries
@@ -924,23 +925,12 @@ end cpu arm10e
 
 begin cpu xscale
  tune flags LDSCHED XSCALE
+ alias iwmmxt iwmmxt2
  architecture armv5te
  isa xscale
  costs xscale
 end cpu xscale
 
-begin cpu iwmmxt
- tune flags LDSCHED XSCALE
- architecture iwmmxt
- costs xscale
-end cpu iwmmxt
-
-begin cpu iwmmxt2
- tune flags LDSCHED XSCALE
- architecture iwmmxt2
- costs xscale
-end cpu iwmmxt2
-
 begin cpu fa606te
  tune flags LDSCHED
  architecture armv5te
diff --git a/gcc/config/arm/arm-generic.md b/gcc/config/arm/arm-generic.md
index c2700568c00a..a8af0e6f2556 100644
--- a/gcc/config/arm/arm-generic.md
+++ b/gcc/config/arm/arm-generic.md
@@ -96,14 +96,14 @@
   (and (eq_attr "generic_sched" "yes")
(and (eq_attr "ldsched" "yes") 
(and (eq_attr "type" "load_byte,load_4")
-(eq_attr "tune" "xscale,iwmmxt,iwmmxt2"
+(eq_attr "tune" "xscale"
   "core")
 
 (define_insn_reservation "load_ldsched" 2
   (and (eq_attr "generic_sched" "yes")
(and (eq_attr "ldsched" "yes") 
(and (eq_attr "type" "load_byte,load_4")
-(eq_attr "tune" "!xscale,iwmmxt,iwmmxt2"
+(eq_attr "tune" "!xscale"
   "core")
 
 (define_insn_reservation "load_or_store" 2
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index db7767a2d6cf..544de84df809 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -66,12 +66,6 @@ Enum(processor_type) String(arm10e) Value( TARGET_CPU_arm10e)
 EnumValue
 Enum(processor_type) String(xscale) Value( TARGET_CPU_xscale)
 
-EnumValue
-Enum(processor_type) String(iwmmxt) Value( TARGET_CPU_iwmmxt)
-
-EnumValue
-Enum(processor_type) String(iwmmxt2) Value( TARGET_CPU_iwmmxt2)
-
 EnumValue
 Enum(processor_type) String(fa606te) Value( TARGET_CPU_fa606te)
 
diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md
index a04d1eeb62dd..20b5f932344d 100644
--- a/gcc/config/arm/arm-tune.md
+++ b/gcc/config/arm/arm-tune.md
@@ -25,31 +25,30 @@
fa526,fa626,arm7tdmi,
arm710t,arm9,arm9tdmi,
arm920t,arm10tdmi,arm9e,
-   arm10e,xscale,iwmmxt,
-   iwmmxt2,fa606te,fa626te,
-   fmp626,fa726te,arm926ejs,
-   arm1026ejs,arm1136js,arm1136jfs,
-   arm1176jzs,arm1176jzfs,mpcorenovfp,
-   mpcore,arm1156t2s,arm1156t2fs,
-   cortexm1,cortexm0,cortexm0plus,
-   cortexm1smallmultiply,cortexm0smallmultiply,cortexm0plussmallmultiply,
-   genericv7a,cortexa5,corte

[gcc r16-541] arm: clarify the logic of SECONDARY_(INPUT/OUTPUT)_RELOAD_CLASS

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:a5af89df186d7dbeabf6b337b39d33f8b2784833

commit r16-541-ga5af89df186d7dbeabf6b337b39d33f8b2784833
Author: Richard Earnshaw 
Date:   Mon Apr 28 18:43:49 2025 +0100

arm: clarify the logic of SECONDARY_(INPUT/OUTPUT)_RELOAD_CLASS

The flattened logic of these functions and the complexity of the
numerous clauses makes it very difficult to understand what's written
in these macros.  Additionally, SECONDARY_INPUT_RELOAD_CLASS was not
laid out with the correct formatting.

Add some parenthesis and re-indent to make the logic clearer.

No functional change.

gcc:
* config/arm/arm.h (SECONDARY_OUTPUT_RELOAD_CLASS): Add parentheis
and re-indent.
(SECONDARY_INPUT_RELOAD_CLASS): Likewise.

Diff:
---
 gcc/config/arm/arm.h | 55 +++-
 1 file changed, 29 insertions(+), 26 deletions(-)

diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 08d3f0dae3da..f8a2da32255a 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1460,34 +1460,37 @@ extern const char *fp_sysreg_names[NB_FP_SYSREGS];
 /* Return the register class of a scratch register needed to copy IN into
or out of a register in CLASS in MODE.  If it can be done directly,
NO_REGS is returned.  */
-#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X)  \
-  /* Restrict which direct reloads are allowed for VFP/iWMMXt regs.  */ \
-  ((TARGET_HARD_FLOAT && IS_VFP_CLASS (CLASS)) \
-   ? coproc_secondary_reload_class (MODE, X, FALSE)\
-   : (TARGET_IWMMXT && (CLASS) == IWMMXT_REGS) \
-   ? coproc_secondary_reload_class (MODE, X, TRUE) \
-   : TARGET_32BIT  \
-   ? (((MODE) == HImode && ! arm_arch4 && true_regnum (X) == -1) \
-? GENERAL_REGS : NO_REGS)  \
-   : THUMB_SECONDARY_OUTPUT_RELOAD_CLASS (CLASS, MODE, X))
+#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X)  \
+  /* Restrict which direct reloads are allowed for VFP/iWMMXt regs.  */
\
+  ((TARGET_HARD_FLOAT && IS_VFP_CLASS (CLASS)) \
+   ? coproc_secondary_reload_class (MODE, X, FALSE)\
+   : ((TARGET_IWMMXT && (CLASS) == IWMMXT_REGS)
\
+  ? coproc_secondary_reload_class (MODE, X, TRUE)  \
+  : (TARGET_32BIT  \
+? (((MODE) == HImode && ! arm_arch4 && true_regnum (X) == -1)  \
+   ? GENERAL_REGS  \
+   : NO_REGS)  \
+: THUMB_SECONDARY_OUTPUT_RELOAD_CLASS (CLASS, MODE, X
 
 /* If we need to load shorts byte-at-a-time, then we need a scratch.  */
-#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X)   \
-  /* Restrict which direct reloads are allowed for VFP/iWMMXt regs.  */ \
-  ((TARGET_HARD_FLOAT && IS_VFP_CLASS (CLASS)) \
-? coproc_secondary_reload_class (MODE, X, FALSE) : \
-(TARGET_IWMMXT && (CLASS) == IWMMXT_REGS) ?\
-coproc_secondary_reload_class (MODE, X, TRUE) :\
-   (TARGET_32BIT ? \
-(((CLASS) == IWMMXT_REGS || (CLASS) == IWMMXT_GR_REGS) \
- && CONSTANT_P (X))\
-? GENERAL_REGS :   \
-(((MODE) == HImode && ! arm_arch4  \
-  && (MEM_P (X)\
- || ((REG_P (X) || GET_CODE (X) == SUBREG) \
- && true_regnum (X) == -1)))   \
- ? GENERAL_REGS : NO_REGS) \
-: THUMB_SECONDARY_INPUT_RELOAD_CLASS (CLASS, MODE, X)))
+#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X)   \
+  /* Restrict which direct reloads are allowed for VFP/iWMMXt regs.  */
\
+  ((TARGET_HARD_FLOAT && IS_VFP_CLASS (CLASS)) \
+   ? coproc_secondary_reload_class (MODE, X, FALSE)\
+   : ((TARGET_IWMMXT && (CLASS) == IWMMXT_REGS)
\
+  ? coproc_secondary_reload_class (MODE, X, TRUE)  \
+  : (TARGET_32BIT  \
+? CLASS) == IWMMXT_REGS || (CLASS) == IWMMXT_GR_REGS)  \
+&& CONSTANT_P (X)) \
+   ? GENERAL_REGS  \
+   : (((MODE) == HImode\
+   && ! arm_arch4  \
+   && (MEM_P (X)   \
+   || ((REG_P (X) || GET_CODE (X) == 

[gcc r16-544] arm: remove iWMMX builtins support.

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:3410eadcaa2ac6dce5f4af391e82f83ee3041866

commit r16-544-g3410eadcaa2ac6dce5f4af391e82f83ee3041866
Author: Richard Earnshaw 
Date:   Mon Apr 28 11:03:34 2025 +0100

arm: remove iWMMX builtins support.

This is the first step of removing the various builtins for iwmmxt,
removing the builtins expansion code.  It leaves a lot of code
elsewhere, but we'll clean that up in subsequent patches.

I'm not sure why safe_vector_operand would unconditionally try to
expand to an iwmmxt instruction if passed (const_int 0).  Clearly
that's meaningless on other architectures, but perhaps this can't
happen elsewhere.  Anyway, for now, just mark this as unreachable so
that we'll know about it if it ever happens.

gcc/ChangeLog:

* config/arm/arm-builtins.cc (enum arm_builtins): Delete iWMMX
builtin values.
(bdesc_2arg): Likewise.
(bdesc_1arg): Likewise.
(arm_init_iwmmxt_builtins): Delete.
(arm_init_builtins): Don't call arm_init_iwmmxt_builtins.
(safe_vector_operand): Use __builtin_unreachable instead of emitting
an iwmmxt builtin.
(arm_general_expand_builtin): Remove iWMMX builtins support.

Diff:
---
 gcc/config/arm/arm-builtins.cc | 1276 +---
 1 file changed, 2 insertions(+), 1274 deletions(-)

diff --git a/gcc/config/arm/arm-builtins.cc b/gcc/config/arm/arm-builtins.cc
index c56ab5db985b..0ddc66695097 100644
--- a/gcc/config/arm/arm-builtins.cc
+++ b/gcc/config/arm/arm-builtins.cc
@@ -816,252 +816,6 @@ static arm_builtin_cde_datum cde_builtin_data[] =
 
 enum arm_builtins
 {
-  ARM_BUILTIN_GETWCGR0,
-  ARM_BUILTIN_GETWCGR1,
-  ARM_BUILTIN_GETWCGR2,
-  ARM_BUILTIN_GETWCGR3,
-
-  ARM_BUILTIN_SETWCGR0,
-  ARM_BUILTIN_SETWCGR1,
-  ARM_BUILTIN_SETWCGR2,
-  ARM_BUILTIN_SETWCGR3,
-
-  ARM_BUILTIN_WZERO,
-
-  ARM_BUILTIN_WAVG2BR,
-  ARM_BUILTIN_WAVG2HR,
-  ARM_BUILTIN_WAVG2B,
-  ARM_BUILTIN_WAVG2H,
-
-  ARM_BUILTIN_WACCB,
-  ARM_BUILTIN_WACCH,
-  ARM_BUILTIN_WACCW,
-
-  ARM_BUILTIN_WMACS,
-  ARM_BUILTIN_WMACSZ,
-  ARM_BUILTIN_WMACU,
-  ARM_BUILTIN_WMACUZ,
-
-  ARM_BUILTIN_WSADB,
-  ARM_BUILTIN_WSADBZ,
-  ARM_BUILTIN_WSADH,
-  ARM_BUILTIN_WSADHZ,
-
-  ARM_BUILTIN_WALIGNI,
-  ARM_BUILTIN_WALIGNR0,
-  ARM_BUILTIN_WALIGNR1,
-  ARM_BUILTIN_WALIGNR2,
-  ARM_BUILTIN_WALIGNR3,
-
-  ARM_BUILTIN_TMIA,
-  ARM_BUILTIN_TMIAPH,
-  ARM_BUILTIN_TMIABB,
-  ARM_BUILTIN_TMIABT,
-  ARM_BUILTIN_TMIATB,
-  ARM_BUILTIN_TMIATT,
-
-  ARM_BUILTIN_TMOVMSKB,
-  ARM_BUILTIN_TMOVMSKH,
-  ARM_BUILTIN_TMOVMSKW,
-
-  ARM_BUILTIN_TBCSTB,
-  ARM_BUILTIN_TBCSTH,
-  ARM_BUILTIN_TBCSTW,
-
-  ARM_BUILTIN_WMADDS,
-  ARM_BUILTIN_WMADDU,
-
-  ARM_BUILTIN_WPACKHSS,
-  ARM_BUILTIN_WPACKWSS,
-  ARM_BUILTIN_WPACKDSS,
-  ARM_BUILTIN_WPACKHUS,
-  ARM_BUILTIN_WPACKWUS,
-  ARM_BUILTIN_WPACKDUS,
-
-  ARM_BUILTIN_WADDB,
-  ARM_BUILTIN_WADDH,
-  ARM_BUILTIN_WADDW,
-  ARM_BUILTIN_WADDSSB,
-  ARM_BUILTIN_WADDSSH,
-  ARM_BUILTIN_WADDSSW,
-  ARM_BUILTIN_WADDUSB,
-  ARM_BUILTIN_WADDUSH,
-  ARM_BUILTIN_WADDUSW,
-  ARM_BUILTIN_WSUBB,
-  ARM_BUILTIN_WSUBH,
-  ARM_BUILTIN_WSUBW,
-  ARM_BUILTIN_WSUBSSB,
-  ARM_BUILTIN_WSUBSSH,
-  ARM_BUILTIN_WSUBSSW,
-  ARM_BUILTIN_WSUBUSB,
-  ARM_BUILTIN_WSUBUSH,
-  ARM_BUILTIN_WSUBUSW,
-
-  ARM_BUILTIN_WAND,
-  ARM_BUILTIN_WANDN,
-  ARM_BUILTIN_WOR,
-  ARM_BUILTIN_WXOR,
-
-  ARM_BUILTIN_WCMPEQB,
-  ARM_BUILTIN_WCMPEQH,
-  ARM_BUILTIN_WCMPEQW,
-  ARM_BUILTIN_WCMPGTUB,
-  ARM_BUILTIN_WCMPGTUH,
-  ARM_BUILTIN_WCMPGTUW,
-  ARM_BUILTIN_WCMPGTSB,
-  ARM_BUILTIN_WCMPGTSH,
-  ARM_BUILTIN_WCMPGTSW,
-
-  ARM_BUILTIN_TEXTRMSB,
-  ARM_BUILTIN_TEXTRMSH,
-  ARM_BUILTIN_TEXTRMSW,
-  ARM_BUILTIN_TEXTRMUB,
-  ARM_BUILTIN_TEXTRMUH,
-  ARM_BUILTIN_TEXTRMUW,
-  ARM_BUILTIN_TINSRB,
-  ARM_BUILTIN_TINSRH,
-  ARM_BUILTIN_TINSRW,
-
-  ARM_BUILTIN_WMAXSW,
-  ARM_BUILTIN_WMAXSH,
-  ARM_BUILTIN_WMAXSB,
-  ARM_BUILTIN_WMAXUW,
-  ARM_BUILTIN_WMAXUH,
-  ARM_BUILTIN_WMAXUB,
-  ARM_BUILTIN_WMINSW,
-  ARM_BUILTIN_WMINSH,
-  ARM_BUILTIN_WMINSB,
-  ARM_BUILTIN_WMINUW,
-  ARM_BUILTIN_WMINUH,
-  ARM_BUILTIN_WMINUB,
-
-  ARM_BUILTIN_WMULUM,
-  ARM_BUILTIN_WMULSM,
-  ARM_BUILTIN_WMULUL,
-
-  ARM_BUILTIN_PSADBH,
-  ARM_BUILTIN_WSHUFH,
-
-  ARM_BUILTIN_WSLLH,
-  ARM_BUILTIN_WSLLW,
-  ARM_BUILTIN_WSLLD,
-  ARM_BUILTIN_WSRAH,
-  ARM_BUILTIN_WSRAW,
-  ARM_BUILTIN_WSRAD,
-  ARM_BUILTIN_WSRLH,
-  ARM_BUILTIN_WSRLW,
-  ARM_BUILTIN_WSRLD,
-  ARM_BUILTIN_WRORH,
-  ARM_BUILTIN_WRORW,
-  ARM_BUILTIN_WRORD,
-  ARM_BUILTIN_WSLLHI,
-  ARM_BUILTIN_WSLLWI,
-  ARM_BUILTIN_WSLLDI,
-  ARM_BUILTIN_WSRAHI,
-  ARM_BUILTIN_WSRAWI,
-  ARM_BUILTIN_WSRADI,
-  ARM_BUILTIN_WSRLHI,
-  ARM_BUILTIN_WSRLWI,
-  ARM_BUILTIN_WSRLDI,
-  ARM_BUILTIN_WRORHI,
-  ARM_BUILTIN_WRORWI,
-  ARM_BUILTIN_WRORDI,
-
-  ARM_BUILTIN_WUNPCKIHB,
-  ARM_BUILTIN_WUNPCKIHH,
-  ARM_BUILTIN_WUNPCKIHW,
-  ARM_BUILTIN_WUNPCKILB,
-  ARM_BUILTIN_WUNPCKILH,
-  ARM_BUILTIN_WUNPCKILW,
-
-  ARM_BUILTIN_WUNPCKEHSB,
-  ARM_BUILTIN_WUNPCKEHSH,

[gcc r16-545] arm: Remove iwmmxt patterns.

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:e579f85f3bfead8d224d4e163273db8b09d8d1c5

commit r16-545-ge579f85f3bfead8d224d4e163273db8b09d8d1c5
Author: Richard Earnshaw 
Date:   Mon Apr 28 13:08:38 2025 +0100

arm: Remove iwmmxt patterns.

This patch deletes the patterns relating to iwmmxt and iwmmxt2 and
updates the relevant dependencies.

gcc/ChangeLog:

* config/arm/arm.md: Don't include iwmmxt.md.
* config/arm/t-arm (MD_INCLUDES): Remove iwmmxt*.md.
* config/arm/iwmmxt.md: Removed.
* config/arm/iwmmxt2.md: Removed.
* config/arm/unspecs.md: Remove comment referring to
iwmmxt2.md.
(enum unspec): Remove iWMMXt unspec values.
(enum unspecv): Likewise.
* config/arm/predicates.md (imm_or_reg_operand): Delete.

Diff:
---
 gcc/config/arm/arm.md|2 -
 gcc/config/arm/iwmmxt.md | 1766 --
 gcc/config/arm/iwmmxt2.md|  903 -
 gcc/config/arm/predicates.md |8 +-
 gcc/config/arm/t-arm |2 -
 gcc/config/arm/unspecs.md|   29 -
 6 files changed, 1 insertion(+), 2709 deletions(-)

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 597ef6725bb7..af0564c36a9b 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -13125,8 +13125,6 @@
 
 ;; Vector bits common to IWMMXT, Neon and MVE
 (include "vec-common.md")
-;; Load the Intel Wireless Multimedia Extension patterns
-(include "iwmmxt.md")
 ;; Load the VFP co-processor patterns
 (include "vfp.md")
 ;; Thumb-1 patterns
diff --git a/gcc/config/arm/iwmmxt.md b/gcc/config/arm/iwmmxt.md
deleted file mode 100644
index 0aa5dcd67093..
--- a/gcc/config/arm/iwmmxt.md
+++ /dev/null
@@ -1,1766 +0,0 @@
-;; Patterns for the Intel Wireless MMX technology architecture.
-;; Copyright (C) 2003-2025 Free Software Foundation, Inc.
-;; Contributed by Red Hat.
-
-;; This file is part of GCC.
-
-;; GCC is free software; you can redistribute it and/or modify it under
-;; the terms of the GNU General Public License as published by the Free
-;; Software Foundation; either version 3, or (at your option) any later
-;; version.
-
-;; GCC is distributed in the hope that it will be useful, but WITHOUT
-;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
-;; License for more details.
-
-;; You should have received a copy of the GNU General Public License
-;; along with GCC; see the file COPYING3.  If not see
-;; .
-
-;; Register numbers. Need to sync with FIRST_IWMMXT_GR_REGNUM in arm.h
-(define_constants
-  [(WCGR0   96)
-   (WCGR1   97)
-   (WCGR2   98)
-   (WCGR3   99)
-  ]
-)
-
-(define_insn "tbcstv8qi"
-  [(set (match_operand:V8QI   0 "register_operand" "=y")
-(vec_duplicate:V8QI (match_operand:QI 1 "s_register_operand" "r")))]
-  "TARGET_REALLY_IWMMXT"
-  "tbcstb%?\\t%0, %1"
-  [(set_attr "predicable" "yes")
-   (set_attr "type" "wmmx_tbcst")]
-)
-
-(define_insn "tbcstv4hi"
-  [(set (match_operand:V4HI   0 "register_operand" "=y")
-(vec_duplicate:V4HI (match_operand:HI 1 "s_register_operand" "r")))]
-  "TARGET_REALLY_IWMMXT"
-  "tbcsth%?\\t%0, %1"
-  [(set_attr "predicable" "yes")
-   (set_attr "type" "wmmx_tbcst")]
-)
-
-(define_insn "tbcstv2si"
-  [(set (match_operand:V2SI   0 "register_operand" "=y")
-(vec_duplicate:V2SI (match_operand:SI 1 "s_register_operand" "r")))]
-  "TARGET_REALLY_IWMMXT"
-  "tbcstw%?\\t%0, %1"
-  [(set_attr "predicable" "yes")
-   (set_attr "type" "wmmx_tbcst")]
-)
-
-(define_insn "iwmmxt_iordi3"
-  [(set (match_operand:DI 0 "register_operand" "=y")
-(ior:DI (match_operand:DI 1 "register_operand" "%y")
-   (match_operand:DI 2 "register_operand"  "y")))]
-  "TARGET_REALLY_IWMMXT"
-  "wor%?\\t%0, %1, %2"
-  [(set_attr "predicable" "yes")
-   (set_attr "length" "4")
-   (set_attr "type" "wmmx_wor")]
-)
-
-(define_insn "iwmmxt_xordi3"
-  [(set (match_operand:DI 0 "register_operand" "=y")
-(xor:DI (match_operand:DI 1 "register_operand" "%y")
-   (match_operand:DI 2 "register_operand"  "y")))]
-  "TARGET_REALLY_IWMMXT"
-  "wxor%?\\t%0, %1, %2"
-  [(set_attr "predicable" "yes")
-   (set_attr "length" "4")
-   (set_attr "type" "wmmx_wxor")]
-)
-
-(define_insn "iwmmxt_anddi3"
-  [(set (match_operand:DI 0 "register_operand" "=y")
-(and:DI (match_operand:DI 1 "register_operand" "%y")
-   (match_operand:DI 2 "register_operand"  "y")))]
-  "TARGET_REALLY_IWMMXT"
-  "wand%?\\t%0, %1, %2"
-  [(set_attr "predicable" "yes")
-   (set_attr "length" "4")
-   (set_attr "type" "wmmx_wand")]
-)
-
-(define_insn "iwmmxt_nanddi3"
-  [(set (match_operand:DI 0 "register_operand" "=y")
-(and:DI (match_operand:DI 1 "register_operan

[gcc r16-546] arm: remove IWMMXT checks from MD files.

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:3212ddb58fcfed6424771510ec05b26b8dbff3ae

commit r16-546-g3212ddb58fcfed6424771510ec05b26b8dbff3ae
Author: Richard Earnshaw 
Date:   Mon Apr 28 14:17:41 2025 +0100

arm: remove IWMMXT checks from MD files.

Remove the various checks for TARGET_IWMMXT{,2} and
TARGET_REALLY_IWMMXT{,2} from the remaining machine description files.
These flags can never be true now.

gcc/ChangeLog:

* config/arm/arm.md(attr arch): Remove iwmmxt and iwmmxt2.
Remove checks based on TARGET_REALLY_IWMMXT2 from all split
patterns.
(arm_movdi): Likewise.
(*arm_movt): Likewise.
(arch_enabled): Remove test for iwmmxt2.
* config/arm/constraints.md (y, z): Remove register constraints.
(Uy): Remove memory constraint.
* config/arm/thumb2.md (thumb2_pop_single): Remove check for
IWMMXT.
* config/arm/vec-common.md (mov): Remove check for IWMMXT.
(mul3): Likewise.
(xor3): Likewise.
(2): Likewise.
(@movmisalign): Likewise.
(@mve_q_): Likewise.
(vashl3): Likewise.
(vashr3): Likewise.
(vlshr3): Likewise.
(uavg3_ceil): Likewise.

Diff:
---
 gcc/config/arm/arm.md | 15 ---
 gcc/config/arm/constraints.md | 18 +++---
 gcc/config/arm/thumb2.md  |  2 +-
 gcc/config/arm/vec-common.md  | 31 ---
 4 files changed, 20 insertions(+), 46 deletions(-)

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index af0564c36a9b..ce1b987b2415 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -149,7 +149,7 @@
 ; This attribute is used to compute attribute "enabled",
 ; use type "any" to enable an alternative in all cases.
 (define_attr "arch" "any, a, t, 32, t1, t2, v6,nov6, v6t2, \
-v8mb, fix_vlldm, iwmmxt, iwmmxt2, armv6_or_vfpv3, \
+v8mb, fix_vlldm, armv6_or_vfpv3, \
 neon, mve"
   (const_string "any"))
 
@@ -197,10 +197,6 @@
  (match_test "fix_vlldm"))
 (const_string "yes")
 
-(and (eq_attr "arch" "iwmmxt2")
- (match_test "TARGET_REALLY_IWMMXT2"))
-(const_string "yes")
-
 (and (eq_attr "arch" "armv6_or_vfpv3")
  (match_test "arm_arch6 || TARGET_VFP3"))
 (const_string "yes")
@@ -2893,14 +2889,12 @@
 ;; Split DImode and, ior, xor operations.  Simply perform the logical
 ;; operation on the upper and lower halves of the registers.
 ;; This is needed for atomic operations in arm_split_atomic_op.
-;; Avoid splitting IWMMXT instructions.
 (define_split
   [(set (match_operand:DI 0 "s_register_operand" "")
(match_operator:DI 6 "logical_binary_operator"
  [(match_operand:DI 1 "s_register_operand" "")
   (match_operand:DI 2 "s_register_operand" "")]))]
-  "TARGET_32BIT && reload_completed
-   && ! IS_IWMMXT_REGNUM (REGNO (operands[0]))"
+  "TARGET_32BIT && reload_completed"
   [(set (match_dup 0) (match_op_dup:SI 6 [(match_dup 1) (match_dup 2)]))
(set (match_dup 3) (match_op_dup:SI 6 [(match_dup 4) (match_dup 5)]))]
   "
@@ -6345,7 +6339,6 @@
   "TARGET_32BIT
&& !(TARGET_HARD_FLOAT)
&& !(TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT)
-   && !TARGET_IWMMXT
&& (   register_operand (operands[0], DImode)
|| register_operand (operands[1], DImode))"
   "*
@@ -6554,7 +6547,7 @@
 (define_insn "*arm_movsi_insn"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,rk,m")
(match_operand:SI 1 "general_operand"  "rk, I,K,j,mi,rk"))]
-  "TARGET_ARM && !TARGET_IWMMXT && !TARGET_HARD_FLOAT
+  "TARGET_ARM && !TARGET_HARD_FLOAT
&& (   register_operand (operands[0], SImode)
|| register_operand (operands[1], SImode))"
   "@
@@ -13123,7 +13116,7 @@
   [(set_attr "conds" "unconditional")
(set_attr "type" "nop")])
 
-;; Vector bits common to IWMMXT, Neon and MVE
+;; Vector bits common to Neon and MVE
 (include "vec-common.md")
 ;; Load the VFP co-processor patterns
 (include "vfp.md")
diff --git a/gcc/config/arm/constraints.md b/gcc/config/arm/constraints.md
index 9f1a37aa5d49..24743a82356b 100644
--- a/gcc/config/arm/constraints.md
+++ b/gcc/config/arm/constraints.md
@@ -19,11 +19,12 @@
 ;; .
 
 ;; The following register constraints have been used:
-;; - in ARM/Thumb-2 state: t, w, x, y, z
+;; - in ARM/Thumb-2 state: t, w, x
 ;; - in Thumb state: h, b
 ;; - in both states: l, c, k, q, Cs, Ts, US
 ;; In ARM state, 'l' is an alias for 'r'
 ;; 'f' and 'v' were previously used for FPA and MAVERICK registers.
+;; 'y' and 'z' were previously used for iWMMX registers (removed after gcc-15)
 
 ;; The following normal constraints have been used:
 ;; in ARM/Thumb-2 state: G, I, j, J, K, L, M
@@ -39,7 +40,7 @@
 ;; in all states: Pg
 
 ;; The following memory constraints have been used:
-;

[gcc r16-552] arm: remove most remaining iwmmxt code.

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:f9d24c4d722e0f53e2e67ff5a42169b4de6dc88a

commit r16-552-gf9d24c4d722e0f53e2e67ff5a42169b4de6dc88a
Author: Richard Earnshaw 
Date:   Wed Apr 30 17:12:52 2025 +0100

arm: remove most remaining iwmmxt code.

Remove most of the remaining code for iWMMXT support, except for the
register allocation table entries.

gcc/ChangeLog:

* config/arm/arm-cpus.in (feature iwmmxt, feature iwmmxt2):  Delete.
* config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): 
Delete.
(arm_output_iwmmxt_tinsr): Delete.
(arm_arch_iwmmxt): Delete.
(arm_arch_iwmmxt2): Delete.
* config/arm/arm.h (TARGET_IWMMXT): Delete.
(TARGET_IWMMXT2): Delete.
(TARGET_REALLY_IWMMXT): Delete.
(TARGET_REALLY_IWMMXT2): Delete.
(VALID_IWMMXT_REG_MODE): Delete.
(ARM_HAVE_V8QI_ARITH): Remove iWMMXT.
(ARM_HAVE_V4HI_ARITH): Likewise.
(ARM_HAVE_V2SI_ARITH): Likewise.
(ARM_HAVE_V8QI_LDST): Likewise.
(ARM_HAVE_V4HI_LDST): Likewise.
(ARM_HAVE_V2SI_LDST): Likewise.
(SECONDARY_OUTPUT_RELOAD_CLASS):  Remove iWMMXT cases.
(SECONDARY_INPUT_RELOAD_CLASS): Likewise.
* config/arm/arm.cc (arm_arch_iwmmxt): Delete.
(arm_arch_iwmmxt2): Delete.
(arm_option_reconfigure_globals): Don't initialize them.
(arm_register_move_cost): Remove costs for iwmmxt.
(struct minipool_node):  Update comment.
(output_move_double): Likewise
(output_return_instruction): Likewise.
(arm_print_operand, cases 'U' and 'w'): Report an error if
used.
(arm_regno_class): Remove iWMMXT cases.
(arm_debugger_regno): Remove iWMMXT cases.
(arm_output_iwmmxt_shift_immediate): Delete.
(arm_output_iwmmxt_tinsr): Delete.

Diff:
---
 gcc/config/arm/arm-cpus.in  |   6 --
 gcc/config/arm/arm-protos.h |   8 --
 gcc/config/arm/arm.cc   | 174 +++-
 gcc/config/arm/arm.h|  69 ++
 4 files changed, 32 insertions(+), 225 deletions(-)

diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index b34c441ec76d..7f5a8c670b63 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -102,12 +102,6 @@ define feature armv8
 # ARMv8 CRC32 instructions.
 define feature crc32
 
-# XScale v2 (Wireless MMX).
-define feature iwmmxt
-
-# XScale Wireless MMX2.
-define feature iwmmxt2
-
 # Architecture rel 8.1.
 define feature armv8_1
 
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 254c7310794b..ff7e7658f912 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -190,8 +190,6 @@ extern void arm_output_multireg_pop (rtx *, bool, rtx, 
bool, bool);
 extern void arm_set_return_address (rtx, rtx);
 extern int arm_eliminable_register (rtx);
 extern const char *arm_output_shift(rtx *, int);
-extern const char *arm_output_iwmmxt_shift_immediate (const char *, rtx *, 
bool);
-extern const char *arm_output_iwmmxt_tinsr (rtx *);
 extern unsigned int arm_sync_loop_insns (rtx , rtx *);
 extern int arm_attr_length_push_multi(rtx, rtx);
 extern int arm_attr_length_pop_multi(rtx *, bool, bool);
@@ -475,12 +473,6 @@ extern int arm_ld_sched;
 /* Nonzero if this chip is a StrongARM.  */
 extern int arm_tune_strongarm;
 
-/* Nonzero if this chip supports Intel Wireless MMX technology.  */
-extern int arm_arch_iwmmxt;
-
-/* Nonzero if this chip supports Intel Wireless MMX2 technology.  */
-extern int arm_arch_iwmmxt2;
-
 /* Nonzero if this chip is an XScale.  */
 extern int arm_arch_xscale;
 
diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
index 78a1f744ec4e..8737c223391d 100644
--- a/gcc/config/arm/arm.cc
+++ b/gcc/config/arm/arm.cc
@@ -948,12 +948,6 @@ int arm_ld_sched = 0;
 /* Nonzero if this chip is a StrongARM.  */
 int arm_tune_strongarm = 0;
 
-/* Nonzero if this chip supports Intel Wireless MMX technology.  */
-int arm_arch_iwmmxt = 0;
-
-/* Nonzero if this chip supports Intel Wireless MMX2 technology.  */
-int arm_arch_iwmmxt2 = 0;
-
 /* Nonzero if this chip is an XScale.  */
 int arm_arch_xscale = 0;
 
@@ -3919,8 +3913,6 @@ arm_option_reconfigure_globals (void)
   arm_arch_thumb1 = bitmap_bit_p (arm_active_target.isa, isa_bit_thumb);
   arm_arch_thumb2 = bitmap_bit_p (arm_active_target.isa, isa_bit_thumb2);
   arm_arch_xscale = bitmap_bit_p (arm_active_target.isa, isa_bit_xscale);
-  arm_arch_iwmmxt = bitmap_bit_p (arm_active_target.isa, isa_bit_iwmmxt);
-  arm_arch_iwmmxt2 = bitmap_bit_p (arm_active_target.isa, isa_bit_iwmmxt2);
   arm_arch_thumb_hwdiv = bitmap_bit_p (arm_active_target.isa, isa_bit_tdiv);
   arm_arch_arm_hwdiv = bitmap_bit_p (arm_active_target.isa, isa_bit_adiv);
   arm_arch_crc = bitmap_bit_p (arm_active_target.isa, isa_bit_crc32);
@@ -12378,11 +1237

[gcc r16-553] arm: remove iwmmxt registers from allocator tables

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:d0e86eba23d755fbd12c8ab35f827863b12131ea

commit r16-553-gd0e86eba23d755fbd12c8ab35f827863b12131ea
Author: Richard Earnshaw 
Date:   Wed Apr 30 18:13:43 2025 +0100

arm: remove iwmmxt registers from allocator tables

These registers can no-longer be allocated, so remove them from the
various tables.

gcc/ChangeLog:

* config/arm/aout.h (REGISTER_NAMES): Remove iwmmxt registers.
* config/arm/arm.h (FIRST_IWMMXT_REGNUM): Delete.
(LAST_IWMMXT_REGNUM): Delete.
(FIRST_IWMMXT_GR_REGNUM): Delete.
(LAST_IWMMXT_GR_REGNUM): Delete.
(IS_IWMMXT_REGNUM):  Delete.
(IS_IWMMXT_GR_REGNUM): Delete.
(FRAME_POINTER_REGNUM): Define relative to CC_REGNUM.
(ARG_POINTER_REGNUM): Define relative to FRAME_POINTER_REGNUM.
(FIRST_PSEUDO_REGISTER): Adjust.
(WREG): Delete.
(WGREG): Delete.
(REG_ALLOC_ORDER): Remove iWMMX registers.
(enum reg_class): Remove iWMMX register classes.
(REG_CLASS_NAMES): Likewise.
(REG_CLASS_CONTENTS):  Remove iWMMX registers.
* config/arm/arm.md (CC_REGNUM): Adjust value.
(VFPCC_RENGUM): Likewise.
(APSRQ_REGNUM): Likewise.
(APSRGE_REGNUM): Likewise.
(VPR_REGNUM): Likewise.
(RA_AUTH_CODE): Likewise.

Diff:
---
 gcc/config/arm/aout.h |  5 
 gcc/config/arm/arm.h  | 83 +++
 gcc/config/arm/arm.md | 12 
 3 files changed, 30 insertions(+), 70 deletions(-)

diff --git a/gcc/config/arm/aout.h b/gcc/config/arm/aout.h
index cdce361e078d..a9b0dfaec383 100644
--- a/gcc/config/arm/aout.h
+++ b/gcc/config/arm/aout.h
@@ -69,11 +69,6 @@
   "d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23",  \
   "d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27",  \
   "d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31",  \
-  "wr0",   "wr1",   "wr2",   "wr3",\
-  "wr4",   "wr5",   "wr6",   "wr7",\
-  "wr8",   "wr9",   "wr10",  "wr11",   \
-  "wr12",  "wr13",  "wr14",  "wr15",   \
-  "wcgr0", "wcgr1", "wcgr2", "wcgr3",  \
   "cc", "vfpcc", "sfp", "afp", "apsrq", "apsrge", "p0",\
   "ra_auth_code"   \
 }
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 1166171e5937..2e9d678d32a2 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -842,10 +842,6 @@ extern const int arm_arch_cde_coproc_bits[];
   1,1,1,1,1,1,1,1, \
   1,1,1,1,1,1,1,1, \
   1,1,1,1,1,1,1,1, \
-  /* IWMMXT regs.  */  \
-  1,1,1,1,1,1,1,1, \
-  1,1,1,1,1,1,1,1, \
-  1,1,1,1, \
   /* Specials.  */ \
   1,1,1,1,1,1,1,1  \
 }
@@ -872,10 +868,6 @@ extern const int arm_arch_cde_coproc_bits[];
   1,1,1,1,1,1,1,1, \
   1,1,1,1,1,1,1,1, \
   1,1,1,1,1,1,1,1, \
-  /* IWMMXT regs.  */  \
-  1,1,1,1,1,1,1,1, \
-  1,1,1,1,1,1,1,1, \
-  1,1,1,1, \
   /* Specials.  */ \
   1,1,1,1,1,1,1,1  \
 }
@@ -997,23 +989,11 @@ extern const int arm_arch_cde_coproc_bits[];
 /* Register to use for pushing function arguments.  */
 #define STACK_POINTER_REGNUM   SP_REGNUM
 
-#define FIRST_IWMMXT_REGNUM(LAST_HI_VFP_REGNUM + 1)
-#define LAST_IWMMXT_REGNUM (FIRST_IWMMXT_REGNUM + 15)
-
-/* Need to sync with WCGR in iwmmxt.md.  */
-#define FIRST_IWMMXT_GR_REGNUM (LAST_IWMMXT_REGNUM + 1)
-#define LAST_IWMMXT_GR_REGNUM  (FIRST_IWMMXT_GR_REGNUM + 3)
-
-#define IS_IWMMXT_REGNUM(REGNUM) \
-  (((REGNUM) >= FIRST_IWMMXT_REGNUM) && ((REGNUM) <= LAST_IWMMXT_REGNUM))
-#define IS_IWMMXT_GR_REGNUM(REGNUM) \
-  (((REGNUM) >= FIRST_IWMMXT_GR_REGNUM) && ((REGNUM) <= LAST_IWMMXT_GR_REGNUM))
-
 /* Base register for access to local variables of the function.  */
-#define FRAME_POINTER_REGNUM   102
+#define FRAME_POINTER_REGNUM   (CC_REGNUM + 2)
 
 /* Base register for access to arguments of the function.  */
-#define ARG_POINTER_REGNUM 103
+#define ARG_POINTER_REGNUM (FRAME_POINTER_REGNUM + 1)
 
 #define FIRST_VFP_REGNUM   16
 #define D7_VFP_REGNUM  (FIRST_VFP_REGNUM + 15)
@@ -1054,9 +1034,8 @@ extern const int arm_arch_cde_coproc_bits[];
 
 /* The number of hard registers is 16 ARM + 1 CC + 1 SFP + 1 AFP
+ 1 APSRQ + 1 APSRGE + 1 VPR + 1 Pseudo register to save PAC.  */
-/* Intel Wireless MMX Technology registers add 16 + 4 more.  */
 /* VFP (VFP3) adds 32 (64) + 1 VFPCC.  */
-#define FIRST_PSEUDO_REGISTER   108
+#define FIRST_PSEUDO_REGISTER   88
 
 #define DWARF_PAC_REGNUM 143
 
@@ -1222,8 +1201,6 @@ extern int arm_regs_in_sequence[];
function.  */
 
 #define VREG(X)  (FIRST

[gcc r16-554] arm: doc: cleanup documentation references to iWMMXT extensions

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:9416969d795003c06714f7663bf670efd7efdd46

commit r16-554-g9416969d795003c06714f7663bf670efd7efdd46
Author: Richard Earnshaw 
Date:   Thu May 8 10:33:55 2025 +0100

arm: doc: cleanup documentation references to iWMMXT extensions

Now that the iwmmxt extensions have been removed, clean up the
references to it in the documentation.  We keep the
-mcpu/-mtune/-march references as these are still accepted by the
driver.

gcc/ChangeLog:

* doc/extend.texi: Remove the iwmmxt intrinsics.
* doc/md.texi: Remove the iwmmxt-related constraints.

Diff:
---
 gcc/doc/extend.texi | 155 
 gcc/doc/md.texi |   9 ---
 2 files changed, 164 deletions(-)

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 212d24875584..40ccf22b29f4 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -17905,7 +17905,6 @@ instructions, but allow the compiler to schedule those 
calls.
 * Alpha Built-in Functions::
 * ARC Built-in Functions::
 * ARC SIMD Built-in Functions::
-* ARM iWMMXt Built-in Functions::
 * ARM C Language Extensions (ACLE)::
 * ARM Floating Point Status and Control Intrinsics::
 * ARM ARMv8-M Security Extensions::
@@ -18521,160 +18520,6 @@ _v4hi __builtin_arc_vaddsub4h (__v4hi, __v4hi);
 _v4hi __builtin_arc_vsubadd4h (__v4hi, __v4hi);
 @end example
 
-@node ARM iWMMXt Built-in Functions
-@subsection ARM iWMMXt Built-in Functions
-
-These built-in functions are available for the ARM family of
-processors when the @option{-mcpu=iwmmxt} switch is used:
-
-@smallexample
-typedef int v2si __attribute__ ((vector_size (8)));
-typedef short v4hi __attribute__ ((vector_size (8)));
-typedef char v8qi __attribute__ ((vector_size (8)));
-
-int __builtin_arm_getwcgr0 (void);
-void __builtin_arm_setwcgr0 (int);
-int __builtin_arm_getwcgr1 (void);
-void __builtin_arm_setwcgr1 (int);
-int __builtin_arm_getwcgr2 (void);
-void __builtin_arm_setwcgr2 (int);
-int __builtin_arm_getwcgr3 (void);
-void __builtin_arm_setwcgr3 (int);
-int __builtin_arm_textrmsb (v8qi, int);
-int __builtin_arm_textrmsh (v4hi, int);
-int __builtin_arm_textrmsw (v2si, int);
-int __builtin_arm_textrmub (v8qi, int);
-int __builtin_arm_textrmuh (v4hi, int);
-int __builtin_arm_textrmuw (v2si, int);
-v8qi __builtin_arm_tinsrb (v8qi, int, int);
-v4hi __builtin_arm_tinsrh (v4hi, int, int);
-v2si __builtin_arm_tinsrw (v2si, int, int);
-long long __builtin_arm_tmia (long long, int, int);
-long long __builtin_arm_tmiabb (long long, int, int);
-long long __builtin_arm_tmiabt (long long, int, int);
-long long __builtin_arm_tmiaph (long long, int, int);
-long long __builtin_arm_tmiatb (long long, int, int);
-long long __builtin_arm_tmiatt (long long, int, int);
-int __builtin_arm_tmovmskb (v8qi);
-int __builtin_arm_tmovmskh (v4hi);
-int __builtin_arm_tmovmskw (v2si);
-long long __builtin_arm_waccb (v8qi);
-long long __builtin_arm_wacch (v4hi);
-long long __builtin_arm_waccw (v2si);
-v8qi __builtin_arm_waddb (v8qi, v8qi);
-v8qi __builtin_arm_waddbss (v8qi, v8qi);
-v8qi __builtin_arm_waddbus (v8qi, v8qi);
-v4hi __builtin_arm_waddh (v4hi, v4hi);
-v4hi __builtin_arm_waddhss (v4hi, v4hi);
-v4hi __builtin_arm_waddhus (v4hi, v4hi);
-v2si __builtin_arm_waddw (v2si, v2si);
-v2si __builtin_arm_waddwss (v2si, v2si);
-v2si __builtin_arm_waddwus (v2si, v2si);
-v8qi __builtin_arm_walign (v8qi, v8qi, int);
-long long __builtin_arm_wand(long long, long long);
-long long __builtin_arm_wandn (long long, long long);
-v8qi __builtin_arm_wavg2b (v8qi, v8qi);
-v8qi __builtin_arm_wavg2br (v8qi, v8qi);
-v4hi __builtin_arm_wavg2h (v4hi, v4hi);
-v4hi __builtin_arm_wavg2hr (v4hi, v4hi);
-v8qi __builtin_arm_wcmpeqb (v8qi, v8qi);
-v4hi __builtin_arm_wcmpeqh (v4hi, v4hi);
-v2si __builtin_arm_wcmpeqw (v2si, v2si);
-v8qi __builtin_arm_wcmpgtsb (v8qi, v8qi);
-v4hi __builtin_arm_wcmpgtsh (v4hi, v4hi);
-v2si __builtin_arm_wcmpgtsw (v2si, v2si);
-v8qi __builtin_arm_wcmpgtub (v8qi, v8qi);
-v4hi __builtin_arm_wcmpgtuh (v4hi, v4hi);
-v2si __builtin_arm_wcmpgtuw (v2si, v2si);
-long long __builtin_arm_wmacs (long long, v4hi, v4hi);
-long long __builtin_arm_wmacsz (v4hi, v4hi);
-long long __builtin_arm_wmacu (long long, v4hi, v4hi);
-long long __builtin_arm_wmacuz (v4hi, v4hi);
-v4hi __builtin_arm_wmadds (v4hi, v4hi);
-v4hi __builtin_arm_wmaddu (v4hi, v4hi);
-v8qi __builtin_arm_wmaxsb (v8qi, v8qi);
-v4hi __builtin_arm_wmaxsh (v4hi, v4hi);
-v2si __builtin_arm_wmaxsw (v2si, v2si);
-v8qi __builtin_arm_wmaxub (v8qi, v8qi);
-v4hi __builtin_arm_wmaxuh (v4hi, v4hi);
-v2si __builtin_arm_wmaxuw (v2si, v2si);
-v8qi __builtin_arm_wminsb (v8qi, v8qi);
-v4hi __builtin_arm_wminsh (v4hi, v4hi);
-v2si __builtin_arm_wminsw (v2si, v2si);
-v8qi __builtin_arm_wminub (v8qi, v8qi);
-v4hi __builtin_arm_wminuh (v4hi, v4hi);
-v2si __builtin_arm_wminuw (v2si, v2si);
-v4hi __builtin_arm_wmulsm (v4hi, v4hi);
-v4hi __builtin_arm_wmulul (v4hi, v4hi);
-v4hi __builtin_arm_wmulum (v4hi, v4hi);
-long long

[gcc r16-548] arm: Remove iwmmxt support from arm.cc

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:dd15319be3a8de4e22dbd5475e52f44d149a69bb

commit r16-548-gdd15319be3a8de4e22dbd5475e52f44d149a69bb
Author: Richard Earnshaw 
Date:   Mon Apr 28 17:48:51 2025 +0100

arm: Remove iwmmxt support from arm.cc

TARGET_IWMMXT, TARGET_IWMMXT2 and their _REALLY_ equivalents are never
true now, so the code using them can be simplified.

gcc/ChangeLog:

* config/arm/arm.cc (arm_option_check_internal): Remove
IWMMXT check.
(arm_options_perform_arch_sanity_checks): Likewise.
(use_return_insn): Likewise.
(arm_init_cumulative_args): Likewise.
(arm_legitimate_index_p): Likewise.
(thumb2_legitimate_index_p): Likewise.
(arm_compute_save_core_reg_mask): Likewise.
(output_return_instruction): Likewise.
(arm_compute_frame_layout): Likewise.
(arm_save_coproc_regs): Likewise.
(arm_hard_regno_mode_ok): Likewise.
(arm_expand_epilogue_apcs_frame): Likewise.
(arm_expand_epilogue): Likewise.
(arm_vector_mode_supported_p): Likewise.
(arm_preferred_simd_mode): Likewise.
(arm_conditional_register_usage): Likewise.

Diff:
---
 gcc/config/arm/arm.cc | 183 +-
 1 file changed, 2 insertions(+), 181 deletions(-)

diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
index 663b58a58118..78a1f744ec4e 100644
--- a/gcc/config/arm/arm.cc
+++ b/gcc/config/arm/arm.cc
@@ -2970,11 +2970,6 @@ arm_option_check_internal (struct gcc_options *opts)
 {
   int flags = opts->x_target_flags;
 
-  /* iWMMXt and NEON are incompatible.  */
-  if (TARGET_IWMMXT
-  && bitmap_bit_p (arm_active_target.isa, isa_bit_neon))
-error ("iWMMXt and NEON are incompatible");
-
   /* Make sure that the processor choice does not conflict with any of the
  other command line choices.  */
   if (TARGET_ARM_P (flags)
@@ -2997,10 +2992,6 @@ arm_option_check_internal (struct gcc_options *opts)
 warning (0, "%<-g%> with %<-mno-apcs-frame%> may not give sensible "
 "debugging");
 
-  /* iWMMXt unsupported under Thumb mode.  */
-  if (TARGET_THUMB_P (flags) && TARGET_IWMMXT)
-error ("iWMMXt unsupported under Thumb mode");
-
   if (TARGET_HARD_TP && TARGET_THUMB1_P (flags))
 error ("cannot use %<-mtp=cp15%> with 16-bit Thumb");
 
@@ -3997,9 +3988,6 @@ arm_options_perform_arch_sanity_checks (void)
   if (arm_arch5t)
 target_flags &= ~MASK_INTERWORK;
 
-  if (TARGET_IWMMXT && !ARM_DOUBLEWORD_ALIGN)
-error ("iwmmxt requires an AAPCS compatible ABI for proper operation");
-
   /* BPABI targets use linker tricks to allow interworking on cores
  without thumb support.  */
   if (TARGET_INTERWORK
@@ -4550,11 +4538,6 @@ use_return_insn (int iscond, rtx sibling)
   if (reg_needs_saving_p (regno))
return 0;
 
-  if (TARGET_REALLY_IWMMXT)
-for (regno = FIRST_IWMMXT_REGNUM; regno <= LAST_IWMMXT_REGNUM; regno++)
-  if (reg_needs_saving_p (regno))
-   return 0;
-
   return 1;
 }
 
@@ -7188,19 +7171,6 @@ arm_init_cumulative_args (CUMULATIVE_ARGS *pcum, tree 
fntype,
  named_count avoids having to change the way arm handles 'named' */
   pcum->named_count = 0;
   pcum->nargs = 0;
-
-  if (TARGET_REALLY_IWMMXT && fntype)
-{
-  tree fn_arg;
-
-  for (fn_arg = TYPE_ARG_TYPES (fntype);
-  fn_arg;
-  fn_arg = TREE_CHAIN (fn_arg))
-   pcum->named_count += 1;
-
-  if (! pcum->named_count)
-   pcum->named_count = INT_MAX;
-}
 }
 
 /* Return 2 if double word alignment is required for argument passing,
@@ -8868,12 +8838,6 @@ arm_legitimate_index_p (machine_mode mode, rtx index, 
RTX_CODE outer,
&& INTVAL (index) > -1024
&& (INTVAL (index) & 3) == 0);
 
-  if (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (mode))
-return (code == CONST_INT
-   && INTVAL (index) < 1024
-   && INTVAL (index) > -1024
-   && (INTVAL (index) & 3) == 0);
-
   if (GET_MODE_SIZE (mode) <= 4
   && ! (arm_arch4
&& (mode == HImode
@@ -8953,17 +8917,6 @@ thumb2_legitimate_index_p (machine_mode mode, rtx index, 
int strict_p)
&& INTVAL (index) > -256
&& (INTVAL (index) & 3) == 0);
 
-  if (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (mode))
-{
-  /* For DImode assume values will usually live in core regs
-and only allow LDRD addressing modes.  */
-  if (!TARGET_LDRD || mode != DImode)
-   return (code == CONST_INT
-   && INTVAL (index) < 1024
-   && INTVAL (index) > -1024
-   && (INTVAL (index) & 3) == 0);
-}
-
   /* For quad modes, we restrict the constant offset to be slightly less
  than what the instruction format permits.  We do this because for
  quad mode moves, we will actually decompose them into two separate
@@ -21414,34 +21367,6 @@ arm_compute_save_co

[gcc r16-549] arm: remove iwmmxt-related attributes from machine description

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:d88614d942264ade6a002c4e0a741341477dce34

commit r16-549-gd88614d942264ade6a002c4e0a741341477dce34
Author: Richard Earnshaw 
Date:   Wed Apr 30 11:45:28 2025 +0100

arm: remove iwmmxt-related attributes from machine description

Since we no-longer have any iwmxxt instructions, the iwmmxt-related
attributes can never be set.  Consequently, the marvel-f-iwmmxt
scheduler is redundant as none of the pipes are ever used now.

gcc/ChangeLog:

* config/arm/arm.md (core_cycles): Remove iwmmxt attributes.
* config/arm/types.md (autodetect_type): Likewise.
* config/arm/marvell-f-iwmmxt.md: Removed.
* config/arm/t-arm: Remove marvell-f-iwmmxt.md

Diff:
---
 gcc/config/arm/arm.md  |  14 +--
 gcc/config/arm/marvell-f-iwmmxt.md | 189 -
 gcc/config/arm/t-arm   |   1 -
 gcc/config/arm/types.md| 123 
 4 files changed, 1 insertion(+), 326 deletions(-)

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index ce1b987b2415..7cbff8d3b603 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -358,18 +358,7 @@
 alus_ext, alus_imm, alus_sreg,\
 alus_shift_imm, alus_shift_reg, bfm, csel, rev, logic_imm, logic_reg,\
 logic_shift_imm, logic_shift_reg, logics_imm, logics_reg,\
-logics_shift_imm, logics_shift_reg, extend, shift_imm, float, fcsel,\
-wmmx_wor, wmmx_wxor, wmmx_wand, wmmx_wandn, wmmx_wmov, wmmx_tmcrr,\
-wmmx_tmrrc, wmmx_wldr, wmmx_wstr, wmmx_tmcr, wmmx_tmrc, wmmx_wadd,\
-wmmx_wsub, wmmx_wmul, wmmx_wmac, wmmx_wavg2, wmmx_tinsr, wmmx_textrm,\
-wmmx_wshufh, wmmx_wcmpeq, wmmx_wcmpgt, wmmx_wmax, wmmx_wmin, wmmx_wpack,\
-wmmx_wunpckih, wmmx_wunpckil, wmmx_wunpckeh, wmmx_wunpckel, wmmx_wror,\
-wmmx_wsra, wmmx_wsrl, wmmx_wsll, wmmx_wmadd, wmmx_tmia, wmmx_tmiaph,\
-wmmx_tmiaxy, wmmx_tbcst, wmmx_tmovmsk, wmmx_wacc, wmmx_waligni,\
-wmmx_walignr, wmmx_tandc, wmmx_textrc, wmmx_torc, wmmx_torvsc, wmmx_wsad,\
-wmmx_wabs, wmmx_wabsdiff, wmmx_waddsubhx, wmmx_wsubaddhx, wmmx_wavg4,\
-wmmx_wmulw, wmmx_wqmulm, wmmx_wqmulwm, wmmx_waddbhus, wmmx_wqmiaxy,\
-wmmx_wmiaxy, wmmx_wmiawxy, wmmx_wmerge")
+logics_shift_imm, logics_shift_reg, extend, shift_imm, float, fcsel")
(const_string "single")
(const_string "multi")))
 
@@ -431,7 +420,6 @@
  (const_string "yes")
  (const_string "no"
 
-(include "marvell-f-iwmmxt.md")
 (include "arm-generic.md")
 (include "arm926ejs.md")
 (include "arm1020e.md")
diff --git a/gcc/config/arm/marvell-f-iwmmxt.md 
b/gcc/config/arm/marvell-f-iwmmxt.md
deleted file mode 100644
index c9c7b00f6cbd..
--- a/gcc/config/arm/marvell-f-iwmmxt.md
+++ /dev/null
@@ -1,189 +0,0 @@
-;; Marvell WMMX2 pipeline description
-;; Copyright (C) 2011-2025 Free Software Foundation, Inc.
-;; Written by Marvell, Inc.
-
-;; This file is part of GCC.
-
-;; GCC is free software; you can redistribute it and/or modify it
-;; under the terms of the GNU General Public License as published
-;; by the Free Software Foundation; either version 3, or (at your
-;; option) any later version.
-
-;; GCC is distributed in the hope that it will be useful, but WITHOUT
-;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
-;; License for more details.
-
-;; You should have received a copy of the GNU General Public License
-;; along with GCC; see the file COPYING3.  If not see
-;; .
-
-
-(define_automaton "marvell_f_iwmmxt")
-
-
-;; Pipelines
-
-
-;; This is a 7-stage pipelines:
-;;
-;;MD | MI | ME1 | ME2 | ME3 | ME4 | MW
-;;
-;; There are various bypasses modelled to a greater or lesser extent.
-;;
-;; Latencies in this file correspond to the number of cycles after
-;; the issue stage that it takes for the result of the instruction to
-;; be computed, or for its side-effects to occur.
-
-(define_cpu_unit "mf_iwmmxt_MD" "marvell_f_iwmmxt")
-(define_cpu_unit "mf_iwmmxt_MI" "marvell_f_iwmmxt")
-(define_cpu_unit "mf_iwmmxt_ME1" "marvell_f_iwmmxt")
-(define_cpu_unit "mf_iwmmxt_ME2" "marvell_f_iwmmxt")
-(define_cpu_unit "mf_iwmmxt_ME3" "marvell_f_iwmmxt")
-(define_cpu_unit "mf_iwmmxt_ME4" "marvell_f_iwmmxt")
-(define_cpu_unit "mf_iwmmxt_MW" "marvell_f_iwmmxt")
-
-(define_reservation "mf_iwmmxt_ME"
-  "mf_iwmmxt_ME1,mf_iwmmxt_ME2,mf_iwmmxt_ME3,mf_iwmmxt_ME4"
-)
-
-(define_reservation "mf_iwmmxt_pipeline"
-  "mf_iwmmxt_MD, mf_iwmmxt_MI, mf_iwmmxt_ME, mf_iwmmxt_MW"
-)
-
-;; An attribute to indicate whether our reservations are applicable.
-(define_attr "marvell_f_iwmmxt" "yes,no"
-  (const (if_then_else (symbol_ref "arm_arch_iwmmxt")
-   (const_st

[gcc r16-547] arm: remove support for the iwmmxt ABI variant.

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:5314f159803e10987f12be2bd90a8c3d9e494999

commit r16-547-g5314f159803e10987f12be2bd90a8c3d9e494999
Author: Richard Earnshaw 
Date:   Mon Apr 28 17:15:45 2025 +0100

arm: remove support for the iwmmxt ABI variant.

The iwmmxt ABI is a variant of the ABI that supported passing certain
parameters and results in iwmmxt registers.  But since we no-longer
support the instructions that can read and write these registers, the
ABI variant can no-longer be used.

gcc/ChangeLog:

* config.gcc (arm, --with-abi): Remove iwmmxt abi option.
* config/arm/arm.opt (enum ARM_ABI_IWMMXT): Remove.
* config/arm/arm.h (TARGET_IWMMXT_ABI): Delete.
(enum arm_pcs): Remove ARM_PCS_AAPCS_IWMMXT.
(FUNCTION_ARG_REGNO_P): Remove IWMMXT ABI support.
(CUMULATIVE_ARGS): Remove iwmmxt_nregs.
* config/arm/arm.cc (arm_options_perform_arch_sanity_checks):
Remove IWMMXT ABI checks.
(arm_libcall_value_1): Likewise.
(arm_function_value_regno_p): Likewise.
(arm_apply_result_size): Remove adjustment for IWMMXT ABI.
(arm_function_arg): Remove IWMMXT ABI support.
(arm_arg_partial_bytes): Likewise.
(arm_function_arg_advance): Likewise.
(arm_init_cumulative_args): Don't initialize iwmmxt_nregs.
* doc/invoke.texi (arm -mabi): Remove mention of the iwmmxt
ABI option.
* config/arm/arm-opts.h (enum arm_abi_type): Remove ARM_ABI_IWMMXT.

Diff:
---
 gcc/config.gcc|  2 +-
 gcc/config/arm/arm-opts.h |  1 -
 gcc/config/arm/arm.cc | 44 +++-
 gcc/config/arm/arm.h  |  8 +---
 gcc/config/arm/arm.opt|  3 ---
 gcc/doc/invoke.texi   |  2 +-
 6 files changed, 6 insertions(+), 54 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index afbf82fd2b8f..c9fe996f2f7c 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -4459,7 +4459,7 @@ case "${target}" in
 
case "$with_abi" in
"" \
-   | apcs-gnu | atpcs | aapcs | iwmmxt | aapcs-linux )
+   | apcs-gnu | atpcs | aapcs | aapcs-linux )
#OK
;;
*)
diff --git a/gcc/config/arm/arm-opts.h b/gcc/config/arm/arm-opts.h
index 06a1939d087f..5c543bf52466 100644
--- a/gcc/config/arm/arm-opts.h
+++ b/gcc/config/arm/arm-opts.h
@@ -46,7 +46,6 @@ enum arm_abi_type
   ARM_ABI_APCS,
   ARM_ABI_ATPCS,
   ARM_ABI_AAPCS,
-  ARM_ABI_IWMMXT,
   ARM_ABI_AAPCS_LINUX
 };
 
diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
index 6bdb68aa7881..663b58a58118 100644
--- a/gcc/config/arm/arm.cc
+++ b/gcc/config/arm/arm.cc
@@ -4000,9 +4000,6 @@ arm_options_perform_arch_sanity_checks (void)
   if (TARGET_IWMMXT && !ARM_DOUBLEWORD_ALIGN)
 error ("iwmmxt requires an AAPCS compatible ABI for proper operation");
 
-  if (TARGET_IWMMXT_ABI && !TARGET_IWMMXT)
-error ("iwmmxt abi requires an iwmmxt capable cpu");
-
   /* BPABI targets use linker tricks to allow interworking on cores
  without thumb support.  */
   if (TARGET_INTERWORK
@@ -4043,9 +4040,7 @@ arm_options_perform_arch_sanity_checks (void)
 
   if (TARGET_AAPCS_BASED)
 {
-  if (arm_abi == ARM_ABI_IWMMXT)
-   arm_pcs_default = ARM_PCS_AAPCS_IWMMXT;
-  else if (TARGET_HARD_FLOAT_ABI)
+  if (TARGET_HARD_FLOAT_ABI)
{
  arm_pcs_default = ARM_PCS_AAPCS_VFP;
  if (!bitmap_bit_p (arm_active_target.isa, isa_bit_vfpv2)
@@ -6048,9 +6043,6 @@ arm_libcall_value_1 (machine_mode mode)
 {
   if (TARGET_AAPCS_BASED)
 return aapcs_libcall_value (mode);
-  else if (TARGET_IWMMXT_ABI
-  && arm_vector_mode_supported_p (mode))
-return gen_rtx_REG (mode, FIRST_IWMMXT_REGNUM);
   else
 return gen_rtx_REG (mode, ARG_REGISTER (1));
 }
@@ -6083,9 +6075,7 @@ arm_function_value_regno_p (const unsigned int regno)
   || (TARGET_32BIT
  && TARGET_AAPCS_BASED
  && TARGET_HARD_FLOAT
- && regno == FIRST_VFP_REGNUM)
-  || (TARGET_IWMMXT_ABI
- && regno == FIRST_IWMMXT_REGNUM))
+ && regno == FIRST_VFP_REGNUM))
 return true;
 
   return false;
@@ -6102,8 +6092,6 @@ arm_apply_result_size (void)
 {
   if (TARGET_HARD_FLOAT_ABI)
size += 32;
-  if (TARGET_IWMMXT_ABI)
-   size += 8;
 }
 
   return size;
@@ -6265,7 +6253,6 @@ const struct pcs_attribute_arg
 #if 0
 /* We could recognize these, but changes would be needed elsewhere
  * to implement them.  */
-{"aapcs-iwmmxt", ARM_PCS_AAPCS_IWMMXT},
 {"atpcs", ARM_PCS_ATPCS},
 {"apcs", ARM_PCS_APCS},
 #endif
@@ -7195,7 +7182,6 @@ arm_init_cumulative_args (CUMULATIVE_ARGS *pcum, tree 
fntype,
 
   /* On the ARM, the offset starts at 0.  */
   pcum->nregs = 0;
-  pcum->iwmmxt_nregs = 0;
   pcum->can_split = true;
 
   /* Varargs vectors are treated the same 

[gcc r16-550] arm: cleanup iterators.md after removing iwmmxt

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:f7ad5853c43729b9cd4d5570f0ed3f3553426c12

commit r16-550-gf7ad5853c43729b9cd4d5570f0ed3f3553426c12
Author: Richard Earnshaw 
Date:   Wed Apr 30 13:49:13 2025 +0100

arm: cleanup iterators.md after removing iwmmxt

Mostly this is just removing references to iWMMXT in comments, but also 
remove
some now unused iterators and attributes.

gcc/ChangeLog:

* config/arm/iterators.md (VMMX, VMMX2): Remove mode iterators.
(MMX_char): Remove mode iterator attribute.

Diff:
---
 gcc/config/arm/iterators.md | 20 ++--
 1 file changed, 6 insertions(+), 14 deletions(-)

diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
index 743fe48e6ccc..0c163ed47820 100644
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -59,30 +59,25 @@
 ;; A list of modes which the VFP unit can handle
 (define_mode_iterator SDF [(SF "") (DF "TARGET_VFP_DOUBLE")])
 
-;; Integer element sizes implemented by IWMMXT.
-(define_mode_iterator VMMX [V2SI V4HI V8QI])
-
-(define_mode_iterator VMMX2 [V4HI V2SI])
-
 ;; Integer element sizes for shifts.
 (define_mode_iterator VSHFT [V4HI V2SI DI])
 
-;; Integer and float modes supported by Neon and IWMMXT.
+;; Integer and float modes supported by Neon.
 (define_mode_iterator VALL [V2DI V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF])
 
-;; Integer and float modes supported by Neon, IWMMXT and MVE.
+;; Integer and float modes supported by Neon and MVE.
 (define_mode_iterator VNIM1 [V16QI V8HI V4SI V4SF V2DI])
 
-;; Integer and float modes supported by Neon and IWMMXT but not MVE.
+;; Integer and float modes supported by Neon but not MVE.
 (define_mode_iterator VNINOTM1 [V2SI V4HI V8QI V2SF])
 
-;; Integer and float modes supported by Neon and IWMMXT, except V2DI.
+;; Integer and float modes supported by Neon, except V2DI.
 (define_mode_iterator VALLW [V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF])
 
-;; Integer modes supported by Neon and IWMMXT
+;; Integer modes supported by Neon
 (define_mode_iterator VINT [V2DI V2SI V4HI V8QI V4SI V8HI V16QI])
 
-;; Integer modes supported by Neon and IWMMXT, except V2DI
+;; Integer modes supported by Neon, except V2DI
 (define_mode_iterator VINTW [V2SI V4HI V8QI V4SI V8HI V16QI])
 
 ;; Double-width vector modes, on which we support arithmetic (no HF!)
@@ -1644,9 +1639,6 @@
 ;; distinguishes between 16-bit Thumb and 32-bit Thumb/ARM.
 (define_mode_attr arch [(CC_Z "32") (SI "t1")])
 
-;; Determine element size suffix from vector mode.
-(define_mode_attr MMX_char [(V8QI "b") (V4HI "h") (V2SI "w") (DI "d")])
-
 ;; vtbl suffix for NEON vector modes.
 (define_mode_attr VTAB_n [(TI "2") (EI "3") (OI "4")])

[gcc r16-551] arm: remove dead predefines when using WMMX

[Richard Earnshaw via Gcc-cvs]

https://gcc.gnu.org/g:31648852ad3f4b76e47dd468f88da5f4d36c134e

commit r16-551-g31648852ad3f4b76e47dd468f88da5f4d36c134e
Author: Richard Earnshaw 
Date:   Wed Apr 30 13:52:31 2025 +0100

arm: remove dead predefines when using WMMX

Since we no-longer enable iWMMXT, these predefines are no-longer enabled
when preprocessing C.  Remove them.

gcc/ChangeLog:

* config/arm/arm-c.cc (arm_cpu_builtins):  Remove predefines
for __IWWMXT__, __IWMMXT2__ and __ARM_WMMX.

Diff:
---
 gcc/config/arm/arm-c.cc | 7 ---
 1 file changed, 7 deletions(-)

diff --git a/gcc/config/arm/arm-c.cc b/gcc/config/arm/arm-c.cc
index 15e4080904f3..d257e62b563b 100644
--- a/gcc/config/arm/arm-c.cc
+++ b/gcc/config/arm/arm-c.cc
@@ -373,13 +373,6 @@ arm_cpu_builtins (struct cpp_reader* pfile)
   builtin_define (arm_arch_name);
   if (arm_arch_xscale)
 builtin_define ("__XSCALE__");
-  if (arm_arch_iwmmxt)
-{
-  builtin_define ("__IWMMXT__");
-  builtin_define ("__ARM_WMMX");
-}
-  if (arm_arch_iwmmxt2)
-builtin_define ("__IWMMXT2__");
   /* ARMv6KZ was originally identified as the misspelled __ARM_ARCH_6ZK__.  To
  preserve the existing behavior, the misspelled feature macro must still be
  defined.  */

[gcc r15-9662] Update gcc sv.po

[Joseph Myers via Gcc-cvs]

https://gcc.gnu.org/g:c1d4d81ed2a8c781206b089e6de54d51780b3254

commit r15-9662-gc1d4d81ed2a8c781206b089e6de54d51780b3254
Author: Joseph Myers 
Date:   Mon May 12 17:38:12 2025 +

Update gcc sv.po

* sv.po: Update.

Diff:
---
 gcc/po/sv.po | 1847 +-
 1 file changed, 274 insertions(+), 1573 deletions(-)

diff --git a/gcc/po/sv.po b/gcc/po/sv.po
index 3296bed37e0d..31e55028ff6a 100644
--- a/gcc/po/sv.po
+++ b/gcc/po/sv.po
@@ -32,7 +32,7 @@ msgstr ""
 "Project-Id-Version: gcc 15.1.0\n"
 "Report-Msgid-Bugs-To: https://gcc.gnu.org/bugs/\n";
 "POT-Creation-Date: 2025-04-23 19:27+\n"
-"PO-Revision-Date: 2025-04-28 09:09+0200\n"
+"PO-Revision-Date: 2025-05-10 14:36+0200\n"
 "Last-Translator: Göran Uddeborg \n"
 "Language-Team: Swedish \n"
 "Language: sv\n"
@@ -75706,10 +75706,9 @@ msgid "Expected associate name at %C"
 msgstr "Ett associationsnamn förväntade vid %C"
 
 #: fortran/match.cc:1940
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "Bad continuation line at %C"
+#, gcc-internal-format, gfc-internal-format
 msgid "Bad bounds remapping list at %C"
-msgstr "Felaktig fortsättningsrad vid %C"
+msgstr "Felaktig litea på gränsavbildningar vid %C"
 
 #: fortran/match.cc:1946
 #, gcc-internal-format, gfc-internal-format
@@ -75747,10 +75746,9 @@ msgid "The associate name %s with an assumed rank 
target at %L must have a bound
 msgstr "Det associerade namnet %s med ett mål med antagen ordning vid %L måste 
ha en lista för omavbildning av gränser (lista av nedtregräns:övregräns för 
varje dimension)"
 
 #: fortran/match.cc:2018
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "The assumed-rank array at %C shall not have a codimension"
+#, gcc-internal-format, gfc-internal-format
 msgid "The assumed rank target at %C must be contiguous"
-msgstr "Vektorn med antagen ordning vid %C får inte ha en co-dimension"
+msgstr "Målet med antagen ordning vid %C måste vara sammanhängande"
 
 #: fortran/match.cc:2037
 #, gcc-internal-format
@@ -75783,16 +75781,14 @@ msgid "DO CONCURRENT construct at %C"
 msgstr "DO CONCURRENT-konstruktion vid %C"
 
 #: fortran/match.cc:2826
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "selector %qs specified more than once in set %qs"
+#, gcc-internal-format, gfc-internal-format
 msgid "DEFAULT (NONE) specified more than once in DO CONCURRENT at %C"
-msgstr "väljaren %qs anges mer än en gång i mängden %qs"
+msgstr "DEFAULT (NONE) anges mer än en gång i DO CONCURRENT vid %C"
 
 #: fortran/match.cc:2915
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "Expected structure component name at %C"
+#, gcc-internal-format, gfc-internal-format
 msgid "Expected reduction operator or function name at %C"
-msgstr "Postkomponentnamn förväntades vid %C"
+msgstr "En reduktionsoperator eller ett funktionsnamn förväntades vid %C"
 
 #: fortran/match.cc:2935 fortran/openmp.cc:2439 fortran/openmp.cc:2475
 #: fortran/openmp.cc:2885 fortran/openmp.cc:2910
@@ -75801,28 +75797,24 @@ msgid "Expected %<:%> at %C"
 msgstr "%<:%> förväntades vid %C"
 
 #: fortran/match.cc:2945
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "Expected variable name at %C"
+#, gcc-internal-format, gfc-internal-format
 msgid "Expected variable name in reduction list at %C"
-msgstr "Variabelnamn förväntades vid %C"
+msgstr "Variabelnamn förväntades i reduktionslistan vid %C"
 
 #: fortran/match.cc:2964
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "Expected association list at %C"
+#, gcc-internal-format, gfc-internal-format
 msgid "Expected ',' or ')' in reduction list at %C"
-msgstr "Associationslista förväntades vid %C"
+msgstr "”,” eller ”)” förväntades i reduktionslistan vid %C"
 
 #: fortran/match.cc:2970
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "PROCEDURE list at %C"
+#, gcc-internal-format, gfc-internal-format
 msgid "REDUCE locality spec at %L"
-msgstr "PROCEDURE-lista vid %C"
+msgstr "REDUCE-likalitestsspecifikation vid %L"
 
 #: fortran/match.cc:2977
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "Invalid type-spec at %C"
+#, gcc-internal-format, gfc-internal-format
 msgid "Locality spec at %L"
-msgstr "Ogiltig typspecifikation vid %C"
+msgstr "Lokalitetsspecifikation vid %L"
 
 #: fortran/match.cc:3112
 #, gcc-internal-format
@@ -76920,16 +76912,14 @@ msgid "Unexpected junk at %C"
 msgstr "Oväntad skräp vid %C"
 
 #: fortran/openmp.cc:464
-#, fuzzy, gcc-internal-format
-#| msgid "% at %C not permitted in this clause"
+#, gcc-internal-format
 msgid "% at %L not permitted in this clause"
-msgstr "% vid %C är inte tillåtet i denna klausul"
+msgstr "% vid %L är inte tillåtet i denna klausul"
 
 #: fortran/openmp.cc:509
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "List item shall not be coindexed at %C"
+#, gcc-internal-format, gfc-internal-format
 msgid "List item shall not be coindexed at %L"
-msgstr "Listobjektet s

[gcc r16-568] Update gcc sv.po

[Joseph Myers via Gcc-cvs]

https://gcc.gnu.org/g:b7b3b866902d714c9ec1c35661d8a42611a3fec9

commit r16-568-gb7b3b866902d714c9ec1c35661d8a42611a3fec9
Author: Joseph Myers 
Date:   Mon May 12 17:37:12 2025 +

Update gcc sv.po

* sv.po: Update.

Diff:
---
 gcc/po/sv.po | 1847 +-
 1 file changed, 274 insertions(+), 1573 deletions(-)

diff --git a/gcc/po/sv.po b/gcc/po/sv.po
index 3296bed37e0d..31e55028ff6a 100644
--- a/gcc/po/sv.po
+++ b/gcc/po/sv.po
@@ -32,7 +32,7 @@ msgstr ""
 "Project-Id-Version: gcc 15.1.0\n"
 "Report-Msgid-Bugs-To: https://gcc.gnu.org/bugs/\n";
 "POT-Creation-Date: 2025-04-23 19:27+\n"
-"PO-Revision-Date: 2025-04-28 09:09+0200\n"
+"PO-Revision-Date: 2025-05-10 14:36+0200\n"
 "Last-Translator: Göran Uddeborg \n"
 "Language-Team: Swedish \n"
 "Language: sv\n"
@@ -75706,10 +75706,9 @@ msgid "Expected associate name at %C"
 msgstr "Ett associationsnamn förväntade vid %C"
 
 #: fortran/match.cc:1940
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "Bad continuation line at %C"
+#, gcc-internal-format, gfc-internal-format
 msgid "Bad bounds remapping list at %C"
-msgstr "Felaktig fortsättningsrad vid %C"
+msgstr "Felaktig litea på gränsavbildningar vid %C"
 
 #: fortran/match.cc:1946
 #, gcc-internal-format, gfc-internal-format
@@ -75747,10 +75746,9 @@ msgid "The associate name %s with an assumed rank 
target at %L must have a bound
 msgstr "Det associerade namnet %s med ett mål med antagen ordning vid %L måste 
ha en lista för omavbildning av gränser (lista av nedtregräns:övregräns för 
varje dimension)"
 
 #: fortran/match.cc:2018
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "The assumed-rank array at %C shall not have a codimension"
+#, gcc-internal-format, gfc-internal-format
 msgid "The assumed rank target at %C must be contiguous"
-msgstr "Vektorn med antagen ordning vid %C får inte ha en co-dimension"
+msgstr "Målet med antagen ordning vid %C måste vara sammanhängande"
 
 #: fortran/match.cc:2037
 #, gcc-internal-format
@@ -75783,16 +75781,14 @@ msgid "DO CONCURRENT construct at %C"
 msgstr "DO CONCURRENT-konstruktion vid %C"
 
 #: fortran/match.cc:2826
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "selector %qs specified more than once in set %qs"
+#, gcc-internal-format, gfc-internal-format
 msgid "DEFAULT (NONE) specified more than once in DO CONCURRENT at %C"
-msgstr "väljaren %qs anges mer än en gång i mängden %qs"
+msgstr "DEFAULT (NONE) anges mer än en gång i DO CONCURRENT vid %C"
 
 #: fortran/match.cc:2915
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "Expected structure component name at %C"
+#, gcc-internal-format, gfc-internal-format
 msgid "Expected reduction operator or function name at %C"
-msgstr "Postkomponentnamn förväntades vid %C"
+msgstr "En reduktionsoperator eller ett funktionsnamn förväntades vid %C"
 
 #: fortran/match.cc:2935 fortran/openmp.cc:2439 fortran/openmp.cc:2475
 #: fortran/openmp.cc:2885 fortran/openmp.cc:2910
@@ -75801,28 +75797,24 @@ msgid "Expected %<:%> at %C"
 msgstr "%<:%> förväntades vid %C"
 
 #: fortran/match.cc:2945
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "Expected variable name at %C"
+#, gcc-internal-format, gfc-internal-format
 msgid "Expected variable name in reduction list at %C"
-msgstr "Variabelnamn förväntades vid %C"
+msgstr "Variabelnamn förväntades i reduktionslistan vid %C"
 
 #: fortran/match.cc:2964
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "Expected association list at %C"
+#, gcc-internal-format, gfc-internal-format
 msgid "Expected ',' or ')' in reduction list at %C"
-msgstr "Associationslista förväntades vid %C"
+msgstr "”,” eller ”)” förväntades i reduktionslistan vid %C"
 
 #: fortran/match.cc:2970
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "PROCEDURE list at %C"
+#, gcc-internal-format, gfc-internal-format
 msgid "REDUCE locality spec at %L"
-msgstr "PROCEDURE-lista vid %C"
+msgstr "REDUCE-likalitestsspecifikation vid %L"
 
 #: fortran/match.cc:2977
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "Invalid type-spec at %C"
+#, gcc-internal-format, gfc-internal-format
 msgid "Locality spec at %L"
-msgstr "Ogiltig typspecifikation vid %C"
+msgstr "Lokalitetsspecifikation vid %L"
 
 #: fortran/match.cc:3112
 #, gcc-internal-format
@@ -76920,16 +76912,14 @@ msgid "Unexpected junk at %C"
 msgstr "Oväntad skräp vid %C"
 
 #: fortran/openmp.cc:464
-#, fuzzy, gcc-internal-format
-#| msgid "% at %C not permitted in this clause"
+#, gcc-internal-format
 msgid "% at %L not permitted in this clause"
-msgstr "% vid %C är inte tillåtet i denna klausul"
+msgstr "% vid %L är inte tillåtet i denna klausul"
 
 #: fortran/openmp.cc:509
-#, fuzzy, gcc-internal-format, gfc-internal-format
-#| msgid "List item shall not be coindexed at %C"
+#, gcc-internal-format, gfc-internal-format
 msgid "List item shall not be coindexed at %L"
-msgstr "Listobjektet sk

[gcc r16-570] c+: -Wabi false positive [PR120012]

[Jason Merrill via Gcc-cvs]

https://gcc.gnu.org/g:b4b4dfbd22e06877052bd4cc4b191d9d138155cf

commit r16-570-gb4b4dfbd22e06877052bd4cc4b191d9d138155cf
Author: Jason Merrill 
Date:   Mon May 12 11:53:03 2025 -0400

c+: -Wabi false positive [PR120012]

The warning compares the position of a field depending on whether or not the
previous base/field is considered a POD for layout, but failed to consider
whether the previous base/field is empty; layout of an empty base doesn't
consider PODness.

PR c++/120012

gcc/cp/ChangeLog:

* class.cc (check_non_pod_aggregate): Check is_empty_class.

gcc/testsuite/ChangeLog:

* g++.dg/abi/base-defaulted2.C: New test.

Diff:
---
 gcc/cp/class.cc|  6 --
 gcc/testsuite/g++.dg/abi/base-defaulted2.C | 12 
 2 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/gcc/cp/class.cc b/gcc/cp/class.cc
index 2764bb52ddd0..db39e579870c 100644
--- a/gcc/cp/class.cc
+++ b/gcc/cp/class.cc
@@ -6879,8 +6879,10 @@ check_non_pod_aggregate (tree field)
   tree type = TREE_TYPE (field);
   if (TYPE_IDENTIFIER (type) == as_base_identifier)
 type = TYPE_CONTEXT (type);
-  if (!CLASS_TYPE_P (type) || (!CLASSTYPE_NON_POD_AGGREGATE (type)
-  && !CLASSTYPE_NON_AGGREGATE_POD (type)))
+  if (!CLASS_TYPE_P (type)
+  || is_empty_class (type)
+  || (!CLASSTYPE_NON_POD_AGGREGATE (type)
+ && !CLASSTYPE_NON_AGGREGATE_POD (type)))
 return;
   tree size = end_of_class (type, (DECL_FIELD_IS_BASE (field)
   ? eoc_nvsize : eoc_nv_or_dsize));
diff --git a/gcc/testsuite/g++.dg/abi/base-defaulted2.C 
b/gcc/testsuite/g++.dg/abi/base-defaulted2.C
new file mode 100644
index ..9652ae60c037
--- /dev/null
+++ b/gcc/testsuite/g++.dg/abi/base-defaulted2.C
@@ -0,0 +1,12 @@
+// { dg-do compile { target c++11 } }
+// { dg-additional-options "-fabi-version=20 -Wabi" }
+
+struct Base {
+protected:
+  Base() = default;
+  ~Base() = default;
+};
+
+struct Derived : Base {
+  void* ptr;   // { dg-bogus "offset" }
+};

[gcc r16-569] Update cpplib es.po

[Joseph Myers via Gcc-cvs]

https://gcc.gnu.org/g:17c272598564d7a4f3bfc86b52e4b91b50f98e1d

commit r16-569-g17c272598564d7a4f3bfc86b52e4b91b50f98e1d
Author: Joseph Myers 
Date:   Mon May 12 17:55:12 2025 +

Update cpplib es.po

* es.po: Update.

Diff:
---
 libcpp/po/es.po | 867 +++-
 1 file changed, 348 insertions(+), 519 deletions(-)

diff --git a/libcpp/po/es.po b/libcpp/po/es.po
index cc2cff2eb361..4948e7aa17f3 100644
--- a/libcpp/po/es.po
+++ b/libcpp/po/es.po
@@ -1,15 +1,15 @@
 # Spanish localization for cpplib
-# Copyright (C) 2001 - 2024 Free Software Foundation, Inc.
+# Copyright (C) 2001 - 2025 Free Software Foundation, Inc.
 # This file is distributed under the same license as the gcc package.
 # Francisco Javier Serrador , 2018.
 # Antonio Ceballos Roa , 2021.
-# Cristian Othón Martínez Vera , 2001 - 2012, 2022, 2023, 2024.
+# Cristian Othón Martínez Vera , 2001 - 2012, 2022, 2023, 
2024, 2025
 msgid ""
 msgstr ""
-"Project-Id-Version: cpplib 14.1-b20240218\n"
+"Project-Id-Version: cpplib 15.1-b20250316\n"
 "Report-Msgid-Bugs-To: https://gcc.gnu.org/bugs/\n";
 "POT-Creation-Date: 2025-03-14 22:05+\n"
-"PO-Revision-Date: 2024-02-19 11:47-0600\n"
+"PO-Revision-Date: 2025-05-12 11:20-0600\n"
 "Last-Translator: Cristian Othón Martínez Vera \n"
 "Language-Team: Spanish \n"
 "Language: es\n"
@@ -33,10 +33,9 @@ msgid "no iconv implementation, cannot convert from %s to %s"
 msgstr "no hay una implementación de iconv, no se puede convertir de %s a %s"
 
 #: charset.cc:870
-#, fuzzy, gcc-internal-format
-#| msgid "character 0x%lx is not in the basic source character set\n"
+#, gcc-internal-format
 msgid "character 0x%lx is not in the basic source character set"
-msgstr "el carácter 0x%lx no está en el conjunto básico de caracteres fuente\n"
+msgstr "el carácter 0x%lx no está en el conjunto básico de caracteres fuente"
 
 #: charset.cc:887 charset.cc:2639
 msgid "converting to execution character set"
@@ -52,22 +51,19 @@ msgid "universal character names are only valid in C++ and 
C99"
 msgstr "los nombres universales de carácter sólo son válidos en C++ y C99"
 
 #: charset.cc:1553
-#, fuzzy, gcc-internal-format
-#| msgid "C99's universal character names are incompatible with C90"
+#, gcc-internal-format
 msgid "C99%'s universal character names are incompatible with C90"
 msgstr "los nombres universales de carácter de C99 son incompatibles con C90"
 
 #: charset.cc:1556
-#, fuzzy, gcc-internal-format
-#| msgid "the meaning of '\\%c' is different in traditional C"
+#, gcc-internal-format
 msgid "the meaning of %<\\%c%> is different in traditional C"
-msgstr "el significado de '\\%c' es diferente en C tradicional"
+msgstr "el significado de <\\%c> es diferente en C tradicional"
 
 #: charset.cc:1595
-#, fuzzy, gcc-internal-format
-#| msgid "'\\N' not followed by '{'"
+#, gcc-internal-format
 msgid "%<\\N%> not followed by %<{%>"
-msgstr "'\\N' no tiene una '{' a continuación"
+msgstr "%<\\N%> no tiene una %<{%> a continuación"
 
 #: charset.cc:1625
 msgid "empty named universal character escape sequence; treating it as 
separate tokens"
@@ -82,40 +78,34 @@ msgid "named universal character escapes are only valid in 
C++23"
 msgstr "las secuencias de escape de carácter universal nombradas sólo son 
válidas en C++23"
 
 #: charset.cc:1659
-#, fuzzy, gcc-internal-format
-#| msgid "\\N{%.*s} is not a valid universal character; treating it as 
separate tokens"
+#, gcc-internal-format
 msgid "%<\\N{%.*s}%> is not a valid universal character; treating it as 
separate tokens"
-msgstr "\\N{%.*s} no es un carácter universal válido; se trata como elementos 
separados"
+msgstr "%<\\N{%.*s}%> no es un carácter universal válido; se trata como 
elementos separados"
 
 #: charset.cc:1665
-#, fuzzy, gcc-internal-format
-#| msgid "\\N{%.*s} is not a valid universal character"
+#, gcc-internal-format
 msgid "%<\\N{%.*s}%> is not a valid universal character"
-msgstr "\\N{%.*s} no es un carácter universal válido"
+msgstr "%<\\N{%.*s}%> no es un carácter universal válido"
 
 #: charset.cc:1675
-#, fuzzy, gcc-internal-format
-#| msgid "did you mean \\N{%s}?"
+#, gcc-internal-format
 msgid "did you mean %<\\N{%s}%>?"
-msgstr "¿Quiso decir \\N{%s}?"
+msgstr "¿Quiso decir %<\\N{%s}%>?"
 
 #: charset.cc:1693
-#, fuzzy, gcc-internal-format
-#| msgid "'\\N{' not terminated with '}' after %.*s; treating it as separate 
tokens"
+#, gcc-internal-format
 msgid "%<\\N{%> not terminated with %<}%> after %.*s; treating it as separate 
tokens"
-msgstr "'\\N{' no termina con '}' después de %.*s; se trata como elemntos 
separados"
+msgstr "%<\\N{%> no termina con %<}%> después de %.*s; se trata como elemntos 
separados"
 
 #: charset.cc:1702
-#, fuzzy, gcc-internal-format
-#| msgid "'\\N{' not terminated with '}' after %.*s"
+#, gcc-internal-format
 msgid "%<\\N{%> not terminated with %<}%> after %.*s"
-msgstr "'\\N{' no termina con '}' después de %.*s"
+msgstr "%<\\N{%> no termina con %<}%> despu

[gcc r15-9663] Update cpplib es.po

[Joseph Myers via Gcc-cvs]

https://gcc.gnu.org/g:74f41d42c492b80257aa0f722adcbf70f7e8c14f

commit r15-9663-g74f41d42c492b80257aa0f722adcbf70f7e8c14f
Author: Joseph Myers 
Date:   Mon May 12 17:56:18 2025 +

Update cpplib es.po

* es.po: Update.

Diff:
---
 libcpp/po/es.po | 867 +++-
 1 file changed, 348 insertions(+), 519 deletions(-)

diff --git a/libcpp/po/es.po b/libcpp/po/es.po
index cc2cff2eb361..4948e7aa17f3 100644
--- a/libcpp/po/es.po
+++ b/libcpp/po/es.po
@@ -1,15 +1,15 @@
 # Spanish localization for cpplib
-# Copyright (C) 2001 - 2024 Free Software Foundation, Inc.
+# Copyright (C) 2001 - 2025 Free Software Foundation, Inc.
 # This file is distributed under the same license as the gcc package.
 # Francisco Javier Serrador , 2018.
 # Antonio Ceballos Roa , 2021.
-# Cristian Othón Martínez Vera , 2001 - 2012, 2022, 2023, 2024.
+# Cristian Othón Martínez Vera , 2001 - 2012, 2022, 2023, 
2024, 2025
 msgid ""
 msgstr ""
-"Project-Id-Version: cpplib 14.1-b20240218\n"
+"Project-Id-Version: cpplib 15.1-b20250316\n"
 "Report-Msgid-Bugs-To: https://gcc.gnu.org/bugs/\n";
 "POT-Creation-Date: 2025-03-14 22:05+\n"
-"PO-Revision-Date: 2024-02-19 11:47-0600\n"
+"PO-Revision-Date: 2025-05-12 11:20-0600\n"
 "Last-Translator: Cristian Othón Martínez Vera \n"
 "Language-Team: Spanish \n"
 "Language: es\n"
@@ -33,10 +33,9 @@ msgid "no iconv implementation, cannot convert from %s to %s"
 msgstr "no hay una implementación de iconv, no se puede convertir de %s a %s"
 
 #: charset.cc:870
-#, fuzzy, gcc-internal-format
-#| msgid "character 0x%lx is not in the basic source character set\n"
+#, gcc-internal-format
 msgid "character 0x%lx is not in the basic source character set"
-msgstr "el carácter 0x%lx no está en el conjunto básico de caracteres fuente\n"
+msgstr "el carácter 0x%lx no está en el conjunto básico de caracteres fuente"
 
 #: charset.cc:887 charset.cc:2639
 msgid "converting to execution character set"
@@ -52,22 +51,19 @@ msgid "universal character names are only valid in C++ and 
C99"
 msgstr "los nombres universales de carácter sólo son válidos en C++ y C99"
 
 #: charset.cc:1553
-#, fuzzy, gcc-internal-format
-#| msgid "C99's universal character names are incompatible with C90"
+#, gcc-internal-format
 msgid "C99%'s universal character names are incompatible with C90"
 msgstr "los nombres universales de carácter de C99 son incompatibles con C90"
 
 #: charset.cc:1556
-#, fuzzy, gcc-internal-format
-#| msgid "the meaning of '\\%c' is different in traditional C"
+#, gcc-internal-format
 msgid "the meaning of %<\\%c%> is different in traditional C"
-msgstr "el significado de '\\%c' es diferente en C tradicional"
+msgstr "el significado de <\\%c> es diferente en C tradicional"
 
 #: charset.cc:1595
-#, fuzzy, gcc-internal-format
-#| msgid "'\\N' not followed by '{'"
+#, gcc-internal-format
 msgid "%<\\N%> not followed by %<{%>"
-msgstr "'\\N' no tiene una '{' a continuación"
+msgstr "%<\\N%> no tiene una %<{%> a continuación"
 
 #: charset.cc:1625
 msgid "empty named universal character escape sequence; treating it as 
separate tokens"
@@ -82,40 +78,34 @@ msgid "named universal character escapes are only valid in 
C++23"
 msgstr "las secuencias de escape de carácter universal nombradas sólo son 
válidas en C++23"
 
 #: charset.cc:1659
-#, fuzzy, gcc-internal-format
-#| msgid "\\N{%.*s} is not a valid universal character; treating it as 
separate tokens"
+#, gcc-internal-format
 msgid "%<\\N{%.*s}%> is not a valid universal character; treating it as 
separate tokens"
-msgstr "\\N{%.*s} no es un carácter universal válido; se trata como elementos 
separados"
+msgstr "%<\\N{%.*s}%> no es un carácter universal válido; se trata como 
elementos separados"
 
 #: charset.cc:1665
-#, fuzzy, gcc-internal-format
-#| msgid "\\N{%.*s} is not a valid universal character"
+#, gcc-internal-format
 msgid "%<\\N{%.*s}%> is not a valid universal character"
-msgstr "\\N{%.*s} no es un carácter universal válido"
+msgstr "%<\\N{%.*s}%> no es un carácter universal válido"
 
 #: charset.cc:1675
-#, fuzzy, gcc-internal-format
-#| msgid "did you mean \\N{%s}?"
+#, gcc-internal-format
 msgid "did you mean %<\\N{%s}%>?"
-msgstr "¿Quiso decir \\N{%s}?"
+msgstr "¿Quiso decir %<\\N{%s}%>?"
 
 #: charset.cc:1693
-#, fuzzy, gcc-internal-format
-#| msgid "'\\N{' not terminated with '}' after %.*s; treating it as separate 
tokens"
+#, gcc-internal-format
 msgid "%<\\N{%> not terminated with %<}%> after %.*s; treating it as separate 
tokens"
-msgstr "'\\N{' no termina con '}' después de %.*s; se trata como elemntos 
separados"
+msgstr "%<\\N{%> no termina con %<}%> después de %.*s; se trata como elemntos 
separados"
 
 #: charset.cc:1702
-#, fuzzy, gcc-internal-format
-#| msgid "'\\N{' not terminated with '}' after %.*s"
+#, gcc-internal-format
 msgid "%<\\N{%> not terminated with %<}%> after %.*s"
-msgstr "'\\N{' no termina con '}' después de %.*s"
+msgstr "%<\\N{%> no termina con %<}%> desp

[gcc r16-567] PR modula2/120188: documented example does not work assignvalue m2plugin

[Gaius Mulley via Gcc-cvs]

https://gcc.gnu.org/g:9ce4c801e8275fcf0336ae2fb548f6ebb3ca068b

commit r16-567-g9ce4c801e8275fcf0336ae2fb548f6ebb3ca068b
Author: Gaius Mulley 
Date:   Mon May 12 17:59:00 2025 +0100

PR modula2/120188: documented example does not work assignvalue m2plugin

This patch corrects the gm2 command line used in the documentation
to invoke the m2-plugin.  The patch also includes the documentation
example in dejagnu test code with an expect script to check whether
plugins were enabled.

gcc/ChangeLog:

PR modula2/120188
* doc/gm2.texi (Semantic checking): Add -fm2-plugin command line 
option.

gcc/testsuite/ChangeLog:

PR modula2/120188
* lib/gm2-dg.exp (gm2-dg-frontend-configure-check): New function.
(gm2-dg-runtest): Add -O2 to the option_list.
* gm2.dg/doc/examples/plugin/fail/assignvalue.mod: New test.
* gm2.dg/doc/examples/plugin/fail/doc-examples-plugin-fail.exp: New 
test.

Signed-off-by: Gaius Mulley 

Diff:
---
 gcc/doc/gm2.texi   |  2 +-
 .../doc/examples/plugin/fail/assignvalue.mod   | 25 +++
 .../plugin/fail/doc-examples-plugin-fail.exp   | 25 +++
 gcc/testsuite/lib/gm2-dg.exp   | 37 +-
 4 files changed, 87 insertions(+), 2 deletions(-)

diff --git a/gcc/doc/gm2.texi b/gcc/doc/gm2.texi
index cb52e8c0d3e4..8293da4994ed 100644
--- a/gcc/doc/gm2.texi
+++ b/gcc/doc/gm2.texi
@@ -1495,7 +1495,7 @@ from @samp{bad} will cause an overflow to @samp{foo}.  If 
we compile
 the code with the following options:
 
 @example
-$ gm2 -g -fsoft-check-all -O2 -c assignvalue.mod
+$ gm2 -g -fsoft-check-all -O2 -fm2-plugin -c assignvalue.mod
 assignvalue.mod:16:0:inevitable that this error will occur at run time,
 assignment will result in an overflow
 @end example
diff --git a/gcc/testsuite/gm2.dg/doc/examples/plugin/fail/assignvalue.mod 
b/gcc/testsuite/gm2.dg/doc/examples/plugin/fail/assignvalue.mod
new file mode 100644
index ..56eb0bb25319
--- /dev/null
+++ b/gcc/testsuite/gm2.dg/doc/examples/plugin/fail/assignvalue.mod
@@ -0,0 +1,25 @@
+(* { dg-do compile } *)
+(* { dg-options "-fsoft-check-all -fm2-plugin" } *)
+(* { dg-skip-if "" { *-*-* }  { "*" } { "-O2" } } *)
+
+MODULE assignvalue ;  (*!m2iso+gm2*)
+
+PROCEDURE bad () : INTEGER ;
+VAR
+   i: INTEGER ;
+BEGIN
+   i := -1 ;
+   RETURN i
+END bad ;
+
+VAR
+   foo: CARDINAL ;
+BEGIN
+   (* The m2rte plugin will detect this as an error, post
+  optimization.  *)
+   foo := bad ()  (* { dg-error "error: In program module assignvalue" } *)
+   (* { dg-begin-multiline-output "" }
+runtime error will occur, assignment will cause a range error, as the runtime 
instance value of 'CARDINAL' does not overlap with the type 'INTEGER'
+ { dg-end-multiline-output "" } *)
+
+END assignvalue.
diff --git 
a/gcc/testsuite/gm2.dg/doc/examples/plugin/fail/doc-examples-plugin-fail.exp 
b/gcc/testsuite/gm2.dg/doc/examples/plugin/fail/doc-examples-plugin-fail.exp
new file mode 100644
index ..8a41ff8bde4c
--- /dev/null
+++ b/gcc/testsuite/gm2.dg/doc/examples/plugin/fail/doc-examples-plugin-fail.exp
@@ -0,0 +1,25 @@
+# Compile tests, no torture testing.
+#
+# These tests should all generate errors if the plugin is available.
+
+# Load support procs.
+load_lib gm2-dg.exp
+
+gm2_init_pim4 $srcdir/$subdir
+
+# Initialize `dg'.
+dg-init
+
+# If the --enable-plugin has not been enabled during configure, bail.
+if { ![gm2-dg-frontend-configure-check "enable-plugin" ] } {
+return
+}
+
+# Main loop.
+
+set tests [lsort [glob -nocomplain $srcdir/$subdir/*.mod]]
+
+gm2-dg-runtest $tests "" ""
+
+# All done.
+dg-finish
diff --git a/gcc/testsuite/lib/gm2-dg.exp b/gcc/testsuite/lib/gm2-dg.exp
index eaed554014f8..5a36507317b0 100644
--- a/gcc/testsuite/lib/gm2-dg.exp
+++ b/gcc/testsuite/lib/gm2-dg.exp
@@ -65,7 +65,7 @@ proc gm2-dg-runtest { testcases flags default-extra-flags } {
if [expr [search_for $test "dg-do run"]] {
set option_list $TORTURE_OPTIONS
} else {
-   set option_list [list { -O } ]
+   set option_list [list { -O -O2 } ]
}
 
set nshort [file tail [file dirname $test]]/[file tail $test]
@@ -77,3 +77,38 @@ proc gm2-dg-runtest { testcases flags default-extra-flags } {
 }
 }
 
+
+# Check if frontend has been configured with option.
+# This checks a configure build option was used and not
+# the availability of a compiler command line option.
+
+proc gm2-dg-frontend-configure-check { option } {
+global GCC_UNDER_TEST
+
+# ignore any arguments after the command
+set compiler [lindex $GCC_UNDER_TEST 0]
+
+if ![is_remote host] {
+   set compiler_name [which $compiler]
+} else {
+   set compiler_name $compiler
+}
+
+# verify that the compiler exists
+if { $compiler_name != 0 } then {
+   set tmp [remote_exec host "$comp

[gcc r15-9664] c+: -Wabi false positive [PR120012]

[Jason Merrill via Gcc-cvs]

https://gcc.gnu.org/g:c9e3181516f1c0786f81b9c813581bf986a6300a

commit r15-9664-gc9e3181516f1c0786f81b9c813581bf986a6300a
Author: Jason Merrill 
Date:   Mon May 12 11:53:03 2025 -0400

c+: -Wabi false positive [PR120012]

The warning compares the position of a field depending on whether or not the
previous base/field is considered a POD for layout, but failed to consider
whether the previous base/field is empty; layout of an empty base doesn't
consider PODness.

PR c++/120012

gcc/cp/ChangeLog:

* class.cc (check_non_pod_aggregate): Check is_empty_class.

gcc/testsuite/ChangeLog:

* g++.dg/abi/base-defaulted2.C: New test.

(cherry picked from commit b4b4dfbd22e06877052bd4cc4b191d9d138155cf)

Diff:
---
 gcc/cp/class.cc|  6 --
 gcc/testsuite/g++.dg/abi/base-defaulted2.C | 12 
 2 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/gcc/cp/class.cc b/gcc/cp/class.cc
index 6767ac10358b..93ad9d6fd0b6 100644
--- a/gcc/cp/class.cc
+++ b/gcc/cp/class.cc
@@ -6835,8 +6835,10 @@ check_non_pod_aggregate (tree field)
   tree type = TREE_TYPE (field);
   if (TYPE_IDENTIFIER (type) == as_base_identifier)
 type = TYPE_CONTEXT (type);
-  if (!CLASS_TYPE_P (type) || (!CLASSTYPE_NON_POD_AGGREGATE (type)
-  && !CLASSTYPE_NON_AGGREGATE_POD (type)))
+  if (!CLASS_TYPE_P (type)
+  || is_empty_class (type)
+  || (!CLASSTYPE_NON_POD_AGGREGATE (type)
+ && !CLASSTYPE_NON_AGGREGATE_POD (type)))
 return;
   tree size = end_of_class (type, (DECL_FIELD_IS_BASE (field)
   ? eoc_nvsize : eoc_nv_or_dsize));
diff --git a/gcc/testsuite/g++.dg/abi/base-defaulted2.C 
b/gcc/testsuite/g++.dg/abi/base-defaulted2.C
new file mode 100644
index ..9652ae60c037
--- /dev/null
+++ b/gcc/testsuite/g++.dg/abi/base-defaulted2.C
@@ -0,0 +1,12 @@
+// { dg-do compile { target c++11 } }
+// { dg-additional-options "-fabi-version=20 -Wabi" }
+
+struct Base {
+protected:
+  Base() = default;
+  ~Base() = default;
+};
+
+struct Derived : Base {
+  void* ptr;   // { dg-bogus "offset" }
+};

[gcc r15-9665] libstdc++: Restore std::scoped_lock for non-gthreads targets [PR120198]

[Jonathan Wakely via Gcc-cvs]

https://gcc.gnu.org/g:d06a800159df2057d8d2fc028a3a90af937d606d

commit r15-9665-gd06a800159df2057d8d2fc028a3a90af937d606d
Author: Jonathan Wakely 
Date:   Fri May 9 17:50:52 2025 +0100

libstdc++: Restore std::scoped_lock for non-gthreads targets [PR120198]

This was a regression introduced with using version.def to define
feature test macros (r14-3248-g083b7f2833d71d). std::scoped_lock doesn't
need to depend on gthreads and so can be defined unconditionally, even
for freestanding.

libstdc++-v3/ChangeLog:

PR libstdc++/120198
* include/bits/version.def (scoped_lock): Do not depend on
gthreads or hosted.
* include/bits/version.h: Regenerate.
* include/std/mutex (scoped_lock): Update comment.
* testsuite/30_threads/scoped_lock/requirements/typedefs.cc:
Remove dg-require-gthreads and use custom lockable type instead
of std::mutex. Check that typedef is only present for a single
template argument.

Reviewed-by: Tomasz Kamiński 
(cherry picked from commit bdd2753f5f021a15a6c4ef02565356985fea1300)

Diff:
---
 libstdc++-v3/include/bits/version.def  |  2 --
 libstdc++-v3/include/bits/version.h|  2 +-
 libstdc++-v3/include/std/mutex |  2 +-
 .../scoped_lock/requirements/typedefs.cc   | 28 ++
 4 files changed, 26 insertions(+), 8 deletions(-)

diff --git a/libstdc++-v3/include/bits/version.def 
b/libstdc++-v3/include/bits/version.def
index 737b3f421bf7..a08b0b990b2b 100644
--- a/libstdc++-v3/include/bits/version.def
+++ b/libstdc++-v3/include/bits/version.def
@@ -679,8 +679,6 @@ ftms = {
   values = {
 v = 201703;
 cxxmin = 17;
-hosted = yes;
-gthread = yes;
   };
 };
 
diff --git a/libstdc++-v3/include/bits/version.h 
b/libstdc++-v3/include/bits/version.h
index 59ff0cee0436..3f1562cdc73a 100644
--- a/libstdc++-v3/include/bits/version.h
+++ b/libstdc++-v3/include/bits/version.h
@@ -751,7 +751,7 @@
 #undef __glibcxx_want_parallel_algorithm
 
 #if !defined(__cpp_lib_scoped_lock)
-# if (__cplusplus >= 201703L) && defined(_GLIBCXX_HAS_GTHREADS) && 
_GLIBCXX_HOSTED
+# if (__cplusplus >= 201703L)
 #  define __glibcxx_scoped_lock 201703L
 #  if defined(__glibcxx_want_all) || defined(__glibcxx_want_scoped_lock)
 #   define __cpp_lib_scoped_lock 201703L
diff --git a/libstdc++-v3/include/std/mutex b/libstdc++-v3/include/std/mutex
index b3f89c0b9435..e575a81c138e 100644
--- a/libstdc++-v3/include/std/mutex
+++ b/libstdc++-v3/include/std/mutex
@@ -733,7 +733,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
}
 }
 
-#ifdef __cpp_lib_scoped_lock // C++ >= 17 && hosted && gthread
+#ifdef __cpp_lib_scoped_lock // C++ >= 17
   /** @brief A scoped lock type for multiple lockable objects.
*
* A scoped_lock controls mutex ownership within a scope, releasing
diff --git 
a/libstdc++-v3/testsuite/30_threads/scoped_lock/requirements/typedefs.cc 
b/libstdc++-v3/testsuite/30_threads/scoped_lock/requirements/typedefs.cc
index 4cd07da44657..ba52b36a3111 100644
--- a/libstdc++-v3/testsuite/30_threads/scoped_lock/requirements/typedefs.cc
+++ b/libstdc++-v3/testsuite/30_threads/scoped_lock/requirements/typedefs.cc
@@ -1,5 +1,4 @@
 // { dg-do compile { target c++17 } }
-// { dg-require-gthreads "" }
 // { dg-add-options no_pch }
 
 // Copyright (C) 2017-2025 Free Software Foundation, Inc.
@@ -29,9 +28,30 @@
 # error "Feature-test macro for scoped_lock has wrong value"
 #endif
 
+struct BasicLockable
+{
+  BasicLockable() = default;
+  ~BasicLockable() = default;
+  void lock() { }
+  void unlock() { }
+};
+
 void test01()
 {
-  // Check for required typedefs
-  typedef std::scoped_lock test_type;
-  typedef test_type::mutex_type mutex_type;
+  // Check for required typedef.
+  using test_type = std::scoped_lock;
+  static_assert(std::is_same_v);
+}
+
+template
+constexpr bool has_mutex_type = false;
+
+template
+constexpr bool has_mutex_type> = true;
+
+void test02()
+{
+  // Check that typedef is absent as required.
+  using test_type = std::scoped_lock;
+  static_assert(!has_mutex_type);
 }

[gcc r15-9666] libstdc++: Remove #warning from for C++17 [PR120187]

[Jonathan Wakely via Gcc-cvs]

https://gcc.gnu.org/g:506cb05479ee04c724eb0ebde07d2e9062efb264

commit r15-9666-g506cb05479ee04c724eb0ebde07d2e9062efb264
Author: Jonathan Wakely 
Date:   Fri May 9 10:23:05 2025 +0100

libstdc++: Remove #warning from  for C++17 [PR120187]

Although  was removed from C++20, it was not formally
deprecated in C++17. In contrast, , , etc. were
formally deprecated in C++17 before being removed in C++20.

Due to the widespread convention of including  to detect
implementation-specific macros (such as _GLIBCXX_RELEASE) it causes
quite a lot of noise to issue deprecation warnings in C++17 mode. The
recommendation to include  instead does work for recent
compilers, even in C++17 mode, but isn't portable to older compilers
that don't provide  yet (e.g. GCC 8).

There are also potential objections to including  pre-C++20
when it wasn't defined by the standard. I don't have much sympathy for
this position, because including  for implementation-specific
macros wasn't part of the C++17 standard either. It's no more
non-standard to rely on  being present and defining those
macros than to rely on  defining them, and __has_include can be
used to detect whether  is present. However,  is being
used in the wild by popular libraries like Abseil and we can't change
versions of those that have already been released.

This removes the #warning in  for C++17 mode, so that we only
emit diagnostics for C++20 and later. With this change, including
 in C++20 or later gives an error if _GLIBCXX_USE_DEPRECATED is
defined to zero, otherwise a warning if -Wdeprecated is enabled,
otherwise no diagnostic is given.

This also adds "@since C++11 (removed in C++20)" to the Doxygen @file
comments in all the relevant headers.

The test for  needs to be updated to no longer expect a warning
for c++17_only. A new test is added to ensure that we get a warning
instead of an error when -D_GLIBCXX_USE_DEPRECATED=0 is not used.

libstdc++-v3/ChangeLog:

PR libstdc++/120187
* include/c_global/ciso646: Only give deprecated warning for
C++20 and later.
* include/c_global/ccomplex: Add @since to Doxygen comment.
* include/c_global/cstdalign: Likewise.
* include/c_global/cstdbool: Likewise.
* include/c_global/ctgmath: Likewise.
* testsuite/18_support/headers/ciso646/macros.cc: Remove
dg-warning for c++17_only effective target.
* testsuite/18_support/headers/ciso646/macros-2.cc: New test.

Reviewed-by: Tomasz Kamiński 
(cherry picked from commit af062510f4179aa7b13e632f77593deee8fe29f2)

Diff:
---
 libstdc++-v3/include/c_global/ccomplex |  2 ++
 libstdc++-v3/include/c_global/ciso646  | 18 +++---
 libstdc++-v3/include/c_global/cstdalign|  2 ++
 libstdc++-v3/include/c_global/cstdbool |  2 ++
 libstdc++-v3/include/c_global/ctgmath  |  2 ++
 .../testsuite/18_support/headers/ciso646/macros-2.cc   |  7 +++
 .../testsuite/18_support/headers/ciso646/macros.cc |  1 -
 7 files changed, 26 insertions(+), 8 deletions(-)

diff --git a/libstdc++-v3/include/c_global/ccomplex 
b/libstdc++-v3/include/c_global/ccomplex
index 7044cf74f6c7..a39273f4a8a2 100644
--- a/libstdc++-v3/include/c_global/ccomplex
+++ b/libstdc++-v3/include/c_global/ccomplex
@@ -24,6 +24,8 @@
 
 /** @file include/ccomplex
  *  This is a Standard C++ Library header.
+ *
+ *  @since C++11 (removed in C++20)
  */
 
 #ifndef _GLIBCXX_CCOMPLEX
diff --git a/libstdc++-v3/include/c_global/ciso646 
b/libstdc++-v3/include/c_global/ciso646
index a663e04caf08..6dec7df1631f 100644
--- a/libstdc++-v3/include/c_global/ciso646
+++ b/libstdc++-v3/include/c_global/ciso646
@@ -28,6 +28,8 @@
  *
  *  This is the C++ version of the Standard C Library header @c iso646.h,
  *  which is empty in C++.
+ *
+ *  @since C++11 (removed in C++20)
  */
 #ifndef _GLIBCXX_CISO646
 #define _GLIBCXX_CISO646
@@ -38,13 +40,15 @@
 
 #include 
 
-#if __cplusplus >= 202002L && ! _GLIBCXX_USE_DEPRECATED
-#  error " is not a standard header in C++20, use  to detect 
implementation-specific macros"
-#elif __cplusplus >= 201703L && defined __DEPRECATED
-#  pragma GCC diagnostic push
-#  pragma GCC diagnostic ignored "-Wc++23-extensions"
-#  warning " is deprecated in C++17, use  to detect 
implementation-specific macros"
-#  pragma GCC diagnostic pop
+#if __cplusplus >= 202002L
+#  if ! _GLIBCXX_USE_DEPRECATED
+#error " is not a standard header since C++20, use  to 
detect implementation-specific macros"
+#  elif defined __DEPRECATED
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wc++23-extensions"
+#warning " is not a standard header since C++20, use  to 
detect implementation-specific macros"
+#pragma GCC diagnostic pop
+#  endif
 #

[gcc r14-11765] Fortran: array subreferences and components of derived types [PR119986]

[Harald Anlauf via Gcc-cvs]

https://gcc.gnu.org/g:4a0e88c0c329ee69b13cdf2784c0c88edbca1f9e

commit r14-11765-g4a0e88c0c329ee69b13cdf2784c0c88edbca1f9e
Author: Harald Anlauf 
Date:   Sat May 3 20:35:57 2025 +0200

Fortran: array subreferences and components of derived types [PR119986]

PR fortran/119986

gcc/fortran/ChangeLog:

* expr.cc (is_subref_array): When searching for array references,
do not terminate early so that inquiry references to complex
components work.
* primary.cc (gfc_variable_attr): A substring reference can refer
to either a scalar or array character variable.  Adjust search
accordingly.

gcc/testsuite/ChangeLog:

* gfortran.dg/actual_array_subref.f90: New test.

(cherry picked from commit fceb6022798b587c9111d0241aaff72602dcd626)

Diff:
---
 gcc/fortran/expr.cc   |   1 +
 gcc/fortran/primary.cc|  13 ++-
 gcc/testsuite/gfortran.dg/actual_array_subref.f90 | 103 ++
 3 files changed, 113 insertions(+), 4 deletions(-)

diff --git a/gcc/fortran/expr.cc b/gcc/fortran/expr.cc
index 9ce0b950b617..c5b822ed0135 100644
--- a/gcc/fortran/expr.cc
+++ b/gcc/fortran/expr.cc
@@ -1168,6 +1168,7 @@ is_subref_array (gfc_expr * e)
 what follows cannot be a subreference array, unless there is a
 substring reference.  */
   if (!seen_array && ref->type == REF_COMPONENT
+ && ref->next == NULL
  && ref->u.c.component->ts.type != BT_CHARACTER
  && ref->u.c.component->ts.type != BT_CLASS
  && !gfc_bt_struct (ref->u.c.component->ts.type))
diff --git a/gcc/fortran/primary.cc b/gcc/fortran/primary.cc
index 478fbe2be61e..4ffa6d0d287f 100644
--- a/gcc/fortran/primary.cc
+++ b/gcc/fortran/primary.cc
@@ -2765,6 +2765,7 @@ gfc_variable_attr (gfc_expr *expr, gfc_typespec *ts)
   gfc_symbol *sym;
   gfc_component *comp;
   bool has_inquiry_part;
+  bool has_substring_ref = false;
 
   if (expr->expr_type != EXPR_VARIABLE
   && expr->expr_type != EXPR_FUNCTION
@@ -2827,7 +2828,12 @@ gfc_variable_attr (gfc_expr *expr, gfc_typespec *ts)
 
   has_inquiry_part = false;
   for (ref = expr->ref; ref; ref = ref->next)
-if (ref->type == REF_INQUIRY)
+if (ref->type == REF_SUBSTRING)
+  {
+   has_substring_ref = true;
+   optional = false;
+  }
+else if (ref->type == REF_INQUIRY)
   {
has_inquiry_part = true;
optional = false;
@@ -2875,9 +2881,8 @@ gfc_variable_attr (gfc_expr *expr, gfc_typespec *ts)
*ts = comp->ts;
/* Don't set the string length if a substring reference
   follows.  */
-   if (ts->type == BT_CHARACTER
-   && ref->next && ref->next->type == REF_SUBSTRING)
-   ts->u.cl = NULL;
+   if (ts->type == BT_CHARACTER && has_substring_ref)
+ ts->u.cl = NULL;
  }
 
if (comp->ts.type == BT_CLASS)
diff --git a/gcc/testsuite/gfortran.dg/actual_array_subref.f90 
b/gcc/testsuite/gfortran.dg/actual_array_subref.f90
new file mode 100644
index ..932d7aba1214
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/actual_array_subref.f90
@@ -0,0 +1,103 @@
+! { dg-do run }
+! { dg-additional-options "-O2 -fcheck=bounds" }
+!
+! PR fortran/119986
+!
+! Check passing of inquiry references of complex arrays and substring
+! references of character arrays when these are components of derived types.
+!
+! Extended version of report by Neil Carlson.
+
+program main
+  implicit none
+  integer :: j
+
+  complex, parameter  :: z0(*) = [(cmplx(j,-j),j=1,4)]
+  type :: cx
+ real :: re
+ real :: im
+  end type cx
+  type(cx), parameter :: c0(*) = [(cx   (j,-j),j=1,4)]
+
+  type :: my_type
+ complex  :: z(4) = z0
+ type(cx) :: c(4) = c0
+  end type my_type
+  type(my_type) :: x
+
+  character(*), parameter :: s0(*) = ["abcd","efgh","ijkl","mnop"]
+  character(*), parameter :: expect(*) = s0(:)(2:3)
+  character(len(s0))  :: s1(4) = s0
+
+  type :: str1
+ character(len(s0))   :: s(4)  = s0
+  end type str1
+  type(str1) :: string1
+
+  type :: str2
+ character(:), allocatable :: s(:)
+  end type str2
+  type(str2) :: string2
+
+  integer :: stopcode = 0
+
+  if (len(expect) /= 2)stop 1
+  if (expect(4)   /= "no") stop 2
+  if (any(c0 %re  /= [ 1, 2, 3, 4])) stop 3
+  if (any(c0 %im  /= [-1,-2,-3,-4])) stop 4
+
+  stopcode = 10
+  call fubar ( x%z %re, x%z %im)
+  call fubar ( x%c %re, x%c %im)
+
+  stopcode = 20
+  call fubar ((x%z %re), (x%z %im))
+  call fubar ((x%c %re), (x%c %im))
+
+  stopcode = 30
+  call fubar ([x%z %re], [x%z %im])
+  call fubar ([x%c %re], [x%c %im])
+
+  stopcode = 50
+  call chk ( s0(:)(2:3) )
+  call chk ((s0(:)(2:3)))
+  call chk ([s0(:)(2:3)])
+
+  stopcode = 60
+  call chk ( s1(:)(2:3) )
+  call chk ((s1(:)(2:3)))
+  call chk ([s1(:)(2:3)])
+
+  stopcode = 70
+  call chk ( string1%s(:)(2:3) )
+  call

[gcc r16-556] libstdc++: Restore std::scoped_lock for non-gthreads targets [PR120198]

[Jonathan Wakely via Libstdc++-cvs]

https://gcc.gnu.org/g:bdd2753f5f021a15a6c4ef02565356985fea1300

commit r16-556-gbdd2753f5f021a15a6c4ef02565356985fea1300
Author: Jonathan Wakely 
Date:   Fri May 9 17:50:52 2025 +0100

libstdc++: Restore std::scoped_lock for non-gthreads targets [PR120198]

This was a regression introduced with using version.def to define
feature test macros (r14-3248-g083b7f2833d71d). std::scoped_lock doesn't
need to depend on gthreads and so can be defined unconditionally, even
for freestanding.

libstdc++-v3/ChangeLog:

PR libstdc++/120198
* include/bits/version.def (scoped_lock): Do not depend on
gthreads or hosted.
* include/bits/version.h: Regenerate.
* include/std/mutex (scoped_lock): Update comment.
* testsuite/30_threads/scoped_lock/requirements/typedefs.cc:
Remove dg-require-gthreads and use custom lockable type instead
of std::mutex. Check that typedef is only present for a single
template argument.

Reviewed-by: Tomasz Kamiński 

Diff:
---
 libstdc++-v3/include/bits/version.def  |  2 --
 libstdc++-v3/include/bits/version.h|  2 +-
 libstdc++-v3/include/std/mutex |  2 +-
 .../scoped_lock/requirements/typedefs.cc   | 28 ++
 4 files changed, 26 insertions(+), 8 deletions(-)

diff --git a/libstdc++-v3/include/bits/version.def 
b/libstdc++-v3/include/bits/version.def
index f4d3de88bb2b..2d34a8dff7fc 100644
--- a/libstdc++-v3/include/bits/version.def
+++ b/libstdc++-v3/include/bits/version.def
@@ -679,8 +679,6 @@ ftms = {
   values = {
 v = 201703;
 cxxmin = 17;
-hosted = yes;
-gthread = yes;
   };
 };
 
diff --git a/libstdc++-v3/include/bits/version.h 
b/libstdc++-v3/include/bits/version.h
index d5d75cef2de1..24831f70b417 100644
--- a/libstdc++-v3/include/bits/version.h
+++ b/libstdc++-v3/include/bits/version.h
@@ -751,7 +751,7 @@
 #undef __glibcxx_want_parallel_algorithm
 
 #if !defined(__cpp_lib_scoped_lock)
-# if (__cplusplus >= 201703L) && defined(_GLIBCXX_HAS_GTHREADS) && 
_GLIBCXX_HOSTED
+# if (__cplusplus >= 201703L)
 #  define __glibcxx_scoped_lock 201703L
 #  if defined(__glibcxx_want_all) || defined(__glibcxx_want_scoped_lock)
 #   define __cpp_lib_scoped_lock 201703L
diff --git a/libstdc++-v3/include/std/mutex b/libstdc++-v3/include/std/mutex
index b3f89c0b9435..e575a81c138e 100644
--- a/libstdc++-v3/include/std/mutex
+++ b/libstdc++-v3/include/std/mutex
@@ -733,7 +733,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
}
 }
 
-#ifdef __cpp_lib_scoped_lock // C++ >= 17 && hosted && gthread
+#ifdef __cpp_lib_scoped_lock // C++ >= 17
   /** @brief A scoped lock type for multiple lockable objects.
*
* A scoped_lock controls mutex ownership within a scope, releasing
diff --git 
a/libstdc++-v3/testsuite/30_threads/scoped_lock/requirements/typedefs.cc 
b/libstdc++-v3/testsuite/30_threads/scoped_lock/requirements/typedefs.cc
index 4cd07da44657..ba52b36a3111 100644
--- a/libstdc++-v3/testsuite/30_threads/scoped_lock/requirements/typedefs.cc
+++ b/libstdc++-v3/testsuite/30_threads/scoped_lock/requirements/typedefs.cc
@@ -1,5 +1,4 @@
 // { dg-do compile { target c++17 } }
-// { dg-require-gthreads "" }
 // { dg-add-options no_pch }
 
 // Copyright (C) 2017-2025 Free Software Foundation, Inc.
@@ -29,9 +28,30 @@
 # error "Feature-test macro for scoped_lock has wrong value"
 #endif
 
+struct BasicLockable
+{
+  BasicLockable() = default;
+  ~BasicLockable() = default;
+  void lock() { }
+  void unlock() { }
+};
+
 void test01()
 {
-  // Check for required typedefs
-  typedef std::scoped_lock test_type;
-  typedef test_type::mutex_type mutex_type;
+  // Check for required typedef.
+  using test_type = std::scoped_lock;
+  static_assert(std::is_same_v);
+}
+
+template
+constexpr bool has_mutex_type = false;
+
+template
+constexpr bool has_mutex_type> = true;
+
+void test02()
+{
+  // Check that typedef is absent as required.
+  using test_type = std::scoped_lock;
+  static_assert(!has_mutex_type);
 }

[gcc r16-558] libstdc++: Remove #warning from for C++17 [PR120187]

[Jonathan Wakely via Libstdc++-cvs]

https://gcc.gnu.org/g:af062510f4179aa7b13e632f77593deee8fe29f2

commit r16-558-gaf062510f4179aa7b13e632f77593deee8fe29f2
Author: Jonathan Wakely 
Date:   Fri May 9 10:23:05 2025 +0100

libstdc++: Remove #warning from  for C++17 [PR120187]

Although  was removed from C++20, it was not formally
deprecated in C++17. In contrast, , , etc. were
formally deprecated in C++17 before being removed in C++20.

Due to the widespread convention of including  to detect
implementation-specific macros (such as _GLIBCXX_RELEASE) it causes
quite a lot of noise to issue deprecation warnings in C++17 mode. The
recommendation to include  instead does work for recent
compilers, even in C++17 mode, but isn't portable to older compilers
that don't provide  yet (e.g. GCC 8).

There are also potential objections to including  pre-C++20
when it wasn't defined by the standard. I don't have much sympathy for
this position, because including  for implementation-specific
macros wasn't part of the C++17 standard either. It's no more
non-standard to rely on  being present and defining those
macros than to rely on  defining them, and __has_include can be
used to detect whether  is present. However,  is being
used in the wild by popular libraries like Abseil and we can't change
versions of those that have already been released.

This removes the #warning in  for C++17 mode, so that we only
emit diagnostics for C++20 and later. With this change, including
 in C++20 or later gives an error if _GLIBCXX_USE_DEPRECATED is
defined to zero, otherwise a warning if -Wdeprecated is enabled,
otherwise no diagnostic is given.

This also adds "@since C++11 (removed in C++20)" to the Doxygen @file
comments in all the relevant headers.

The test for  needs to be updated to no longer expect a warning
for c++17_only. A new test is added to ensure that we get a warning
instead of an error when -D_GLIBCXX_USE_DEPRECATED=0 is not used.

libstdc++-v3/ChangeLog:

PR libstdc++/120187
* include/c_global/ciso646: Only give deprecated warning for
C++20 and later.
* include/c_global/ccomplex: Add @since to Doxygen comment.
* include/c_global/cstdalign: Likewise.
* include/c_global/cstdbool: Likewise.
* include/c_global/ctgmath: Likewise.
* testsuite/18_support/headers/ciso646/macros.cc: Remove
dg-warning for c++17_only effective target.
* testsuite/18_support/headers/ciso646/macros-2.cc: New test.

Reviewed-by: Tomasz Kamiński 

Diff:
---
 libstdc++-v3/include/c_global/ccomplex |  2 ++
 libstdc++-v3/include/c_global/ciso646  | 18 +++---
 libstdc++-v3/include/c_global/cstdalign|  2 ++
 libstdc++-v3/include/c_global/cstdbool |  2 ++
 libstdc++-v3/include/c_global/ctgmath  |  2 ++
 .../testsuite/18_support/headers/ciso646/macros-2.cc   |  7 +++
 .../testsuite/18_support/headers/ciso646/macros.cc |  1 -
 7 files changed, 26 insertions(+), 8 deletions(-)

diff --git a/libstdc++-v3/include/c_global/ccomplex 
b/libstdc++-v3/include/c_global/ccomplex
index 7044cf74f6c7..a39273f4a8a2 100644
--- a/libstdc++-v3/include/c_global/ccomplex
+++ b/libstdc++-v3/include/c_global/ccomplex
@@ -24,6 +24,8 @@
 
 /** @file include/ccomplex
  *  This is a Standard C++ Library header.
+ *
+ *  @since C++11 (removed in C++20)
  */
 
 #ifndef _GLIBCXX_CCOMPLEX
diff --git a/libstdc++-v3/include/c_global/ciso646 
b/libstdc++-v3/include/c_global/ciso646
index a663e04caf08..6dec7df1631f 100644
--- a/libstdc++-v3/include/c_global/ciso646
+++ b/libstdc++-v3/include/c_global/ciso646
@@ -28,6 +28,8 @@
  *
  *  This is the C++ version of the Standard C Library header @c iso646.h,
  *  which is empty in C++.
+ *
+ *  @since C++11 (removed in C++20)
  */
 #ifndef _GLIBCXX_CISO646
 #define _GLIBCXX_CISO646
@@ -38,13 +40,15 @@
 
 #include 
 
-#if __cplusplus >= 202002L && ! _GLIBCXX_USE_DEPRECATED
-#  error " is not a standard header in C++20, use  to detect 
implementation-specific macros"
-#elif __cplusplus >= 201703L && defined __DEPRECATED
-#  pragma GCC diagnostic push
-#  pragma GCC diagnostic ignored "-Wc++23-extensions"
-#  warning " is deprecated in C++17, use  to detect 
implementation-specific macros"
-#  pragma GCC diagnostic pop
+#if __cplusplus >= 202002L
+#  if ! _GLIBCXX_USE_DEPRECATED
+#error " is not a standard header since C++20, use  to 
detect implementation-specific macros"
+#  elif defined __DEPRECATED
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wc++23-extensions"
+#warning " is not a standard header since C++20, use  to 
detect implementation-specific macros"
+#pragma GCC diagnostic pop
+#  endif
 #endif
 
 #endif
diff --git a/libstdc++-v3/include/c_global/cstdalign 
b/li

[gcc r16-557] libstdc++: Update C++23 status table

[Jonathan Wakely via Gcc-cvs]

https://gcc.gnu.org/g:203eb116ec60afba61c9fbe6cc4b54310ecda9de

commit r16-557-g203eb116ec60afba61c9fbe6cc4b54310ecda9de
Author: Jonathan Wakely 
Date:   Thu May 8 15:35:43 2025 +0100

libstdc++: Update C++23 status table

This should have been updated for the GCC 15.1 release.

libstdc++-v3/ChangeLog:

* doc/xml/manual/status_cxx2023.xml: Update status of proposals
implemented after GCC 14.2 release.
* doc/html/manual/status.html: Regenerate.

Diff:
---
 libstdc++-v3/doc/html/manual/status.html   | 40 ---
 libstdc++-v3/doc/xml/manual/status_cxx2023.xml | 45 +-
 2 files changed, 45 insertions(+), 40 deletions(-)

diff --git a/libstdc++-v3/doc/html/manual/status.html 
b/libstdc++-v3/doc/html/manual/status.html
index 5668c69664cd..5ca35217f66f 100644
--- a/libstdc++-v3/doc/html/manual/status.html
+++ b/libstdc++-v3/doc/html/manual/status.html
@@ -1847,13 +1847,15 @@ or any notes about the implementation.
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p2278r4.html"; 
target="_top">
 P2278R4
 
-   13.1  __cpp_lib_ranges_as_const >= 202207L  ranges::to 

+   13.1  __cpp_lib_ranges_as_const >= 202207L  ranges::to 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p1206r7.pdf"; 
target="_top">
 P1206R7
 
-   14.1 (ranges::to 
function) 
-   __cpp_lib_containers_ranges >= 202202L,
-   __cpp_lib_ranges_to_container >= 202202L
+  
+14.1 (ranges::to function)  15.1 (new members 
in containers) 
+  
+   __cpp_lib_ranges_to_container >= 202202L,
+   __cpp_lib_containers_ranges >= 202202L
Ranges iterators as 
inputs to non-Ranges algorithms 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p2408r5.html"; 
target="_top">
 P2408R5
@@ -1893,11 +1895,11 @@ or any notes about the implementation.
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p2322r6.html"; 
target="_top">
 P2322R6
 
-   13.1  __cpp_lib_ranges_fold >= 202207L  Relaxing Ranges Just A Smidge
+   13.1  __cpp_lib_ranges_fold >= 202207L  Relaxing Ranges Just A Smidge
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2023/p2609r3.html"; 
target="_top">
 P2609R3
 
-__cpp_lib_ranges >= 202302L 
+   14.3  __cpp_lib_ranges >= 202302L 
 Compile-time programming
A proposal for a type trait to detect 
scoped enumerations 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p1048r1.pdf"; 
target="_top">
@@ -1927,11 +1929,11 @@ or any notes about the implementation.
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p0533r9.pdf"; 
target="_top">
 P0533R9
 
-__cpp_lib_constexpr_cmath >= 202202L  Deprecate std::aligned_storage and 
std::aligned_union 
+__cpp_lib_constexpr_cmath >= 202202L  Deprecate std::aligned_storage and std::aligned_union 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p1413r3.pdf"; 
target="_top">
 P1413R3
 
-     A type trait to detect reference binding to temporary 
+   13.1   A type trait to detect reference binding to temporary 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p2255r2.html"; 
target="_top">
 P2255R2
 
@@ -1973,15 +1975,15 @@ or any notes about the implementation.
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p2077r3.html"; 
target="_top">
 P2077R3
 
-__cpp_lib_associative_heterogeneous_erasure >= 202110L 
  
+__cpp_lib_associative_heterogeneous_erasure >= 202110L 
  

 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p0429r9.pdf"; 
target="_top">
 P0429R9
 
-__cpp_lib_flat_map >= 202207L   

+   15.1  __cpp_lib_flat_map >= 202207L   
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p1222r4.pdf"; 
target="_top">
 P1222R4
 
-__cpp_lib_flat_set >= 202207L  mdspan 
+   15.1  __cpp_lib_flat_set >= 202207L  mdspan 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p0009r18.html"; 
target="_top">
 P0009R18
 
@@ -2048,27 +2050,29 @@ or any notes about the implementation.
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p2508r1.html"; 
target="_top">
 P2508R1
 
-   13.1 (feature test macro not defined) __cpp_lib_format >= 202207L 

+   13.1 (feature test macro not updated until 
15.1)  __cpp_lib_format >= 
202207L 
Clarify handling of encodings in localized formatting of chrono types
   
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p2419r2.html"; 
target="_top">
 P2419R2
 
-__cpp_lib_format >= 202207L 
+   15.1  __cpp_lib_format >= 202207L 
Formatt

[gcc r16-559] libstdc++: Fix constraint recursion in std::expected's operator== [PR119714]

[Patrick Palka via Gcc-cvs]

https://gcc.gnu.org/g:91bc8169edd9038d78f38bd813287d72e6345c26

commit r16-559-g91bc8169edd9038d78f38bd813287d72e6345c26
Author: Patrick Palka 
Date:   Mon May 12 09:15:34 2025 -0400

libstdc++: Fix constraint recursion in std::expected's operator== [PR119714]

This std::expected friend operator== is prone to constraint recursion
after CWG 2369 for the same reason as basic_const_iterator's comparison
operators were before the r15-7757-g4342c50ca84ae5 workaround.  This
patch works around the constraint recursion here in a similar manner,
by making the function parameter of type std::expected dependent in a
trivial way.

PR libstdc++/119714
PR libstdc++/112490

libstdc++-v3/ChangeLog:

* include/std/expected (expected::operator==): Replace
non-dependent std::expected function parameter with a dependent
one of type expected<_Vp, _Er> where _Vp matches _Tp.
* testsuite/20_util/expected/119714.cc: New test.

Reviewed-by: Tomasz Kamiński 
Reviewed-by: Jonathan Wakely 

Diff:
---
 libstdc++-v3/include/std/expected | 4 ++--
 libstdc++-v3/testsuite/20_util/expected/119714.cc | 9 +
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/libstdc++-v3/include/std/expected 
b/libstdc++-v3/include/std/expected
index 5dc1dfbe5b8a..60f1565f15b9 100644
--- a/libstdc++-v3/include/std/expected
+++ b/libstdc++-v3/include/std/expected
@@ -1169,13 +1169,13 @@ namespace __expected
return !__y.has_value() && bool(__x.error() == __y.error());
}
 
-  template
+  template _Vp>
requires (!__expected::__is_expected<_Up>)
  && requires (const _Tp& __t, const _Up& __u) {
{ __t == __u } -> convertible_to;
  }
friend constexpr bool
-   operator==(const expected& __x, const _Up& __v)
+   operator==(const expected<_Vp, _Er>& __x, const _Up& __v)
noexcept(noexcept(bool(*__x == __v)))
{ return __x.has_value() && bool(*__x == __v); }
 
diff --git a/libstdc++-v3/testsuite/20_util/expected/119714.cc 
b/libstdc++-v3/testsuite/20_util/expected/119714.cc
new file mode 100644
index ..a8dc6e891e1d
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/expected/119714.cc
@@ -0,0 +1,9 @@
+// { dg-do compile { target c++23 } }
+
+// PR libstdc++/119714 - constraint recursion with std::expected::operator==
+
+#include 
+#include 
+
+using I = std::vector>::iterator;
+static_assert(std::totally_ordered);

[gcc r16-562] testsuite: arm: Fix unsigned-extend-2.c [PR116445]

[Christophe Lyon via Gcc-cvs]

https://gcc.gnu.org/g:20c25919132b497c3a46a4bc4044f65b6459b99e

commit r16-562-g20c25919132b497c3a46a4bc4044f65b6459b99e
Author: Christophe Lyon 
Date:   Tue Apr 8 16:24:18 2025 +

testsuite: arm: Fix unsigned-extend-2.c [PR116445]

The test was designed to pass with thumb2, but code generation changed
with the introduction of Low Overhead Loops, so the test can fail if
one overrides the flags when running the testsuite.

In addition, useless subtract / extension instructions require -O2 to
remove them (-O is not sufficient), so replace -O with -O2 in
dg-options.

arm_thumb2_ok_no_arm_v8_1m_lob does not do what the test needs (it can
fail because some flags conflict, rather than because lob are
supported, and we do not need to check runtime support in this test
anyway), so the patch reverts back to arm_thumb2_ok.

Finally, replace the scan-assembler directives with
check-function-bodies, checking both types of code generation (with
and without LOL).  Depending on architecture version, the two insns
and r0, r1, r0, lsr #1
andsr3, r3, #255
can be swapped, so accept both orders.

gcc/testsuite/ChangeLog:

PR target/116445
* gcc.target/arm/unsigned-extend-2.c: Fix dg directives.

Diff:
---
 gcc/testsuite/gcc.target/arm/unsigned-extend-2.c | 33 +++-
 1 file changed, 27 insertions(+), 6 deletions(-)

diff --git a/gcc/testsuite/gcc.target/arm/unsigned-extend-2.c 
b/gcc/testsuite/gcc.target/arm/unsigned-extend-2.c
index 41ee994c1ec2..d9f95a14277b 100644
--- a/gcc/testsuite/gcc.target/arm/unsigned-extend-2.c
+++ b/gcc/testsuite/gcc.target/arm/unsigned-extend-2.c
@@ -1,6 +1,31 @@
 /* { dg-do compile } */
-/* { dg-require-effective-target arm_thumb2_ok_no_arm_v8_1m_lob } */
-/* { dg-options "-O" } */
+/* { dg-require-effective-target arm_thumb2_ok } */
+/* { dg-options "-O2 -mthumb" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** foo:
+** movs(r[0-9]+), #8
+** (
+** subs\1, \1, #1
+** ands\1, \1, #255
+** and r0, r1, r0, lsr #1
+** bne .L[0-9]+
+** bx  lr
+** |
+** subs\1, \1, #1
+** and r0, r1, r0, lsr #1
+** ands\1, \1, #255
+** bne .L[0-9]+
+** bx  lr
+** |
+** push{lr}
+** dls lr, \1
+** and r0, r1, r0, lsr #1
+** le  lr, .L[0-9]+
+** pop {pc}
+** )
+*/
 
 unsigned short foo (unsigned short x, unsigned short c)
 {
@@ -12,7 +37,3 @@ unsigned short foo (unsigned short x, unsigned short c)
 }
   return x;
 }
-
-/* { dg-final { scan-assembler "ands" } } */
-/* { dg-final { scan-assembler-not "uxtb" } } */
-/* { dg-final { scan-assembler-not "cmp" } } */

[gcc r16-564] nvptx: Support '-mptx=5.0'

[Thomas Schwinge via Gcc-cvs]

https://gcc.gnu.org/g:97616687149f115e0ab946b9a05a9f8c1e47429e

commit r16-564-g97616687149f115e0ab946b9a05a9f8c1e47429e
Author: Thomas Schwinge 
Date:   Wed May 7 15:37:17 2025 +0200

nvptx: Support '-mptx=5.0'

gcc/
* config/nvptx/nvptx-opts.h (enum ptx_version): Add
'PTX_VERSION_5_0'.
* config/nvptx/nvptx.cc (ptx_version_to_string)
(ptx_version_to_number): Adjust.
* config/nvptx/nvptx.h (TARGET_PTX_5_0): New.
* config/nvptx/nvptx.opt (Enum(ptx_version)): Add 'EnumValue'
'5.0' for 'PTX_VERSION_5_0'.
* doc/invoke.texi (Nvidia PTX Options): Document '-mptx=5.0'.
gcc/testsuite/
* gcc.target/nvptx/mptx=5.0.c: New.

Diff:
---
 gcc/config/nvptx/nvptx-opts.h |  1 +
 gcc/config/nvptx/nvptx.cc |  4 
 gcc/config/nvptx/nvptx.h  |  1 +
 gcc/config/nvptx/nvptx.opt|  3 +++
 gcc/doc/invoke.texi   |  1 +
 gcc/testsuite/gcc.target/nvptx/mptx=5.0.c | 19 +++
 6 files changed, 29 insertions(+)

diff --git a/gcc/config/nvptx/nvptx-opts.h b/gcc/config/nvptx/nvptx-opts.h
index d8867017892b..07bcd32d55c0 100644
--- a/gcc/config/nvptx/nvptx-opts.h
+++ b/gcc/config/nvptx/nvptx-opts.h
@@ -40,6 +40,7 @@ enum ptx_version
   PTX_VERSION_3_1,
   PTX_VERSION_4_1,
   PTX_VERSION_4_2,
+  PTX_VERSION_5_0,
   PTX_VERSION_6_0,
   PTX_VERSION_6_3,
   PTX_VERSION_7_0,
diff --git a/gcc/config/nvptx/nvptx.cc b/gcc/config/nvptx/nvptx.cc
index f8939715dee2..d5827074f65a 100644
--- a/gcc/config/nvptx/nvptx.cc
+++ b/gcc/config/nvptx/nvptx.cc
@@ -268,6 +268,8 @@ ptx_version_to_string (enum ptx_version v)
   return "4.1";
 case PTX_VERSION_4_2:
   return "4.2";
+case PTX_VERSION_5_0:
+  return "5.0";
 case PTX_VERSION_6_0:
   return "6.0";
 case PTX_VERSION_6_3:
@@ -294,6 +296,8 @@ ptx_version_to_number (enum ptx_version v, bool major_p)
   return major_p ? 4 : 1;
 case PTX_VERSION_4_2:
   return major_p ? 4 : 2;
+case PTX_VERSION_5_0:
+  return major_p ? 5 : 0;
 case PTX_VERSION_6_0:
   return major_p ? 6 : 0;
 case PTX_VERSION_6_3:
diff --git a/gcc/config/nvptx/nvptx.h b/gcc/config/nvptx/nvptx.h
index 35ef4bdbd5e6..a2bb2fb50ff8 100644
--- a/gcc/config/nvptx/nvptx.h
+++ b/gcc/config/nvptx/nvptx.h
@@ -101,6 +101,7 @@
PTX ISA Version 3.1.  */
 #define TARGET_PTX_4_1 (ptx_version_option >= PTX_VERSION_4_1)
 #define TARGET_PTX_4_2 (ptx_version_option >= PTX_VERSION_4_2)
+#define TARGET_PTX_5_0 (ptx_version_option >= PTX_VERSION_5_0)
 #define TARGET_PTX_6_0 (ptx_version_option >= PTX_VERSION_6_0)
 #define TARGET_PTX_6_3 (ptx_version_option >= PTX_VERSION_6_3)
 #define TARGET_PTX_7_0 (ptx_version_option >= PTX_VERSION_7_0)
diff --git a/gcc/config/nvptx/nvptx.opt b/gcc/config/nvptx/nvptx.opt
index ce9fbc7312e0..d53a7271873c 100644
--- a/gcc/config/nvptx/nvptx.opt
+++ b/gcc/config/nvptx/nvptx.opt
@@ -133,6 +133,9 @@ Enum(ptx_version) String(4.1) Value(PTX_VERSION_4_1)
 EnumValue
 Enum(ptx_version) String(4.2) Value(PTX_VERSION_4_2)
 
+EnumValue
+Enum(ptx_version) String(5.0) Value(PTX_VERSION_5_0)
+
 EnumValue
 Enum(ptx_version) String(6.0) Value(PTX_VERSION_6_0)
 
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 699ee1cc0b75..56d7c1a9f16e 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -30724,6 +30724,7 @@ Generate code for the specified PTX ISA version.
 Valid version strings are
 @samp{3.1},
 @samp{4.1}, @samp{4.2},
+@samp{5.0},
 @samp{6.0}, @samp{6.3},
 @samp{7.0}, @samp{7.3}, and @samp{7.8}.
 The default PTX ISA version is the one that added support for the
diff --git a/gcc/testsuite/gcc.target/nvptx/mptx=5.0.c 
b/gcc/testsuite/gcc.target/nvptx/mptx=5.0.c
new file mode 100644
index ..5d6163e6ba72
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nvptx/mptx=5.0.c
@@ -0,0 +1,19 @@
+/* { dg-do assemble } */
+/* { dg-options {-march=sm_30 -mptx=5.0} } */
+/* { dg-additional-options -save-temps } */
+/* { dg-final { scan-assembler-times {(?n)^\.version   5\.0$} 1 } } */
+/* { dg-final { scan-assembler-times {(?n)^\.targetsm_30$} 1 } } */
+
+#if __PTX_ISA_VERSION_MAJOR__ != 5
+#error wrong value for __PTX_ISA_VERSION_MAJOR__
+#endif
+
+#if __PTX_ISA_VERSION_MINOR__ != 0
+#error wrong value for __PTX_ISA_VERSION_MINOR__
+#endif
+
+#if __PTX_SM__ != 300
+#error wrong value for __PTX_SM__
+#endif
+
+int dummy;

[gcc r16-566] GCN, nvptx offloading: Restrain 'WARNING: program timed out.' while in 'dynamic_cast'" [PR119692]

[Thomas Schwinge via Gcc-cvs]

https://gcc.gnu.org/g:b5f48e7872db30b8f174cb2c497868a358bf75d6

commit r16-566-gb5f48e7872db30b8f174cb2c497868a358bf75d6
Author: Thomas Schwinge 
Date:   Fri May 9 14:49:03 2025 +0200

GCN, nvptx offloading: Restrain 'WARNING: program timed out.' while in 
'dynamic_cast'" [PR119692]

PR target/119692
libgomp/
* testsuite/libgomp.c++/pr119692-1-4.C: '{ dg-timeout 10 }'.
* testsuite/libgomp.c++/pr119692-1-5.C: Likewise.
* testsuite/libgomp.c++/target-exceptions-bad_cast-1.C: Likewise.
* testsuite/libgomp.c++/target-exceptions-bad_cast-2.C: Likewise.
* testsuite/libgomp.oacc-c++/exceptions-bad_cast-1.C: Likewise.
* testsuite/libgomp.oacc-c++/exceptions-bad_cast-2.C: Likewise.

Diff:
---
 libgomp/testsuite/libgomp.c++/pr119692-1-4.C | 3 +++
 libgomp/testsuite/libgomp.c++/pr119692-1-5.C | 3 +++
 libgomp/testsuite/libgomp.c++/target-exceptions-bad_cast-1.C | 3 +++
 libgomp/testsuite/libgomp.c++/target-exceptions-bad_cast-2.C | 3 +++
 libgomp/testsuite/libgomp.oacc-c++/exceptions-bad_cast-1.C   | 3 +++
 libgomp/testsuite/libgomp.oacc-c++/exceptions-bad_cast-2.C   | 3 +++
 6 files changed, 18 insertions(+)

diff --git a/libgomp/testsuite/libgomp.c++/pr119692-1-4.C 
b/libgomp/testsuite/libgomp.c++/pr119692-1-4.C
index 6995f2633328..af9fe1c8c183 100644
--- a/libgomp/testsuite/libgomp.c++/pr119692-1-4.C
+++ b/libgomp/testsuite/libgomp.c++/pr119692-1-4.C
@@ -3,6 +3,9 @@
 /* { dg-additional-options -DDEFAULT=defaultmap(firstprivate) }
Wrong code for offloading execution.
{ dg-xfail-run-if PR119692 { offload_device } } */
+/* There are configurations where we 'WARNING: program timed out.' while in
+   'dynamic_cast', see 
.
+   { dg-timeout 10 } ... to make sure that happens quickly.  */
 /* { dg-additional-options -fdump-tree-gimple } */
 
 #include "pr119692-1-1.C"
diff --git a/libgomp/testsuite/libgomp.c++/pr119692-1-5.C 
b/libgomp/testsuite/libgomp.c++/pr119692-1-5.C
index 02121b6e9c51..e5c6e077fc8d 100644
--- a/libgomp/testsuite/libgomp.c++/pr119692-1-5.C
+++ b/libgomp/testsuite/libgomp.c++/pr119692-1-5.C
@@ -3,6 +3,9 @@
 /* { dg-additional-options -DDEFAULT=defaultmap(to) }
Wrong code for offloading execution.
{ dg-xfail-run-if PR119692 { offload_device } } */
+/* There are configurations where we 'WARNING: program timed out.' while in
+   'dynamic_cast', see 
.
+   { dg-timeout 10 } ... to make sure that happens quickly.  */
 /* { dg-additional-options -fdump-tree-gimple } */
 
 #include "pr119692-1-1.C"
diff --git a/libgomp/testsuite/libgomp.c++/target-exceptions-bad_cast-1.C 
b/libgomp/testsuite/libgomp.c++/target-exceptions-bad_cast-1.C
index 3848295fbabc..a862652f4a8e 100644
--- a/libgomp/testsuite/libgomp.c++/target-exceptions-bad_cast-1.C
+++ b/libgomp/testsuite/libgomp.c++/target-exceptions-bad_cast-1.C
@@ -23,3 +23,6 @@
PR119692.
 
{ dg-shouldfail {'std::bad_cast' exception} } */
+/* There are configurations where we 'WARNING: program timed out.' while in
+   'dynamic_cast', see 
.
+   { dg-timeout 10 } ... to make sure that happens quickly.  */
diff --git a/libgomp/testsuite/libgomp.c++/target-exceptions-bad_cast-2.C 
b/libgomp/testsuite/libgomp.c++/target-exceptions-bad_cast-2.C
index 88617400a723..ff15c9fa61f6 100644
--- a/libgomp/testsuite/libgomp.c++/target-exceptions-bad_cast-2.C
+++ b/libgomp/testsuite/libgomp.c++/target-exceptions-bad_cast-2.C
@@ -22,3 +22,6 @@
 
For GCN, nvptx offload execution, there is no 'catch'ing; any exception is 
fatal.
{ dg-shouldfail {'MyException' exception} { offload_device } } */
+/* There are configurations where we 'WARNING: program timed out.' while in
+   'dynamic_cast', see 
.
+   { dg-timeout 10 } ... to make sure that happens quickly.  */
diff --git a/libgomp/testsuite/libgomp.oacc-c++/exceptions-bad_cast-1.C 
b/libgomp/testsuite/libgomp.oacc-c++/exceptions-bad_cast-1.C
index 05456011ca1d..6957a6caec70 100644
--- a/libgomp/testsuite/libgomp.oacc-c++/exceptions-bad_cast-1.C
+++ b/libgomp/testsuite/libgomp.oacc-c++/exceptions-bad_cast-1.C
@@ -52,3 +52,6 @@ int main()
PR119692.
 
{ dg-shouldfail {'std::bad_cast' exception} } */
+/* There are configurations where we 'WARNING: program timed out.' while in
+   'dynamic_cast', see 
.
+   { dg-timeout 10 } ... to make sure that happens quickly.  */
diff --git a/libgomp/testsuite/libgomp.oacc-c++/exceptions-bad_cast-2.C 
b/libgomp/testsuite/libgomp.oacc-c++/exceptions-bad_cast-2.C
index 24399eff978b..0f84cf212c25 100644
--- a/libgomp/testsuite/libgomp.oacc-c++/exceptions-bad_cast-2.C
+++ b/libgomp/testsuite/libgomp.oacc-c++/exceptions-bad_cast-2.C
@@ -58,3 +58,6 @@ int mai

[gcc r16-565] nvptx: Support '-march=sm_61'

[Thomas Schwinge via Gcc-cvs]

https://gcc.gnu.org/g:7b53b88381179c5c8152bcb890460f66d9c88fac

commit r16-565-g7b53b88381179c5c8152bcb890460f66d9c88fac
Author: Thomas Schwinge 
Date:   Wed May 7 16:02:16 2025 +0200

nvptx: Support '-march=sm_61'

gcc/
* config/nvptx/nvptx-sm.def: Add '61'.
* config/nvptx/nvptx-gen.h: Regenerate.
* config/nvptx/nvptx-gen.opt: Likewise.
* config/nvptx/nvptx.cc (first_ptx_version_supporting_sm): Adjust.
* config/nvptx/nvptx.opt (-march-map=sm_61, -march-map=sm_62):
Likewise.
* config.gcc: Likewise.
* doc/invoke.texi (Nvidia PTX Options): Document '-march=sm_61'.
* config/nvptx/gen-multilib-matches-tests: Extend.
gcc/testsuite/
* gcc.target/nvptx/march-map=sm_61.c: Adjust.
* gcc.target/nvptx/march-map=sm_62.c: Likewise.
* gcc.target/nvptx/march=sm_61.c: New.
libgomp/
* testsuite/libgomp.c/declare-variant-3-sm61.c: New.
* testsuite/libgomp.c/declare-variant-3.h: Adjust.

Diff:
---
 gcc/config.gcc |  1 +
 gcc/config/nvptx/gen-multilib-matches-tests| 67 --
 gcc/config/nvptx/nvptx-gen.h   |  1 +
 gcc/config/nvptx/nvptx-gen.opt |  3 +
 gcc/config/nvptx/nvptx-sm.def  |  1 +
 gcc/config/nvptx/nvptx.cc  |  2 +
 gcc/config/nvptx/nvptx.opt |  4 +-
 gcc/doc/invoke.texi|  1 +
 gcc/testsuite/gcc.target/nvptx/march-map=sm_61.c   |  4 +-
 gcc/testsuite/gcc.target/nvptx/march-map=sm_62.c   |  4 +-
 gcc/testsuite/gcc.target/nvptx/march=sm_61.c   | 19 ++
 .../testsuite/libgomp.c/declare-variant-3-sm61.c   |  8 +++
 libgomp/testsuite/libgomp.c/declare-variant-3.h|  8 +++
 13 files changed, 111 insertions(+), 12 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index c9fe996f2f7c..2454ec70a07e 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -5658,6 +5658,7 @@ case "${target}" in
#TODO 'sm_[...]' list per 'nvptx-sm.def'.
sm_30 | sm_35 | sm_37 \
| sm_52 | sm_53 \
+   | sm_61 \
| sm_70 | sm_75 \
| sm_80 | sm_89 )
TM_MULTILIB_CONFIG="$TM_MULTILIB_CONFIG 
$nvptx_multilib"
diff --git a/gcc/config/nvptx/gen-multilib-matches-tests 
b/gcc/config/nvptx/gen-multilib-matches-tests
index a07f19adbdb1..fbfae880a2de 100644
--- a/gcc/config/nvptx/gen-multilib-matches-tests
+++ b/gcc/config/nvptx/gen-multilib-matches-tests
@@ -18,6 +18,7 @@ AEMM .=misa?sm_35
 AEMM .=misa?sm_37
 AEMM .=misa?sm_52
 AEMM .=misa?sm_53
+AEMM .=misa?sm_61
 AEMM .=misa?sm_70
 AEMM .=misa?sm_75
 AEMM .=misa?sm_80
@@ -32,14 +33,15 @@ AEMM .=misa?sm_35
 AEMM .=misa?sm_37
 AEMM .=misa?sm_52
 AEMM .=misa?sm_53
+AEMM .=misa?sm_61
 AEMM .=misa?sm_70
 AEMM .=misa?sm_75
 AEMM .=misa?sm_80
 CMMC
 
-BEGIN '--with-arch=sm_30', 
'--with-multilib-list=sm_30,sm_35,sm_37,sm_52,sm_53,sm_70,sm_75,sm_80,sm_89'
+BEGIN '--with-arch=sm_30', 
'--with-multilib-list=sm_30,sm_35,sm_37,sm_52,sm_53,sm_61,sm_70,sm_75,sm_80,sm_89'
 SMOID sm_30
-SMOIL sm_30 sm_35 sm_37 sm_52 sm_53 sm_70 sm_75 sm_80 sm_89
+SMOIL sm_30 sm_35 sm_37 sm_52 sm_53 sm_61 sm_70 sm_75 sm_80 sm_89
 AEMM .=misa?sm_30
 CMMC
 
@@ -52,6 +54,7 @@ AEMM .=misa?sm_35
 AEMM .=misa?sm_37
 AEMM .=misa?sm_52
 AEMM .=misa?sm_53
+AEMM .=misa?sm_61
 AEMM .=misa?sm_70
 AEMM .=misa?sm_75
 AEMM .=misa?sm_80
@@ -65,6 +68,7 @@ AEMM .=misa?sm_35
 AEMM .=misa?sm_37
 AEMM .=misa?sm_52
 AEMM .=misa?sm_53
+AEMM .=misa?sm_61
 AEMM .=misa?sm_70
 AEMM .=misa?sm_75
 AEMM .=misa?sm_80
@@ -79,6 +83,7 @@ AEMM misa?sm_30=misa?sm_35
 AEMM .=misa?sm_37
 AEMM .=misa?sm_52
 AEMM .=misa?sm_53
+AEMM .=misa?sm_61
 AEMM .=misa?sm_70
 AEMM .=misa?sm_75
 AEMM .=misa?sm_80
@@ -93,6 +98,7 @@ AEMM misa?sm_35=misa?sm_30
 AEMM misa?sm_35=misa?sm_37
 AEMM .=misa?sm_52
 AEMM .=misa?sm_53
+AEMM .=misa?sm_61
 AEMM .=misa?sm_70
 AEMM misa?sm_75=misa?sm_80
 AEMM misa?sm_75=misa?sm_89
@@ -106,6 +112,7 @@ AEMM misa?sm_30=misa?sm_35
 AEMM misa?sm_30=misa?sm_37
 AEMM misa?sm_30=misa?sm_52
 AEMM .=misa?sm_53
+AEMM .=misa?sm_61
 AEMM .=misa?sm_70
 AEMM .=misa?sm_75
 AEMM .=misa?sm_80
@@ -119,19 +126,55 @@ AEMM misa?sm_37=misa?sm_30
 AEMM misa?sm_37=misa?sm_35
 AEMM misa?sm_37=misa?sm_52
 AEMM .=misa?sm_53
+AEMM .=misa?sm_61
 AEMM .=misa?sm_70
 AEMM .=misa?sm_75
 AEMM .=misa?sm_80
 AEMM .=misa?sm_89
 CMMC
 
-BEGIN '--with-arch=sm_53', 
'--with-multilib-list=sm_53=sm_30,sm_35,sm_37,sm_52,sm_70,sm_75,sm_80,sm_89'
+BEGIN '--with-arch=sm_53', 
'--with-multilib-list=sm_30,sm_35,sm_37,sm_52,sm_61,sm_70,sm_75,sm_80,sm_89'
 SMOID sm_53
-SMOIL sm_53 sm_30 sm_35 sm_37 sm_52 sm_70 sm_75 sm_80 sm_89
+SMOIL sm_53 sm_30 sm_35 sm_37 sm_52 sm_61 sm_70 sm_75 sm_80 sm_89
 AEMM .=misa?sm_53
 CMMC
 
 
+

[gcc r16-563] GCN, nvptx libstdc++: Force use of '__atomic' builtins: revert 'atomicity_dir=cpu/generic/atomicity_

[Thomas Schwinge via Gcc-cvs]

https://gcc.gnu.org/g:1321df5bc05663021313c17f4af54b950aa05d01

commit r16-563-g1321df5bc05663021313c17f4af54b950aa05d01
Author: Thomas Schwinge 
Date:   Mon May 12 11:06:47 2025 +0200

GCN, nvptx libstdc++: Force use of '__atomic' builtins: revert 
'atomicity_dir=cpu/generic/atomicity_builtins' hard-coding [PR119645]"

Thanks to commit 86627faec10da53d7532805019e5296fcf15ac09
"libstdc++: Rewrite atomic builtin checks [PR70560]", for both GCN, nvptx
we now get:

+configure:16060: checking for atomic builtins for _Atomic_word
+[...]
+configure:16073: result: yes

..., and thus may revert the 'atomicity_dir=cpu/generic/atomicity_builtins'
hard-coding added in commit 059b5509c14904b55c37f659170240ae0d2c1c8e
"GCN, nvptx libstdc++: Force use of '__atomic' builtins [PR119645]".

PR target/119645
libstdc++-v3/
* configure.host [GCN, nvptx] (atomicity_dir): Don't set.

Diff:
---
 libstdc++-v3/configure.host | 11 ---
 1 file changed, 11 deletions(-)

diff --git a/libstdc++-v3/configure.host b/libstdc++-v3/configure.host
index 3cd1bb1c6eed..87a1822c661a 100644
--- a/libstdc++-v3/configure.host
+++ b/libstdc++-v3/configure.host
@@ -370,21 +370,10 @@ case "${host}" in
;;
 esac
 ;;
-  amdgcn-*-amdhsa)
-# To avoid greater pain elsewhere, force use of '__atomic' builtins,
-# regardless of the outcome of 'configure' checks; see PR119645
-# "GCN, nvptx: libstdc++ 'checking for atomic builtins [...]... no'".
-atomicity_dir=cpu/generic/atomicity_builtins
-;;
   arm*-*-freebsd*)
  
port_specific_symbol_files="\$(srcdir)/../config/os/gnu-linux/arm-eabi-extra.ver"
  ;;
   nvptx-*-none)
-# To avoid greater pain elsewhere, force use of '__atomic' builtins,
-# regardless of the outcome of 'configure' checks; see PR119645
-# "GCN, nvptx: libstdc++ 'checking for atomic builtins [...]... no'".
-atomicity_dir=cpu/generic/atomicity_builtins
-
 # For 'make all-target-libstdc++-v3', re 'alloca'/VLA usage:
 EXTRA_CFLAGS="${EXTRA_CFLAGS} -mfake-ptx-alloca"
 OPTIMIZE_CXXFLAGS="${OPTIMIZE_CXXFLAGS} -mfake-ptx-alloca"

[gcc r13-9650] libstdc++: Update C++23 status table

[Jonathan Wakely via Libstdc++-cvs]

https://gcc.gnu.org/g:a496464e2fe5181a979e55a000cf0c450523c877

commit r13-9650-ga496464e2fe5181a979e55a000cf0c450523c877
Author: Jonathan Wakely 
Date:   Thu May 8 15:35:43 2025 +0100

libstdc++: Update C++23 status table

This should have been updated for the GCC 13.1 release.

libstdc++-v3/ChangeLog:

* doc/xml/manual/status_cxx2023.xml: Update status of proposals
implemented for GCC 13.
* doc/html/manual/status.html: Regenerate.

Diff:
---
 libstdc++-v3/doc/html/manual/status.html   | 6 +++---
 libstdc++-v3/doc/xml/manual/status_cxx2023.xml | 5 ++---
 2 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/libstdc++-v3/doc/html/manual/status.html 
b/libstdc++-v3/doc/html/manual/status.html
index a2c89002289b..440fe109e131 100644
--- a/libstdc++-v3/doc/html/manual/status.html
+++ b/libstdc++-v3/doc/html/manual/status.html
@@ -1895,11 +1895,11 @@ or any notes about the implementation.
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p0533r9.pdf"; 
target="_top">
 P0533R9
 
-__cpp_lib_constexpr_cmath >= 202202L  Deprecate std::aligned_storage and 
std::aligned_union 
+__cpp_lib_constexpr_cmath >= 202202L  Deprecate std::aligned_storage and std::aligned_union 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p1413r3.pdf"; 
target="_top">
 P1413R3
 
-     A type trait to detect reference binding to 
temporary 
+   13.1   A type trait to detect reference binding to 
temporary 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p2255r2.html"; 
target="_top">
 P2255R2
 
@@ -1990,7 +1990,7 @@ or any notes about the implementation.
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p2508r1.html"; 
target="_top">
 P2508R1
 
-   13.1 (feature test macro not defined) __cpp_lib_format >= 202207L 

+   13.1 (feature test macro not updated) __cpp_lib_format >= 202207L 

Clarify handling of encodings in localized formatting of chrono types
   
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p2419r2.html"; 
target="_top">
diff --git a/libstdc++-v3/doc/xml/manual/status_cxx2023.xml 
b/libstdc++-v3/doc/xml/manual/status_cxx2023.xml
index ac1d3e0ec56b..e9ee70959320 100644
--- a/libstdc++-v3/doc/xml/manual/status_cxx2023.xml
+++ b/libstdc++-v3/doc/xml/manual/status_cxx2023.xml
@@ -472,14 +472,13 @@ or any notes about the implementation.
 
 
 
-  
Deprecate std::aligned_storage and std::aligned_union 
   
 http://www.w3.org/1999/xlink"; 
xlink:href="https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p1413r3.pdf";>
 P1413R3
 
   
-   
+   13.1 
   
 
 
@@ -717,7 +716,7 @@ or any notes about the implementation.
 P2508R1
 
   
-   13.1 (feature test macro not defined)
+   13.1 (feature test macro not updated)
__cpp_lib_format >= 202207L 
 

[gcc r15-9659] libstdc++: Fix availability of std::erase_if(std::flat_foo) [PR119427]

[Patrick Palka via Gcc-cvs]

https://gcc.gnu.org/g:0ff3b3122adfe0c479901da4fc28e367d89f185b

commit r15-9659-g0ff3b3122adfe0c479901da4fc28e367d89f185b
Author: Patrick Palka 
Date:   Tue Apr 29 08:21:35 2025 -0400

libstdc++: Fix availability of std::erase_if(std::flat_foo) [PR119427]

These std::erase_if overloads were wrongly implemented as hidden
friends, visible only via ADL, so erase_if(x) would work but not
std::erase_if(x).

PR libstdc++/119427

libstdc++-v3/ChangeLog:

* include/std/flat_map (_Flat_map_impl::erase_if): Replace
this hidden friend with ...
(_Flat_map_impl::_M_erase_if): ... this member function.
(flat_map): Export _Flat_map_impl::_M_erase_if.
(erase_if(flat_map)): Define.
(flat_multimap): Export _Flat_map_impl::_M_erase_if.
(erase_if(flat_multimap)): Define.
* include/std/flat_set (_Flat_set_impl::erase_if): Replace
with ...
(_Flat_set_impl::_M_erase_if): ... this member function.
(flat_set): Export _Flat_set_impl::_M_erase_if.
(erase_if(flat_set)): Define.
(flat_multiset): Export _Flat_set_impl::_M_erase_if.
(erase_if(flat_multiset)): Define.
* testsuite/23_containers/flat_map/1.cc (test07): New test.
* testsuite/23_containers/flat_multimap/1.cc (test07): New test.
* testsuite/23_containers/flat_multiset/1.cc (test09): New test.
* testsuite/23_containers/flat_set/1.cc (test09): New test.

Reviewed-by: Jonathan Wakely 
(cherry picked from commit aa93272cfd2233858da0792761387cc27f4d5ff3)

Diff:
---
 libstdc++-v3/include/std/flat_map  | 28 ++
 libstdc++-v3/include/std/flat_set  | 28 +-
 libstdc++-v3/testsuite/23_containers/flat_map/1.cc | 11 +
 .../testsuite/23_containers/flat_multimap/1.cc | 11 +
 .../testsuite/23_containers/flat_multiset/1.cc | 11 +
 libstdc++-v3/testsuite/23_containers/flat_set/1.cc | 11 +
 6 files changed, 89 insertions(+), 11 deletions(-)

diff --git a/libstdc++-v3/include/std/flat_map 
b/libstdc++-v3/include/std/flat_map
index 405caa8a81bf..6593988d213c 100644
--- a/libstdc++-v3/include/std/flat_map
+++ b/libstdc++-v3/include/std/flat_map
@@ -890,14 +890,14 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   { return __x.swap(__y); }
 
   template
-   friend size_type
-   erase_if(_Derived& __c, _Predicate __pred)
+   size_type
+   _M_erase_if(_Predicate __pred)
{
- auto __guard = __c._M_make_clear_guard();
- auto __zv = views::zip(__c._M_cont.keys, __c._M_cont.values);
+ auto __guard = _M_make_clear_guard();
+ auto __zv = views::zip(_M_cont.keys, _M_cont.values);
  auto __sr = ranges::remove_if(__zv, __pred);
  auto __erased = __sr.size();
- __c.erase(__c.end() - __erased, __c.end());
+ erase(end() - __erased, end());
  __guard._M_disable();
  return __erased;
}
@@ -1329,6 +1329,8 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   using _Impl::lower_bound;
   using _Impl::upper_bound;
   using _Impl::equal_range;
+
+  using _Impl::_M_erase_if;
 };
 
   template>
 { };
 
+  template
+typename flat_map<_Key, _Tp, _Compare, _KeyContainer, 
_MappedContainer>::size_type
+erase_if(flat_map<_Key, _Tp, _Compare, _KeyContainer, _MappedContainer>& 
__c,
+_Predicate __pred)
+{ return __c._M_erase_if(std::move(__pred)); }
+
   /* Class template flat_multimap - container adaptor
*
* @ingroup
@@ -1487,6 +1496,8 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   using _Impl::lower_bound;
   using _Impl::upper_bound;
   using _Impl::equal_range;
+
+  using _Impl::_M_erase_if;
 };
 
   template>
 { };
 
+  template
+typename flat_multimap<_Key, _Tp, _Compare, _KeyContainer, 
_MappedContainer>::size_type
+erase_if(flat_multimap<_Key, _Tp, _Compare, _KeyContainer, 
_MappedContainer>& __c,
+_Predicate __pred)
+{ return __c._M_erase_if(std::move(__pred)); }
+
 _GLIBCXX_END_NAMESPACE_VERSION
 } // namespace std
 #endif // __cpp_lib_flat_map
diff --git a/libstdc++-v3/include/std/flat_set 
b/libstdc++-v3/include/std/flat_set
index 3e15d1af4162..c48340d79809 100644
--- a/libstdc++-v3/include/std/flat_set
+++ b/libstdc++-v3/include/std/flat_set
@@ -745,15 +745,15 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   { return __x.swap(__y); }
 
   template
-   friend size_type
-   erase_if(_Derived& __c, _Predicate __pred)
+   size_type
+   _M_erase_if(_Predicate __pred)
{
- auto __guard = __c._M_make_clear_guard();
- auto __first = __c._M_cont.begin();
- auto __last = __c._M_cont.end();
+ auto __guard = _M_make_clear_guard();
+ auto __first = _M_cont.begin();
+ auto __last = _M_cont.end();

[gcc r15-9660] libstdc++: Fix constraint recursion in std::expected's operator== [PR119714]

[Patrick Palka via Libstdc++-cvs]

https://gcc.gnu.org/g:0b76b58a5875d519f95a5af661fb64e42a42ed8e

commit r15-9660-g0b76b58a5875d519f95a5af661fb64e42a42ed8e
Author: Patrick Palka 
Date:   Mon May 12 09:15:34 2025 -0400

libstdc++: Fix constraint recursion in std::expected's operator== [PR119714]

This std::expected friend operator== is prone to constraint recursion
after CWG 2369 for the same reason as basic_const_iterator's comparison
operators were before the r15-7757-g4342c50ca84ae5 workaround.  This
patch works around the constraint recursion here in a similar manner,
by making the function parameter of type std::expected dependent in a
trivial way.

PR libstdc++/119714
PR libstdc++/112490

libstdc++-v3/ChangeLog:

* include/std/expected (expected::operator==): Replace
non-dependent std::expected function parameter with a dependent
one of type expected<_Vp, _Er> where _Vp matches _Tp.
* testsuite/20_util/expected/119714.cc: New test.

Reviewed-by: Tomasz Kamiński 
Reviewed-by: Jonathan Wakely 
(cherry picked from commit 91bc8169edd9038d78f38bd813287d72e6345c26)

Diff:
---
 libstdc++-v3/include/std/expected | 4 ++--
 libstdc++-v3/testsuite/20_util/expected/119714.cc | 9 +
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/libstdc++-v3/include/std/expected 
b/libstdc++-v3/include/std/expected
index 5dc1dfbe5b8a..60f1565f15b9 100644
--- a/libstdc++-v3/include/std/expected
+++ b/libstdc++-v3/include/std/expected
@@ -1169,13 +1169,13 @@ namespace __expected
return !__y.has_value() && bool(__x.error() == __y.error());
}
 
-  template
+  template _Vp>
requires (!__expected::__is_expected<_Up>)
  && requires (const _Tp& __t, const _Up& __u) {
{ __t == __u } -> convertible_to;
  }
friend constexpr bool
-   operator==(const expected& __x, const _Up& __v)
+   operator==(const expected<_Vp, _Er>& __x, const _Up& __v)
noexcept(noexcept(bool(*__x == __v)))
{ return __x.has_value() && bool(*__x == __v); }
 
diff --git a/libstdc++-v3/testsuite/20_util/expected/119714.cc 
b/libstdc++-v3/testsuite/20_util/expected/119714.cc
new file mode 100644
index ..a8dc6e891e1d
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/expected/119714.cc
@@ -0,0 +1,9 @@
+// { dg-do compile { target c++23 } }
+
+// PR libstdc++/119714 - constraint recursion with std::expected::operator==
+
+#include 
+#include 
+
+using I = std::vector>::iterator;
+static_assert(std::totally_ordered);

[gcc r14-11762] libstdc++: Update C++23 status table

[Jonathan Wakely via Libstdc++-cvs]

https://gcc.gnu.org/g:8f53df911617254d8d2b876d39f5620cc41a87a4

commit r14-11762-g8f53df911617254d8d2b876d39f5620cc41a87a4
Author: Jonathan Wakely 
Date:   Thu May 8 15:35:43 2025 +0100

libstdc++: Update C++23 status table

P2609 was backported to gcc-14.

libstdc++-v3/ChangeLog:

* doc/xml/manual/status_cxx2023.xml: Update status of proposal
implemented after GCC 14.2 release.
* doc/html/manual/status.html: Regenerate.

Diff:
---
 libstdc++-v3/doc/html/manual/status.html   | 10 +-
 libstdc++-v3/doc/xml/manual/status_cxx2023.xml |  8 +++-
 2 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/libstdc++-v3/doc/html/manual/status.html 
b/libstdc++-v3/doc/html/manual/status.html
index 6dc4535aff67..b0be8906ebc7 100644
--- a/libstdc++-v3/doc/html/manual/status.html
+++ b/libstdc++-v3/doc/html/manual/status.html
@@ -1878,11 +1878,11 @@ or any notes about the implementation.
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p2322r6.html"; 
target="_top">
 P2322R6
 
-   13.1  __cpp_lib_ranges_fold >= 202207L  Relaxing Ranges Just A Smidge
+   13.1  __cpp_lib_ranges_fold >= 202207L  Relaxing Ranges Just A Smidge
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2023/p2609r3.html"; 
target="_top">
 P2609R3
 
-__cpp_lib_ranges >= 202302L 
+   14.3  __cpp_lib_ranges >= 202302L 
 Compile-time programming
A proposal for a type trait to detect 
scoped enumerations 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p1048r1.pdf"; 
target="_top">
@@ -1912,11 +1912,11 @@ or any notes about the implementation.
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p0533r9.pdf"; 
target="_top">
 P0533R9
 
-__cpp_lib_constexpr_cmath >= 202202L  Deprecate std::aligned_storage and 
std::aligned_union 
+__cpp_lib_constexpr_cmath >= 202202L  Deprecate std::aligned_storage and std::aligned_union 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p1413r3.pdf"; 
target="_top">
 P1413R3
 
-     A type trait to detect reference binding to temporary 
+   13.1   A type trait to detect reference binding to temporary 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p2255r2.html"; 
target="_top">
 P2255R2
 
@@ -2033,7 +2033,7 @@ or any notes about the implementation.
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p2508r1.html"; 
target="_top">
 P2508R1
 
-   13.1 (feature test macro not defined) __cpp_lib_format >= 202207L 

+   13.1 (feature test macro not updated) __cpp_lib_format >= 202207L 

Clarify handling of encodings in localized formatting of chrono types
   
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p2419r2.html"; 
target="_top">
diff --git a/libstdc++-v3/doc/xml/manual/status_cxx2023.xml 
b/libstdc++-v3/doc/xml/manual/status_cxx2023.xml
index f04b1a344757..365a03cd1c37 100644
--- a/libstdc++-v3/doc/xml/manual/status_cxx2023.xml
+++ b/libstdc++-v3/doc/xml/manual/status_cxx2023.xml
@@ -418,14 +418,13 @@ or any notes about the implementation.
 
 
 
-  
Relaxing Ranges Just A Smidge
   
 http://www.w3.org/1999/xlink"; 
xlink:href="https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2023/p2609r3.html";>
 P2609R3
 
   
-   
+   14.3 
__cpp_lib_ranges >= 202302L 
 
 
@@ -513,14 +512,13 @@ or any notes about the implementation.
 
 
 
-  
Deprecate std::aligned_storage and std::aligned_union 
   
 http://www.w3.org/1999/xlink"; 
xlink:href="https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p1413r3.pdf";>
 P1413R3
 
   
-   
+   13.1 
   
 
 
@@ -823,7 +821,7 @@ or any notes about the implementation.
 P2508R1
 
   
-   13.1 (feature test macro not defined)
+   13.1 (feature test macro not updated)
__cpp_lib_format >= 202207L 
 

[gcc r15-9661] libstdc++: Update C++23 status table

[Jonathan Wakely via Libstdc++-cvs]

https://gcc.gnu.org/g:981abdf8da111a5d1b8a8e01cdc5bbe7673cb332

commit r15-9661-g981abdf8da111a5d1b8a8e01cdc5bbe7673cb332
Author: Jonathan Wakely 
Date:   Thu May 8 15:35:43 2025 +0100

libstdc++: Update C++23 status table

This should have been updated for the GCC 15.1 release.

libstdc++-v3/ChangeLog:

* doc/xml/manual/status_cxx2023.xml: Update status of proposals
implemented after GCC 14.2 release.
* doc/html/*: Regenerate.

(cherry picked from commit 203eb116ec60afba61c9fbe6cc4b54310ecda9de)

Diff:
---
 .../doc/html/manual/source_code_style.html |  2 +-
 libstdc++-v3/doc/html/manual/status.html   | 40 ++-
 libstdc++-v3/doc/xml/manual/status_cxx2023.xml | 45 +++---
 3 files changed, 46 insertions(+), 41 deletions(-)

diff --git a/libstdc++-v3/doc/html/manual/source_code_style.html 
b/libstdc++-v3/doc/html/manual/source_code_style.html
index a66e3a079471..b0b22683f67c 100644
--- a/libstdc++-v3/doc/html/manual/source_code_style.html
+++ b/libstdc++-v3/doc/html/manual/source_code_style.html
@@ -474,7 +474,7 @@
 
   Examples:  _M_num_elements  _M_initialize 
()
 
-  Static data and function members, constants, and enumerations: _S_.*
+  Static data members, constants, and enumerations: _S_.*
 
   Examples: _S_max_elements  _S_default_value
 
diff --git a/libstdc++-v3/doc/html/manual/status.html 
b/libstdc++-v3/doc/html/manual/status.html
index 664c1426da71..81a41c6c96b7 100644
--- a/libstdc++-v3/doc/html/manual/status.html
+++ b/libstdc++-v3/doc/html/manual/status.html
@@ -1847,13 +1847,15 @@ or any notes about the implementation.
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p2278r4.html"; 
target="_top">
 P2278R4
 
-   13.1  __cpp_lib_ranges_as_const >= 202207L  ranges::to 

+   13.1  __cpp_lib_ranges_as_const >= 202207L  ranges::to 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p1206r7.pdf"; 
target="_top">
 P1206R7
 
-   14.1 (ranges::to 
function) 
-   __cpp_lib_containers_ranges >= 202202L,
-   __cpp_lib_ranges_to_container >= 202202L
+  
+14.1 (ranges::to function)  15.1 (new members 
in containers) 
+  
+   __cpp_lib_ranges_to_container >= 202202L,
+   __cpp_lib_containers_ranges >= 202202L
Ranges iterators as 
inputs to non-Ranges algorithms 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p2408r5.html"; 
target="_top">
 P2408R5
@@ -1893,11 +1895,11 @@ or any notes about the implementation.
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p2322r6.html"; 
target="_top">
 P2322R6
 
-   13.1  __cpp_lib_ranges_fold >= 202207L  Relaxing Ranges Just A Smidge
+   13.1  __cpp_lib_ranges_fold >= 202207L  Relaxing Ranges Just A Smidge
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2023/p2609r3.html"; 
target="_top">
 P2609R3
 
-__cpp_lib_ranges >= 202302L 
+   14.3  __cpp_lib_ranges >= 202302L 
 Compile-time programming
A proposal for a type trait to detect 
scoped enumerations 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p1048r1.pdf"; 
target="_top">
@@ -1927,11 +1929,11 @@ or any notes about the implementation.
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p0533r9.pdf"; 
target="_top">
 P0533R9
 
-__cpp_lib_constexpr_cmath >= 202202L  Deprecate std::aligned_storage and 
std::aligned_union 
+__cpp_lib_constexpr_cmath >= 202202L  Deprecate std::aligned_storage and std::aligned_union 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p1413r3.pdf"; 
target="_top">
 P1413R3
 
-     A type trait to detect reference binding to temporary 
+   13.1   A type trait to detect reference binding to temporary 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p2255r2.html"; 
target="_top">
 P2255R2
 
@@ -1973,15 +1975,15 @@ or any notes about the implementation.
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p2077r3.html"; 
target="_top">
 P2077R3
 
-__cpp_lib_associative_heterogeneous_erasure >= 202110L 
  
+__cpp_lib_associative_heterogeneous_erasure >= 202110L 
  

 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p0429r9.pdf"; 
target="_top">
 P0429R9
 
-__cpp_lib_flat_map >= 202207L   

+   15.1  __cpp_lib_flat_map >= 202207L   
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p1222r4.pdf"; 
target="_top">
 P1222R4
 
-__cpp_lib_flat_set >= 202207L  mdspan 
+   15.1  __cpp_lib_flat_set >= 202207L  mdspan 
 https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2022/p0009r18.html"; 
target="_top">
 P0009R18

[gcc r16-572] optabs: Remove cmov optab [PR120230]

[Andrew Pinski via Gcc-cvs]

https://gcc.gnu.org/g:213c64962d24fa8a4b2f3d7a9c5508f9daed9fa2

commit r16-572-g213c64962d24fa8a4b2f3d7a9c5508f9daed9fa2
Author: Andrew Pinski 
Date:   Sun May 11 22:11:38 2025 -0700

optabs: Remove cmov optab [PR120230]

cmov optab was added back in r0-24110-g1c0290eaac4094
(https://gcc.gnu.org/pipermail/gcc-patches/1999-September/018596.html)
but it was never used. movcc is used instead and since 
r0-93453-gf90b7a5a7913cc (cond-optab),
movcc becomes what cmov_optab was going to be; in having a combined compare 
and move optab.

Note the only target which seems to have implemented this optab is aarch64; 
will remove
that in a different patch.

Bootstrapped and tested on x86_64-linux-gnu.

PR middle-end/120230
gcc/ChangeLog:

* optabs.cc (can_compare_p): Remove support for ccp_cmov.
* optabs.def (cmov_optab): Remove.
* optabs.h (can_compare_purpose): Remove ccp_cmov.

Signed-off-by: Andrew Pinski 

Diff:
---
 gcc/optabs.cc  | 3 ---
 gcc/optabs.def | 1 -
 gcc/optabs.h   | 3 +--
 3 files changed, 1 insertion(+), 6 deletions(-)

diff --git a/gcc/optabs.cc b/gcc/optabs.cc
index 0a14b1eef8a5..fe68a25ffd43 100644
--- a/gcc/optabs.cc
+++ b/gcc/optabs.cc
@@ -4304,9 +4304,6 @@ can_compare_p (enum rtx_code code, machine_mode mode,
   && (icode = optab_handler (cstore_optab, mode)) != CODE_FOR_nothing
   && insn_operand_matches (icode, 1, test))
return true;
-  if (purpose == ccp_cmov
- && optab_handler (cmov_optab, mode) != CODE_FOR_nothing)
-   return true;
 
   mode = GET_MODE_WIDER_MODE (mode).else_void ();
   PUT_MODE (test, mode);
diff --git a/gcc/optabs.def b/gcc/optabs.def
index 23f792352388..0c1435d4ecd7 100644
--- a/gcc/optabs.def
+++ b/gcc/optabs.def
@@ -294,7 +294,6 @@ OPTAB_D (cond_len_fnms_optab, "cond_len_fnms$a")
 OPTAB_D (cond_len_neg_optab, "cond_len_neg$a")
 OPTAB_D (cond_len_one_cmpl_optab, "cond_len_one_cmpl$a")
 OPTAB_D (vcond_mask_len_optab, "vcond_mask_len_$a")
-OPTAB_D (cmov_optab, "cmov$a6")
 OPTAB_D (cstore_optab, "cstore$a4")
 OPTAB_D (ctrap_optab, "ctrap$a4")
 OPTAB_D (addv4_optab, "addv$I$a4")
diff --git a/gcc/optabs.h b/gcc/optabs.h
index 23fa77be24ea..ae525c848d32 100644
--- a/gcc/optabs.h
+++ b/gcc/optabs.h
@@ -244,11 +244,10 @@ extern void emit_unop_insn (enum insn_code, rtx, rtx, 
enum rtx_code);
 extern void emit_libcall_block (rtx_insn *, rtx, rtx, rtx);
 
 /* The various uses that a comparison can have; used by can_compare_p:
-   jumps, conditional moves, store flag operations.  */
+   jumps, store flag operations.  */
 enum can_compare_purpose
 {
   ccp_jump,
-  ccp_cmov,
   ccp_store_flag
 };

[gcc r16-573] aarch64: Remove cmov6 patterns

[Andrew Pinski via Gcc-cvs]

https://gcc.gnu.org/g:fbd7c49bba4d3afccdfd77eb2ff590428420baf7

commit r16-573-gfbd7c49bba4d3afccdfd77eb2ff590428420baf7
Author: Andrew Pinski 
Date:   Mon May 12 17:23:01 2025 +

aarch64: Remove cmov6 patterns

Since the cmov optab is not used and is being removed,
the `cmov6` patterns from the aarch64 backend can
also be removed.

gcc/ChangeLog:
* config/aarch64/aarch64.md (cmov6): Remove.

Signed-off-by: Andrew Pinski 

Diff:
---
 gcc/config/aarch64/aarch64.md | 32 
 1 file changed, 32 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 5c30484e0c3c..6dbc9faf7130 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -4555,38 +4555,6 @@
   [(set_attr "type" "csel")]
 )
 
-(define_expand "cmov6"
-  [(set (match_operand:GPI 0 "register_operand")
-   (if_then_else:GPI
-(match_operator 1 "aarch64_comparison_operator"
- [(match_operand:GPI 2 "register_operand")
-  (match_operand:GPI 3 "aarch64_plus_operand")])
-(match_operand:GPI 4 "register_operand")
-(match_operand:GPI 5 "register_operand")))]
-  ""
-  "
-  operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
- operands[3]);
-  operands[3] = const0_rtx;
-  "
-)
-
-(define_expand "cmov6"
-  [(set (match_operand:GPF 0 "register_operand")
-   (if_then_else:GPF
-(match_operator 1 "aarch64_comparison_operator"
- [(match_operand:GPF 2 "register_operand")
-  (match_operand:GPF 3 "aarch64_fp_compare_operand")])
-(match_operand:GPF 4 "register_operand")
-(match_operand:GPF 5 "register_operand")))]
-  ""
-  "
-  operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
- operands[3]);
-  operands[3] = const0_rtx;
-  "
-)
-
 (define_insn "*cmov_insn"
   [(set (match_operand:ALLI 0 "register_operand")
(if_then_else:ALLI

[gcc r13-9651] final: Fix get_attr_length for asm goto [PR118411]

[Andrew Pinski via Gcc-cvs]

https://gcc.gnu.org/g:1d961c62a7bc1521c977fe48d4cbd940d7ccb8ea

commit r13-9651-g1d961c62a7bc1521c977fe48d4cbd940d7ccb8ea
Author: Andrew Pinski 
Date:   Fri Jan 10 20:04:09 2025 -0800

final: Fix get_attr_length for asm goto [PR118411]

The problem is for inline-asm goto, the outer rtl insn type
is a jump_insn and get_attr_length does not handle ASM specially
unlike if the outer rtl insn type was just insn.

This fixes the issue by adding support for both CALL_INSN and JUMP_INSN
with asm.

OK? Bootstrapped and tested on x86_64-linux-gnu.

PR middle-end/118411

gcc/ChangeLog:

* final.cc (get_attr_length_1): Handle asm for CALL_INSN
and JUMP_INSNs.

Signed-off-by: Andrew Pinski 
(cherry picked from commit c1729df6ec1eff4815a9cdd71392691ce21da028)

Diff:
---
 gcc/final.cc | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/gcc/final.cc b/gcc/final.cc
index e614491a69a2..822b61ff58a2 100644
--- a/gcc/final.cc
+++ b/gcc/final.cc
@@ -362,7 +362,11 @@ get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) 
(rtx_insn *))
 
   case CALL_INSN:
   case JUMP_INSN:
-   length = fallback_fn (insn);
+   body = PATTERN (insn);
+   if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
+ length = asm_insn_count (body) * fallback_fn (insn);
+   else
+ length = fallback_fn (insn);
break;
 
   case INSN:

[gcc r14-11766] final: Fix get_attr_length for asm goto [PR118411]

[Andrew Pinski via Gcc-cvs]

https://gcc.gnu.org/g:102e10f0221150218e7ee61b47e42b50653052ae

commit r14-11766-g102e10f0221150218e7ee61b47e42b50653052ae
Author: Andrew Pinski 
Date:   Fri Jan 10 20:04:09 2025 -0800

final: Fix get_attr_length for asm goto [PR118411]

The problem is for inline-asm goto, the outer rtl insn type
is a jump_insn and get_attr_length does not handle ASM specially
unlike if the outer rtl insn type was just insn.

This fixes the issue by adding support for both CALL_INSN and JUMP_INSN
with asm.

OK? Bootstrapped and tested on x86_64-linux-gnu.

PR middle-end/118411

gcc/ChangeLog:

* final.cc (get_attr_length_1): Handle asm for CALL_INSN
and JUMP_INSNs.

Signed-off-by: Andrew Pinski 
(cherry picked from commit c1729df6ec1eff4815a9cdd71392691ce21da028)

Diff:
---
 gcc/final.cc | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/gcc/final.cc b/gcc/final.cc
index eb9e065d9f0a..e8dfa0d8d33a 100644
--- a/gcc/final.cc
+++ b/gcc/final.cc
@@ -363,7 +363,11 @@ get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) 
(rtx_insn *))
 
   case CALL_INSN:
   case JUMP_INSN:
-   length = fallback_fn (insn);
+   body = PATTERN (insn);
+   if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
+ length = asm_insn_count (body) * fallback_fn (insn);
+   else
+ length = fallback_fn (insn);
break;
 
   case INSN:

[gcc r12-11095] final: Fix get_attr_length for asm goto [PR118411]

[Andrew Pinski via Gcc-cvs]

https://gcc.gnu.org/g:41366ba6f6358fe6a3e9f631e513dffe2ea9db3a

commit r12-11095-g41366ba6f6358fe6a3e9f631e513dffe2ea9db3a
Author: Andrew Pinski 
Date:   Fri Jan 10 20:04:09 2025 -0800

final: Fix get_attr_length for asm goto [PR118411]

The problem is for inline-asm goto, the outer rtl insn type
is a jump_insn and get_attr_length does not handle ASM specially
unlike if the outer rtl insn type was just insn.

This fixes the issue by adding support for both CALL_INSN and JUMP_INSN
with asm.

OK? Bootstrapped and tested on x86_64-linux-gnu.

PR middle-end/118411

gcc/ChangeLog:

* final.cc (get_attr_length_1): Handle asm for CALL_INSN
and JUMP_INSNs.

Signed-off-by: Andrew Pinski 
(cherry picked from commit c1729df6ec1eff4815a9cdd71392691ce21da028)

Diff:
---
 gcc/final.cc | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/gcc/final.cc b/gcc/final.cc
index a9868861bd2c..fa4b4438dc9e 100644
--- a/gcc/final.cc
+++ b/gcc/final.cc
@@ -378,7 +378,11 @@ get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) 
(rtx_insn *))
 
   case CALL_INSN:
   case JUMP_INSN:
-   length = fallback_fn (insn);
+   body = PATTERN (insn);
+   if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
+ length = asm_insn_count (body) * fallback_fn (insn);
+   else
+ length = fallback_fn (insn);
break;
 
   case INSN:

[gcc] Created branch 'devel/omp/gcc-15'

[Sandra Loosemore via Gcc-cvs]

The branch 'devel/omp/gcc-15' was created pointing to:

 74f41d42c492... Update cpplib es.po

[gcc r16-571] Add dispatch for casts between integer and float.

[Andrew Macleod via Gcc-cvs]

https://gcc.gnu.org/g:6f375445ef09d5c97d5bcc0fcb6069612217963e

commit r16-571-g6f375445ef09d5c97d5bcc0fcb6069612217963e
Author: Andrew MacLeod 
Date:   Mon May 12 11:41:37 2025 -0400

Add dispatch for casts between integer and float.

GCC currently does not implement range operators for casting between
integers and float.  This patch adds the missing dispatch patterns and
routines to facilitate implmenting these casts.

PR tree-optimization/120231
* range-op-float.cc (operator_cast::fold_range): New variants.
(operator_cast::op1_range): Likewise.
* range-op-mixed.h (operator_cast::fold_range): Likewise.
(operator_cast::op1_range): Likewise
* range-op.cc (range_op_handler::fold_range): Add RO_FIF dispatch.
(range_op_handler::op1_range): Add RO_IFF and RO_FII patterns.
(range_operator::fold_range): Provide new variant default.
(range_operator::op1_range): Likewise.
* range-op.h (range_operator): Add new variant methods.

Diff:
---
 gcc/range-op-float.cc | 31 +++
 gcc/range-op-mixed.h  | 18 ++
 gcc/range-op.cc   | 38 ++
 gcc/range-op.h| 13 -
 4 files changed, 99 insertions(+), 1 deletion(-)

diff --git a/gcc/range-op-float.cc b/gcc/range-op-float.cc
index 4719829974de..dafd9c0688c0 100644
--- a/gcc/range-op-float.cc
+++ b/gcc/range-op-float.cc
@@ -2899,6 +2899,37 @@ private:
   }
 } fop_div;
 
+// Implement fold for a cast from float to an int.
+bool
+operator_cast::fold_range (irange &, tree, const frange &,
+  const irange &, relation_trio) const
+{
+  return false;
+}
+
+// Implement op1_range for a cast from float to an int.
+bool
+operator_cast::op1_range (frange &, tree, const irange &,
+ const irange &, relation_trio) const
+{
+  return false;
+}
+
+// Implement fold for a cast from int to a float.
+bool
+operator_cast::fold_range (frange &, tree, const irange &,
+  const frange &, relation_trio) const
+{
+  return false;
+}
+
+// Implement op1_range for a cast from int to a float.
+bool
+operator_cast::op1_range (irange &, tree, const frange &,
+ const frange &, relation_trio) const
+{
+  return false;
+}
 
 // Initialize any float operators to the primary table
 
diff --git a/gcc/range-op-mixed.h b/gcc/range-op-mixed.h
index bb8e90aeddd6..3fb7bff90bdb 100644
--- a/gcc/range-op-mixed.h
+++ b/gcc/range-op-mixed.h
@@ -473,6 +473,15 @@ public:
   bool fold_range (prange &r, tree type,
   const irange &op1, const prange &op2,
   relation_trio rel = TRIO_VARYING) const final override;
+  bool fold_range (irange &r, tree type,
+  const frange &lh,
+  const irange &rh,
+  relation_trio = TRIO_VARYING) const;
+  bool fold_range (frange &r, tree type,
+  const irange &lh,
+  const frange &rh,
+  relation_trio = TRIO_VARYING) const;
+
   bool op1_range (irange &r, tree type,
  const irange &lhs, const irange &op2,
  relation_trio rel = TRIO_VARYING) const final override;
@@ -485,6 +494,15 @@ public:
   bool op1_range (prange &r, tree type,
  const irange &lhs, const prange &op2,
  relation_trio rel = TRIO_VARYING) const final override;
+  bool op1_range (frange &r, tree type,
+ const irange &lhs,
+ const irange &op2,
+ relation_trio = TRIO_VARYING) const;
+  bool op1_range (irange &r, tree type,
+ const frange &lhs,
+ const frange &op2,
+ relation_trio = TRIO_VARYING) const;
+
   relation_kind lhs_op1_relation (const irange &lhs,
  const irange &op1, const irange &op2,
  relation_kind) const final override;
diff --git a/gcc/range-op.cc b/gcc/range-op.cc
index 35b3e18ebed2..06d357f5199f 100644
--- a/gcc/range-op.cc
+++ b/gcc/range-op.cc
@@ -164,6 +164,8 @@ dispatch_trio (unsigned lhs, unsigned op1, unsigned op2)
 // These are the supported dispatch patterns. These map to the parameter list
 // of the routines in range_operator.  Note the last 3 characters are
 // shorthand for the LHS, OP1, and OP2 range discriminator class.
+// Reminder, single operand instructions use the LHS type for op2, even if
+// unused. so FLOAT = INT would be RO_FIF.
 
 const unsigned RO_III =dispatch_trio (VR_IRANGE, VR_IRANGE, VR_IRANGE);
 const unsigned RO_IFI = dispatch_trio (VR_IRANGE, VR_FRANGE, VR_IRANGE);
@@ -246,6 +248,10 @@ range_op_handler::fold_range (vrange &r, tree type,
return m_operator->fold_range (as_a  (r), type,
   as_a  (lh),
   as_a  (rh), rel);

[gcc r16-576] RISC-V: Add testcases for vector unsigned integer SAT_ADD form 7

[Pan Li via Gcc-cvs]

https://gcc.gnu.org/g:c273a1c1846207082b60fe10c18f5c86dbcfd413

commit r16-576-gc273a1c1846207082b60fe10c18f5c86dbcfd413
Author: Pan Li 
Date:   Mon Apr 28 20:35:10 2025 +0800

RISC-V: Add testcases for vector unsigned integer SAT_ADD form 7

This patch will add testcase for unsigned integer SAT_ADD form 7:

  #define DEF_VEC_SAT_U_ADD_FMT_9(WT, T)
  \
  void __attribute__((noinline))
  \
  vec_sat_u_add_##WT##_##T##_fmt_9 (T *out, T *op_1, T *op_2, unsigned 
limit) \
  { 
  \
unsigned i; 
  \
T max = -1; 
  \
for (i = 0; i < limit; i++) 
  \
  { 
  \
T x = op_1[i];  
  \
T y = op_2[i];  
  \
WT val = (WT)x + (WT)y; 
  \
out[i] = val > max ? max : (T)val;  
  \
  } 
  \
  }

  DEF_VEC_SAT_U_ADD_FMT_9(uint64_t, uint32_t)

The below test are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h: Add test helper 
macros.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-9-u16-from-u32.c: 
New test.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-9-u16-from-u64.c: 
New test.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-9-u32-from-u64.c: 
New test.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-9-u8-from-u16.c: 
New test.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-9-u8-from-u32.c: 
New test.
* gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-9-u8-from-u64.c: 
New test.
* 
gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-9-u16-from-u32.c: New test.
* 
gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-9-u16-from-u64.c: New test.
* 
gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-9-u32-from-u64.c: New test.
* 
gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-9-u8-from-u16.c: New test.
* 
gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-9-u8-from-u32.c: New test.
* 
gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-run-9-u8-from-u64.c: New test.

Signed-off-by: Pan Li 

Diff:
---
 .../riscv/rvv/autovec/sat/vec_sat_arith.h  | 31 +
 .../rvv/autovec/sat/vec_sat_u_add-9-u16-from-u32.c |  9 +++
 .../rvv/autovec/sat/vec_sat_u_add-9-u16-from-u64.c |  9 +++
 .../rvv/autovec/sat/vec_sat_u_add-9-u32-from-u64.c |  9 +++
 .../rvv/autovec/sat/vec_sat_u_add-9-u8-from-u16.c  |  9 +++
 .../rvv/autovec/sat/vec_sat_u_add-9-u8-from-u32.c  |  9 +++
 .../rvv/autovec/sat/vec_sat_u_add-9-u8-from-u64.c  |  9 +++
 .../autovec/sat/vec_sat_u_add-run-9-u16-from-u32.c | 76 ++
 .../autovec/sat/vec_sat_u_add-run-9-u16-from-u64.c | 76 ++
 .../autovec/sat/vec_sat_u_add-run-9-u32-from-u64.c | 76 ++
 .../autovec/sat/vec_sat_u_add-run-9-u8-from-u16.c  | 76 ++
 .../autovec/sat/vec_sat_u_add-run-9-u8-from-u32.c  | 76 ++
 .../autovec/sat/vec_sat_u_add-run-9-u8-from-u64.c  | 76 ++
 13 files changed, 541 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h
index 7db892cc2e96..983c9b440abc 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h
@@ -123,6 +123,22 @@ vec_sat_u_add_##T##_fmt_8 (T *out, T *op_1, T *op_2, 
unsigned limit) \
 }\
 }
 
+#define DEF_VEC_SAT_U_ADD_FMT_9(WT, T)  \
+void __attribute__((noinline))  \
+vec_sat_u_add_##WT##_##T##_fmt_9 (T *out, T *op_1, T *op_2, unsigned limit) \
+{   \
+  unsigned i;   \
+  T max = -1;   \
+  for (i = 0; i < limit; i++)   \
+{   \
+  T x = op_1[i];  

[gcc r16-575] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

[Pan Li via Gcc-cvs]

https://gcc.gnu.org/g:f6535d433e250421f6c1f2f691c04e613d63a694

commit r16-575-gf6535d433e250421f6c1f2f691c04e613d63a694
Author: Pan Li 
Date:   Mon Apr 28 20:35:09 2025 +0800

RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

This patch will add testcase for unsigned integer SAT_ADD form 7:

  #define DEF_SAT_U_ADD_FMT_7(WT, T) \
  T __attribute__((noinline))\
  sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
  {  \
T max = -1;  \
WT val = (WT)x + (WT)y;  \
return val > max ? max : (T)val; \
  }

  DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)

The below test are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u64.c: New test.

Signed-off-by: Pan Li 

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 22 ++
 .../riscv/sat/sat_u_add-7-u16-from-u32.c   | 21 +
 .../riscv/sat/sat_u_add-7-u16-from-u64.c   | 21 +
 .../riscv/sat/sat_u_add-7-u32-from-u64.c   | 22 ++
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c | 19 
 .../riscv/sat/sat_u_add-run-7-u16-from-u32.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u16-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u32-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u16.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u32.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u64.c| 26 ++
 13 files changed, 299 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index c8a135a5f0f7..2225d30d77e2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -53,12 +53,34 @@ sat_u_add_##T##_fmt_6 (T x, T y)\
   return (T)(x + y) < x ? -1 : (x + y); \
 }
 
+#define DEF_SAT_U_ADD_FMT_7(WT, T) \
+T __attribute__((noinline))\
+sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
+{  \
+  T max = -1;  \
+  WT val = (WT)x + (WT)y;  \
+  return val > max ? max : (T)val; \
+}
+#define DEF_SAT_U_ADD_FMT_7_WRAP(WT, T) DEF_SAT_U_ADD_FMT_7(WT, T)
+
 #define RUN_SAT_U_ADD_FMT_1(T, x, y) sat_u_add_##T##_fmt_1(x, y)
 #define RUN_SAT_U_ADD_FMT_2(T, x, y) sat_u_add_##T##_fmt_2(x, y)
 #define RUN_SAT_U_ADD_FMT_3(T, x, y) sat_u_add_##T##_fmt_3(x, y)
 #define RUN_SAT_U_ADD_FMT_4(T, x, y) sat_u_add_##T##_fmt_4(x, y)
 #define RUN_SAT_U_ADD_FMT_5(T, x, y) sat_u_add_##T##_fmt_5(x, y)
 #define RUN_SAT_U_ADD_FMT_6(T, x, y) sat_u_add_##T##_fmt_6(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y) \
+  sat_u_add_uint16_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y) \
+  sat_u_add_uint32_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y) \
+  sat_u_add_uint64_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y)
 
 #define DEF_SAT_U_ADD_IMM_FMT_1(T, IMM)  \
 T __attribute__((noinline))  \
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
new file mode 100644
index ..527f8de63517
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { 

[gcc r16-574] Match: Support form 7 for unsigned integer SAT_ADD

[Pan Li via Gcc-cvs]

https://gcc.gnu.org/g:656db31e4448e7b51a919dc1acfb3080c82f43de

commit r16-574-g656db31e4448e7b51a919dc1acfb3080c82f43de
Author: Pan Li 
Date:   Mon Apr 28 20:35:08 2025 +0800

Match: Support form 7 for unsigned integer SAT_ADD

This patch would like to support the form 7 of the unsigned
integer SAT_ADD, aka below example.

  #define DEF_SAT_U_ADD_FMT_7(WT, T) \
  T __attribute__((noinline))\
  sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
  {  \
T max = -1;  \
WT val = (WT)x + (WT)y;  \
return val > max ? max : (T)val; \
  }

  DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)

If we take -O3 build with -fdump-tree-optimized, we will have

Before this patch:
   5   │ __attribute__((noinline))
   6   │ uint32_t sat_u_add_uint64_t_uint32_t_fmt_7 (uint32_t x, uint32_t y)
   7   │ {
   8   │   uint64_t val;
   9   │   long unsigned int _1;
  10   │   long unsigned int _2;
  11   │   uint32_t _3;
  12   │   uint32_t _7;
  13   │
  14   │[local count: 1073741824]:
  15   │   _1 = (long unsigned int) x_4(D);
  16   │   _2 = (long unsigned int) y_5(D);
  17   │   val_6 = _1 + _2;
  18   │   if (val_6 <= 4294967295)
  19   │ goto ; [65.00%]
  20   │   else
  21   │ goto ; [35.00%]
  22   │
  23   │[local count: 697932184]:
  24   │   _7 = x_4(D) + y_5(D);
  25   │
  26   │[local count: 1073741824]:
  27   │   # _3 = PHI <4294967295(2), _7(3)>
  28   │   return _3;
  29   │
  30   │ }

After this patch:
   4   │ __attribute__((noinline))
   5   │ uint32_t sat_u_add_uint64_t_uint32_t_fmt_7 (uint32_t x, uint32_t y)
   6   │ {
   7   │   uint32_t _3;
   8   │
   9   │[local count: 1073741824]:
  10   │   _3 = .SAT_ADD (x_4(D), y_5(D)); [tail call]
  11   │   return _3;
  12   │
  13   │ }

This change also effects on vector mode too.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.
* The x86 bootstrap test.
* The x86 fully regression test.

gcc/ChangeLog:

* match.pd: Add form 7 matching pattern for unsigned integer
SAT_ADD.

Signed-off-by: Pan Li 

Diff:
---
 gcc/match.pd | 16 +++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/match.pd b/gcc/match.pd
index ab496d923cc0..f4050687647b 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -3242,7 +3242,21 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
  SAT_U_ADD = IMAGPART (SUM) != 0 ? -1 : REALPART (SUM)  */
   (cond^ (ne (imagpart (IFN_ADD_OVERFLOW@2 @0 INTEGER_CST@1)) integer_zerop)
 integer_minus_onep (realpart @2))
-  (if (types_match (type, @0) && int_fits_type_p (@1, type)
+  (if (types_match (type, @0) && int_fits_type_p (@1, type
+ (match (unsigned_integer_sat_add @0 @1)
+  /* WIDEN_SUM = (WT)X + (WT)Y
+ SAT_U_ADD = WIDEN_SUM > MAX ? MAX : (NT)WIDEN_SUM  */
+  (cond^ (le (plus (convert@2 @0) (convert@3 @1)) INTEGER_CST@4)
+(plus:c @0 @1) integer_minus_onep)
+  (if (types_match (type, @0, @1) && types_match (@2, @3))
+   (with
+{
+ unsigned precision = TYPE_PRECISION (type);
+ unsigned widen_precision = TYPE_PRECISION (TREE_TYPE (@2));
+ wide_int max = wi::mask (precision, false, widen_precision);
+ wide_int c4 = wi::to_wide (@4);
+}
+(if (wi::eq_p (c4, max) && widen_precision > precision))
 
 /* Saturation sub for unsigned integer.  */
 (if (INTEGRAL_TYPE_P (type) && TYPE_UNSIGNED (type))

[gcc r16-577] Remove negative ranges using trailing zero masks.

[Andrew Macleod via Gcc-cvs]

https://gcc.gnu.org/g:c40a4cc2d943d8572a62f21d3eb1d4171e51d5ac

commit r16-577-gc40a4cc2d943d8572a62f21d3eb1d4171e51d5ac
Author: Andrew MacLeod 
Date:   Thu May 8 20:28:11 2025 -0400

Remove negative ranges using trailing zero masks.

When there are trailing 0's in the bitmask, set_range_from_bitmask () 
removes
the lower positive ranges which do not match the value.  This reworks it to
provide the same functionailty for the negative ranges in signed types.
If the lower 4 bits are all 0:
  int [-INF, +INF] MASK 0xfff0 VALUE 0x0
becomes:
  int [-INF,  -16][0, 0][16, 2147483632] MASK 0xfff0 VALUE 0x0

gcc/
* tree-ssanames.cc (set_bitmask): Use int_range_max for temps.
* value-range.cc (irange::set_range_from_bitmask): Handle all
trailing zero values.

gcc/testsuite/
* gcc.dg/tree-ssa/vrp124.c: New.

Diff:
---
 gcc/testsuite/gcc.dg/tree-ssa/vrp124.c | 31 ++
 gcc/tree-ssanames.cc   |  2 +-
 gcc/value-range.cc | 57 +-
 3 files changed, 74 insertions(+), 16 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vrp124.c 
b/gcc/testsuite/gcc.dg/tree-ssa/vrp124.c
new file mode 100644
index ..789b550f88d3
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vrp124.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-evrp" } */
+
+/* Test removal of trailing zero mask ranges from signed values. */
+/* Mask off the lower 4 bits of an integer. */
+#define MASK 0XF
+
+void dead (int c);
+void keep();
+
+/* A signed character should have a range something like : */
+/* int [-INF, -16][0, 0][16, 2147483632] MASK 0xfff0 VALUE 0x0 */
+
+int
+foo2 (int c)
+{
+  c = c & ~MASK;
+  if (c == 0)
+return 0;
+  if (c > -16)
+{
+  keep ();
+  if (c < 16)
+   dead (c);
+}
+  if (c > (__INT_MAX__ & ~MASK))
+dead (c);
+  return 0;
+}
+
+/* { dg-final { scan-tree-dump-not "dead" "evrp" } } */
diff --git a/gcc/tree-ssanames.cc b/gcc/tree-ssanames.cc
index de7b9b79f948..fd2abfe0745d 100644
--- a/gcc/tree-ssanames.cc
+++ b/gcc/tree-ssanames.cc
@@ -488,7 +488,7 @@ set_bitmask (tree name, const wide_int &value, const 
wide_int &mask)
 {
   gcc_assert (!POINTER_TYPE_P (TREE_TYPE (name)));
 
-  int_range<2> r (TREE_TYPE (name));
+  int_range_max r (TREE_TYPE (name));
   r.update_bitmask (irange_bitmask (value, mask));
   set_range_info (name, r);
 }
diff --git a/gcc/value-range.cc b/gcc/value-range.cc
index a770b41b474a..d2c14e7900df 100644
--- a/gcc/value-range.cc
+++ b/gcc/value-range.cc
@@ -2286,7 +2286,7 @@ irange::set_range_from_bitmask ()
   if (has_zero)
{
  int_range<2> zero;
- zero.set_zero (type ());
+ zero.set_zero (m_type);
  union_ (zero);
}
   if (flag_checking)
@@ -2295,31 +2295,58 @@ irange::set_range_from_bitmask ()
 }
   else if (popcount == 0)
 {
-  set_zero (type ());
+  set_zero (m_type);
   return true;
 }
 
-  // If the mask doesn't have any trailing zero, return.
+  // If the mask doesn't have a trailing zero, theres nothing to filter.
   int z = wi::ctz (m_bitmask.mask ());
   if (!z)
 return false;
 
-  // Remove trailing ranges that this bitmask indicates can't exist.
-  int_range_max mask_range;
-  int prec = TYPE_PRECISION (type ());
-  wide_int ub = (wi::one (prec) << z) - 1;
-  mask_range = int_range<2> (type (), wi::zero (prec), ub);
+  int prec = TYPE_PRECISION (m_type);
+  wide_int value = m_bitmask.value ();
+  wide_int mask = m_bitmask.mask ();
 
-  // Then remove the specific value these bits contain from the range.
-  wide_int value = m_bitmask.value () & ub;
-  mask_range.intersect (int_range<2> (type (), value, value, VR_ANTI_RANGE));
+  // Remove the [0, X] values which the trailing-zero mask rules out.
+  // For example, if z == 4, the mask is 0xFFF0, and the lowest 4 bits
+  // define the range [0, 15]. Only one of which (value & low_mask) is allowed.
+  wide_int ub = (wi::one (prec) << z) - 1;  // Upper bound of affected range.
+  int_range_max mask_range (m_type, wi::zero (prec), ub);
 
-  // Inverting produces a list of ranges which can be valid.
+  // Remove the one valid value from the excluded range and form an anti-range.
+  wide_int allow = value & ub;
+  mask_range.intersect (int_range<2> (m_type, allow, allow, VR_ANTI_RANGE));
+
+  // Invert it to get the allowed values and intersect it with the main range.
   mask_range.invert ();
+  bool changed = intersect (mask_range);
 
-  // And finally select R from only those valid values.
-  intersect (mask_range);
-  return true;
+  // Now handle the rest of the domain — the upper side for positive values,
+  // or [-X, -1] for signed negatives.
+  // Compute the maximum value representable under the mask/value constraint.
+  ub = mask | value;
+
+  // If value is non-negative, adjust the upper

[gcc r16-579] diagnostics: improvements to experimental-html output [PR116792]

[David Malcolm via Gcc-cvs]

https://gcc.gnu.org/g:e4ccad8faf5266248993f7896b000ccf871ded30

commit r16-579-ge4ccad8faf5266248993f7896b000ccf871ded30
Author: David Malcolm 
Date:   Mon May 12 21:45:36 2025 -0400

diagnostics: improvements to experimental-html output [PR116792]

Add barebones support for
* diagnostic metadata rules
* quoted source
* generated patches
* execution paths

gcc/ChangeLog:
PR other/116792
* diagnostic-format-html.cc: Include "diagnostic-format-text.h",
"pretty-print-urlifier.h" and "edit-context.h".
(html_builder::html_builder): Fix indentation in decl.
(html_builder::make_element_for_diagnostic): Split out metadata
code into make_element_for_metadata.  Call
make_element_for_source, make_element_for_path, and
make_element_for_patch.
(html_builder::make_element_for_source): New.
(html_builder::make_element_for_path): New.
(html_builder::make_element_for_patch): New.
(html_builder::make_metadata_element): New.
(html_builder::make_element_for_metadata): New.
(html_output_format::get_builder): New.
(selftest::test_html_diagnostic_context::get_builder): New.
(selftest::test_simple_log): Update test to print a quoted string,
and verify that it uses a "gcc-quoted-text" span.
(selftest::test_metadata): New.
(selftest::diagnostic_format_html_cc_tests): Call it.

gcc/testsuite/ChangeLog:
PR other/116792
* gcc.dg/html-output/missing-semicolon.py: Verify that we don't
have an empty "gcc-annotated-source" and we do have a
"gcc-generated-patch".
* gcc.dg/plugin/diagnostic-test-metadata-html.c: New test.
* gcc.dg/plugin/diagnostic-test-metadata-html.py: New test script.
* gcc.dg/plugin/diagnostic-test-paths-2.c: Add
"-fdiagnostics-add-output=experimental-html" to options. Add
invocation of diagnostic-test-paths-2.py.
* gcc.dg/plugin/diagnostic-test-paths-2.py: New test script.
* gcc.dg/plugin/plugin.exp (plugin_test_list): Add
diagnostic-test-metadata-html.c.

Signed-off-by: David Malcolm 

Diff:
---
 gcc/diagnostic-format-html.cc  | 233 +
 .../gcc.dg/html-output/missing-semicolon.py|   7 +-
 .../gcc.dg/plugin/diagnostic-test-metadata-html.c  |  15 ++
 .../gcc.dg/plugin/diagnostic-test-metadata-html.py |  68 ++
 .../gcc.dg/plugin/diagnostic-test-paths-2.c|   6 +-
 .../gcc.dg/plugin/diagnostic-test-paths-2.py   |  35 
 gcc/testsuite/gcc.dg/plugin/plugin.exp |   1 +
 7 files changed, 326 insertions(+), 39 deletions(-)

diff --git a/gcc/diagnostic-format-html.cc b/gcc/diagnostic-format-html.cc
index 2d642dfc33cb..6bb1caf41d12 100644
--- a/gcc/diagnostic-format-html.cc
+++ b/gcc/diagnostic-format-html.cc
@@ -27,11 +27,14 @@ along with GCC; see the file COPYING3.  If not see
 #include "diagnostic-metadata.h"
 #include "diagnostic-format.h"
 #include "diagnostic-format-html.h"
+#include "diagnostic-format-text.h"
 #include "diagnostic-output-file.h"
 #include "diagnostic-buffer.h"
 #include "selftest.h"
 #include "selftest-diagnostic.h"
 #include "pretty-print-format-impl.h"
+#include "pretty-print-urlifier.h"
+#include "edit-context.h"
 #include "intl.h"
 
 namespace xml {
@@ -280,8 +283,8 @@ public:
   friend class diagnostic_html_format_buffer;
 
   html_builder (diagnostic_context &context,
-pretty_printer &pp,
-const line_maps *line_maps);
+   pretty_printer &pp,
+   const line_maps *line_maps);
 
   void on_report_diagnostic (const diagnostic_info &diagnostic,
 diagnostic_t orig_diag_kind,
@@ -303,11 +306,27 @@ public:
 m_printer = &pp;
   }
 
+  std::unique_ptr
+  make_element_for_metadata (const diagnostic_metadata &metadata);
+
+  std::unique_ptr
+  make_element_for_source (const diagnostic_info &diagnostic);
+
+  std::unique_ptr
+  make_element_for_path (const diagnostic_path &path);
+
+  std::unique_ptr
+  make_element_for_patch (const diagnostic_info &diagnostic);
+
 private:
   std::unique_ptr
   make_element_for_diagnostic (const diagnostic_info &diagnostic,
   diagnostic_t orig_diag_kind);
 
+  std::unique_ptr
+  make_metadata_element (label_text label,
+label_text url);
+
   diagnostic_context &m_context;
   pretty_printer *m_printer;
   const line_maps *m_line_maps;
@@ -560,28 +579,11 @@ html_builder::make_element_for_diagnostic (const 
diagnostic_info &diagnostic,
 
   if (diagnostic.metadata)
 {
-  int cwe = diagnostic.metadata->get_cwe ();
-  if (cwe)
-   {
- diag_element->add_text (label_text::borrow (" "));
- auto cwe_span = make_span (label_te

[gcc r16-580] RISC-V: Introduce riscv-ext*.def to define extensions

[Kito Cheng via Gcc-cvs]

https://gcc.gnu.org/g:48180266da19b0ad08e64fa9f1ade897f9b2ef58

commit r16-580-g48180266da19b0ad08e64fa9f1ade897f9b2ef58
Author: Kito Cheng 
Date:   Wed May 7 18:02:10 2025 +0800

RISC-V: Introduce riscv-ext*.def to define extensions

Adding a new ISA extension to RISC-V GCC requires modifying several places:
1. riscv_ext_version_table for the extension version.
2. riscv.opt for the target option and variable.
3. riscv_ext_flag_table to bind the extension to its target option.
4. riscv_combine_info if this extension is just a macro extension.
5. riscv_implied_info if this extension implies other extensions.
6. invoke.texi for documentation (this one is often forgotten - even by 
me...).
7. riscv-ext-bitmask.def if this extension has been allocated a bitmask in
   `__riscv_feature_bits`.

And now, we've integrated all the information into riscv-ext.def and 
generate
(almost) everything from that!

Some of the fields, like URL, are not used yet. They are planned to be 
updated
later and used for improving the documentation.

Changes since v1:
- Rebase for including new extensions
- Fix MASK_VECTOR handling

gcc/ChangeLog:

* config/riscv/riscv-ext.def: New file; define extension metadata 
table.
* config/riscv/riscv-ext-corev.def: New.
* config/riscv/riscv-ext-sifive.def: New.
* config/riscv/riscv-ext-thead.def: New.
* config/riscv/riscv-ext-ventana.def: New.

Diff:
---
 gcc/config/riscv/riscv-ext-corev.def   |   87 ++
 gcc/config/riscv/riscv-ext-sifive.def  |   87 ++
 gcc/config/riscv/riscv-ext-thead.def   |  191 
 gcc/config/riscv/riscv-ext-ventana.def |   35 +
 gcc/config/riscv/riscv-ext.def | 1824 
 5 files changed, 2224 insertions(+)

diff --git a/gcc/config/riscv/riscv-ext-corev.def 
b/gcc/config/riscv/riscv-ext-corev.def
new file mode 100644
index ..eb97399403cd
--- /dev/null
+++ b/gcc/config/riscv/riscv-ext-corev.def
@@ -0,0 +1,87 @@
+/* CORE-V extension definition file for RISC-V.
+   Copyright (C) 2025 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.
+
+Please run `make riscv-regen` in build folder to make sure updated anything.
+
+Format of DEFINE_RISCV_EXT, please refer to riscv-ext.def.  */
+
+DEFINE_RISCV_EXT(
+  /* NAME */ xcvalu,
+  /* UPPERCAE_NAME */ XCVALU,
+  /* FULL_NAME */ "Core-V miscellaneous ALU extension",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ xcv,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
+DEFINE_RISCV_EXT(
+  /* NAME */ xcvbi,
+  /* UPPERCAE_NAME */ XCVBI,
+  /* FULL_NAME */ "xcvbi extension",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ xcv,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
+DEFINE_RISCV_EXT(
+  /* NAME */ xcvelw,
+  /* UPPERCAE_NAME */ XCVELW,
+  /* FULL_NAME */ "Core-V event load word extension",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ xcv,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
+DEFINE_RISCV_EXT(
+  /* NAME */ xcvmac,
+  /* UPPERCAE_NAME */ XCVMAC,
+  /* FULL_NAME */ "Core-V multiply-accumulate extension",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ xcv,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
+DEFINE_RISCV_EXT(
+  /* NAME */ xcvsimd,
+  /* UPPERCAE_NAME */ XCVSIMD,
+  /* FULL_NAME */ "xcvsimd extension",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ xcv,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
diff --git a/gcc/config/riscv/riscv-ext-sifive.def 
b/gcc/config/riscv/riscv-ext-sifiv

[gcc r16-585] RISC-V: Drop riscv_implied_info and riscv_combine_info in favor of riscv_ext_info_t data

[Kito Cheng via Gcc-cvs]

https://gcc.gnu.org/g:8aa02f1729b0b8d39d3a93c3e0f36139f80ec0cd

commit r16-585-g8aa02f1729b0b8d39d3a93c3e0f36139f80ec0cd
Author: Kito Cheng 
Date:   Wed May 7 21:21:01 2025 +0800

RISC-V: Drop riscv_implied_info and riscv_combine_info in favor of 
riscv_ext_info_t data

Consolidate implied-extension logic by removing the old `riscv_implied_info`
array and using the `implied_exts` field in the unified riscv_ext_info_t
structures generated from `riscv-ext.def`.

gcc/ChangeLog:

* common/config/riscv/riscv-common.cc
(riscv_implied_info::riscv_implied_info_t): Remove unused
variant.
(struct riscv_implied_info_t): Remove unsued field.
(riscv_implied_info::match): Remove unused variant, and adjust
the logic.
(get_riscv_ext_info): New.
(riscv_implied_info): Remove.
(riscv_ext_info_t::apply_implied_ext): New.
(riscv_combine_info). Remove.
(riscv_subset_list::handle_implied_ext): Use riscv_ext_info_t
rather than riscv_implied_info.
(riscv_subset_list::check_implied_ext): Ditto.
(riscv_subset_list::handle_combine_ext): Use riscv_ext_info_t
rather than riscv_combine_info.
(riscv_minimal_hwprobe_feature_bits): Use riscv_ext_info_t
rather than riscv_implied_info.

Diff:
---
 gcc/common/config/riscv/riscv-common.cc | 351 ++--
 1 file changed, 66 insertions(+), 285 deletions(-)

diff --git a/gcc/common/config/riscv/riscv-common.cc 
b/gcc/common/config/riscv/riscv-common.cc
index 5430da76d11c..c6ae649802c7 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -95,32 +95,17 @@ struct riscv_implied_info_t
   constexpr riscv_implied_info_t (const char *implied_ext,
  riscv_implied_predicator_t predicator
  = nullptr)
-: ext (nullptr), implied_ext (implied_ext), predicator (predicator)
+: implied_ext (implied_ext), predicator (predicator)
   {}
 
-  constexpr riscv_implied_info_t (const char *ext, const char *implied_ext,
- riscv_implied_predicator_t predicator
- = nullptr)
-: ext (ext), implied_ext (implied_ext), predicator (predicator){};
-
-  bool match (const riscv_subset_list *subset_list, const char *ext_name) const
+  bool match (const riscv_subset_list *subset_list) const
   {
-if (ext_name && strcmp (ext_name, ext) != 0)
-  return false;
-
 if (predicator && !predicator (subset_list))
   return false;
 
 return true;
   }
 
-  bool match (const riscv_subset_list *subset_list,
- const riscv_subset_t *subset) const
-  {
-return match (subset_list, subset->name.c_str());
-  }
-
-  const char *ext;
   const char *implied_ext;
   riscv_implied_predicator_t predicator;
 };
@@ -230,203 +215,43 @@ static const std::unordered_map riscv_ext_infos
 #undef DEFINE_RISCV_EXT
 };
 
-/* Implied ISA info, must end with NULL sentinel.  */
-static const riscv_implied_info_t riscv_implied_info[] =
-{
-  {"m", "zmmul"},
-
-  {"d", "f"},
-  {"f", "zicsr"},
-  {"d", "zicsr"},
-
-  {"a", "zaamo"},
-  {"a", "zalrsc"},
-
-  {"c", "zca"},
-  {"c", "zcf",
-   [] (const riscv_subset_list *subset_list) -> bool
-   {
- return subset_list->xlen () == 32 && subset_list->lookup ("f");
-   }},
-  {"c", "zcd",
-   [] (const riscv_subset_list *subset_list) -> bool
-   {
- return subset_list->lookup ("d");
-   }},
-
-  {"zabha", "zaamo"},
-  {"zacas", "zaamo"},
-  {"zawrs", "zalrsc"},
-
-  {"zcmop", "zca"},
-
-  {"b", "zba"},
-  {"b", "zbb"},
-  {"b", "zbs"},
-
-  {"zdinx", "zfinx"},
-  {"zfinx", "zicsr"},
-  {"zdinx", "zicsr"},
-
-  {"zicfiss", "zicsr"},
-  {"zicfiss", "zimop"},
-  {"zicfilp", "zicsr"},
-
-  {"zclsd", "zilsd"},
-  {"zclsd", "zca"},
-
-  {"zk", "zkn"},
-  {"zk", "zkr"},
-  {"zk", "zkt"},
-  {"zkn", "zbkb"},
-  {"zkn", "zbkc"},
-  {"zkn", "zbkx"},
-  {"zkn", "zkne"},
-  {"zkn", "zknd"},
-  {"zkn", "zknh"},
-  {"zks", "zbkb"},
-  {"zks", "zbkc"},
-  {"zks", "zbkx"},
-  {"zks", "zksed"},
-  {"zks", "zksh"},
-
-  {"v", "zvl128b"},
-  {"v", "zve64d"},
-
-  {"zve32f", "f"},
-  {"zve64f", "f"},
-  {"zve64d", "d"},
-
-  {"zve32x", "zicsr"},
-  {"zve32x", "zvl32b"},
-  {"zve32f", "zve32x"},
-  {"zve32f", "zvl32b"},
-
-  {"zve64x", "zve32x"},
-  {"zve64x", "zvl64b"},
-  {"zve64f", "zve32f"},
-  {"zve64f", "zve64x"},
-  {"zve64f", "zvl64b"},
-  {"zve64d", "zve64f"},
-  {"zve64d", "zvl64b"},
-
-  {"zvl64b", "zvl32b"},
-  {"zvl128b", "zvl64b"},
-  {"zvl256b", "zvl128b"},
-  {"zvl512b", "zvl256b"},
-  {"zvl1024b", "zvl512b"},
-  {"zvl2048b", "zvl1024b"},
-  {"zvl4096b", "zvl2048b"},
-  {"zvl8192b", "zvl4096b"},
-  {"zvl16384b", "zvl8192b"},
-  {"zvl32768b", "zvl16384b"},
-  {"zvl65536b", "zvl32768b"},
-
-  {"zvkn", "zvkned"},
-  {"zvkn", "zvknhb"},
-  {"zvkn", "zvk

[gcc r16-583] RISC-V: Adjust riscv_can_inline_p

[Kito Cheng via Gcc-cvs]

https://gcc.gnu.org/g:590701c97748cd7f99f15fbd0d75076dd75bea3d

commit r16-583-g590701c97748cd7f99f15fbd0d75076dd75bea3d
Author: Kito Cheng 
Date:   Wed May 7 18:30:34 2025 +0800

RISC-V: Adjust riscv_can_inline_p

We don't hold any extenison flags in `target_flags`, so no need to
gather the extenison flags in `target_flags`.

gcc/ChangeLog:

* common/config/riscv/riscv-common.cc (riscv_can_inline_p): Drop
extension flags check from `target_flags`.
* config/riscv/riscv-subset.h (riscv_x_target_flags_isa_mask):
Remove.
* config/riscv/riscv.cc (riscv_x_target_flags_isa_mask): Remove.

Diff:
---
 gcc/common/config/riscv/riscv-common.cc | 17 -
 gcc/config/riscv/riscv-subset.h |  1 -
 gcc/config/riscv/riscv.cc   |  8 +++-
 3 files changed, 3 insertions(+), 23 deletions(-)

diff --git a/gcc/common/config/riscv/riscv-common.cc 
b/gcc/common/config/riscv/riscv-common.cc
index d84aa9d78dd3..ff34a315caf6 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -2036,23 +2036,6 @@ riscv_ext_is_subset (struct cl_target_option *opts,
   return true;
 }
 
-/* Return the mask of ISA extension in x_target_flags of gcc_options.  */
-
-int
-riscv_x_target_flags_isa_mask (void)
-{
-  int mask = 0;
-  const riscv_ext_flag_table_t *arch_ext_flag_tab;
-  for (arch_ext_flag_tab = &riscv_ext_flag_table[0];
-   arch_ext_flag_tab->ext;
-   ++arch_ext_flag_tab)
-{
-  if (arch_ext_flag_tab->var_ref == &gcc_options::x_target_flags)
-   mask |= arch_ext_flag_tab->mask;
-}
-  return mask;
-}
-
 /* Get the minimal feature bits in Linux hwprobe of the given ISA string.
 
Used for generating Function Multi-Versioning (FMV) dispatcher for RISC-V.
diff --git a/gcc/config/riscv/riscv-subset.h b/gcc/config/riscv/riscv-subset.h
index 7b3fdaeb3e40..c5d9fab4de9f 100644
--- a/gcc/config/riscv/riscv-subset.h
+++ b/gcc/config/riscv/riscv-subset.h
@@ -129,6 +129,5 @@ extern bool riscv_minimal_hwprobe_feature_bits (const char 
*,
location_t);
 extern bool
 riscv_ext_is_subset (struct cl_target_option *, struct cl_target_option *);
-extern int riscv_x_target_flags_isa_mask (void);
 
 #endif /* ! GCC_RISCV_SUBSET_H */
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 8b77a3539bc5..d28aee4b4398 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -7918,11 +7918,9 @@ riscv_can_inline_p (tree caller, tree callee)
   struct cl_target_option *callee_opts = TREE_TARGET_OPTION (callee_tree);
   struct cl_target_option *caller_opts = TREE_TARGET_OPTION (caller_tree);
 
-  int isa_flag_mask = riscv_x_target_flags_isa_mask ();
-
-  /* Callee and caller should have the same target options except for ISA.  */
-  int callee_target_flags = callee_opts->x_target_flags & ~isa_flag_mask;
-  int caller_target_flags = caller_opts->x_target_flags & ~isa_flag_mask;
+  /* Callee and caller should have the same target options.  */
+  int callee_target_flags = callee_opts->x_target_flags;
+  int caller_target_flags = caller_opts->x_target_flags;
 
   if (callee_target_flags != caller_target_flags)
 return false;

[gcc r16-581] RISC-V: Use riscv-ext.def to generate target options and variables

[Kito Cheng via Gcc-cvs]

https://gcc.gnu.org/g:ea6154919a6416c2f75dcf025125f6926d06

commit r16-581-gea6154919a6416c2f75dcf025125f6926d06
Author: Kito Cheng 
Date:   Wed May 7 18:28:18 2025 +0800

RISC-V: Use riscv-ext.def to generate target options and variables

Leverage the centralized riscv-ext.def definitions to auto-generate
the target option parsing and associated internal flags, replacing
manual listings in riscv.opt; `riscv_ext_flag_table` part will remove in
later patch.

gcc/ChangeLog:

* config/riscv/gen-riscv-ext-opt.cc: New.
* config/riscv/riscv.opt: Drop manual entries for target
options, and include riscv-ext.opt.
* config/riscv/riscv-ext.opt: New.
* config/riscv/riscv-ext.opt.urls: New.
* config.gcc: Add riscv-ext.opt to the list of target options files.
* common/config/riscv/riscv-common.cc (riscv_ext_flag_table): 
Adjsut target
option variable entry.
(riscv_set_arch_by_subset_list): Adjust target option variable.
* config/riscv/riscv-c.cc (riscv_ext_flag_table): Adjust target
option variable entry.
* config/riscv/riscv-vector-builtins.cc (pragma_intrinsic_flags):
Adjust variable name.
(riscv_pragma_intrinsic_flags_pollute): Adjust variable name.
(riscv_pragma_intrinsic_flags_restore): Ditto.
* config/riscv/t-riscv: Add the rule for generating
riscv-ext.opt.
* config/riscv/riscv-opts.h (TARGET_MIN_VLEN): Update.
(TARGET_MIN_VLEN_OPTS): Update.

Diff:
---
 gcc/common/config/riscv/riscv-common.cc   | 102 
 gcc/config.gcc|   1 +
 gcc/config/riscv/gen-riscv-ext-opt.cc | 105 
 gcc/config/riscv/riscv-c.cc   |  16 +-
 gcc/config/riscv/riscv-ext.opt| 404 ++
 gcc/config/riscv/riscv-ext.opt.urls   |   0
 gcc/config/riscv/riscv-opts.h |  12 +-
 gcc/config/riscv/riscv-vector-builtins.cc |  20 +-
 gcc/config/riscv/riscv.opt| 336 +
 gcc/config/riscv/t-riscv  |  13 +
 10 files changed, 603 insertions(+), 406 deletions(-)

diff --git a/gcc/common/config/riscv/riscv-common.cc 
b/gcc/common/config/riscv/riscv-common.cc
index d3240f792401..d84aa9d78dd3 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -1777,14 +1777,14 @@ struct riscv_ext_flag_table_t {
 /* Mapping table between extension to internal flag.  */
 static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
 {
-  RISCV_EXT_FLAG_ENTRY ("e", x_target_flags, MASK_RVE),
-  RISCV_EXT_FLAG_ENTRY ("m", x_target_flags, MASK_MUL),
-  RISCV_EXT_FLAG_ENTRY ("a", x_target_flags, MASK_ATOMIC),
-  RISCV_EXT_FLAG_ENTRY ("f", x_target_flags, MASK_HARD_FLOAT),
-  RISCV_EXT_FLAG_ENTRY ("d", x_target_flags, MASK_DOUBLE_FLOAT),
-  RISCV_EXT_FLAG_ENTRY ("c", x_target_flags, MASK_RVC),
-  RISCV_EXT_FLAG_ENTRY ("v", x_target_flags, MASK_FULL_V),
-  RISCV_EXT_FLAG_ENTRY ("v", x_target_flags, MASK_VECTOR),
+  RISCV_EXT_FLAG_ENTRY ("e", x_riscv_base_subext, MASK_RVE),
+  RISCV_EXT_FLAG_ENTRY ("m", x_riscv_base_subext, MASK_MUL),
+  RISCV_EXT_FLAG_ENTRY ("a", x_riscv_base_subext, MASK_ATOMIC),
+  RISCV_EXT_FLAG_ENTRY ("f", x_riscv_base_subext, MASK_HARD_FLOAT),
+  RISCV_EXT_FLAG_ENTRY ("d", x_riscv_base_subext, MASK_DOUBLE_FLOAT),
+  RISCV_EXT_FLAG_ENTRY ("c", x_riscv_base_subext, MASK_RVC),
+  RISCV_EXT_FLAG_ENTRY ("v", x_riscv_isa_flags, MASK_FULL_V),
+  RISCV_EXT_FLAG_ENTRY ("v", x_riscv_isa_flags, MASK_VECTOR),
 
   RISCV_EXT_FLAG_ENTRY ("zicsr",x_riscv_zi_subext, MASK_ZICSR),
   RISCV_EXT_FLAG_ENTRY ("zifencei", x_riscv_zi_subext, MASK_ZIFENCEI),
@@ -1828,22 +1828,22 @@ static const riscv_ext_flag_table_t 
riscv_ext_flag_table[] =
   RISCV_EXT_FLAG_ENTRY ("ziccrse", x_riscv_zi_subext, MASK_ZICCRSE),
   RISCV_EXT_FLAG_ENTRY ("zilsd",   x_riscv_zi_subext, MASK_ZILSD),
 
-  RISCV_EXT_FLAG_ENTRY ("zicboz", x_riscv_zicmo_subext, MASK_ZICBOZ),
-  RISCV_EXT_FLAG_ENTRY ("zicbom", x_riscv_zicmo_subext, MASK_ZICBOM),
-  RISCV_EXT_FLAG_ENTRY ("zicbop", x_riscv_zicmo_subext, MASK_ZICBOP),
-  RISCV_EXT_FLAG_ENTRY ("zic64b", x_riscv_zicmo_subext, MASK_ZIC64B),
+  RISCV_EXT_FLAG_ENTRY ("zicboz", x_riscv_zi_subext, MASK_ZICBOZ),
+  RISCV_EXT_FLAG_ENTRY ("zicbom", x_riscv_zi_subext, MASK_ZICBOM),
+  RISCV_EXT_FLAG_ENTRY ("zicbop", x_riscv_zi_subext, MASK_ZICBOP),
+  RISCV_EXT_FLAG_ENTRY ("zic64b", x_riscv_zi_subext, MASK_ZIC64B),
 
   RISCV_EXT_FLAG_ENTRY ("zicfiss", x_riscv_zi_subext, MASK_ZICFISS),
   RISCV_EXT_FLAG_ENTRY ("zicfilp", x_riscv_zi_subext, MASK_ZICFILP),
 
-  RISCV_EXT_FLAG_ENTRY ("zimop", x_riscv_mop_subext, MASK_ZIMOP),
-  RISCV_EXT_FLAG_ENTRY ("zcmop", x_riscv_mop_subext, MASK_ZCMOP),
+  RISCV_EXT_FLAG_ENTRY ("zimop", x_riscv_zi_subext, MASK_ZIMOP),
+  RISCV_EXT_FLAG_ENTRY ("zcmop", x_riscv

[gcc(refs/users/omachota/heads/rtl-ssa-dce)] rtl-ssa-dce: create debug instruction

[Ondrej Machota via Gcc-cvs]

https://gcc.gnu.org/g:2e2274102964364a1b5fcd0a70d92c5f6f3c5e08

commit 2e2274102964364a1b5fcd0a70d92c5f6f3c5e08
Author: Ondřej Machota 
Date:   Tue May 13 06:28:48 2025 +0200

rtl-ssa-dce: create debug instruction

Diff:
---
 gcc/dce.cc  | 219 +++-
 gcc/emit-rtl.cc |   2 +-
 gcc/rtl-ssa/changes.cc  |   8 +-
 gcc/rtl-ssa/functions.h |   2 +-
 gcc/rtl.h   |   1 +
 5 files changed, 74 insertions(+), 158 deletions(-)

diff --git a/gcc/dce.cc b/gcc/dce.cc
index 5b8648be5859..305bb0e63db6 100644
--- a/gcc/dce.cc
+++ b/gcc/dce.cc
@@ -17,7 +17,6 @@ You should have received a copy of the GNU General Public 
License
 along with GCC; see the file COPYING3.  If not see
 .  */
 
-#include "bitmap.h"
 #include "sbitmap.h"
 #include 
 #include 
@@ -1381,7 +1380,10 @@ private:
   void sweep ();
 
   void debuggize_insn (insn_info *);
-  void debugize_insns (const std::unordered_set &);
+
+  void unmark_debugizable(insn_info &, sbitmap &);
+  sbitmap find_debugizable(const std::unordered_set &);
+  void debugize_insns (const sbitmap);
 
   offset_bitmap m_marked;
   sbitmap mm_marked_phis;
@@ -1640,7 +1642,7 @@ rtl_ssa_dce::reset_dead_debug_insn (insn_info *insn)
   if (dump_file)
 fprintf (dump_file, "Resetting debug insn: %d\n", insn->uid ());
 
-  // bitmap_clear_bit (mm_marked, insn->uid () + offset);
+  m_marked.clear_bit (insn->uid ());
   insn_change change (insn);
   change.new_uses = {};
   INSN_VAR_LOCATION_LOC (insn->rtl ()) = gen_rtx_UNKNOWN_VAR_LOC ();
@@ -1899,14 +1901,14 @@ replace_dead_reg(rtx x, const_rtx old_rtx 
ATTRIBUTE_UNUSED, void *data)
 }
 
 // visit every marked instruction in INSN dependency tree and unmark it
-static void
-unmark_debugizable(const insn_info& insn, auto_sbitmap &debugizable) 
+void
+rtl_ssa_dce::unmark_debugizable(insn_info &insn, sbitmap &debugizable) 
 {
   auto_vec worklist;
   bitmap_set_bit (debugizable, insn.uid ());
   worklist.safe_push (&insn);
 
-  while (!worklist.empty ()) {
+  while (!worklist.is_empty ()) {
 insn_info *current = worklist.pop ();
 int current_uid = current->uid ();
 
@@ -1916,7 +1918,7 @@ unmark_debugizable(const insn_info& insn, auto_sbitmap 
&debugizable)
 
 bitmap_clear_bit(debugizable, current_uid);
 // add all marked dependencies to the worklist
-for (def_info *def : current.defs())
+for (def_info *def : current->defs())
 {
   if (def->kind() != access_kind::SET)
 continue;
@@ -1932,14 +1934,20 @@ unmark_debugizable(const insn_info& insn, auto_sbitmap 
&debugizable)
   }
 }
 
-static auto_sbitmap
-find_debugizable(const std::unordered_set &depends_on_dead_phi) 
+sbitmap
+rtl_ssa_dce::find_debugizable(const std::unordered_set 
&depends_on_dead_phi) 
 {
   // only real instructions
-  auto_sbitmap debugizable(get_max_uid () + 1);
+  sbitmap debugizable = sbitmap_alloc (get_max_uid () + 1);
   bitmap_clear(debugizable);
 
   for (insn_info *insn : crtl->ssa->reverse_all_insns ()) {
+if (insn->is_artificial ())
+  continue;
+
+  // TODO: mark debug instructions that do not depend on a
+  // dead phi
+
 if (insn->is_artificial () || 
   (m_marked.get_bit (insn->uid ()) && !insn->is_debug_insn()))
   continue;
@@ -1966,7 +1974,7 @@ find_debugizable(const std::unordered_set 
&depends_on_dead_phi)
   asm_noperands (PATTERN (rtl)) >= 0)
   {
 unmark_debugizable(*insn, debugizable);
-continue; // TODO: call unmark_debugizable
+continue;
   }
 
 // some of the checks might be duplicate:
@@ -1974,7 +1982,7 @@ find_debugizable(const std::unordered_set 
&depends_on_dead_phi)
 {
   if (insn->num_defs() > 1)
 unmark_debugizable(*insn, debugizable);
-  continue; // TODO: call unmark_debugizable if num_defs>1
+  continue;
 }
 
 def_info *def = *defs.begin ();
@@ -1984,7 +1992,24 @@ find_debugizable(const std::unordered_set 
&depends_on_dead_phi)
 set_info *set = static_cast (def);
 // this is a problem a bit
 // TODO: check instruction dependencies and their debugizability
-if (!set->has_nondebug_insn_uses ())
+
+// if some dependent is a debugizable
+bool has_debug_uses = false;
+for (use_info *use : set->all_uses()) 
+{
+  if (!use->is_in_any_insn ())
+continue;
+
+  insn_info *use_insn = use->insn();
+  gcc_assert(use_insn->is_real());
+
+  if (bitmap_bit_p(debugizable, use_insn->uid ())) {
+has_debug_uses = true;
+break;
+  }
+}
+// if (!set->has_nondebug_insn_uses ())
+if (!has_debug_uses)
   continue;
 
 bitmap_set_bit (debugizable, insn->uid ());
@@ -1993,8 +2018,8 @@ find_debugizable(const std::unordered_set 
&depends_on_dead_phi)
   return debugizable;
 }
 
-static void 
-bruh(const auto_sbitmap& debugizable)
+void
+rtl_ssa_dce::debugize_insns (const sbitmap debugizable)
 {
   for (insn_info *insn : crtl->ssa->

[gcc r16-582] RISC-V: Generate extension table in documentation from riscv-ext.def

[Kito Cheng via Gcc-cvs]

https://gcc.gnu.org/g:124cbbbed5b8f7454f93f9a87e57fd4f3f2f78d2

commit r16-582-g124cbbbed5b8f7454f93f9a87e57fd4f3f2f78d2
Author: Kito Cheng 
Date:   Wed May 7 21:10:53 2025 +0800

RISC-V: Generate extension table in documentation from riscv-ext.def

Automatically build the ISA extension reference table in invoke.texi from
the unified riscv-ext.def metadata, ensuring documentation stays in sync
with extension definitions and reducing manual maintenance.

gcc/ChangeLog:

* doc/invoke.texi: Replace hand‑written extension table with
`@include riscv-ext.texi` to pull in auto‑generated entries.
* doc/riscv-ext.texi: New generated definition file
containing formatted documentation entries for each extension.
* Makefile.in: Add riscv-ext.texi to the list of files to be
processed by the Texinfo generator.
* config/riscv/gen-riscv-ext-texi.cc: New.
* config/riscv/t-riscv: Add rule for generating riscv-ext.texi.

Diff:
---
 gcc/Makefile.in|   2 +-
 gcc/config/riscv/gen-riscv-ext-texi.cc |  88 +
 gcc/config/riscv/t-riscv   |  34 +-
 gcc/doc/invoke.texi| 495 +
 gcc/doc/riscv-ext.texi | 637 +
 5 files changed, 759 insertions(+), 497 deletions(-)

diff --git a/gcc/Makefile.in b/gcc/Makefile.in
index e3af923e0e04..72d132207c0d 100644
--- a/gcc/Makefile.in
+++ b/gcc/Makefile.in
@@ -3703,7 +3703,7 @@ TEXI_GCC_FILES = gcc.texi gcc-common.texi gcc-vers.texi 
frontends.texi\
 contribute.texi compat.texi funding.texi gnu.texi gpl_v3.texi  \
 fdl.texi contrib.texi cppenv.texi cppopts.texi avr-mmcu.texi   \
 implement-c.texi implement-cxx.texi gcov-tool.texi gcov-dump.texi \
-lto-dump.texi
+lto-dump.texi riscv-ext.texi
 
 # we explicitly use $(srcdir)/doc/tm.texi here to avoid confusion with
 # the generated tm.texi; the latter might have a more recent timestamp,
diff --git a/gcc/config/riscv/gen-riscv-ext-texi.cc 
b/gcc/config/riscv/gen-riscv-ext-texi.cc
new file mode 100644
index ..e15fdbf36f6e
--- /dev/null
+++ b/gcc/config/riscv/gen-riscv-ext-texi.cc
@@ -0,0 +1,88 @@
+#include 
+#include 
+#include 
+#include 
+#include "riscv-opts.h"
+
+struct version_t
+{
+  int major;
+  int minor;
+  version_t (int major, int minor,
+enum riscv_isa_spec_class spec = ISA_SPEC_CLASS_NONE)
+: major (major), minor (minor)
+  {}
+  bool operator<(const version_t &other) const
+  {
+if (major != other.major)
+  return major < other.major;
+return minor < other.minor;
+  }
+
+  bool operator== (const version_t &other) const
+  {
+return major == other.major && minor == other.minor;
+  }
+};
+
+static void
+print_ext_doc_entry (const std::string &ext_name, const std::string &full_name,
+const std::string &desc,
+const std::vector &supported_versions)
+{
+  // Implementation of the function to print the documentation entry
+  // for the extension.
+  std::set unique_versions;
+  for (const auto &version : supported_versions)
+unique_versions.insert (version);
+  printf ("@item %s\n", ext_name.c_str ());
+  printf ("@tab");
+  for (const auto &version : unique_versions)
+{
+  printf (" %d.%d", version.major, version.minor);
+}
+  printf ("\n");
+  printf ("@tab %s", full_name.c_str ());
+  if (desc.size ())
+printf (", %s", desc.c_str ());
+  printf ("\n\n");
+}
+
+int
+main ()
+{
+  puts ("@c Copyright (C) 2025 Free Software Foundation, Inc.");
+  puts ("@c This is part of the GCC manual.");
+  puts ("@c For copying conditions, see the file gcc/doc/include/fdl.texi.");
+  puts ("");
+  puts ("@c This file is generated automatically using");
+  puts ("@c  gcc/config/riscv/gen-riscv-ext-texi.cc from:");
+  puts ("@c   gcc/config/riscv/riscv-ext.def");
+  puts ("@c   gcc/config/riscv/riscv-opts.h");
+  puts ("");
+  puts ("@c Please *DO NOT* edit manually.");
+  puts ("");
+  puts ("@multitable @columnfractions .10 .10 .80");
+  puts ("@headitem Extension Name @tab Supported Version @tab Description");
+  puts ("");
+
+  /* g extension is a very speical extension that no clear version...  */
+  puts ("@item g");
+  puts ("@tab -");
+  puts (
+"@tab General-purpose computing base extension, @samp{g} will expand to");
+  puts ("@samp{i}, @samp{m}, @samp{a}, @samp{f}, @samp{d}, @samp{zicsr} and");
+  puts ("@samp{zifencei}.");
+  puts ("");
+
+#define DEFINE_RISCV_EXT(NAME, UPPERCAE_NAME, FULL_NAME, DESC, URL, DEP_EXTS,  
\
+SUPPORTED_VERSIONS, FLAG_GROUP, BITMASK_GROUP_ID, \
+BITMASK_BIT_POSITION, EXTRA_EXTENSION_FLAGS)  \
+  print_ext_doc_entry (#NAME, FULL_NAME, DESC, 
\
+  std::vector SUPPORTED_VERSIONS);
+#include "riscv-ext.d

[gcc r16-587] RISC-V: Drop riscv_ext_flag_table in favor of riscv_ext_info_t data

[Kito Cheng via Gcc-cvs]

https://gcc.gnu.org/g:90c6ccebd762ae920690fce20cd3f2b8e24357a7

commit r16-587-g90c6ccebd762ae920690fce20cd3f2b8e24357a7
Author: Kito Cheng 
Date:   Wed May 7 21:27:20 2025 +0800

RISC-V: Drop riscv_ext_flag_table in favor of riscv_ext_info_t data

Refactor extension flag handling by removing the old riscv_ext_flag_table 
and
sourcing all flag definitions directly from the flags field of the unified
riscv_ext_info_t structures generated from riscv-ext.def.

gcc/ChangeLog:

* common/config/riscv/riscv-common.cc 
(riscv_extra_ext_flag_table_t):
New.
(riscv_ext_flag_table): Rename to ...
(riscv_extra_ext_flag_table): this, and drop most of definitions
that can obtained from the flags field of the riscv_ext_info_t
structures.
(apply_extra_extension_flags): Use riscv_ext_info_t.
(riscv_ext_is_subset): Ditto.

Diff:
---
 gcc/common/config/riscv/riscv-common.cc | 221 
 1 file changed, 27 insertions(+), 194 deletions(-)

diff --git a/gcc/common/config/riscv/riscv-common.cc 
b/gcc/common/config/riscv/riscv-common.cc
index d50aff4ae344..3d3ca110699b 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -47,21 +47,20 @@ typedef int (gcc_options::*opt_var_ref_t);
 typedef int (cl_target_option::*cl_opt_var_ref_t);
 
 /* Types for recording extension to internal flag.  */
-struct riscv_ext_flag_table_t
+struct riscv_extra_ext_flag_table_t
 {
-  riscv_ext_flag_table_t (const char *ext, opt_var_ref_t var_ref,
- cl_opt_var_ref_t cl_var_ref, int mask)
-   : ext (ext), var_ref (var_ref), cl_var_ref (cl_var_ref), mask (mask)
-  {}
-  riscv_ext_flag_table_t (opt_var_ref_t var_ref,
- cl_opt_var_ref_t cl_var_ref, int mask)
-   : ext (nullptr), var_ref (var_ref), cl_var_ref (cl_var_ref), mask (mask)
-  {}
-
   const char *ext;
   opt_var_ref_t var_ref;
   cl_opt_var_ref_t cl_var_ref;
   int mask;
+};
+
+/* Types for recording extension to internal flag.  */
+struct riscv_ext_flag_table_t
+{
+  opt_var_ref_t var_ref;
+  cl_opt_var_ref_t cl_var_ref;
+  int mask;
 
   void clean (gcc_options *opts) const { opts->*var_ref &= ~mask; }
 
@@ -1475,76 +1474,12 @@ riscv_arch_str (bool version_p)
 #define RISCV_EXT_FLAG_ENTRY(NAME, VAR, MASK) \
   {NAME, &gcc_options::VAR, &cl_target_option::VAR, MASK}
 
-/* Mapping table between extension to internal flag.  */
-static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
+/* Mapping table between extension to internal flag,
+   this table is not needed to add manually unless there is speical rule.  */
+static const riscv_extra_ext_flag_table_t riscv_extra_ext_flag_table[] =
 {
-  RISCV_EXT_FLAG_ENTRY ("e", x_riscv_base_subext, MASK_RVE),
-  RISCV_EXT_FLAG_ENTRY ("m", x_riscv_base_subext, MASK_MUL),
-  RISCV_EXT_FLAG_ENTRY ("a", x_riscv_base_subext, MASK_ATOMIC),
-  RISCV_EXT_FLAG_ENTRY ("f", x_riscv_base_subext, MASK_HARD_FLOAT),
-  RISCV_EXT_FLAG_ENTRY ("d", x_riscv_base_subext, MASK_DOUBLE_FLOAT),
-  RISCV_EXT_FLAG_ENTRY ("c", x_riscv_base_subext, MASK_RVC),
-  RISCV_EXT_FLAG_ENTRY ("v", x_riscv_isa_flags, MASK_FULL_V),
-  RISCV_EXT_FLAG_ENTRY ("v", x_riscv_isa_flags, MASK_VECTOR),
-
-  RISCV_EXT_FLAG_ENTRY ("zicsr",x_riscv_zi_subext, MASK_ZICSR),
-  RISCV_EXT_FLAG_ENTRY ("zifencei", x_riscv_zi_subext, MASK_ZIFENCEI),
-  RISCV_EXT_FLAG_ENTRY ("zicond",   x_riscv_zi_subext, MASK_ZICOND),
-
-  RISCV_EXT_FLAG_ENTRY ("za64rs",  x_riscv_za_subext, MASK_ZA64RS),
-  RISCV_EXT_FLAG_ENTRY ("za128rs", x_riscv_za_subext, MASK_ZA128RS),
-  RISCV_EXT_FLAG_ENTRY ("zawrs",   x_riscv_za_subext, MASK_ZAWRS),
-  RISCV_EXT_FLAG_ENTRY ("zaamo",   x_riscv_za_subext, MASK_ZAAMO),
-  RISCV_EXT_FLAG_ENTRY ("zalrsc",  x_riscv_za_subext, MASK_ZALRSC),
-  RISCV_EXT_FLAG_ENTRY ("zabha",   x_riscv_za_subext, MASK_ZABHA),
-  RISCV_EXT_FLAG_ENTRY ("zacas",   x_riscv_za_subext, MASK_ZACAS),
-  RISCV_EXT_FLAG_ENTRY ("zama16b", x_riscv_za_subext, MASK_ZAMA16B),
-
-  RISCV_EXT_FLAG_ENTRY ("zba", x_riscv_zb_subext, MASK_ZBA),
-  RISCV_EXT_FLAG_ENTRY ("zbb", x_riscv_zb_subext, MASK_ZBB),
-  RISCV_EXT_FLAG_ENTRY ("zbc", x_riscv_zb_subext, MASK_ZBC),
-  RISCV_EXT_FLAG_ENTRY ("zbs", x_riscv_zb_subext, MASK_ZBS),
-
-  RISCV_EXT_FLAG_ENTRY ("zfinx",x_riscv_zinx_subext, MASK_ZFINX),
-  RISCV_EXT_FLAG_ENTRY ("zdinx",x_riscv_zinx_subext, MASK_ZDINX),
-  RISCV_EXT_FLAG_ENTRY ("zhinx",x_riscv_zinx_subext, MASK_ZHINX),
-  RISCV_EXT_FLAG_ENTRY ("zhinxmin", x_riscv_zinx_subext, MASK_ZHINXMIN),
-
-  RISCV_EXT_FLAG_ENTRY ("zbkb",  x_riscv_zk_subext, MASK_ZBKB),
-  RISCV_EXT_FLAG_ENTRY ("zbkc",  x_riscv_zk_subext, MASK_ZBKC),
-  RISCV_EXT_FLAG_ENTRY ("zbkx",  x_riscv_zk_subext, MASK_ZBKX),
-  RISCV_EXT_FLAG_ENTRY ("zknd",  x_riscv_zk_subext, MASK_ZKND),
-  RISCV_EXT_FLAG_ENTRY ("zkne",  x_riscv_zk_subext, MASK_ZKNE),
-  RISCV_EXT_FLAG_ENTRY ("zknh",  x_riscv_zk_s

[gcc r16-586] RISC-V: Drop riscv_ext_version_table in favor of riscv_ext_info_t data

[Kito Cheng via Gcc-cvs]

https://gcc.gnu.org/g:897bb6d4347469e378aad9e00fc4b5c6fcb1e9ce

commit r16-586-g897bb6d4347469e378aad9e00fc4b5c6fcb1e9ce
Author: Kito Cheng 
Date:   Thu May 8 16:23:29 2025 +0800

RISC-V: Drop riscv_ext_version_table in favor of riscv_ext_info_t data

This commit drops the riscv_ext_version_table and instead uses the
riscv_ext_info_t data structure to provide the version information
for RISC-V extensions.

gcc/ChangeLog:

* common/config/riscv/riscv-common.cc (riscv_ext_version_table):
Remove.
(standard_extensions_p): Use riscv_ext_info_t.
(get_default_version): Use riscv_ext_info_t.
(riscv_arch_help): Ditto.

Diff:
---
 gcc/common/config/riscv/riscv-common.cc | 272 +++-
 1 file changed, 22 insertions(+), 250 deletions(-)

diff --git a/gcc/common/config/riscv/riscv-common.cc 
b/gcc/common/config/riscv/riscv-common.cc
index c6ae649802c7..d50aff4ae344 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -269,225 +269,6 @@ struct riscv_profiles
   const char *profile_string;
 };
 
-/* All standard extensions defined in all supported ISA spec.  */
-static const struct riscv_ext_version riscv_ext_version_table[] =
-{
-  /* name, ISA spec, major version, minor_version.  */
-  {"e", ISA_SPEC_CLASS_20191213, 2, 0},
-  {"e", ISA_SPEC_CLASS_20190608, 2, 0},
-  {"e", ISA_SPEC_CLASS_2P2,  2, 0},
-
-  {"i", ISA_SPEC_CLASS_20191213, 2, 1},
-  {"i", ISA_SPEC_CLASS_20190608, 2, 1},
-  {"i", ISA_SPEC_CLASS_2P2,  2, 0},
-
-  {"m", ISA_SPEC_CLASS_20191213, 2, 0},
-  {"m", ISA_SPEC_CLASS_20190608, 2, 0},
-  {"m", ISA_SPEC_CLASS_2P2,  2, 0},
-
-  {"a", ISA_SPEC_CLASS_20191213, 2, 1},
-  {"a", ISA_SPEC_CLASS_20190608, 2, 0},
-  {"a", ISA_SPEC_CLASS_2P2,  2, 0},
-
-  {"f", ISA_SPEC_CLASS_20191213, 2, 2},
-  {"f", ISA_SPEC_CLASS_20190608, 2, 2},
-  {"f", ISA_SPEC_CLASS_2P2,  2, 0},
-
-  {"d", ISA_SPEC_CLASS_20191213, 2, 2},
-  {"d", ISA_SPEC_CLASS_20190608, 2, 2},
-  {"d", ISA_SPEC_CLASS_2P2,  2, 0},
-
-  {"c", ISA_SPEC_CLASS_20191213, 2, 0},
-  {"c", ISA_SPEC_CLASS_20190608, 2, 0},
-  {"c", ISA_SPEC_CLASS_2P2,  2, 0},
-
-  {"b",   ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"h",   ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"v",   ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"zicsr", ISA_SPEC_CLASS_20191213, 2, 0},
-  {"zicsr", ISA_SPEC_CLASS_20190608, 2, 0},
-
-  {"zifencei", ISA_SPEC_CLASS_20191213, 2, 0},
-  {"zifencei", ISA_SPEC_CLASS_20190608, 2, 0},
-
-  {"zicond", ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"za64rs",  ISA_SPEC_CLASS_NONE, 1, 0},
-  {"za128rs", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zawrs", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zaamo", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zalrsc", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zabha", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zacas", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zama16b", ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"zba", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zbb", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zbc", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zbs", ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"zfinx", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zdinx", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zhinx", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zhinxmin", ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"zbkb",  ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zbkc",  ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zbkx",  ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zkne",  ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zknd",  ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zknh",  ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zkr",   ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zksed", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zksh",  ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zkt",   ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"zihintntl", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zihintpause", ISA_SPEC_CLASS_NONE, 2, 0},
-
-  {"zicboz",ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zicbom",ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zicbop",ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zic64b",   ISA_SPEC_CLASS_NONE, 1, 0},
-  {"ziccamoa", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"ziccif",   ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zicclsm",  ISA_SPEC_CLASS_NONE, 1, 0},
-  {"ziccrse",  ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"zicfiss", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zicfilp", ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"zimop", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zcmop", ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"zicntr", ISA_SPEC_CLASS_NONE, 2, 0},
-  {"zihpm",  ISA_SPEC_CLASS_NONE, 2, 0},
-
-  {"zilsd",  ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zclsd",  ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"zk",ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zkn",   ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zks",   ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"ztso",  ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"zve32x", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zve32f", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zve64x", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zve64f", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zve64d", ISA_SPEC_CLASS_NONE, 1, 0},
-
-  {"zvbb", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zvbc", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zvkb", ISA_SPEC_CLASS_NONE, 1, 0},
-  {"zvkg", ISA_SPEC_CLASS_NONE, 1, 0},
-

[gcc r16-584] RISC-V: Introduce riscv_ext_info_t to hold extension metadata

[Kito Cheng via Gcc-cvs]

https://gcc.gnu.org/g:312c407aac772f3535ff952ebc5ebff1057a593c

commit r16-584-g312c407aac772f3535ff952ebc5ebff1057a593c
Author: Kito Cheng 
Date:   Wed May 7 20:59:15 2025 +0800

RISC-V: Introduce riscv_ext_info_t to hold extension metadata

Define a new riscv_ext_info_t struct to aggregate all ISA extension fields
(name, version, flags, implied extensions, bitmask and extra flags) 
generated
from riscv-ext.def.

Also adjust riscv_ext_flag_table_t and riscv_implied_info_t to make it
able to not hold extension name, this part will refactor in later
patchs.

gcc/ChangeLog:

* common/config/riscv/riscv-common.cc (riscv_ext_info_t): New
struct.
(opt_var_ref_t): Adjust order.
(cl_opt_var_ref_t): Ditto.
(riscv_ext_flag_table_t): Adjust order, and add a new construct
that not hold the extension name.
(riscv_version_t): New struct.
(riscv_implied_info_t): Adjust order, and add a new construct that 
not
hold the extension name.
(apply_extra_extension_flags): New function.
(riscv_ext_infos): New.
(riscv_implied_info): Adjust.
* config/riscv/riscv-opts.h (EXT_FLAG_MACRO): New macro.
(BITMASK_NOT_YET_ALLOCATED): New macro.

Diff:
---
 gcc/common/config/riscv/riscv-common.cc | 191 +---
 gcc/config/riscv/riscv-opts.h   |   8 ++
 2 files changed, 185 insertions(+), 14 deletions(-)

diff --git a/gcc/common/config/riscv/riscv-common.cc 
b/gcc/common/config/riscv/riscv-common.cc
index ff34a315caf6..5430da76d11c 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -19,6 +19,7 @@ along with GCC; see the file COPYING3.  If not see
 
 #include 
 #include 
+#include 
 #include 
 
 #define INCLUDE_STRING
@@ -41,11 +42,62 @@ along with GCC; see the file COPYING3.  If not see
 #define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_ENDIAN)
 #endif
 
+/* Type for pointer to member of gcc_options and cl_target_option.  */
+typedef int (gcc_options::*opt_var_ref_t);
+typedef int (cl_target_option::*cl_opt_var_ref_t);
+
+/* Types for recording extension to internal flag.  */
+struct riscv_ext_flag_table_t
+{
+  riscv_ext_flag_table_t (const char *ext, opt_var_ref_t var_ref,
+ cl_opt_var_ref_t cl_var_ref, int mask)
+   : ext (ext), var_ref (var_ref), cl_var_ref (cl_var_ref), mask (mask)
+  {}
+  riscv_ext_flag_table_t (opt_var_ref_t var_ref,
+ cl_opt_var_ref_t cl_var_ref, int mask)
+   : ext (nullptr), var_ref (var_ref), cl_var_ref (cl_var_ref), mask (mask)
+  {}
+
+  const char *ext;
+  opt_var_ref_t var_ref;
+  cl_opt_var_ref_t cl_var_ref;
+  int mask;
+
+  void clean (gcc_options *opts) const { opts->*var_ref &= ~mask; }
+
+  void set (gcc_options *opts) const { opts->*var_ref |= mask; }
+
+  bool check (cl_target_option *opts) const
+  {
+return (opts->*cl_var_ref & mask);
+  }
+};
+
+/* Type for hold RISC-V extension version.  */
+struct riscv_version_t
+{
+  riscv_version_t (int major_version, int minor_version,
+  enum riscv_isa_spec_class isa_spec_class
+  = ISA_SPEC_CLASS_NONE)
+: major_version (major_version), minor_version (minor_version),
+  isa_spec_class (isa_spec_class)
+  {}
+  int major_version;
+  int minor_version;
+  enum riscv_isa_spec_class isa_spec_class;
+};
+
 typedef bool (*riscv_implied_predicator_t) (const riscv_subset_list *);
 
 /* Type for implied ISA info.  */
 struct riscv_implied_info_t
 {
+  constexpr riscv_implied_info_t (const char *implied_ext,
+ riscv_implied_predicator_t predicator
+ = nullptr)
+: ext (nullptr), implied_ext (implied_ext), predicator (predicator)
+  {}
+
   constexpr riscv_implied_info_t (const char *ext, const char *implied_ext,
  riscv_implied_predicator_t predicator
  = nullptr)
@@ -53,7 +105,7 @@ struct riscv_implied_info_t
 
   bool match (const riscv_subset_list *subset_list, const char *ext_name) const
   {
-if (strcmp (ext_name, ext) != 0)
+if (ext_name && strcmp (ext_name, ext) != 0)
   return false;
 
 if (predicator && !predicator (subset_list))
@@ -73,6 +125,111 @@ struct riscv_implied_info_t
   riscv_implied_predicator_t predicator;
 };
 
+static void
+apply_extra_extension_flags (const char *ext,
+std::vector &flag_table);
+
+/* Class for hold the extension info.  */
+class riscv_ext_info_t
+{
+public:
+  riscv_ext_info_t (const char *ext,
+   const std::vector &implied_exts,
+   const std::vector &supported_versions,
+   const std::vector &flag_table,
+   int bitmask_group_id, int bitmask_group_bit_pos,
+   unsigned extra_extension

[gcc r16-555] sync LTO streaming and hashing for accelerators and vector type mode

[Richard Biener via Gcc-cvs]

https://gcc.gnu.org/g:67c8e777d466d3bed9830bf01841c96b6881b58d

commit r16-555-g67c8e777d466d3bed9830bf01841c96b6881b58d
Author: Richard Biener 
Date:   Mon Mar 3 10:09:25 2025 +0100

sync LTO streaming and hashing for accelerators and vector type mode

The following syncs up LTO tree hashing and streaming of TYPE_MODE
and DECL_MODE which long had a discrepancy for vector types and
recently got special-casing of streaming for offloading.  Failure
to handle this results in less possible type merging to occur.
Note the compare step will still use TYPE_MODE and DECL_MODE.

* lto-streamer-out.cc (hash_tree): Hash TYPE_MODE_RAW.
When offloading hash modes as VOIDmode for aggregates
and vectors.

Diff:
---
 gcc/lto-streamer-out.cc | 26 --
 1 file changed, 24 insertions(+), 2 deletions(-)

diff --git a/gcc/lto-streamer-out.cc b/gcc/lto-streamer-out.cc
index a055d12d6bed..86d338461c0c 100644
--- a/gcc/lto-streamer-out.cc
+++ b/gcc/lto-streamer-out.cc
@@ -1256,7 +1256,17 @@ hash_tree (struct streamer_tree_cache_d *cache, 
hash_map *map,
 
   if (CODE_CONTAINS_STRUCT (code, TS_DECL_COMMON))
 {
-  hstate.add_hwi (DECL_MODE (t));
+  /* Similar to TYPE_MODE, avoid streaming out host-specific DECL_MODE
+for aggregate type with offloading enabled, and while streaming-in
+recompute appropriate DECL_MODE for accelerator.  */
+  if (lto_stream_offload_p
+ && (VAR_P (t)
+ || TREE_CODE (t) == PARM_DECL
+ || TREE_CODE (t) == FIELD_DECL)
+ && AGGREGATE_TYPE_P (TREE_TYPE (t)))
+   hstate.add_hwi (VOIDmode);
+  else
+   hstate.add_hwi (DECL_MODE (t));
   hstate.add_flag (DECL_NONLOCAL (t));
   hstate.add_flag (DECL_VIRTUAL_P (t));
   hstate.add_flag (DECL_IGNORED_P (t));
@@ -1354,7 +1364,19 @@ hash_tree (struct streamer_tree_cache_d *cache, 
hash_map *map,
 
   if (CODE_CONTAINS_STRUCT (code, TS_TYPE_COMMON))
 {
-  hstate.add_hwi (TYPE_MODE (t));
+  /* For offloading, avoid streaming out TYPE_MODE for aggregate type since
+it may be host-specific. For eg, aarch64 uses OImode for ARRAY_TYPE
+whose size is 256-bits, which is not representable on accelerator.
+Instead stream out VOIDmode, and while streaming-in, recompute
+appropriate TYPE_MODE for accelerator.  */
+  if (lto_stream_offload_p
+ && (AGGREGATE_TYPE_P (t) || VECTOR_TYPE_P (t)))
+   hstate.add_hwi (VOIDmode);
+  /* for VECTOR_TYPE, TYPE_MODE reevaluates the mode using target_flags
+not necessary valid in a global context.
+Use the raw value previously set by layout_type.  */
+  else
+   hstate.add_hwi (TYPE_MODE_RAW (t));
   /* TYPE_NO_FORCE_BLK is private to stor-layout and need
 no streaming.  */
   hstate.add_flag (TYPE_PACKED (t));

[gcc r16-561] RISC-V: Minimal support for ssnpm, smnpm and smmpm extensions.

[Kito Cheng via Gcc-cvs]

https://gcc.gnu.org/g:7e5f5fd101f8686d34532f7afab9314f252e71cd

commit r16-561-g7e5f5fd101f8686d34532f7afab9314f252e71cd
Author: Dongyan Chen 
Date:   Mon May 12 17:19:24 2025 +0800

RISC-V: Minimal support for ssnpm, smnpm and smmpm extensions.

This patch support ssnpm, smnpm, smmpm, sspm and supm extensions[1].
To enable GCC to recognize and process ssnpm, smnpm, smmpm, sspm and
supm extensions correctly at compile time.


[1]https://github.com/riscv/riscv-j-extension/blob/master/zjpm/instructions.adoc

Changes for v5:
- Fix the testsuite error in arch-50.c.
Changes for v4:
- Fix the code based on the commit id 
9b13bea07706a7cae0185f8a860d67209308c050.
Changes for v3:
- Fix the error messages in gcc/testsuite/gcc.target/riscv/arch-46.c
Changes for v2:
- Add the sspm and supm extensions.
- Add the check_conflict_ext function to check the compatibility of ssnpm, 
smnpm, smmpm, sspm and supm extensions.
- Add the test cases for ssnpm, smnpm, smmpm, sspm and supm extensions.

gcc/ChangeLog:

* common/config/riscv/riscv-common.cc
(riscv_subset_list::check_conflict_ext): New extension.
* config/riscv/riscv.opt: Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-ss-1.c: New test.
* gcc.target/riscv/arch-ss-2.c: New test.

Diff:
---
 gcc/common/config/riscv/riscv-common.cc| 36 ++
 gcc/config/riscv/riscv.opt | 19 
 gcc/testsuite/gcc.target/riscv/arch-ss-1.c |  5 +
 gcc/testsuite/gcc.target/riscv/arch-ss-2.c | 15 +
 4 files changed, 75 insertions(+)

diff --git a/gcc/common/config/riscv/riscv-common.cc 
b/gcc/common/config/riscv/riscv-common.cc
index c89931aaf869..d3240f792401 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -262,6 +262,10 @@ static const riscv_implied_info_t riscv_implied_info[] =
   {"ssstateen", "zicsr"},
   {"sstc", "zicsr"},
 
+  {"ssnpm", "zicsr"},
+  {"smnpm", "zicsr"},
+  {"smmpm", "zicsr"},
+
   {"xsfvcp", "zve32x"},
 
   {NULL, NULL}
@@ -457,6 +461,12 @@ static const struct riscv_ext_version 
riscv_ext_version_table[] =
   {"sstc",  ISA_SPEC_CLASS_NONE, 1, 0},
   {"ssstrict",  ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"ssnpm", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"smnpm", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"smmpm", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"sspm",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"supm",  ISA_SPEC_CLASS_NONE, 1, 0},
+
   {"svade",   ISA_SPEC_CLASS_NONE, 1, 0},
   {"svadu",   ISA_SPEC_CLASS_NONE, 1, 0},
   {"svinval", ISA_SPEC_CLASS_NONE, 1, 0},
@@ -1454,6 +1464,26 @@ riscv_subset_list::check_conflict_ext ()
 error_at (m_loc, "%<-march=%s%>: zclsd extension supports in rv32 only",
  m_arch);
 
+  if (lookup ("ssnpm") && m_xlen == 32)
+error_at (m_loc, "%<-march=%s%>: ssnpm extension supports in rv64 only",
+ m_arch);
+
+  if (lookup ("smnpm") && m_xlen == 32)
+error_at (m_loc, "%<-march=%s%>: smnpm extension supports in rv64 only",
+ m_arch);
+
+  if (lookup ("smmpm") && m_xlen == 32)
+error_at (m_loc, "%<-march=%s%>: smmpm extension supports in rv64 only",
+ m_arch);
+
+  if (lookup ("sspm") && m_xlen == 32)
+error_at (m_loc, "%<-march=%s%>: sspm extension supports in rv64 only",
+ m_arch);
+
+  if (lookup ("supm") && m_xlen == 32)
+error_at (m_loc, "%<-march=%s%>: supm extension supports in rv64 only",
+ m_arch);
+
   if (lookup ("zfinx") && lookup ("f"))
 error_at (m_loc,
  "%<-march=%s%>: z*inx conflicts with floating-point "
@@ -1888,6 +1918,12 @@ static const riscv_ext_flag_table_t 
riscv_ext_flag_table[] =
   RISCV_EXT_FLAG_ENTRY ("svnapot", x_riscv_sv_subext, MASK_SVNAPOT),
   RISCV_EXT_FLAG_ENTRY ("svvptc",  x_riscv_sv_subext, MASK_SVVPTC),
 
+  RISCV_EXT_FLAG_ENTRY ("ssnpm", x_riscv_ss_subext, MASK_SSNPM),
+  RISCV_EXT_FLAG_ENTRY ("smnpm", x_riscv_sm_subext, MASK_SMNPM),
+  RISCV_EXT_FLAG_ENTRY ("smmpm", x_riscv_sm_subext, MASK_SMMPM),
+  RISCV_EXT_FLAG_ENTRY ("sspm", x_riscv_ss_subext, MASK_SSPM),
+  RISCV_EXT_FLAG_ENTRY ("supm", x_riscv_su_subext, MASK_SUPM),
+
   RISCV_EXT_FLAG_ENTRY ("ztso", x_riscv_ztso_subext, MASK_ZTSO),
 
   RISCV_EXT_FLAG_ENTRY ("xcvmac",  x_riscv_xcv_subext, MASK_XCVMAC),
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index ba5805e95452..9480dc54cbb5 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -482,6 +482,25 @@ Mask(SVNAPOT) Var(riscv_sv_subext)
 
 Mask(SVVPTC) Var(riscv_sv_subext)
 
+TargetVariable
+int riscv_ss_subext
+
+Mask(SSNPM) Var(riscv_ss_subext)
+
+Mask(SSPM) Var(riscv_ss_subext)
+
+TargetVariable
+int riscv_sm_subext
+
+Mask(SMNPM) Var(riscv_sm_subext)
+
+Mask(SMMPM) Var(riscv_sm_subext)
+
+TargetVariable
+int riscv_su_subext
+
+Mask(SUPM) Var(riscv_su_subext)
+
 

[gcc r16-560] RISC-V: Support for zilsd and zclsd extensions.

[Kito Cheng via Gcc-cvs]

https://gcc.gnu.org/g:d42f7244289ad8be1d3f7320528240bb849979e4

commit r16-560-gd42f7244289ad8be1d3f7320528240bb849979e4
Author: Dongyan Chen 
Date:   Mon Mar 17 22:23:18 2025 +0800

RISC-V: Support for zilsd and zclsd extensions.

This patch support zilsd and zclsd[1] extensions.
To enable GCC to recognize and process zilsd and zclsd extension correctly 
at compile time.

[1] https://github.com/riscv/riscv-zilsd

Changes for v2:
- Remove the addition of zilsd extension in 
gcc/common/config/riscv/riscv-ext-bitmask.def
- Fix a bug with zilsd and zclsd extension dependency in 
gcc/common/config/riscv/riscv-common.cc

gcc/ChangeLog:

* common/config/riscv/riscv-common.cc
(riscv_subset_list::check_conflict_ext): New extension.
* config/riscv/riscv.opt: Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-zilsd-1.c: New.
* gcc.target/riscv/arch-zilsd-2.c: New.
* gcc.target/riscv/arch-zilsd-3.c: New.

Diff:
---
 gcc/common/config/riscv/riscv-common.cc   | 16 
 gcc/config/riscv/riscv.opt|  4 
 gcc/testsuite/gcc.target/riscv/arch-zilsd-1.c |  5 +
 gcc/testsuite/gcc.target/riscv/arch-zilsd-2.c |  7 +++
 gcc/testsuite/gcc.target/riscv/arch-zilsd-3.c |  9 +
 5 files changed, 41 insertions(+)

diff --git a/gcc/common/config/riscv/riscv-common.cc 
b/gcc/common/config/riscv/riscv-common.cc
index e06cd5fa5762..c89931aaf869 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -115,6 +115,9 @@ static const riscv_implied_info_t riscv_implied_info[] =
   {"zicfiss", "zimop"},
   {"zicfilp", "zicsr"},
 
+  {"zclsd", "zilsd"},
+  {"zclsd", "zca"},
+
   {"zk", "zkn"},
   {"zk", "zkr"},
   {"zk", "zkt"},
@@ -377,6 +380,9 @@ static const struct riscv_ext_version 
riscv_ext_version_table[] =
   {"zicntr", ISA_SPEC_CLASS_NONE, 2, 0},
   {"zihpm",  ISA_SPEC_CLASS_NONE, 2, 0},
 
+  {"zilsd",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zclsd",  ISA_SPEC_CLASS_NONE, 1, 0},
+
   {"zk",ISA_SPEC_CLASS_NONE, 1, 0},
   {"zkn",   ISA_SPEC_CLASS_NONE, 1, 0},
   {"zks",   ISA_SPEC_CLASS_NONE, 1, 0},
@@ -1439,6 +1445,14 @@ riscv_subset_list::check_conflict_ext ()
   if (lookup ("zcf") && m_xlen == 64)
 error_at (m_loc, "%<-march=%s%>: zcf extension supports in rv32 only",
  m_arch);
+  
+  if (lookup ("zilsd") && m_xlen == 64)
+error_at (m_loc, "%<-march=%s%>: zilsd extension supports in rv32 only",
+ m_arch);
+
+  if (lookup ("zclsd") && m_xlen == 64)
+error_at (m_loc, "%<-march=%s%>: zclsd extension supports in rv32 only",
+ m_arch);
 
   if (lookup ("zfinx") && lookup ("f"))
 error_at (m_loc,
@@ -1782,6 +1796,7 @@ static const riscv_ext_flag_table_t 
riscv_ext_flag_table[] =
   RISCV_EXT_FLAG_ENTRY ("ziccif",  x_riscv_zi_subext, MASK_ZICCIF),
   RISCV_EXT_FLAG_ENTRY ("zicclsm", x_riscv_zi_subext, MASK_ZICCLSM),
   RISCV_EXT_FLAG_ENTRY ("ziccrse", x_riscv_zi_subext, MASK_ZICCRSE),
+  RISCV_EXT_FLAG_ENTRY ("zilsd",   x_riscv_zi_subext, MASK_ZILSD),
 
   RISCV_EXT_FLAG_ENTRY ("zicboz", x_riscv_zicmo_subext, MASK_ZICBOZ),
   RISCV_EXT_FLAG_ENTRY ("zicbom", x_riscv_zicmo_subext, MASK_ZICBOM),
@@ -1865,6 +1880,7 @@ static const riscv_ext_flag_table_t 
riscv_ext_flag_table[] =
   RISCV_EXT_FLAG_ENTRY ("zcd",  x_riscv_zc_subext, MASK_ZCD),
   RISCV_EXT_FLAG_ENTRY ("zcmp", x_riscv_zc_subext, MASK_ZCMP),
   RISCV_EXT_FLAG_ENTRY ("zcmt", x_riscv_zc_subext, MASK_ZCMT),
+  RISCV_EXT_FLAG_ENTRY ("zclsd", x_riscv_zc_subext, MASK_ZCLSD),
 
   RISCV_EXT_FLAG_ENTRY ("svade",   x_riscv_sv_subext, MASK_SVADE),
   RISCV_EXT_FLAG_ENTRY ("svadu",   x_riscv_sv_subext, MASK_SVADU),
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index 80593ee139c1..ba5805e95452 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -257,6 +257,8 @@ Mask(ZICFISS) Var(riscv_zi_subext)
 
 Mask(ZICFILP) Var(riscv_zi_subext)
 
+Mask(ZILSD)   Var(riscv_zi_subext)
+
 TargetVariable
 int riscv_za_subext
 
@@ -463,6 +465,8 @@ Mask(ZCMP) Var(riscv_zc_subext)
 
 Mask(ZCMT) Var(riscv_zc_subext)
 
+Mask(ZCLSD) Var(riscv_zc_subext)
+
 Mask(XCVBI) Var(riscv_xcv_subext)
 
 TargetVariable
diff --git a/gcc/testsuite/gcc.target/riscv/arch-zilsd-1.c 
b/gcc/testsuite/gcc.target/riscv/arch-zilsd-1.c
new file mode 100644
index ..452c04e42f6d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-zilsd-1.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zilsd_zclsd -mabi=ilp32d" } */
+int foo()
+{
+}
diff --git a/gcc/testsuite/gcc.target/riscv/arch-zilsd-2.c 
b/gcc/testsuite/gcc.target/riscv/arch-zilsd-2.c
new file mode 100644
index ..5d6185d0d365
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-zilsd-2.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zilsd

[gcc r14-11763] Document option -fdump-ipa-clones

[Martin Jambor via Gcc-cvs]

https://gcc.gnu.org/g:c817f833cf13bc81380bc9745da2622e4e3b7cb5

commit r14-11763-gc817f833cf13bc81380bc9745da2622e4e3b7cb5
Author: Martin Jambor 
Date:   Tue May 6 17:28:42 2025 +0200

Document option -fdump-ipa-clones

I have noticed that the option -fdump-ipa-clones is not documented
although there are users who depend on it.  This patch adds the
missing documentation along with the description of the information it
dumps and the format it uses.

I am never quite sure which of the texinfo mark-ups is the most
appropriate in which situation, I'll of course incorporate any
feedback on this as well as the general wording of the text.

After we settle on a version, I'd like to backport the documentation
also at least to GCC 15, 14 and 13.

Is it perhaps OK for master and the branches or what would better be
changed?

Thanks,

Martin

gcc/ChangeLog:

2025-04-23  Martin Jambor  

* doc/invoke.texi (Developer Options): Document -fdump-ipa-clones.

(cherry picked from commit 6ecc2fee06bdd60da0e9b3fe6660b553dbdca3ca)

Diff:
---
 gcc/doc/invoke.texi | 87 +
 1 file changed, 87 insertions(+)

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index c85cac24f3ce..64728fead512 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -20180,6 +20180,93 @@ By default, the dump will contain messages about 
successful
 optimizations (equivalent to @option{-optimized}) together with
 low-level details about the analysis.
 
+@opindex fdump-ipa-clones
+@item -fdump-ipa-clones
+
+Create a dump file containing information about creation of call graph
+node clones and removals of call graph nodes during inter-procedural
+optimizations and transformations.  Its main intended use is that tools
+that create live-patches can determine the set of functions that need to
+be live-patched to completely replace a particular function (see
+@option{-flive-patching}).  The file name is generated by appending
+suffix @code{ipa-clones} to the source file name, and the file is
+created in the same directory as the output file.  Each entry in the
+file is on a separate line containing semicolon separated fields.
+
+In the case of call graph clone creation, the individual fields are:
+
+@enumerate
+@item
+String @code{Callgraph clone}.
+
+@item
+Name of the function being cloned as it is presented to the assembler.
+
+@item
+A number that uniquely represents the function being cloned in the call
+graph.  Note that the number is unique only within a compilation unit or
+within whole-program analysis but is likely to be different in the two
+phases.
+
+@item
+The file name of the source file where the function is defined.
+
+@item
+The line on which the function definition is located.
+
+@item
+The column where the function definition is located.
+
+@item
+Name of the new function clone as it is presented to the assembler.
+
+@item
+A number that uniquely represents the new function clone in the call
+graph.  Note that the number is unique only within a compilation unit or
+within whole-program analysis but is likely to be different in the two
+phases.
+
+@item
+The file name of the source file where the source code location of the
+new clone points to.
+
+@item
+The line to which the source code location of the new clone points to.
+
+@item
+The column to which the source code location of the new clone points to.
+
+@item
+A string that determines the reason for cloning.
+
+@end enumerate
+
+In the case of call graph clone removal, the individual fields are:
+
+@enumerate
+@item
+String @code{Callgraph removal}.
+
+@item
+Name of the function being removed as it would be presented to the assembler.
+
+@item
+A number that uniquely represents the function being cloned in the call
+graph.  Note that the number is unique only within a compilation unit or
+within whole-program analysis but is likely to be different in the two
+phases.
+
+@item
+The file name of the source file where the function is defined.
+
+@item
+The line on which the function definition is located.
+
+@item
+The column where the function definition is located.
+
+@end enumerate
+
 @opindex fdump-lang
 @item -fdump-lang
 Dump language-specific information.  The file name is made by appending

[gcc r14-11764] ipa: Do not emit info about temporary clones to ipa-clones dump (PR119852)

[Martin Jambor via Gcc-cvs]

https://gcc.gnu.org/g:51ffec744b513a71fe84373fb87a3c0125b7fffd

commit r14-11764-g51ffec744b513a71fe84373fb87a3c0125b7fffd
Author: Martin Jambor 
Date:   Tue May 6 17:28:43 2025 +0200

ipa: Do not emit info about temporary clones to ipa-clones dump (PR119852)

As described in PR 119852, the output of -fdump-ipa-clones can contain
"(null)" as the suffix/reason for cloning when we need to create a
clone to hold the original function during recursive inlining.  Such
clone is never output and so should not be part of the dump output
either.

gcc/ChangeLog:

2025-04-23  Martin Jambor  

PR ipa/119852
* cgraphclones.cc (dump_callgraph_transformation): Document the
function.  Do not dump if suffix is NULL.

gcc/testsuite/ChangeLog:

2025-04-23  Martin Jambor  

PR ipa/119852
* gcc.dg/ipa/pr119852.c: New test.

(cherry picked from commit fb5829a01651d427a63a12c44ecc8baa47dbfc83)

Diff:
---
 gcc/cgraphclones.cc | 10 +++-
 gcc/testsuite/gcc.dg/ipa/pr119852.c | 50 +
 2 files changed, 59 insertions(+), 1 deletion(-)

diff --git a/gcc/cgraphclones.cc b/gcc/cgraphclones.cc
index 4fff6873a369..913c0a0a082f 100644
--- a/gcc/cgraphclones.cc
+++ b/gcc/cgraphclones.cc
@@ -307,12 +307,20 @@ cgraph_node::expand_all_artificial_thunks ()
   e = e->next_caller;
 }
 
+/* Dump information about creation of a call graph node clone to the dump file
+   created by the -fdump-ipa-clones option.  ORIGINAL is the function being
+   cloned, CLONE is the new clone.  SUFFIX is a string that helps identify the
+   reason for cloning, often it is the suffix used by a particular IPA pass to
+   create unique function names.  SUFFIX can be NULL and in that case the
+   dumping will not take place, which must be the case only for helper clones
+   which will never be emitted to the output.  */
+
 void
 dump_callgraph_transformation (const cgraph_node *original,
   const cgraph_node *clone,
   const char *suffix)
 {
-  if (symtab->ipa_clones_dump_file)
+  if (suffix && symtab->ipa_clones_dump_file)
 {
   fprintf (symtab->ipa_clones_dump_file,
   "Callgraph clone;%s;%d;%s;%d;%d;%s;%d;%s;%d;%d;%s\n",
diff --git a/gcc/testsuite/gcc.dg/ipa/pr119852.c 
b/gcc/testsuite/gcc.dg/ipa/pr119852.c
new file mode 100644
index ..eab8d21293cc
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/ipa/pr119852.c
@@ -0,0 +1,50 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -fdump-ipa-clones"  } */
+
+typedef struct rtx_def *rtx;
+enum rtx_code {
+  LAST_AND_UNUSED_RTX_CODE};
+extern const char * const rtx_format[((int) LAST_AND_UNUSED_RTX_CODE)];
+struct rtx_def {
+  enum rtx_code code;
+};
+typedef int (*rtx_function) (rtx *, void *);
+extern int for_each_rtx (rtx *, rtx_function, void *);
+int
+replace_label (rtx *x, void *data)
+{
+  rtx l = *x;
+  if (l == (rtx) 0)
+{
+ {
+   rtx new_c, new_l;
+   for_each_rtx (&new_c, replace_label, data);
+ }
+}
+}
+static int
+for_each_rtx_1 (rtx exp, int n, rtx_function f, void *data)
+{
+  int result, i, j;
+  const char *format = (rtx_format[(int) (((enum rtx_code) (exp)->code))]);
+  rtx *x;
+  for (; format[n] != '\0'; n++)
+{
+  switch (format[n])
+ {
+ case 'e':
+   result = (*f) (x, data);
+ {
+   result = for_each_rtx_1 (*x, i, f, data);
+ }
+ }
+}
+}
+int
+for_each_rtx (rtx *x, rtx_function f, void *data)
+{
+  int i;
+  return for_each_rtx_1 (*x, i, f, data);
+}
+
+/* { dg-final { scan-ipa-dump-not "(null)"  "ipa-clones"  } } */