https://gcc.gnu.org/g:d42f7244289ad8be1d3f7320528240bb849979e4
commit r16-560-gd42f7244289ad8be1d3f7320528240bb849979e4
Author: Dongyan Chen <chendong...@isrc.iscas.ac.cn>
Date: Mon Mar 17 22:23:18 2025 +0800
RISC-V: Support for zilsd and zclsd extensions.
This patch support zilsd and zclsd[1] extensions.
To enable GCC to recognize and process zilsd and zclsd extension correctly
at compile time.
[1] https://github.com/riscv/riscv-zilsd
Changes for v2:
- Remove the addition of zilsd extension in
gcc/common/config/riscv/riscv-ext-bitmask.def
- Fix a bug with zilsd and zclsd extension dependency in
gcc/common/config/riscv/riscv-common.cc
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc
(riscv_subset_list::check_conflict_ext): New extension.
* config/riscv/riscv.opt: Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-zilsd-1.c: New.
* gcc.target/riscv/arch-zilsd-2.c: New.
* gcc.target/riscv/arch-zilsd-3.c: New.
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 16 ++++++++++++++++
gcc/config/riscv/riscv.opt | 4 ++++
gcc/testsuite/gcc.target/riscv/arch-zilsd-1.c | 5 +++++
gcc/testsuite/gcc.target/riscv/arch-zilsd-2.c | 7 +++++++
gcc/testsuite/gcc.target/riscv/arch-zilsd-3.c | 9 +++++++++
5 files changed, 41 insertions(+)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index e06cd5fa5762..c89931aaf869 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -115,6 +115,9 @@ static const riscv_implied_info_t riscv_implied_info[] =
{"zicfiss", "zimop"},
{"zicfilp", "zicsr"},
+ {"zclsd", "zilsd"},
+ {"zclsd", "zca"},
+
{"zk", "zkn"},
{"zk", "zkr"},
{"zk", "zkt"},
@@ -377,6 +380,9 @@ static const struct riscv_ext_version
riscv_ext_version_table[] =
{"zicntr", ISA_SPEC_CLASS_NONE, 2, 0},
{"zihpm", ISA_SPEC_CLASS_NONE, 2, 0},
+ {"zilsd", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zclsd", ISA_SPEC_CLASS_NONE, 1, 0},
+
{"zk", ISA_SPEC_CLASS_NONE, 1, 0},
{"zkn", ISA_SPEC_CLASS_NONE, 1, 0},
{"zks", ISA_SPEC_CLASS_NONE, 1, 0},
@@ -1439,6 +1445,14 @@ riscv_subset_list::check_conflict_ext ()
if (lookup ("zcf") && m_xlen == 64)
error_at (m_loc, "%<-march=%s%>: zcf extension supports in rv32 only",
m_arch);
+
+ if (lookup ("zilsd") && m_xlen == 64)
+ error_at (m_loc, "%<-march=%s%>: zilsd extension supports in rv32 only",
+ m_arch);
+
+ if (lookup ("zclsd") && m_xlen == 64)
+ error_at (m_loc, "%<-march=%s%>: zclsd extension supports in rv32 only",
+ m_arch);
if (lookup ("zfinx") && lookup ("f"))
error_at (m_loc,
@@ -1782,6 +1796,7 @@ static const riscv_ext_flag_table_t
riscv_ext_flag_table[] =
RISCV_EXT_FLAG_ENTRY ("ziccif", x_riscv_zi_subext, MASK_ZICCIF),
RISCV_EXT_FLAG_ENTRY ("zicclsm", x_riscv_zi_subext, MASK_ZICCLSM),
RISCV_EXT_FLAG_ENTRY ("ziccrse", x_riscv_zi_subext, MASK_ZICCRSE),
+ RISCV_EXT_FLAG_ENTRY ("zilsd", x_riscv_zi_subext, MASK_ZILSD),
RISCV_EXT_FLAG_ENTRY ("zicboz", x_riscv_zicmo_subext, MASK_ZICBOZ),
RISCV_EXT_FLAG_ENTRY ("zicbom", x_riscv_zicmo_subext, MASK_ZICBOM),
@@ -1865,6 +1880,7 @@ static const riscv_ext_flag_table_t
riscv_ext_flag_table[] =
RISCV_EXT_FLAG_ENTRY ("zcd", x_riscv_zc_subext, MASK_ZCD),
RISCV_EXT_FLAG_ENTRY ("zcmp", x_riscv_zc_subext, MASK_ZCMP),
RISCV_EXT_FLAG_ENTRY ("zcmt", x_riscv_zc_subext, MASK_ZCMT),
+ RISCV_EXT_FLAG_ENTRY ("zclsd", x_riscv_zc_subext, MASK_ZCLSD),
RISCV_EXT_FLAG_ENTRY ("svade", x_riscv_sv_subext, MASK_SVADE),
RISCV_EXT_FLAG_ENTRY ("svadu", x_riscv_sv_subext, MASK_SVADU),
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index 80593ee139c1..ba5805e95452 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -257,6 +257,8 @@ Mask(ZICFISS) Var(riscv_zi_subext)
Mask(ZICFILP) Var(riscv_zi_subext)
+Mask(ZILSD) Var(riscv_zi_subext)
+
TargetVariable
int riscv_za_subext
@@ -463,6 +465,8 @@ Mask(ZCMP) Var(riscv_zc_subext)
Mask(ZCMT) Var(riscv_zc_subext)
+Mask(ZCLSD) Var(riscv_zc_subext)
+
Mask(XCVBI) Var(riscv_xcv_subext)
TargetVariable
diff --git a/gcc/testsuite/gcc.target/riscv/arch-zilsd-1.c
b/gcc/testsuite/gcc.target/riscv/arch-zilsd-1.c
new file mode 100644
index 000000000000..452c04e42f6d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-zilsd-1.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc_zilsd_zclsd -mabi=ilp32d" } */
+int foo()
+{
+}
diff --git a/gcc/testsuite/gcc.target/riscv/arch-zilsd-2.c
b/gcc/testsuite/gcc.target/riscv/arch-zilsd-2.c
new file mode 100644
index 000000000000..5d6185d0d365
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-zilsd-2.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zilsd -mabi=ilp32d" } */
+int foo()
+{
+}
+/* { dg-error "'-march=rv64gc_zilsd': zilsd extension supports in rv32 only"
"" { target *-*-* } 0 } */
+/* { dg-error
"'-march=rv64imafdc_zicsr_zifencei_zilsd_zmmul_zaamo_zalrsc_zca_zcd': zilsd
extension supports in rv32 only" "" { target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.target/riscv/arch-zilsd-3.c
b/gcc/testsuite/gcc.target/riscv/arch-zilsd-3.c
new file mode 100644
index 000000000000..3cda12030c9e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-zilsd-3.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zclsd -mabi=ilp32d" } */
+int foo()
+{
+}
+/* { dg-error "'-march=rv64gc_zclsd': zilsd extension supports in rv32 only"
"" { target *-*-* } 0 } */
+/* { dg-error "'-march=rv64gc_zclsd': zclsd extension supports in rv32 only"
"" { target *-*-* } 0 } */
+/* { dg-error
"'-march=rv64imafdc_zicsr_zifencei_zilsd_zmmul_zaamo_zalrsc_zca_zcd_zclsd':
zilsd extension supports in rv32 only" "" { target *-*-* } 0 } */
+/* { dg-error
"'-march=rv64imafdc_zicsr_zifencei_zilsd_zmmul_zaamo_zalrsc_zca_zcd_zclsd':
zclsd extension supports in rv32 only" "" { target *-*-* } 0 } */
