[gcc r15-5535] tree-cfg: Fix call to next_discriminator_for_locus()
https://gcc.gnu.org/g:81c29232b6f36235693ec12b319f5786ba83de03 commit r15-5535-g81c29232b6f36235693ec12b319f5786ba83de03 Author: Lewis Hyatt Date: Fri Oct 25 14:55:09 2024 -0400 tree-cfg: Fix call to next_discriminator_for_locus() While testing future 64-bit location_t support, I ran into an -fcompare-debug issue that was traced back here. Despite the name, next_discriminator_for_locus() is meant to take an integer line number argument, not a location_t. There is one call site which has been passing a location_t instead. For the most part that is harmless, although in case there are two CALL stmts on the same line with different location_t, it may fail to generate a unique discriminator where it should. If/when location_t changes to be 64-bit, however, it will produce an -fcompare-debug failure. Fix it by passing the line number rather than the location_t. I am not aware of a testcase that demonstrates any observable wrong behavior, but the file debug/pr53466.C is an example where the discriminator assignment is indeed different before and after this change. gcc/ChangeLog: * tree-cfg.cc (assign_discriminators): Fix incorrect value passed to next_discriminator_for_locus(). Diff: --- gcc/tree-cfg.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/tree-cfg.cc b/gcc/tree-cfg.cc index 3eede0d61cdc..c2100a51a7a5 100644 --- a/gcc/tree-cfg.cc +++ b/gcc/tree-cfg.cc @@ -1251,7 +1251,7 @@ assign_discriminators (void) } /* Allocate a new discriminator for CALL stmt. */ if (gimple_code (stmt) == GIMPLE_CALL) - curr_discr = next_discriminator_for_locus (curr_locus); + curr_discr = next_discriminator_for_locus (curr_locus_e.line); } gimple *last = last_nondebug_stmt (bb);
[gcc r15-5534] PR modula2/117703: libgm2 soname bumps for GCC 15
https://gcc.gnu.org/g:26f3efccaa760ca74ad6e2584ce3056c889fe246 commit r15-5534-g26f3efccaa760ca74ad6e2584ce3056c889fe246 Author: Gaius Mulley Date: Wed Nov 20 22:17:30 2024 + PR modula2/117703: libgm2 soname bumps for GCC 15 Bump libgm2 version ready for the gcc-15 release. libgm2/ChangeLog: PR modula2/117703 * configure: Regenerate. * configure.ac (libtool_VERSION): Bump to 20:0:0. Signed-off-by: Gaius Mulley Diff: --- libgm2/configure| 2 +- libgm2/configure.ac | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/libgm2/configure b/libgm2/configure index c36fd7d4cac5..efe3b660769b 100755 --- a/libgm2/configure +++ b/libgm2/configure @@ -2675,7 +2675,7 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu ac_config_headers="$ac_config_headers config.h" -libtool_VERSION=19:0:0 +libtool_VERSION=20:0:0 # Default to --enable-multilib diff --git a/libgm2/configure.ac b/libgm2/configure.ac index 1e6b82305ffc..c070491c9680 100644 --- a/libgm2/configure.ac +++ b/libgm2/configure.ac @@ -1,5 +1,5 @@ # Configure script for libgm2. -# Copyright (C) 2013-2023 Free Software Foundation, Inc. +# Copyright (C) 2013-2024 Free Software Foundation, Inc. # This file is part of GCC. @@ -27,7 +27,7 @@ AC_CONFIG_SRCDIR(Makefile.am) # AC_CONFIG_MACRO_DIR([config]) AC_CONFIG_HEADER(config.h) -libtool_VERSION=19:0:0 +libtool_VERSION=20:0:0 AC_SUBST(libtool_VERSION) AM_ENABLE_MULTILIB(, ..)
[gcc r15-5531] libgccjit: Add support for setting the comment ident
https://gcc.gnu.org/g:cf544af03a8b51b3dea1667ea2525dc6a6b4ae08
commit r15-5531-gcf544af03a8b51b3dea1667ea2525dc6a6b4ae08
Author: Antoni Boucher
Date: Fri Oct 27 17:36:03 2023 -0400
libgccjit: Add support for setting the comment ident
gcc/jit/ChangeLog:
* docs/topics/compatibility.rst (LIBGCCJIT_ABI_34): New ABI tag.
* docs/topics/contexts.rst: Document
gcc_jit_context_set_output_ident.
* jit-playback.cc (set_output_ident): New method.
* jit-playback.h (set_output_ident): New method.
* jit-recording.cc (recording::context::set_output_ident,
recording::output_ident::output_ident,
recording::output_ident::~output_ident,
recording::output_ident::replay_into,
recording::output_ident::make_debug_string,
recording::output_ident::write_reproducer): New methods.
* jit-recording.h (class output_ident): New class.
* libgccjit.cc (gcc_jit_context_set_output_ident): New function.
* libgccjit.h (gcc_jit_context_set_output_ident): New function.
* libgccjit.map: New function.
gcc/testsuite/ChangeLog:
* jit.dg/all-non-failing-tests.h: New test.
* jit.dg/test-output-ident.c: New test.
Diff:
---
gcc/jit/docs/topics/compatibility.rst| 8 +
gcc/jit/docs/topics/contexts.rst | 29 +++
gcc/jit/jit-playback.cc | 7
gcc/jit/jit-playback.h | 3 ++
gcc/jit/jit-recording.cc | 53
gcc/jit/jit-recording.h | 22
gcc/jit/libgccjit.cc | 16 +
gcc/jit/libgccjit.h | 6
gcc/jit/libgccjit.map| 5 +++
gcc/testsuite/jit.dg/all-non-failing-tests.h | 3 ++
gcc/testsuite/jit.dg/test-output-ident.c | 23
11 files changed, 175 insertions(+)
diff --git a/gcc/jit/docs/topics/compatibility.rst
b/gcc/jit/docs/topics/compatibility.rst
index 34c9b740a9a8..f48c52b21795 100644
--- a/gcc/jit/docs/topics/compatibility.rst
+++ b/gcc/jit/docs/topics/compatibility.rst
@@ -445,3 +445,11 @@ on functions and variables:
temporary variable:
* :func:`gcc_jit_function_new_temp`
+
+.. _LIBGCCJIT_ABI_34:
+
+``LIBGCCJIT_ABI_34``
+
+``LIBGCCJIT_ABI_34`` covers the addition of
+
+ * :func:`gcc_jit_context_set_output_ident`
diff --git a/gcc/jit/docs/topics/contexts.rst b/gcc/jit/docs/topics/contexts.rst
index ba075cd71d35..29e634e71f37 100644
--- a/gcc/jit/docs/topics/contexts.rst
+++ b/gcc/jit/docs/topics/contexts.rst
@@ -604,3 +604,32 @@ Additional command-line options
.. code-block:: c
#ifdef LIBGCCJIT_HAVE_gcc_jit_context_add_driver_option
+
+Output options
+**
+
+.. function:: void gcc_jit_context_set_output_ident (gcc_jit_context *ctxt,\
+ const char* output_ident)
+
+ Set the identifier to write in the .comment section of the output file to
+ ``output_ident``.
+
+ The parameter ``output_ident`` must be non-NULL.
+
+ This only works on some target, as you can see here:
+ https://gcc.gnu.org/onlinedocs/cpp/Other-Directives.html
+
+ Analogous to:
+
+ .. code-block:: c
+
+ #ident "My comment"
+
+ in C.
+
+ This entrypoint was added in :ref:`LIBGCCJIT_ABI_34`; you can test for
+ its presence using
+
+ .. code-block:: c
+
+ #ifdef LIBGCCJIT_HAVE_gcc_jit_context_set_output_ident
diff --git a/gcc/jit/jit-playback.cc b/gcc/jit/jit-playback.cc
index 7530b0d84775..d5bd0407afd1 100644
--- a/gcc/jit/jit-playback.cc
+++ b/gcc/jit/jit-playback.cc
@@ -329,6 +329,13 @@ get_type (enum gcc_jit_types type_)
return new type (type_node);
}
+void
+playback::context::
+set_output_ident (const char* ident)
+{
+ targetm.asm_out.output_ident (ident);
+}
+
/* Construct a playback::type instance (wrapping a tree) for the given
array type. */
diff --git a/gcc/jit/jit-playback.h b/gcc/jit/jit-playback.h
index 2f5e41155674..e29100423bac 100644
--- a/gcc/jit/jit-playback.h
+++ b/gcc/jit/jit-playback.h
@@ -77,6 +77,9 @@ public:
type *
get_type (enum gcc_jit_types type);
+ void
+ set_output_ident (const char* ident);
+
type *
new_array_type (location *loc,
type *element_type,
diff --git a/gcc/jit/jit-recording.cc b/gcc/jit/jit-recording.cc
index 4a0f8e6dff75..e39a10bacc33 100644
--- a/gcc/jit/jit-recording.cc
+++ b/gcc/jit/jit-recording.cc
@@ -1486,6 +1486,13 @@ recording::context::get_str_option (enum
gcc_jit_str_option opt)
return m_str_options[opt];
}
+void
+recording::context::set_output_ident (const char *ident)
+{
+ recording::output_ident *memento = new output_ident (this, ident);
+ record (memento);
+}
+
/* Set the given integer option for this context, or add an error if
it's not recognized.
@@ -23
[gcc r15-5456] aarch64: Extend the offset limit in "symbol + offset" from 1MB to 16MB
https://gcc.gnu.org/g:55788176f1e103a2912bb3b4b6fad65c480276f9
commit r15-5456-g55788176f1e103a2912bb3b4b6fad65c480276f9
Author: Evgeny Karpov
Date: Thu Sep 12 13:19:32 2024 +0200
aarch64: Extend the offset limit in "symbol + offset" from 1MB to 16MB
This patch allows using an offset of up to 16MB in "symbol + offset",
instead of 1MB limit that was used previously.
gcc/ChangeLog:
* config/aarch64/aarch64.cc (aarch64_load_symref_appropriately):
Update.
Diff:
---
gcc/config/aarch64/aarch64.cc | 15 +++
1 file changed, 15 insertions(+)
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index e5e993d39850..a2945f7fd0b4 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -3030,7 +3030,22 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm,
if (can_create_pseudo_p ())
tmp_reg = gen_reg_rtx (mode);
+ HOST_WIDE_INT mid_const = 0;
+ if (TARGET_PECOFF)
+ {
+ poly_int64 offset;
+ strip_offset (imm, &offset);
+
+ HOST_WIDE_INT const_offset;
+ if (offset.is_constant (&const_offset))
+ /* Written this way for the sake of negative offsets. */
+ mid_const = const_offset / (1 << 20) * (1 << 20);
+ }
+ imm = plus_constant (mode, imm, -mid_const);
+
emit_move_insn (tmp_reg, gen_rtx_HIGH (mode, copy_rtx (imm)));
+ if (mid_const)
+ emit_set_insn (tmp_reg, plus_constant (mode, tmp_reg, mid_const));
emit_insn (gen_add_losym (dest, tmp_reg, imm));
return;
}
[gcc r15-5435] RISC-V: Rearrange the test files for scalar SAT_TRUNC [NFC]
https://gcc.gnu.org/g:5751614adda11a3487c123ed38142364076c2e65
commit r15-5435-g5751614adda11a3487c123ed38142364076c2e65
Author: Pan Li
Date: Sat Nov 16 10:40:27 2024 +0800
RISC-V: Rearrange the test files for scalar SAT_TRUNC [NFC]
The test files of scalar SAT_TRUNC only has numbers as the suffix.
Rearrange the file name to -{form number}-{target-type}. For example,
test form 3 for uint32_t SAT_TRUNC will have -3-u32.c for asm check and
-run-3-u32.c for the run test.
Meanwhile, all related test files moved to riscv/sat/.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
It is test only patch and obvious up to a point, will commit it
directly if no comments in next 48H.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat_u_trunc-2.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-1-u16.c: ...here.
* gcc.target/riscv/sat_u_trunc-3.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-1-u32.c: ...here.
* gcc.target/riscv/sat_u_trunc-4.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-1-u64.c: ...here.
* gcc.target/riscv/sat_u_trunc-1.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-1-u8.c: ...here.
* gcc.target/riscv/sat_u_trunc-6.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-2-u16.c: ...here.
* gcc.target/riscv/sat_u_trunc-7.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-2-u32.c: ...here.
* gcc.target/riscv/sat_u_trunc-8.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-2-u64.c: ...here.
* gcc.target/riscv/sat_u_trunc-5.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-2-u8.c: ...here.
* gcc.target/riscv/sat_u_trunc-10.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-3-u16.c: ...here.
* gcc.target/riscv/sat_u_trunc-11.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-3-u32.c: ...here.
* gcc.target/riscv/sat_u_trunc-12.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-3-u64.c: ...here.
* gcc.target/riscv/sat_u_trunc-9.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-3-u8.c: ...here.
* gcc.target/riscv/sat_u_trunc-14.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-4-u16.c: ...here.
* gcc.target/riscv/sat_u_trunc-15.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-4-u32.c: ...here.
* gcc.target/riscv/sat_u_trunc-16.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-4-u64.c: ...here.
* gcc.target/riscv/sat_u_trunc-13.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-4-u8.c: ...here.
* gcc.target/riscv/sat_u_trunc-18.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-5-u16.c: ...here.
* gcc.target/riscv/sat_u_trunc-19.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-5-u32.c: ...here.
* gcc.target/riscv/sat_u_trunc-20.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-5-u64.c: ...here.
* gcc.target/riscv/sat_u_trunc-17.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-5-u8.c: ...here.
* gcc.target/riscv/sat_u_trunc-22.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-6-u16.c: ...here.
* gcc.target/riscv/sat_u_trunc-23.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-6-u32.c: ...here.
* gcc.target/riscv/sat_u_trunc-24.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-6-u64.c: ...here.
* gcc.target/riscv/sat_u_trunc-21.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-6-u8.c: ...here.
* gcc.target/riscv/sat_u_trunc-run-2.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-run-1-u16.c: ...here.
* gcc.target/riscv/sat_u_trunc-run-3.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-run-1-u32.c: ...here.
* gcc.target/riscv/sat_u_trunc-run-4.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-run-1-u64.c: ...here.
* gcc.target/riscv/sat_u_trunc-run-1.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-run-1-u8.c: ...here.
* gcc.target/riscv/sat_u_trunc-run-6.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-run-2-u16.c: ...here.
* gcc.target/riscv/sat_u_trunc-run-7.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-run-2-u32.c: ...here.
* gcc.target/riscv/sat_u_trunc-run-8.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-run-2-u64.c: ...here.
* gcc.target/riscv/sat_u_trunc-run-5.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-run-2-u8.c: ...here.
* gcc.target/riscv/sat_u_trunc-run-10.c: Move to...
* gcc.target/riscv/sat/sat_u_trunc-run-3-u16.c: ...here.
[gcc r15-5532] c: Diagnose compound literal for empty array [PR114266]
https://gcc.gnu.org/g:d5cebf7e4491ea0306a072ca3368d771a5ff9455
commit r15-5532-gd5cebf7e4491ea0306a072ca3368d771a5ff9455
Author: Joseph Myers
Date: Wed Nov 20 21:29:48 2024 +
c: Diagnose compound literal for empty array [PR114266]
As reported in bug 114266, GCC fails to pedwarn for a compound
literal, whose type is an array of unknown size, initialized with an
empty initializer. This case is disallowed by C23 (which doesn't have
zero-size objects); the case of a named object is diagnosed as
expected, but not that for compound literals. (Before C23, the
pedwarn for empty initializers sufficed.) Add a check for this
specific case with a pedwarn.
Bootstrapped with no regressions for x86_64-pc-linux-gnu.
PR c/114266
gcc/c/
* c-decl.cc (build_compound_literal): Diagnose array of unknown
size with empty initializer for C23.
gcc/testsuite/
* gcc.dg/c23-empty-init-4.c: New test.
Diff:
---
gcc/c/c-decl.cc | 9 +++--
gcc/testsuite/gcc.dg/c23-empty-init-4.c | 10 ++
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/gcc/c/c-decl.cc b/gcc/c/c-decl.cc
index 96bfe9290fd9..c58ff4ab2488 100644
--- a/gcc/c/c-decl.cc
+++ b/gcc/c/c-decl.cc
@@ -6514,9 +6514,14 @@ build_compound_literal (location_t loc, tree type, tree
init, bool non_const,
{
int failure = complete_array_type (&TREE_TYPE (decl),
DECL_INITIAL (decl), true);
- /* If complete_array_type returns 3, it means that the
- initial value of the compound literal is empty. Allow it. */
+ /* If complete_array_type returns 3, it means that the initial value of
+ the compound literal is empty. Allow it with a pedwarn; in pre-C23
+ modes, the empty initializer itself has been diagnosed if pedantic so
+ does not need to be diagnosed again here. */
gcc_assert (failure == 0 || failure == 3);
+ if (failure == 3 && flag_isoc23)
+ pedwarn (loc, OPT_Wpedantic,
+"array of unknown size with empty initializer");
type = TREE_TYPE (decl);
TREE_TYPE (DECL_INITIAL (decl)) = type;
diff --git a/gcc/testsuite/gcc.dg/c23-empty-init-4.c
b/gcc/testsuite/gcc.dg/c23-empty-init-4.c
new file mode 100644
index ..491343c053d9
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/c23-empty-init-4.c
@@ -0,0 +1,10 @@
+/* Test C23 support for empty initializers: invalid for empty arrays in
+ compound literals (bug 114266). */
+/* { dg-do compile } */
+/* { dg-options "-std=c23 -pedantic-errors" } */
+
+void
+f ()
+{
+ (int []) { }; /* { dg-error "array of unknown size with empty initializer" }
*/
+}
[gcc r15-5528] libgccjit: Add support for machine-dependent builtins
https://gcc.gnu.org/g:87f0136fa46c9b0352aa47f637d2f6678b8beb5b commit r15-5528-g87f0136fa46c9b0352aa47f637d2f6678b8beb5b Author: Antoni Boucher Date: Mon Jan 23 17:21:15 2023 -0500 libgccjit: Add support for machine-dependent builtins gcc/jit/ChangeLog: PR jit/108762 * docs/topics/compatibility.rst (LIBGCCJIT_ABI_32): New ABI tag. * docs/topics/functions.rst: Add documentation for the function gcc_jit_context_get_target_builtin_function. * dummy-frontend.cc: Include headers target.h, jit-recording.h, print-tree.h, unordered_map and string, new variables (target_builtins, target_function_types, and target_builtins_ctxt), new function (tree_type_to_jit_type). * jit-builtins.cc: Specify that the function types are not from target builtins. * jit-playback.cc: New argument is_target_builtin to new_function. * jit-playback.h: New argument is_target_builtin to new_function. * jit-recording.cc: New argument is_target_builtin to new_function_type, function_type constructor and function constructor, new function (get_target_builtin_function). * jit-recording.h: Include headers string and unordered_map, new variable target_function_types, new argument is_target_builtin to new_function_type, function_type and function, new functions (get_target_builtin_function, copy). * libgccjit.cc: New function (gcc_jit_context_get_target_builtin_function). * libgccjit.h: New function (gcc_jit_context_get_target_builtin_function). * libgccjit.map: New functions (gcc_jit_context_get_target_builtin_function). gcc/testsuite: PR jit/108762 * jit.dg/all-non-failing-tests.h: New test test-target-builtins.c. * jit.dg/test-target-builtins.c: New test. Diff: --- gcc/jit/docs/topics/compatibility.rst| 10 +- gcc/jit/docs/topics/functions.rst| 19 +++ gcc/jit/dummy-frontend.cc| 205 ++- gcc/jit/jit-builtins.cc | 6 +- gcc/jit/jit-playback.cc | 12 +- gcc/jit/jit-playback.h | 5 +- gcc/jit/jit-recording.cc | 76 -- gcc/jit/jit-recording.h | 110 +- gcc/jit/libgccjit.cc | 18 +++ gcc/jit/libgccjit.h | 13 ++ gcc/jit/libgccjit.map| 5 + gcc/testsuite/jit.dg/all-non-failing-tests.h | 3 + gcc/testsuite/jit.dg/test-target-builtins.c | 77 ++ 13 files changed, 538 insertions(+), 21 deletions(-) diff --git a/gcc/jit/docs/topics/compatibility.rst b/gcc/jit/docs/topics/compatibility.rst index 77b4c5df9979..bfef40afc2a0 100644 --- a/gcc/jit/docs/topics/compatibility.rst +++ b/gcc/jit/docs/topics/compatibility.rst @@ -418,7 +418,6 @@ on functions and variables: ``LIBGCCJIT_ABI_30`` covers the addition of :func:`gcc_jit_context_convert_vector` -=== .. _LIBGCCJIT_ABI_31: @@ -428,3 +427,12 @@ on functions and variables: * :func:`gcc_jit_context_new_rvalue_vector_perm` * :func:`gcc_jit_context_new_vector_access` + +.. _LIBGCCJIT_ABI_32: + +``LIBGCCJIT_ABI_32`` + + +``LIBGCCJIT_ABI_32`` covers the addition of a function to get target builtins: + + * :func:`gcc_jit_context_get_target_builtin_function` diff --git a/gcc/jit/docs/topics/functions.rst b/gcc/jit/docs/topics/functions.rst index 804605ea9398..16e82a34c21f 100644 --- a/gcc/jit/docs/topics/functions.rst +++ b/gcc/jit/docs/topics/functions.rst @@ -140,6 +140,25 @@ Functions uses such a parameter will lead to an error being emitted within the context. +.. function:: gcc_jit_function *\ + gcc_jit_context_get_target_builtin_function (gcc_jit_context *ctxt,\ +const char *name) + + Get the :type:`gcc_jit_function` for the built-in function (sometimes called + intrinsic functions) with the given name. For example: + + .. code-block:: c + + gcc_jit_function *fn += gcc_jit_context_get_target_builtin_function (ctxt, "__builtin_ia32_pmuldq512_mask"); + + .. note:: Due to technical limitations with how libgccjit interacts with + the insides of GCC, not all built-in functions are supported. More + precisely, not all types are supported for parameters of built-in + functions from libgccjit. Attempts to get a built-in function that + uses such a parameter will lead to an error being emitted within + the context. + .. function:: gcc_jit_object *\ gcc_jit_function_as_object (gcc_jit_function *func) diff --git a/gcc/jit/dummy-fronten
[gcc r15-5530] libgccjit: Add support for creating temporary variables
https://gcc.gnu.org/g:d8cf8917ed3d7e0708da3ac3d82456da28d1cdb5
commit r15-5530-gd8cf8917ed3d7e0708da3ac3d82456da28d1cdb5
Author: Antoni Boucher
Date: Thu Jan 18 17:54:59 2024 -0500
libgccjit: Add support for creating temporary variables
gcc/jit/ChangeLog:
* docs/topics/compatibility.rst (LIBGCCJIT_ABI_33): New ABI tag.
* docs/topics/functions.rst: Document gcc_jit_function_new_temp.
* jit-playback.cc (new_local): Add support for temporary
variables.
* jit-recording.cc (recording::function::new_temp): New method.
(recording::local::write_reproducer): Support temporary
variables.
* jit-recording.h (new_temp): New method.
* libgccjit.cc (gcc_jit_function_new_temp): New function.
* libgccjit.h (gcc_jit_function_new_temp): New function.
* libgccjit.map: New function.
gcc/testsuite/ChangeLog:
* jit.dg/all-non-failing-tests.h: Mention test-temp.c.
* jit.dg/test-temp.c: New test.
Diff:
---
gcc/jit/docs/topics/compatibility.rst| 9 +
gcc/jit/docs/topics/functions.rst| 20 ++
gcc/jit/jit-playback.cc | 15 +++-
gcc/jit/jit-recording.cc | 47 ++-
gcc/jit/jit-recording.h | 11 +-
gcc/jit/libgccjit.cc | 31 +++
gcc/jit/libgccjit.h | 7
gcc/jit/libgccjit.map| 5 +++
gcc/testsuite/jit.dg/all-non-failing-tests.h | 3 ++
gcc/testsuite/jit.dg/test-temp.c | 56
10 files changed, 191 insertions(+), 13 deletions(-)
diff --git a/gcc/jit/docs/topics/compatibility.rst
b/gcc/jit/docs/topics/compatibility.rst
index bfef40afc2a0..34c9b740a9a8 100644
--- a/gcc/jit/docs/topics/compatibility.rst
+++ b/gcc/jit/docs/topics/compatibility.rst
@@ -436,3 +436,12 @@ on functions and variables:
``LIBGCCJIT_ABI_32`` covers the addition of a function to get target builtins:
* :func:`gcc_jit_context_get_target_builtin_function`
+
+.. _LIBGCCJIT_ABI_33:
+
+``LIBGCCJIT_ABI_33``
+
+``LIBGCCJIT_ABI_33`` covers the addition of a function to create a new
+temporary variable:
+
+ * :func:`gcc_jit_function_new_temp`
diff --git a/gcc/jit/docs/topics/functions.rst
b/gcc/jit/docs/topics/functions.rst
index 16e82a34c21f..d986439de131 100644
--- a/gcc/jit/docs/topics/functions.rst
+++ b/gcc/jit/docs/topics/functions.rst
@@ -190,6 +190,26 @@ Functions
underlying string, so it is valid to pass in a pointer to an on-stack
buffer.
+.. function:: gcc_jit_lvalue *\
+ gcc_jit_function_new_temp (gcc_jit_function *func,\
+ gcc_jit_location *loc,\
+ gcc_jit_type *type)
+
+ Create a new local variable within the function, of the given type.
+ This function is similar to :func:`gcc_jit_function_new_local`, but
+ it is to be used for compiler-generated variables (as opposed to
+ user-defined variables in the language to be compiled) and these
+ variables won't show up in the debug info.
+
+ The parameter ``type`` must be non-`void`.
+
+ This entrypoint was added in :ref:`LIBGCCJIT_ABI_33`; you can test
+ for its presence using
+
+ .. code-block:: c
+
+ #ifdef LIBGCCJIT_HAVE_gcc_jit_function_new_temp
+
.. function:: size_t \
gcc_jit_function_get_param_count (gcc_jit_function *func)
diff --git a/gcc/jit/jit-playback.cc b/gcc/jit/jit-playback.cc
index e8887e96c8e0..7530b0d84775 100644
--- a/gcc/jit/jit-playback.cc
+++ b/gcc/jit/jit-playback.cc
@@ -32,6 +32,7 @@ along with GCC; see the file COPYING3. If not see
#include "toplev.h"
#include "tree-cfg.h"
#include "convert.h"
+#include "gimple-expr.h"
#include "stor-layout.h"
#include "print-tree.h"
#include "gimplify.h"
@@ -2167,10 +2168,20 @@ new_local (location *loc,
std::string>> &attributes)
{
gcc_assert (type);
- gcc_assert (name);
- tree inner = build_decl (UNKNOWN_LOCATION, VAR_DECL,
+ tree inner;
+ if (name)
+inner = build_decl (UNKNOWN_LOCATION, VAR_DECL,
get_identifier (name),
type->as_tree ());
+ else
+ {
+inner = build_decl (UNKNOWN_LOCATION, VAR_DECL,
+ create_tmp_var_name ("JITTMP"),
+ type->as_tree ());
+DECL_ARTIFICIAL (inner) = 1;
+DECL_IGNORED_P (inner) = 1;
+DECL_NAMELESS (inner) = 1;
+ }
DECL_CONTEXT (inner) = this->m_inner_fndecl;
/* Prepend to BIND_EXPR_VARS: */
diff --git a/gcc/jit/jit-recording.cc b/gcc/jit/jit-recording.cc
index 7c1b3fdde410..4a0f8e6dff75 100644
--- a/gcc/jit/jit-recording.cc
+++ b/gcc/jit/jit-recording.cc
@@ -4356,6 +4356,23 @@ recording::function::new_local (recording::location *loc,
ret
[gcc r15-5513] Enable symbolic backtraces on more Linux and BSD ports (continued)
https://gcc.gnu.org/g:30c2678cc6e6f1aefc32f07ce8200310920c77eb commit r15-5513-g30c2678cc6e6f1aefc32f07ce8200310920c77eb Author: Eric Botcazou Date: Wed Nov 20 15:03:56 2024 +0100 Enable symbolic backtraces on more Linux and BSD ports (continued) gcc/ada PR ada/117538 PR ada/117708 * Makefile.rtl (GNU Hurd): Add $(TRASYM_DWARF_UNIX_PAIRS). (x86-64 kfreebsd): Likewise. (aarch64 FreeBSD): Likewise. (x86-64 DragonFly): Likewise. (S390 Linux): Likewise and add Linux version of s-tsmona.adb. (Mips Linux): Likewise. (SPARC Linux): Likewise. (HP/PA Linux): Linux. (M68K Linux): Likewise. (SH4 Linux): Likewise. (Alpha Linux): Likewise. (RISC-V Linux): Likewise. Diff: --- gcc/ada/Makefile.rtl | 27 --- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl index 6b7461817c46..e93a583058c9 100644 --- a/gcc/ada/Makefile.rtl +++ b/gcc/ada/Makefile.rtl @@ -1732,6 +1732,7 @@ ifeq ($(strip $(filter-out %86 pc gnu,$(target_cpu) $(target_vendor) $(target_os s-taprop.adb
[gcc r15-5524] tree-optimization/117709 - bogus offset for gather load
https://gcc.gnu.org/g:f5bd88b5e874751d17a2f18c1cfc5bd054da8308
commit r15-5524-gf5bd88b5e874751d17a2f18c1cfc5bd054da8308
Author: Richard Biener
Date: Wed Nov 20 16:47:08 2024 +0100
tree-optimization/117709 - bogus offset for gather load
When diverting to VMAT_GATHER_SCATTER we fail to zero *poffset
which was previously set if a load was classified as
VMAT_CONTIGUOUS_REVERSE. The following refactors
get_group_load_store_type a bit to avoid this but this all needs
some serious TLC.
PR tree-optimization/117709
* tree-vect-stmts.cc (get_group_load_store_type): Only
set *poffset when we end up with VMAT_CONTIGUOUS_DOWN
or VMAT_CONTIGUOUS_REVERSE.
Diff:
---
gcc/tree-vect-stmts.cc | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc
index 752ee457f6dd..522e9f7f90fd 100644
--- a/gcc/tree-vect-stmts.cc
+++ b/gcc/tree-vect-stmts.cc
@@ -2048,6 +2048,7 @@ get_group_load_store_type (vec_info *vinfo, stmt_vec_info
stmt_info,
unsigned int group_size;
unsigned HOST_WIDE_INT gap;
bool single_element_p;
+ poly_int64 neg_ldst_offset = 0;
if (STMT_VINFO_GROUPED_ACCESS (stmt_info))
{
first_stmt_info = DR_GROUP_FIRST_ELEMENT (stmt_info);
@@ -2105,7 +2106,8 @@ get_group_load_store_type (vec_info *vinfo, stmt_vec_info
stmt_info,
/* ??? The VMAT_CONTIGUOUS_REVERSE code generation is
only correct for single element "interleaving" SLP. */
*memory_access_type = get_negative_load_store_type
-(vinfo, stmt_info, vectype, vls_type, 1, poffset);
+(vinfo, stmt_info, vectype, vls_type, 1,
+ &neg_ldst_offset);
else
{
/* Try to use consecutive accesses of DR_GROUP_SIZE elements,
@@ -2375,6 +2377,10 @@ get_group_load_store_type (vec_info *vinfo,
stmt_vec_info stmt_info,
masked_p, gs_info, elsvals))
*memory_access_type = VMAT_GATHER_SCATTER;
+ if (*memory_access_type == VMAT_CONTIGUOUS_DOWN
+ || *memory_access_type == VMAT_CONTIGUOUS_REVERSE)
+*poffset = neg_ldst_offset;
+
if (*memory_access_type == VMAT_GATHER_SCATTER
|| *memory_access_type == VMAT_ELEMENTWISE
|| *memory_access_type == VMAT_STRIDED_SLP
[gcc r15-5525] RISC-V: testsuite: restrict big endian test to non vector
https://gcc.gnu.org/g:342eb518bd029fe818cb640e1cc12e12dc074bdd
commit r15-5525-g342eb518bd029fe818cb640e1cc12e12dc074bdd
Author: Edwin Lu
Date: Tue Nov 19 12:55:15 2024 -0800
RISC-V: testsuite: restrict big endian test to non vector
RISC-V vector currently does not support big endian so the postcommit
was getting the sorry, not implemented error on vector targets. Restrict
the testcase to non-vector targets
gcc/testsuite/ChangeLog:
* gcc.target/riscv/pr117595.c: Restrict to non vector targets.
Signed-off-by: Edwin Lu
Diff:
---
gcc/testsuite/gcc.target/riscv/pr117595.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.target/riscv/pr117595.c
b/gcc/testsuite/gcc.target/riscv/pr117595.c
index a870df08ee4b..156b9388d6e4 100644
--- a/gcc/testsuite/gcc.target/riscv/pr117595.c
+++ b/gcc/testsuite/gcc.target/riscv/pr117595.c
@@ -1,4 +1,4 @@
-/* { dg-do compile } */
+/* { dg-do compile { target { ! riscv_v } } } */
/* { dg-options "-mbig-endian" } */
_Atomic enum { E0 } e;
[gcc r15-5527] aarch64: Fix aarch64 after moving to C23
https://gcc.gnu.org/g:beab0a3ecb2fa839295869fcff1c10237b99d085
commit r15-5527-gbeab0a3ecb2fa839295869fcff1c10237b99d085
Author: Andrew Pinski
Date: Tue Nov 19 19:49:38 2024 -0800
aarch64: Fix aarch64 after moving to C23
This fixes a few aarch64 specific testcases after the move to default to
GNU C23.
For the SME testcases, the GNU C23 cases as `()` changing to mean `(void)`
instead
of a non-prototype declaration; the non-prototype declaration merging was
confusing
some of the time so the updated way is the expected way even for that.
For pic-*.c `-Wno-old-style-definition` was added not to warn about old
style definitions.
For pr113573.c, I added `-std=gnu17` since I was not sure if `(...)` with
C23 would invoke
the same issue.
tested for aarch64-linux-gnu.
PR testsuite/117680
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/pic-constantpool1.c: Add
-Wno-old-style-definition.
* gcc.target/aarch64/pic-symrefplus.c: Likewise.
* gcc.target/aarch64/pr113573.c: Add `-std=gnu17`
* gcc.target/aarch64/sme/streaming_mode_1.c: Correct testcase.
* gcc.target/aarch64/sme/za_state_1.c: Likewise.
* gcc.target/aarch64/sme/za_state_2.c: Likewise.
Signed-off-by: Andrew Pinski
Diff:
---
gcc/testsuite/gcc.target/aarch64/pic-constantpool1.c| 2 +-
gcc/testsuite/gcc.target/aarch64/pic-symrefplus.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr113573.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sme/streaming_mode_1.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sme/za_state_1.c | 4 ++--
gcc/testsuite/gcc.target/aarch64/sme/za_state_2.c | 2 +-
6 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/gcc/testsuite/gcc.target/aarch64/pic-constantpool1.c
b/gcc/testsuite/gcc.target/aarch64/pic-constantpool1.c
index 755c0b67ea45..1a5da9aacfa8 100644
--- a/gcc/testsuite/gcc.target/aarch64/pic-constantpool1.c
+++ b/gcc/testsuite/gcc.target/aarch64/pic-constantpool1.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O2 -mcmodel=small -fPIC" } */
+/* { dg-options "-Wno-old-style-definition -O2 -mcmodel=small -fPIC" } */
/* { dg-do compile } */
/* { dg-require-effective-target fpic } */
diff --git a/gcc/testsuite/gcc.target/aarch64/pic-symrefplus.c
b/gcc/testsuite/gcc.target/aarch64/pic-symrefplus.c
index 0c5e7fe7fb47..ca019ce3b33e 100644
--- a/gcc/testsuite/gcc.target/aarch64/pic-symrefplus.c
+++ b/gcc/testsuite/gcc.target/aarch64/pic-symrefplus.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O2 -mcmodel=small -fPIC -fno-builtin" } */
+/* { dg-options "-Wno-old-style-definition -O2 -mcmodel=small -fPIC
-fno-builtin" } */
/* { dg-do compile } */
/* { dg-require-effective-target fpic } */
diff --git a/gcc/testsuite/gcc.target/aarch64/pr113573.c
b/gcc/testsuite/gcc.target/aarch64/pr113573.c
index fc8607f7218c..30175c4cb5c8 100644
--- a/gcc/testsuite/gcc.target/aarch64/pr113573.c
+++ b/gcc/testsuite/gcc.target/aarch64/pr113573.c
@@ -1,4 +1,4 @@
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -std=gnu17" } */
#pragma GCC aarch64 "arm_neon.h"
typedef __Uint8x8_t uint8x8_t;
diff --git a/gcc/testsuite/gcc.target/aarch64/sme/streaming_mode_1.c
b/gcc/testsuite/gcc.target/aarch64/sme/streaming_mode_1.c
index 8874b05b882c..cb1b05948d83 100644
--- a/gcc/testsuite/gcc.target/aarch64/sme/streaming_mode_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sme/streaming_mode_1.c
@@ -7,7 +7,7 @@ void sc_b ();
void sc_b () [[arm::streaming_compatible]]; // { dg-error "conflicting types" }
void sc_c () [[arm::streaming_compatible]];
-void sc_c () {} // Inherits attribute from declaration (confusingly).
+void sc_c () {} // { dg-error "conflicting types" }
void sc_d ();
void sc_d () [[arm::streaming_compatible]] {} // { dg-error "conflicting
types" }
@@ -33,7 +33,7 @@ void s_b ();
void s_b () [[arm::streaming]]; // { dg-error "conflicting types" }
void s_c () [[arm::streaming]];
-void s_c () {} // Inherits attribute from declaration (confusingly).
+void s_c () {} // { dg-error "conflicting types" }
void s_d ();
void s_d () [[arm::streaming]] {} // { dg-error "conflicting types" }
diff --git a/gcc/testsuite/gcc.target/aarch64/sme/za_state_1.c
b/gcc/testsuite/gcc.target/aarch64/sme/za_state_1.c
index 856880e21093..7d7989b18b34 100644
--- a/gcc/testsuite/gcc.target/aarch64/sme/za_state_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sme/za_state_1.c
@@ -7,7 +7,7 @@ void shared_b ();
void shared_b () [[arm::inout("za")]]; // { dg-error "conflicting types" }
void shared_c () [[arm::inout("za")]];
-void shared_c () {} // Inherits attribute from declaration (confusingly).
+void shared_c () {} // { dg-error "conflicting types" }
void shared_d ();
void shared_d () [[arm::inout("za")]] {} // { dg-error "conflicting types" }
@@ -33,7 +33,7 @@ void preserved_b ();
void preserved_b () [[arm::preserves("za")]]; // { dg-error "conflicting
types" }
void preserved_c
[gcc r15-5529] [PR116587][LRA]: Fix last chance reload pseudo allocation
https://gcc.gnu.org/g:56fc6a6d9edc9f9170285ef31c7f312608fad88c
commit r15-5529-g56fc6a6d9edc9f9170285ef31c7f312608fad88c
Author: Vladimir N. Makarov
Date: Wed Nov 20 14:25:41 2024 -0500
[PR116587][LRA]: Fix last chance reload pseudo allocation
On i686 PR116587 test compilation resulted in LRA failure to find
registers for a reload insn pseudo. The insn requires 6 regs for 4
reload insn pseudos where two of them require 2 regs each. But we
have only 5 free regs as sp is a fixed reg, bp is fixed because of
-fno-omit-frame-pointer, bx is assigned to pic_offset_table_pseudo
because of -fPIC. LRA spills pic_offset_table_pseudo as the last
chance approach to allocate registers to the reload pseudo. Although
it makes 2 free registers for the unallocated reload pseudo requiring
also 2 regs, the pseudo still can not be allocated as the 2 free regs
are disjoint. The patch spills all pseudos conflicting with the
unallocated reload pseudo including already allocated reload insn
pseudos, then standard LRA code allocates spilled pseudos requiring
more one register first and avoid situation of the disjoint regs for
reload pseudos requiring more one reg.
gcc/ChangeLog:
PR target/116587
* lra-assigns.cc (find_all_spills_for): Consider all pseudos whose
classes intersect given pseudo class.
gcc/testsuite/ChangeLog:
PR target/116587
* gcc.target/i386/pr116587.c: New test.
Diff:
---
gcc/lra-assigns.cc | 9 +
gcc/testsuite/gcc.target/i386/pr116587.c | 27 +++
2 files changed, 28 insertions(+), 8 deletions(-)
diff --git a/gcc/lra-assigns.cc b/gcc/lra-assigns.cc
index bcd7967ec7d9..0a14bde5e743 100644
--- a/gcc/lra-assigns.cc
+++ b/gcc/lra-assigns.cc
@@ -1362,14 +1362,7 @@ find_all_spills_for (int regno)
{
if (live_pseudos_reg_renumber[r2->regno] >= 0
&& ! sparseset_bit_p (live_range_hard_reg_pseudos, r2->regno)
- && rclass_intersect_p[regno_allocno_class_array[r2->regno]]
- && ((int) r2->regno < lra_constraint_new_regno_start
- || bitmap_bit_p (&lra_inheritance_pseudos, r2->regno)
- || bitmap_bit_p (&lra_split_regs, r2->regno)
- || bitmap_bit_p (&lra_optional_reload_pseudos, r2->regno)
- /* There is no sense to consider another reload
-pseudo if it has the same class. */
- || regno_allocno_class_array[r2->regno] != rclass))
+ && rclass_intersect_p[regno_allocno_class_array[r2->regno]])
sparseset_set_bit (live_range_hard_reg_pseudos, r2->regno);
}
}
diff --git a/gcc/testsuite/gcc.target/i386/pr116587.c
b/gcc/testsuite/gcc.target/i386/pr116587.c
new file mode 100644
index ..092830002d2b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr116587.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fPIC -mstackrealign -mavx512f
-fharden-control-flow-redundancy -fno-omit-frame-pointer -mbmi
-fkeep-gc-roots-live" } */
+
+typedef __UINT64_TYPE__ a;
+int b;
+struct c {
+ a d;
+};
+extern char e[];
+int f;
+void g();
+char *h(struct c *i, a d) {
+ while (b) {
+if ((i->d & d) == i->d) {
+ if (f)
+g();
+ g();
+ d &= ~i->d;
+}
+++i;
+ }
+ if (d)
+g();
+ if (f)
+return "";
+ return e;
+}
[gcc r15-5533] Fortran: fix checking of protected variables in submodules [PR83135]
https://gcc.gnu.org/g:3c130e410ac45d1bfca0c9d584603b726f58e0ac
commit r15-5533-g3c130e410ac45d1bfca0c9d584603b726f58e0ac
Author: Harald Anlauf
Date: Wed Nov 20 21:59:22 2024 +0100
Fortran: fix checking of protected variables in submodules [PR83135]
When a symbol was use-associated in the ancestor of a submodule, a
PROTECTED attribute was ignored in the submodule or its descendants.
Find the real ancestor of symbols when used in a variable definition
context in a submodule.
PR fortran/83135
gcc/fortran/ChangeLog:
* expr.cc (sym_is_from_ancestor): New helper function.
(gfc_check_vardef_context): Refine checking of PROTECTED attribute
of symbols that are indirectly use-associated in a submodule.
gcc/testsuite/ChangeLog:
* gfortran.dg/protected_10.f90: New test.
Diff:
---
gcc/fortran/expr.cc| 40 ++--
gcc/testsuite/gfortran.dg/protected_10.f90 | 75 ++
2 files changed, 110 insertions(+), 5 deletions(-)
diff --git a/gcc/fortran/expr.cc b/gcc/fortran/expr.cc
index 01fbc442546d..fdbf99166404 100644
--- a/gcc/fortran/expr.cc
+++ b/gcc/fortran/expr.cc
@@ -6272,6 +6272,33 @@ gfc_build_intrinsic_call (gfc_namespace *ns, gfc_isym_id
id, const char* name,
}
+/* Check if a symbol referenced in a submodule is declared in the ancestor
+ module and not accessed by use-association, and that the submodule is a
+ descendant. */
+
+static bool
+sym_is_from_ancestor (gfc_symbol *sym)
+{
+ const char dot[2] = ".";
+ /* Symbols take the form module.submodule_ or module.name_. */
+ char ancestor_module[2 * GFC_MAX_SYMBOL_LEN + 2];
+ char *ancestor;
+
+ if (sym == NULL
+ || sym->attr.use_assoc
+ || !sym->attr.used_in_submodule
+ || !sym->module
+ || !sym->ns->proc_name
+ || !sym->ns->proc_name->name)
+return false;
+
+ memset (ancestor_module, '\0', sizeof (ancestor_module));
+ strcpy (ancestor_module, sym->ns->proc_name->name);
+ ancestor = strtok (ancestor_module, dot);
+ return strcmp (ancestor, sym->module) == 0;
+}
+
+
/* Check if an expression may appear in a variable definition context
(F2008, 16.6.7) or pointer association context (F2008, 16.6.8).
This is called from the various places when resolving
@@ -6450,21 +6477,24 @@ gfc_check_vardef_context (gfc_expr* e, bool pointer,
bool alloc_obj,
}
/* PROTECTED and use-associated. */
- if (sym->attr.is_protected && sym->attr.use_assoc && check_intentin)
+ if (sym->attr.is_protected
+ && (sym->attr.use_assoc
+ || (sym->attr.used_in_submodule && !sym_is_from_ancestor (sym)))
+ && check_intentin)
{
if (pointer && is_pointer)
{
if (context)
- gfc_error ("Variable %qs is PROTECTED and cannot appear in a"
- " pointer association context (%s) at %L",
+ gfc_error ("Variable %qs is PROTECTED and cannot appear in a "
+ "pointer association context (%s) at %L",
sym->name, context, &e->where);
return false;
}
if (!pointer && !is_pointer)
{
if (context)
- gfc_error ("Variable %qs is PROTECTED and cannot appear in a"
- " variable definition context (%s) at %L",
+ gfc_error ("Variable %qs is PROTECTED and cannot appear in a "
+ "variable definition context (%s) at %L",
sym->name, context, &e->where);
return false;
}
diff --git a/gcc/testsuite/gfortran.dg/protected_10.f90
b/gcc/testsuite/gfortran.dg/protected_10.f90
new file mode 100644
index ..1bb20983e944
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/protected_10.f90
@@ -0,0 +1,75 @@
+! { dg-do compile }
+! PR fortran/83135 - fix checking of protected variables in submodules
+
+module mod1
+ implicit none
+ private
+ integer, protected, public :: xx = 42
+ public :: set_xx
+ public :: echo1_xx, echo2_xx
+ interface
+ module subroutine echo1_xx()
+ end subroutine echo1_xx
+ module subroutine echo2_xx()
+ end subroutine echo2_xx
+ end interface
+contains
+ subroutine set_xx(arg)
+integer, intent(in) :: arg
+xx = arg! valid (it is host_associated)
+ end
+end module
+!
+submodule (mod1) s1mod1
+ implicit none
+contains
+ module subroutine echo1_xx()
+xx = 11 ! valid (it is from the ancestor)
+write(*,*) "xx=", xx
+ end subroutine echo1_xx
+end submodule
+!
+submodule (mod1:s1mod1) s2mod1
+ implicit none
+contains
+ module subroutine echo2_xx()
+xx = 12 ! valid (it is from the ancestor)
+write(*,*) "xx=", xx
+ end subroutine echo2_xx
+end submodule
+!
+module mod2
+ use mod1
+ implicit none
+ integer, protected, public :: yy = 43
+ interface
+ module subroutine echo_xx()
+ end subroutine echo_xx
+ end interface
+contains
+ s
[gcc r15-5474] fortran: Check MASK directly instead of its scalarization chain
https://gcc.gnu.org/g:83da0a00d1a67b6999cb4e1912f26a334bab1b66
commit r15-5474-g83da0a00d1a67b6999cb4e1912f26a334bab1b66
Author: Mikael Morin
Date: Tue Nov 19 21:17:37 2024 +0100
fortran: Check MASK directly instead of its scalarization chain
Update the conditions used by the inline MINLOC/MAXLOC code generation
function to check directly the properties of MASK instead of the
variable holding its scalarization chain.
The inline implementation of MINLOC/MAXLOC in gfc_conv_intrinsic_minmaxloc
uses several conditions checking the presence of a scalarization chain for
MASK, which means that the argument is present and non-scalar. The next
patch will allow inlining MINLOC/MAXLOC with DIM and MASK, and in that
case the scalarization chain for MASK is initialized elsewhere, so the
variable usually holding it in the function is not used, and the conditions
won't work in that case.
This change updates the conditions to check directly the properties of
MASK so that they work even if the scalarization chain variable is not used.
gcc/fortran/ChangeLog:
* trans-intrinsic.cc (gfc_conv_intrinsic_minmaxloc): Use
conditionals based on the MASK expression rather than on its
scalarization chains.
Diff:
---
gcc/fortran/trans-intrinsic.cc | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/gcc/fortran/trans-intrinsic.cc b/gcc/fortran/trans-intrinsic.cc
index 6a47c2305110..4011b9eed617 100644
--- a/gcc/fortran/trans-intrinsic.cc
+++ b/gcc/fortran/trans-intrinsic.cc
@@ -5747,7 +5747,7 @@ gfc_conv_intrinsic_minmaxloc (gfc_se * se, gfc_expr *
expr, enum tree_code op)
gcc_assert (reduction_dimensions == ploop->dimen);
- if (nonempty == NULL && maskss == NULL)
+ if (nonempty == NULL && !(maskexpr && maskexpr->rank > 0))
{
nonempty = logical_true_node;
@@ -5817,7 +5817,7 @@ gfc_conv_intrinsic_minmaxloc (gfc_se * se, gfc_expr *
expr, enum tree_code op)
gfc_start_scalarized_body (ploop, &body);
/* If we have a mask, only check this element if the mask is set. */
- if (maskss)
+ if (maskexpr && maskexpr->rank > 0)
{
gcc_assert (!nested_loop);
gfc_init_se (&maskse, NULL);
@@ -5922,7 +5922,7 @@ gfc_conv_intrinsic_minmaxloc (gfc_se * se, gfc_expr *
expr, enum tree_code op)
}
gfc_add_expr_to_block (&block, ifbody);
- if (maskss)
+ if (maskexpr && maskexpr->rank > 0)
{
/* We enclose the above in if (mask) {...}. If the mask is an
optional argument, generate IF (.NOT. PRESENT(MASK)
@@ -5973,7 +5973,7 @@ gfc_conv_intrinsic_minmaxloc (gfc_se * se, gfc_expr *
expr, enum tree_code op)
gfc_add_expr_to_block (outer_block, build1_v (LABEL_EXPR, lab1));
/* If we have a mask, only check this element if the mask is set. */
- if (maskss)
+ if (maskexpr && maskexpr->rank > 0)
{
gfc_init_se (&maskse, NULL);
gfc_copy_loopinfo_to_se (&maskse, &loop);
@@ -6039,7 +6039,7 @@ gfc_conv_intrinsic_minmaxloc (gfc_se * se, gfc_expr *
expr, enum tree_code op)
gfc_add_expr_to_block (&block, tmp);
- if (maskss)
+ if (maskexpr && maskexpr->rank > 0)
{
/* We enclose the above in if (mask) {...}. If the mask is
an optional argument, generate IF (.NOT. PRESENT(MASK)
@@ -6064,7 +6064,7 @@ gfc_conv_intrinsic_minmaxloc (gfc_se * se, gfc_expr *
expr, enum tree_code op)
gfc_add_expr_to_block (&loop.pre, build1_v (LABEL_EXPR, lab2));
/* For a scalar mask, enclose the loop in an if statement. */
- if (maskexpr && maskss == NULL)
+ if (maskexpr && maskexpr->rank == 0)
{
tree ifmask;
[gcc(refs/users/jmelcr/heads/omp-cp)] omp-cp: Add callback redirection, not working yet
https://gcc.gnu.org/g:0b52da2198141ce07c075259d544de2f1c7928dc
commit 0b52da2198141ce07c075259d544de2f1c7928dc
Author: Josef Melcr
Date: Wed Nov 20 12:02:30 2024 +0100
omp-cp: Add callback redirection, not working yet
gcc/ChangeLog:
* cgraph.cc (cgraph_edge::get_callback_parent_edge): New
function
(cgraph_edge::redirect_call_stmt_to_callee): Add callback edge
redirection
* cgraph.h (cgraph_edge::get_callback_parent_edge): Declare
* ipa-prop.cc (ipa_compute_jump_functions_for_bb): Comment out
if statement
Signed-off-by: Josef Melcr
Diff:
---
gcc/cgraph.cc | 34 +-
gcc/cgraph.h| 3 +++
gcc/ipa-prop.cc | 6 +++---
3 files changed, 39 insertions(+), 4 deletions(-)
diff --git a/gcc/cgraph.cc b/gcc/cgraph.cc
index 78c56dd43ccd..0ce75f9b4674 100644
--- a/gcc/cgraph.cc
+++ b/gcc/cgraph.cc
@@ -1160,6 +1160,22 @@ cgraph_edge::make_callback (cgraph_node *n2)
return e2;
}
+cgraph_edge *
+cgraph_edge::get_callback_parent_edge ()
+{
+ gcc_checking_assert (callback);
+ cgraph_edge *e;
+ fprintf (stderr, "get parent: %s -> %s\n", caller->name (), callee->name ());
+ for (e = caller->callees; e; e = e->next_callee)
+{
+ fprintf (stderr, "get parent for loop: %s -> %s\n", caller->name (),
+ callee->name ());
+ if (e->has_callback && e->call_stmt == call_stmt)
+ return e;
+}
+ gcc_unreachable ();
+}
+
/* Speculative call consists of an indirect edge and one or more
direct edge+ref pairs.
@@ -1514,9 +1530,25 @@ cgraph_edge::redirect_call_stmt_to_callee (cgraph_edge
*e,
}
}
- if (e->indirect_unknown_callee || decl == e->callee->decl || e->callback)
+ if (e->has_callback)
+{
+ debug_gimple_stmt (e->call_stmt);
+ fprintf (stderr, "gimple pointer: %p\n", (void *) e->call_stmt);
+}
+
+ if (e->indirect_unknown_callee || decl == e->callee->decl)
return e->call_stmt;
+ if (e->callback)
+{
+ fprintf (stderr, "redirecting to %s\n", e->callee->name ());
+ fprintf (stderr, "gimple pointer before: %p\n", (void *) e->call_stmt);
+ gimple_call_set_arg (e->call_stmt, 0, e->callee->decl);
+ debug_gimple_stmt (e->call_stmt);
+ fprintf (stderr, "gimple pointer after: %p\n", (void *) e->call_stmt);
+ return e->call_stmt;
+}
+
if (decl && ipa_saved_clone_sources)
{
tree *p = ipa_saved_clone_sources->get (e->callee);
diff --git a/gcc/cgraph.h b/gcc/cgraph.h
index 5f1faa4c56ad..31205df2ffa8 100644
--- a/gcc/cgraph.h
+++ b/gcc/cgraph.h
@@ -1738,6 +1738,9 @@ public:
/* TODO DOCS */
cgraph_edge *make_callback (cgraph_node *n2);
+ /* TODO DOCS */
+ cgraph_edge *get_callback_parent_edge();
+
/* Speculative call consists of an indirect edge and one or more
direct edge+ref pairs. Speculative will expand to the following sequence:
diff --git a/gcc/ipa-prop.cc b/gcc/ipa-prop.cc
index bc5b7933a75c..285cd734b3de 100644
--- a/gcc/ipa-prop.cc
+++ b/gcc/ipa-prop.cc
@@ -2544,9 +2544,9 @@ ipa_compute_jump_functions_for_bb (struct
ipa_func_body_info *fbi, basic_block b
callee = callee->ultimate_alias_target ();
/* We do not need to bother analyzing calls to unknown functions
unless they may become known during lto/whopr. */
- if (!callee->definition && !flag_lto
- && !gimple_call_fnspec (cs->call_stmt).known_p ())
- continue;
+ // if (!callee->definition && !flag_lto
+ // && !gimple_call_fnspec (cs->call_stmt).known_p ())
+ // continue;
}
ipa_compute_jump_functions_for_edge (fbi, cs);
}
[gcc r15-5485] RISC-V: Refine the rtl expand check for strided ld/st
https://gcc.gnu.org/g:7c7da1036509a988b9ca3492eb856081132b14b2
commit r15-5485-g7c7da1036509a988b9ca3492eb856081132b14b2
Author: Pan Li
Date: Tue Nov 19 15:27:39 2024 +0800
RISC-V: Refine the rtl expand check for strided ld/st
This patch would like to remove the unnecessary option for the
strided load/store testcases. After fix the option from the rvv.exp,
both the O2 and O3 will be passed to the test files for rtl expand
dump check but the O2 has 2 time for IFN while the O3 has 4 times with
-fvectorize specificed.
Thus, add xfail O2 for IFN 4 times check, as well as xfail O3 for 2
times check.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
It is test only patch and obvious up to a point, will commit it
directly if no comments in next 48H.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c: Remove
unnecessary optimization option and xfail O2/O3 diff IFN times
from the rtl expand dump.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c: Ditto.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c: Ditto.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c: Ditto.
Signed-off-by: Pan Li
Diff:
---
.../gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c| 8 +---
.../gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c| 8 +---
.../gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c| 8 +---
.../gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c| 8 +---
.../gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c| 8 +---
.../gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c| 8 +---
.../gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c | 8 +---
.../gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c| 8 +---
.../gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c| 8 +---
.../gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c| 8 +---
.../gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c | 8 +---
11 files changed, 55 insertions(+), 33 deletions(-)
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
index 41fe2b20a980..c409c5724b1b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
@@ -1,11 +1,13 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh -mabi=lp64d -O3 -fno-vect-cost-model
-fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv_zvfh -mabi=lp64d -fno-vect-cost-model
-fdump-rtl-expand-details" } */
#include "strided_ld_st.h"
DEF_STRIDED_LD_ST_FORM_1(_Float16)
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" } }
*/
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" {
xfail { any-opts "-O2" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" {
xfail { any-opts "-O2" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" {
xfail { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" {
xfail { any-opts "-O3" } } } } */
/* { dg-final { scan-assembler-times {vlse16.v} 1 } } */
/* { dg-final { scan-assembler-times {vsse16.v} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
index 650b5fce4e8f..01e27d62276f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
@@ -1,11 +1,13 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-vect-cost-model
-fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fno-vect-cost-model
-fdump-rtl-expand-details" } */
#include "strided_ld_st.h"
DEF_STRIDED_LD_ST_FORM_1(float)
-/* { dg-final { scan-rtl-dump-ti
[gcc r15-5493] Add helpers to test whether an optab can be implemented
https://gcc.gnu.org/g:485ab50c204ddba922c92d8d467ac734428a4e8a
commit r15-5493-g485ab50c204ddba922c92d8d467ac734428a4e8a
Author: Richard Sandiford
Date: Wed Nov 20 10:04:45 2024 +
Add helpers to test whether an optab can be implemented
The vectoriser and vector lowering passes both had tests of the form:
if (op
&& (optab_handler (op, compute_mode) != CODE_FOR_nothing
|| optab_libfunc (op, compute_mode)))
...success...
if (code == MULT_HIGHPART_EXPR
&& can_mult_highpart_p (compute_mode,
TYPE_UNSIGNED (compute_type)))
...success...
This patch adds helper routines for this kind of test, so that it's
easier to handle other optab alternatives in a similar way.
gcc/
* optabs-query.cc (can_open_code_p, can_implement_p): Declare.
* optabs-query.h (can_open_code_p, can_implement_p): New functions.
* optabs-tree.cc (target_supports_op_p): Use can_implement_p.
* tree-vect-stmts.cc (vectorizable_operation): Likewise.
* tree-vect-generic.cc (get_compute_type): Likewise. Remove code
parameter.
(expand_vector_scalar_condition, expand_vector_conversion)
(expand_vector_operations_1): Update calls accordingly.
Diff:
---
gcc/optabs-query.cc | 30
gcc/optabs-query.h | 2 ++
gcc/optabs-tree.cc | 3 +-
gcc/tree-vect-generic.cc | 74 ++--
gcc/tree-vect-stmts.cc | 20 +
5 files changed, 67 insertions(+), 62 deletions(-)
diff --git a/gcc/optabs-query.cc b/gcc/optabs-query.cc
index c1f3558af920..6d28d620eb51 100644
--- a/gcc/optabs-query.cc
+++ b/gcc/optabs-query.cc
@@ -781,3 +781,33 @@ can_vec_extract (machine_mode mode, machine_mode extr_mode)
/* We assume we can pun mode to vmode and imode to extr_mode. */
return true;
}
+
+/* Return true if we can implement OP for mode MODE directly, without resorting
+ to a libfunc. This usually means that OP will be implemented inline.
+
+ Note that this function cannot tell whether the target pattern chooses to
+ use libfuncs internally. */
+
+bool
+can_open_code_p (optab op, machine_mode mode)
+{
+ if (optab_handler (op, mode) != CODE_FOR_nothing)
+return true;
+
+ if (op == umul_highpart_optab)
+return can_mult_highpart_p (mode, true);
+
+ if (op == smul_highpart_optab)
+return can_mult_highpart_p (mode, false);
+
+ return false;
+}
+
+/* Return true if we can implement OP for mode MODE in some way, either by
+ open-coding it or by calling a libfunc. */
+
+bool
+can_implement_p (optab op, machine_mode mode)
+{
+ return can_open_code_p (op, mode) || optab_libfunc (op, mode);
+}
diff --git a/gcc/optabs-query.h b/gcc/optabs-query.h
index 931ea63c129e..89a7b02ef437 100644
--- a/gcc/optabs-query.h
+++ b/gcc/optabs-query.h
@@ -172,6 +172,8 @@ bool supports_vec_gather_load_p (machine_mode = E_VOIDmode,
vec * = nullptr);
bool supports_vec_scatter_store_p (machine_mode = E_VOIDmode);
bool can_vec_extract (machine_mode, machine_mode);
+bool can_open_code_p (optab, machine_mode);
+bool can_implement_p (optab, machine_mode);
/* Version of find_widening_optab_handler_and_mode that operates on
specific mode types. */
diff --git a/gcc/optabs-tree.cc b/gcc/optabs-tree.cc
index 85f8c73119c1..3c82a7b2b02b 100644
--- a/gcc/optabs-tree.cc
+++ b/gcc/optabs-tree.cc
@@ -504,8 +504,7 @@ target_supports_op_p (tree type, enum tree_code code,
enum optab_subtype ot_subtype)
{
optab ot = optab_for_tree_code (code, type, ot_subtype);
- return (ot != unknown_optab
- && optab_handler (ot, TYPE_MODE (type)) != CODE_FOR_nothing);
+ return ot != unknown_optab && can_implement_p (ot, TYPE_MODE (type));
}
/* Return true if the target has support for masked load/store.
diff --git a/gcc/tree-vect-generic.cc b/gcc/tree-vect-generic.cc
index 1b7ab31656c5..b68355ed8b96 100644
--- a/gcc/tree-vect-generic.cc
+++ b/gcc/tree-vect-generic.cc
@@ -1602,49 +1602,29 @@ ssa_uniform_vector_p (tree op)
return NULL_TREE;
}
-/* Return type in which CODE operation with optab OP can be
- computed. */
+/* Return the type that should be used to implement OP on type TYPE.
+ This is TYPE itself if the target can do the operation directly,
+ otherwise it is a scalar type or a smaller vector type. */
static tree
-get_compute_type (enum tree_code code, optab op, tree type)
+get_compute_type (optab op, tree type)
{
- /* For very wide vectors, try using a smaller vector mode. */
- tree compute_type = type;
- if (op
- && (!VECTOR_MODE_P (TYPE_MODE (type))
- || optab_handler (op, TYPE_MODE (type)) == CODE_FOR_nothing))
+ if (op)
{
- tree vector_compute_type
- = type_for_widest_vector_mode (type, op);
+ if (VECTOR_MODE_P (TYPE_MODE
[gcc r15-5495] Extend expand_absneg_bit to vector modes
https://gcc.gnu.org/g:ed6d0867fdbb95691f4054eef6c4b1bd16099700
commit r15-5495-ged6d0867fdbb95691f4054eef6c4b1bd16099700
Author: Richard Sandiford
Date: Wed Nov 20 10:04:46 2024 +
Extend expand_absneg_bit to vector modes
Expand can implement NEG and ABS of scalar floating-point modes
by using logic ops to manipulate the sign bit. This patch extends
that approach to vectors, since it fits relatively easily into the
same structure.
The motivating use case was to inline bf16 NEG and ABS operations
for AArch64. The patch includes tests for that.
get_absneg_bit_mode required a new opt_mode constructor, so that
opt_mode can be constructed from opt_mode if T is no less
general than U.
gcc/
* machmode.h (opt_mode::opt_mode): New overload.
* optabs-query.h (get_absneg_bit_mode): Declare.
* optabs-query.cc (get_absneg_bit_mode): New function, split
out from expand_absneg_bit.
(can_open_code_p): Use get_absneg_bit_mode.
* optabs.cc (expand_absneg_bit): Likewise. Take an outer and inner
mode, rather than just one. Handle vector modes.
(expand_unop, expand_abs_nojump): Update calls accordingly.
Handle vector modes.
gcc/testsuite/
* gcc.target/aarch64/abs_bf_1.c: New test.
* gcc.target/aarch64/neg_bf_1.c: Likewise.
* gcc.target/aarch64/neg_bf_2.c: Likewise.
Diff:
---
gcc/machmode.h | 10 ++
gcc/optabs-query.cc | 42 +++
gcc/optabs-query.h | 2 ++
gcc/optabs.cc | 53 -
gcc/testsuite/gcc.target/aarch64/abs_bf_1.c | 10 ++
gcc/testsuite/gcc.target/aarch64/neg_bf_1.c | 11 ++
gcc/testsuite/gcc.target/aarch64/neg_bf_2.c | 10 ++
7 files changed, 107 insertions(+), 31 deletions(-)
diff --git a/gcc/machmode.h b/gcc/machmode.h
index 4c2a8d943cf6..9cf792b5ccab 100644
--- a/gcc/machmode.h
+++ b/gcc/machmode.h
@@ -268,6 +268,8 @@ public:
ALWAYS_INLINE CONSTEXPR opt_mode (const T &m) : m_mode (m) {}
template
ALWAYS_INLINE CONSTEXPR opt_mode (const U &m) : m_mode (T (m)) {}
+ template
+ ALWAYS_INLINE CONSTEXPR opt_mode (const opt_mode &);
ALWAYS_INLINE CONSTEXPR opt_mode (from_int m) : m_mode (machine_mode (m)) {}
machine_mode else_void () const;
@@ -285,6 +287,14 @@ private:
machine_mode m_mode;
};
+template
+template
+ALWAYS_INLINE CONSTEXPR
+opt_mode::opt_mode (const opt_mode &m)
+ : m_mode (m.exists () ? T (m.require ()) : E_VOIDmode)
+{
+}
+
/* If the object contains a T, return its enum value, otherwise return
E_VOIDmode. */
diff --git a/gcc/optabs-query.cc b/gcc/optabs-query.cc
index 6d28d620eb51..8ab4164e82c8 100644
--- a/gcc/optabs-query.cc
+++ b/gcc/optabs-query.cc
@@ -782,6 +782,39 @@ can_vec_extract (machine_mode mode, machine_mode extr_mode)
return true;
}
+/* OP is either neg_optab or abs_optab and FMODE is the floating-point inner
+ mode of MODE. Check whether we can implement OP for mode MODE by using
+ xor_optab to flip the sign bit (for neg_optab) or and_optab to clear the
+ sign bit (for abs_optab). If so, return the integral mode that should be
+ used to do the operation and set *BITPOS to the index of the sign bit
+ (counting from the lsb). */
+
+opt_machine_mode
+get_absneg_bit_mode (optab op, machine_mode mode,
+scalar_float_mode fmode, int *bitpos)
+{
+ /* The format has to have a simple sign bit. */
+ auto fmt = REAL_MODE_FORMAT (fmode);
+ if (fmt == NULL)
+return {};
+
+ *bitpos = fmt->signbit_rw;
+ if (*bitpos < 0)
+return {};
+
+ /* Don't create negative zeros if the format doesn't support them. */
+ if (op == neg_optab && !fmt->has_signed_zero)
+return {};
+
+ if (VECTOR_MODE_P (mode))
+return related_int_vector_mode (mode);
+
+ if (GET_MODE_SIZE (fmode) <= UNITS_PER_WORD)
+return int_mode_for_mode (fmode);
+
+ return word_mode;
+}
+
/* Return true if we can implement OP for mode MODE directly, without resorting
to a libfunc. This usually means that OP will be implemented inline.
@@ -800,6 +833,15 @@ can_open_code_p (optab op, machine_mode mode)
if (op == smul_highpart_optab)
return can_mult_highpart_p (mode, false);
+ machine_mode new_mode;
+ scalar_float_mode fmode;
+ int bitpos;
+ if ((op == neg_optab || op == abs_optab)
+ && is_a (GET_MODE_INNER (mode), &fmode)
+ && get_absneg_bit_mode (op, mode, fmode, &bitpos).exists (&new_mode)
+ && can_implement_p (op == neg_optab ? xor_optab : and_optab, new_mode))
+return true;
+
return false;
}
diff --git a/gcc/optabs-query.h b/gcc/optabs-query.h
index 89a7b02ef437..60c8021a1b75 100644
--- a/gcc/optabs-query.h
+++ b/gcc/optabs-query.h
@@ -171,6 +171,8 @@ bool lshift_cheap_p (bool);
bool supports_vec_gather_load
[gcc r15-5494] Use can_implement_p in the vectoriser
https://gcc.gnu.org/g:0abb5fa523bcc72ec0891813d778b6b47c305f97
commit r15-5494-g0abb5fa523bcc72ec0891813d778b6b47c305f97
Author: Richard Sandiford
Date: Wed Nov 20 10:04:45 2024 +
Use can_implement_p in the vectoriser
This patch goes through the tree-vect-* code and mechanically replaces
all tests of optab_handler against CODE_FOR_nothing with calls to the
new helper functions.
gcc/
* tree-vect-data-refs.cc (vect_supportable_dr_alignment): Use
can_implement_p instead of optab_handler.
* tree-vect-generic.cc (add_rshift, expand_vector_divmod): Likewise.
(optimize_vector_constructor, type_for_widest_vector_mode):
Likewise.
(lower_vec_perm, expand_vector_operations_1): Likewise.
* tree-vect-loop.cc (have_whole_vector_shift): Likewise.
* tree-vect-patterns.cc (vect_recog_rotate_pattern): Likewise.
(target_has_vecop_for_code, vect_recog_mult_pattern): Likewise.
(vect_recog_divmod_pattern): Likewise.
* tree-vect-stmts.cc (vect_supportable_shift, vectorizable_shift)
(scan_store_can_perm_p, check_scan_store, vectorizable_store)
(vectorizable_load, vectorizable_condition): Likewise.
(vectorizable_comparison_1): Likewise.
Diff:
---
gcc/tree-vect-data-refs.cc | 2 +-
gcc/tree-vect-generic.cc | 49 --
gcc/tree-vect-loop.cc | 2 +-
gcc/tree-vect-patterns.cc | 34
gcc/tree-vect-stmts.cc | 44 +++--
5 files changed, 52 insertions(+), 79 deletions(-)
diff --git a/gcc/tree-vect-data-refs.cc b/gcc/tree-vect-data-refs.cc
index 3ea5fb883b1a..a32343c0022b 100644
--- a/gcc/tree-vect-data-refs.cc
+++ b/gcc/tree-vect-data-refs.cc
@@ -7209,7 +7209,7 @@ vect_supportable_dr_alignment (vec_info *vinfo,
dr_vec_info *dr_info,
if (DR_IS_READ (dr))
{
- if (optab_handler (vec_realign_load_optab, mode) != CODE_FOR_nothing
+ if (can_implement_p (vec_realign_load_optab, mode)
&& (!targetm.vectorize.builtin_mask_for_load
|| targetm.vectorize.builtin_mask_for_load ()))
{
diff --git a/gcc/tree-vect-generic.cc b/gcc/tree-vect-generic.cc
index b68355ed8b96..b40e3d745790 100644
--- a/gcc/tree-vect-generic.cc
+++ b/gcc/tree-vect-generic.cc
@@ -479,14 +479,14 @@ add_rshift (gimple_stmt_iterator *gsi, tree type, tree
op0, int *shiftcnts)
{
op = optab_for_tree_code (RSHIFT_EXPR, type, optab_scalar);
if (op != unknown_optab
- && optab_handler (op, TYPE_MODE (type)) != CODE_FOR_nothing)
+ && can_implement_p (op, TYPE_MODE (type)))
return gimplify_build2 (gsi, RSHIFT_EXPR, type, op0,
build_int_cst (NULL_TREE, shiftcnts[0]));
}
op = optab_for_tree_code (RSHIFT_EXPR, type, optab_vector);
if (op != unknown_optab
- && optab_handler (op, TYPE_MODE (type)) != CODE_FOR_nothing)
+ && can_implement_p (op, TYPE_MODE (type)))
{
tree_vector_builder vec (type, nunits, 1);
for (i = 0; i < nunits; i++)
@@ -526,7 +526,7 @@ expand_vector_divmod (gimple_stmt_iterator *gsi, tree type,
tree op0,
op = optab_for_tree_code (RSHIFT_EXPR, type, optab_vector);
if (op == unknown_optab
- || optab_handler (op, TYPE_MODE (type)) == CODE_FOR_nothing)
+ || !can_implement_p (op, TYPE_MODE (type)))
has_vector_shift = false;
/* Analysis phase. Determine if all op1 elements are either power
@@ -758,7 +758,7 @@ expand_vector_divmod (gimple_stmt_iterator *gsi, tree type,
tree op0,
q = t1 >> shift; */
op = optab_for_tree_code (PLUS_EXPR, type, optab_default);
if (op != unknown_optab
- && optab_handler (op, TYPE_MODE (type)) != CODE_FOR_nothing)
+ && can_implement_p (op, TYPE_MODE (type)))
{
cur_op = gimplify_build2 (gsi, PLUS_EXPR, type, op0, addend);
cur_op = add_rshift (gsi, type, cur_op, shifts);
@@ -778,7 +778,7 @@ expand_vector_divmod (gimple_stmt_iterator *gsi, tree type,
tree op0,
mask = vec.build ();
op = optab_for_tree_code (BIT_AND_EXPR, type, optab_default);
if (op != unknown_optab
- && optab_handler (op, TYPE_MODE (type)) != CODE_FOR_nothing)
+ && can_implement_p (op, TYPE_MODE (type)))
{
if (sign_p == UNSIGNED)
/* r = op0 & mask; */
@@ -790,8 +790,7 @@ expand_vector_divmod (gimple_stmt_iterator *gsi, tree type,
tree op0,
r = t2 - addend; */
op = optab_for_tree_code (PLUS_EXPR, type, optab_default);
if (op != unknown_optab
- && optab_handler (op, TYPE_MODE (type))
-!= CODE_FOR_nothing)
+ && can_implement_p (op, TYPE_MO
[gcc r15-5501] i386: Remove workaround for Solaris ld 64-bit TLS IE limitation
https://gcc.gnu.org/g:086ee8d08669fe597e6c63a4e5489d2df7698ec8
commit r15-5501-g086ee8d08669fe597e6c63a4e5489d2df7698ec8
Author: Uros Bizjak
Date: Wed Nov 20 12:57:25 2024 +0100
i386: Remove workaround for Solaris ld 64-bit TLS IE limitation
As detailed in PR target/43309, the Solaris linker initially took the
64-bit x86 TLS IE code sequence literally, assuming that the spec only
allowed %rax as target register.
A workaround has been in place for more than a decade, but is no longer
necessary. The bug had already been fixed for Solaris 11.1, while trunk
requires Solaris 11.4.
Uros pointed this out and suggested the attached patch.
Bootstrapped without regressions on i386-pc-solaris2.11.
2024-10-15 Uros Bizjak
gcc:
* config/i386/i386.cc (legitimize_tls_address)
: Remove 64-bit Solaris ld workaround.
* config/i386/i386.md (UNSPEC_TLS_IE_SUN): Remove.
(tls_initial_exec_64_sun): Remove.
Diff:
---
gcc/config/i386/i386.cc | 11 ---
gcc/config/i386/i386.md | 17 -
2 files changed, 28 deletions(-)
diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index 9d3d8abf7803..c7e70c21999e 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -12320,17 +12320,6 @@ legitimize_tls_address (rtx x, enum tls_model model,
bool for_mov)
case TLS_MODEL_INITIAL_EXEC:
if (TARGET_64BIT)
{
- if (TARGET_SUN_TLS && !TARGET_X32)
- {
- /* The Sun linker took the AMD64 TLS spec literally
-and can only handle %rax as destination of the
-initial executable code sequence. */
-
- dest = gen_reg_rtx (DImode);
- emit_insn (gen_tls_initial_exec_64_sun (dest, x));
- return dest;
- }
-
/* Generate DImode references to avoid %fs:(%reg32)
problems and linker IE->LE relaxation bug. */
tp_mode = DImode;
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b2209492fa0e..1c1bf659fc25 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -93,7 +93,6 @@
UNSPEC_TLS_GD
UNSPEC_TLS_LD_BASE
UNSPEC_TLSDESC
- UNSPEC_TLS_IE_SUN
;; Other random patterns
UNSPEC_SCAS
@@ -22876,22 +22875,6 @@
set_mem_addr_space (operands[2], as);
})
-;; The Sun linker took the AMD64 TLS spec literally and can only handle
-;; %rax as destination of the initial executable code sequence.
-(define_insn "tls_initial_exec_64_sun"
- [(set (match_operand:DI 0 "register_operand" "=a")
- (unspec:DI
-[(match_operand 1 "tls_symbolic_operand")]
-UNSPEC_TLS_IE_SUN))
- (clobber (reg:CC FLAGS_REG))]
- "TARGET_64BIT && TARGET_SUN_TLS"
-{
- output_asm_insn
-("mov{q}\t{%%fs:0, %0|%0, QWORD PTR fs:0}", operands);
- return "add{q}\t{%a1@gottpoff(%%rip), %0|%0, %a1@gottpoff[rip]}";
-}
- [(set_attr "type" "multi")])
-
;; GNU2 TLS patterns can be split.
(define_expand "tls_dynamic_gnu2_32"
[gcc r15-5499] RISC-V: Refine the rtl dump expand check for vector SAT_ADD
https://gcc.gnu.org/g:fa18217f60f75c9cc045b3ebb43707917705d490 commit r15-5499-gfa18217f60f75c9cc045b3ebb43707917705d490 Author: Pan Li Date: Wed Nov 20 15:16:22 2024 +0800 RISC-V: Refine the rtl dump expand check for vector SAT_ADD This patch would like to remove the unnecessary option for the vector SAT_ADD testcases at first. And the different optimization option like O2 and O3 will be passed to the test files for rtl expand dump check. If there are different dump check times for different optimization options, the target no-opts and/or any-opts will be leveraged for the dg-final check. The below test suites are passed for this patch. * The rv64gcv fully regression test. It is test only patch and obvious up to a point, will commit it directly if no comments in next 48H. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s16.c: Remove the unnecessary option and refine the rtl IFN dump check. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-1-s16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-1-s32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-1-s64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-1-s8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-2-s16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-2-s32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-2-s64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-2-s8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-3-s16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-3-s32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-3-s64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-3-s8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-4-s16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-4-s32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-4-s64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-run-4-s8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u8.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u16.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u32.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u64.c: Ditto. * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-
[gcc r15-5451] Support weak references
https://gcc.gnu.org/g:5181d982c34a38a552f6d4d19adb039171893ad7
commit r15-5451-g5181d982c34a38a552f6d4d19adb039171893ad7
Author: Evgeny Karpov
Date: Wed Aug 14 17:56:38 2024 +0200
Support weak references
The patch adds support for weak references. The original MinGW
implementation targets ix86, which handles weak symbols differently
compared to AArch64. In AArch64, the weak symbols are replaced by
other symbols which reference the original weak symbols, and the
compiler does not track the original symbol names.
This patch resolves this and declares the original symbols.
Here is an explanation of why this change is needed and what the
difference is between x86_64-w64-mingw32 and aarch64-w64-mingw32.
The way x86_64 calls a weak function:
call weak_fn2
GCC emits the call and creates the required definitions at the end
of the assembly:
.weak weak_fn2
.def weak_fn2; .scl 2;.type 32; .endef
This is different from aarch64:
weak_fn2 will be legitimized and replaced by .refptr.weak_fn2,
and there will be no other references to weak_fn2 in the code.
adrp x0, .refptr.weak_fn2
add x0, x0, :lo12:.refptr.weak_fn2
ldr x0, [x0]
blr x0
GCC does not emit the required definitions at the end of the assembly,
and weak_fn2 is tracked only by the mingw stub sybmol.
Without the change, the stub definition will emit:
.section .rdata$.refptr.weak_fn2, "dr"
.globl .refptr.weak_fn2
.linkonce discard
.refptr.weak_fn2:
.quad weak_fn2
which is not enough. This fix will emit the required definitions:
.weak weak_fn2
.defweak_fn2; .scl 2;.type 32; .endef
.section .rdata$.refptr.weak_fn2, "dr"
.globl .refptr.weak_fn2
.linkonce discard
.refptr.weak_fn2:
.quad weak_fn2
This is the first commit in the third patch series with SMALL code
model fixes, optimization fixes, LTO, and minimal C++ enablement.
Prepared, refactored and validated by
Radek Barton and
Evgeny Karpov
Contributor: Zac Walker
gcc/ChangeLog:
* config/aarch64/cygming.h (SUB_TARGET_RECORD_STUB): Request
declaration for weak symbols.
(PE_COFF_LEGITIMIZE_EXTERN_DECL): Legitimize external
declaration for weak symbols.
* config/i386/cygming.h (SUB_TARGET_RECORD_STUB): Update
declarations in ix86 with the same functionality.
(PE_COFF_LEGITIMIZE_EXTERN_DECL): Likewise.
* config/mingw/winnt-dll.cc (legitimize_pe_coff_symbol):
Support declaration for weak symbols if requested.
* config/mingw/winnt.cc (struct stub_list): Likewise.
(mingw_pe_record_stub): Likewise.
(mingw_pe_file_end): Likewise.
* config/mingw/winnt.h (mingw_pe_record_stub): Likewise.
Diff:
---
gcc/config/aarch64/cygming.h | 6 --
gcc/config/i386/cygming.h | 4 ++--
gcc/config/mingw/winnt-dll.cc | 4 ++--
gcc/config/mingw/winnt.cc | 13 -
gcc/config/mingw/winnt.h | 2 +-
5 files changed, 21 insertions(+), 8 deletions(-)
diff --git a/gcc/config/aarch64/cygming.h b/gcc/config/aarch64/cygming.h
index 9ce140a356f8..bd6078023e36 100644
--- a/gcc/config/aarch64/cygming.h
+++ b/gcc/config/aarch64/cygming.h
@@ -171,7 +171,8 @@ still needed for compilation. */
mingw_handle_selectany_attribute, NULL }
#undef SUB_TARGET_RECORD_STUB
-#define SUB_TARGET_RECORD_STUB mingw_pe_record_stub
+#define SUB_TARGET_RECORD_STUB(NAME, DECL) mingw_pe_record_stub((NAME), \
+ DECL_WEAK ((DECL)))
#define SUPPORTS_ONE_ONLY 1
@@ -186,7 +187,8 @@ still needed for compilation. */
#undef GOT_ALIAS_SET
#define GOT_ALIAS_SET mingw_GOT_alias_set ()
-#define PE_COFF_LEGITIMIZE_EXTERN_DECL 1
+#define PE_COFF_LEGITIMIZE_EXTERN_DECL(RTX) \
+ (GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_WEAK (RTX))
#define HAVE_64BIT_POINTERS 1
diff --git a/gcc/config/i386/cygming.h b/gcc/config/i386/cygming.h
index bd1259fb4d89..67bfb8d641b9 100644
--- a/gcc/config/i386/cygming.h
+++ b/gcc/config/i386/cygming.h
@@ -461,7 +461,7 @@ do {\
#define TARGET_ASM_ASSEMBLE_VISIBILITY i386_pe_assemble_visibility
#undef SUB_TARGET_RECORD_STUB
-#define SUB_TARGET_RECORD_STUB mingw_pe_record_stub
+#define SUB_TARGET_RECORD_STUB(NAME, DECL) mingw_pe_record_stub((NAME), 0)
/* Static stack checking is supported by means of probes. */
#define STACK_CHECK_STATIC_BUILTIN 1
@@ -470,7 +470,7 @@ do {\
# define HAVE_GAS_ALIGNED_COMM 0
#endif
-#define PE_COFF_LEGITIMIZE_EXTERN_DECL \
+#define PE_COFF_LEGITIMIZE_EXTERN_DECL(RTX) \
(ix86_cmodel == CM_LARGE_PIC || ix86_cmodel == CM_MEDIUM_PIC)
#define HAVE_64BIT_
[gcc r15-5453] aarch64: Add minimal C++ support
https://gcc.gnu.org/g:e39e523c84436308eb25fdcf40c605880e817067
commit r15-5453-ge39e523c84436308eb25fdcf40c605880e817067
Author: Evgeny Karpov
Date: Wed Aug 14 08:34:30 2024 +0200
aarch64: Add minimal C++ support
The patch resolves compilation issues for the C++ language. Previous
patch series contributed to C++ as well, however, C++ could not be
tested until we got a C++ compiler and could build at least a "Hello
World" C++ program, and in reality, more than that.
Another issue has been fixed in the libstdc++ patch.
https://gcc.gnu.org/pipermail/libstdc++/2024-September/059472.html
gcc/ChangeLog:
* config.gcc: Add missing dependencies.
Diff:
---
gcc/config.gcc | 1 +
1 file changed, 1 insertion(+)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 9b616bd6e1f8..c20817487457 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1291,6 +1291,7 @@ aarch64-*-mingw*)
extra_options="${extra_options} mingw/cygming.opt mingw/mingw.opt"
extra_objs="${extra_objs} winnt.o winnt-dll.o"
c_target_objs="${c_target_objs} msformat-c.o"
+ cxx_target_objs="${cxx_target_objs} msformat-c.o"
d_target_objs="${d_target_objs} winnt-d.o"
tmake_file="${tmake_file} mingw/t-cygming"
case ${enable_threads} in
[gcc r15-5500] testsuite: i386: Fix gcc.target/i386/pr117232-1.c etc. with Solaris as
https://gcc.gnu.org/g:bf57f9b59904f517bced5307792358cc15c77f26
commit r15-5500-gbf57f9b59904f517bced5307792358cc15c77f26
Author: Rainer Orth
Date: Wed Nov 20 12:54:22 2024 +0100
testsuite: i386: Fix gcc.target/i386/pr117232-1.c etc. with Solaris as
Two tests FAIL on Solaris/x86 with the native assembler:
FAIL: gcc.target/i386/pr117232-1.c scan-assembler-times (?n)cmovn?c 7
FAIL: gcc.target/i386/pr117232-apx-1.c scan-assembler-times (?n)cmovn?c 7
The problem is that as expects a slightly different insn syntax, e.g.
cmovl.nc%esi, %eax
instead of
cmovnc %esi, %eax
This patch allows for both forms.
Tested on i386-pc-solaris2.11 (as and gas) and x86_64-pc-linux-gnu.
2024-11-15 Rainer Orth
gcc/testsuite:
* gcc.target/i386/pr117232-1.c (scan-assembler-times): Allow for
cmovl.nc etc.
* gcc.target/i386/pr117232-apx-1.c: Likewise.
Diff:
---
gcc/testsuite/gcc.target/i386/pr117232-1.c | 2 +-
gcc/testsuite/gcc.target/i386/pr117232-apx-1.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.target/i386/pr117232-1.c
b/gcc/testsuite/gcc.target/i386/pr117232-1.c
index cd7f5d112a79..0cf1cad9069d 100644
--- a/gcc/testsuite/gcc.target/i386/pr117232-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr117232-1.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mavx512bw -mavx512vl -mavx512dq -O2" } */
/* { dg-final { scan-assembler-times {(?n)kortest[bwqd]} 7 { target { ! ia32 }
} } } */
-/* { dg-final { scan-assembler-times {(?n)cmovn?c} 7 { target { ! ia32 } } } }
*/
+/* { dg-final { scan-assembler-times {(?n)cmov([lq]\.)?n?c} 7 { target { !
ia32 } } } } */
#include
int
diff --git a/gcc/testsuite/gcc.target/i386/pr117232-apx-1.c
b/gcc/testsuite/gcc.target/i386/pr117232-apx-1.c
index e3571adf6dd2..57ac9b81dfda 100644
--- a/gcc/testsuite/gcc.target/i386/pr117232-apx-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr117232-apx-1.c
@@ -1,7 +1,7 @@
/* { dg-do compile { target { ! ia32 } } } */
/* { dg-options "-mavx512bw -mavx512vl -mavx512dq -mapxf -O2" } */
/* { dg-final { scan-assembler-times {(?n)kortest[bwqd]} 7 } } */
-/* { dg-final { scan-assembler-times {(?n)cmovn?c} 7 } } */
+/* { dg-final { scan-assembler-times {(?n)cmov([lq]\.)?n?c} 7 } } */
#include
[gcc r15-5502] fortran: Evaluate once BACK argument of MINLOC/MAXLOC with DIM [PR90608]
https://gcc.gnu.org/g:237380cdec2757bd42a0ec4d426b181f77d31d18
commit r15-5502-g237380cdec2757bd42a0ec4d426b181f77d31d18
Author: Mikael Morin
Date: Wed Nov 20 13:59:51 2024 +0100
fortran: Evaluate once BACK argument of MINLOC/MAXLOC with DIM [PR90608]
Evaluate the BACK argument of MINLOC/MAXLOC once before the
scalarization loops in the case where the DIM argument is present.
This is a follow-up to r15-1994-ga55d24b3cf7f4d07492bb8e6fcee557175b47ea3
which added knowledge of BACK to the scalarizer, to
r15-2701-ga10436a8404ad2f0cc5aa4d6a0cc850abe5ef49e which removed it to
handle it out of scalarization instead, and to more immediate previous
patches that added inlining support for MINLOC/MAXLOC with DIM. The
inlining support for MINLOC/MAXLOC with DIM introduced nested loops, which
made the evaluation of BACK (removed from the scalarizer knowledge by the
forementionned commit) wrapped in a loop, so possibly executed more than
once. This change adds BACK to the scalarization chain if MINLOC/MAXLOC
will use nested loops, so that it is evaluated by the scalarizer only once
before the outermost loop in that case.
PR fortran/90608
gcc/fortran/ChangeLog:
* trans-intrinsic.cc
(walk_inline_intrinsic_minmaxloc): Add a scalar element for BACK as
first item of the chain if BACK is present and there will be nested
loops.
(gfc_conv_intrinsic_minmaxloc): Evaluate BACK using an inherited
scalarization chain if there is a nested loop.
gcc/testsuite/ChangeLog:
* gfortran.dg/maxloc_8.f90: New test.
* gfortran.dg/minloc_9.f90: New test.
Diff:
---
gcc/fortran/trans-intrinsic.cc | 21 +-
gcc/testsuite/gfortran.dg/maxloc_8.f90 | 349 +
gcc/testsuite/gfortran.dg/minloc_9.f90 | 349 +
3 files changed, 717 insertions(+), 2 deletions(-)
diff --git a/gcc/fortran/trans-intrinsic.cc b/gcc/fortran/trans-intrinsic.cc
index 8b4fd8e23312..14a81fb5fa0d 100644
--- a/gcc/fortran/trans-intrinsic.cc
+++ b/gcc/fortran/trans-intrinsic.cc
@@ -5595,7 +5595,7 @@ gfc_conv_intrinsic_minmaxloc (gfc_se * se, gfc_expr *
expr, enum tree_code op)
&& maskexpr->symtree->n.sym->attr.optional;
backexpr = back_arg->expr;
- gfc_init_se (&backse, NULL);
+ gfc_init_se (&backse, nested_loop ? se : nullptr);
if (backexpr == nullptr)
back = logical_false_node;
else if (maybe_absent_optional_variable (backexpr))
@@ -11886,10 +11886,13 @@ walk_inline_intrinsic_minmaxloc (gfc_ss *ss, gfc_expr
*expr ATTRIBUTE_UNUSED)
gfc_actual_arglist *array_arg = expr->value.function.actual;
gfc_actual_arglist *dim_arg = array_arg->next;
gfc_actual_arglist *mask_arg = dim_arg->next;
+ gfc_actual_arglist *kind_arg = mask_arg->next;
+ gfc_actual_arglist *back_arg = kind_arg->next;
gfc_expr *array = array_arg->expr;
gfc_expr *dim = dim_arg->expr;
gfc_expr *mask = mask_arg->expr;
+ gfc_expr *back = back_arg->expr;
if (dim == nullptr)
return gfc_get_array_ss (ss, expr, 1, GFC_SS_INTRINSIC);
@@ -11917,7 +11920,21 @@ walk_inline_intrinsic_minmaxloc (gfc_ss *ss, gfc_expr
*expr ATTRIBUTE_UNUSED)
chain, "hiding" that dimension from the outer scalarization. */
int dim_val = mpz_get_si (dim->value.integer);
gfc_ss *tail = nest_loop_dimension (tmp_ss, dim_val - 1);
- tail->next = ss;
+
+ if (back && array->rank > 1)
+{
+ /* If there are nested scalarization loops, include BACK in the
+scalarization chains to avoid evaluating it multiple times in a loop.
+Otherwise, prefer to handle it outside of scalarization. */
+ gfc_ss *back_ss = gfc_get_scalar_ss (ss, back);
+ back_ss->info->type = GFC_SS_REFERENCE;
+ if (maybe_absent_optional_variable (back))
+ back_ss->info->can_be_null_ref = true;
+
+ tail->next = back_ss;
+}
+ else
+tail->next = ss;
if (scalar_mask)
{
diff --git a/gcc/testsuite/gfortran.dg/maxloc_8.f90
b/gcc/testsuite/gfortran.dg/maxloc_8.f90
new file mode 100644
index ..20f63a84bbe5
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/maxloc_8.f90
@@ -0,0 +1,349 @@
+! { dg-do run }
+!
+! PR fortran/90608
+! Check that the evaluation of MAXLOC's BACK argument is made only once
+! before the scalarization loops, when the DIM argument is present.
+
+program p
+ implicit none
+ integer, parameter :: data60(*) = (/ 7, 4, 5, 3, 9, 0, 6, 4, 5, 5, &
+ 8, 2, 6, 7, 8, 7, 4, 5, 3, 9, &
+ 0, 6, 4, 5, 5, 8, 2, 6, 7, 8, &
+ 7, 4, 5, 3, 9, 0, 6, 4, 5, 5, &
+ 8, 2, 6, 7, 8, 7, 4, 5, 3, 9, &
+ 0, 6, 4, 5, 5, 8, 2, 6, 7, 8 /)
+ logical, parameter :: mask60(*) = (/ .true. , .false.,
[gcc r15-5490] PR target/117669 - RISC-V:The 'VEEWTRUNC4' iterator 'RVVMF2BF' type condition error
https://gcc.gnu.org/g:323adc0fc427f3d93793357ecccd6b02b513c922 commit r15-5490-g323adc0fc427f3d93793357ecccd6b02b513c922 Author: Feng Wang Date: Wed Nov 20 06:25:54 2024 + PR target/117669 - RISC-V:The 'VEEWTRUNC4' iterator 'RVVMF2BF' type condition error This patch fix the wrong condition for RVVMF2BF. It should be TARGET_VECTOR_ELEN_BF_16. gcc/ChangeLog: PR target/117669 * config/riscv/vector-iterators.md: Signed-off-by: Feng Wang Diff: --- gcc/config/riscv/vector-iterators.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md index 6a621459cc4a..92cb651ce493 100644 --- a/gcc/config/riscv/vector-iterators.md +++ b/gcc/config/riscv/vector-iterators.md @@ -365,7 +365,7 @@ (RVVM2BF "TARGET_VECTOR_ELEN_BF_16") (RVVM1BF "TARGET_VECTOR_ELEN_BF_16") - (RVVMF2BF "TARGET_VECTOR_ELEN_FP_16") + (RVVMF2BF "TARGET_VECTOR_ELEN_BF_16") (RVVMF4BF "TARGET_VECTOR_ELEN_BF_16 && TARGET_MIN_VLEN > 32 && TARGET_64BIT") (RVVM2HF "TARGET_VECTOR_ELEN_FP_16 && TARGET_64BIT")
[gcc] Created branch 'devel/existing-fp8'
The branch 'devel/existing-fp8' was created pointing to: d54a66c1d81c... Work in progress for refactoring simd intrinsic
[gcc r15-5467] AVR: Overhaul shift insns.
https://gcc.gnu.org/g:9f7b323caab2215042df0ab0f4eef251c54128fc
commit r15-5467-g9f7b323caab2215042df0ab0f4eef251c54128fc
Author: Georg-Johann Lay
Date: Mon Nov 18 17:35:33 2024 +0100
AVR: Overhaul shift insns.
This patch adds 3-operand alternatives to the shift insns for
offsets that are one less than the bit-size of the mode.
For example, ashrhi3 can support "r,r,C15" without overhead.
Apart from that, the asm out functions for the shifts now use
avr_asm_len to print assembly and to track the isnsns' lengths.
gcc/
* config/avr/avr.md (ashlhi3, *ashlhi3_const_split, *ashlhi3_const)
(*ashlpsi3_split, *ashlpsi3)
(ashlsi3, *ashlsi3_const_split, *ashlsi3_const)
(ashrhi3, *ashrhi3, ashrpsi3, *ashrpsi3, ashrsi3, *ashrsi3)
(*ashrhi3_const_split, *ashrhi3_const, *ashrsi3_const_split,
*ashrsi3_const):
Add constraint alternatives that allow a 3-operand operation when
the
shift offset is one less than the mode's bitsize.
* config/avr/avr.cc (ashl3_out, ashr3_out)
(lshr3_out): Use avr_asm_len for asm_out and length tracking.
(ashrhi3_out, ashlhi3_out): Support the new "r,r,C15" alternatives.
(ashrsi3_out, ashlsi3_out): Support the new "r,r,C31" alternatives.
(avr_out_ashrpsi3, avr_out_ashlpsi3): Support the new "r,r,C23"
alternatives.
gcc/testsuite/
* gcc.target/avr/torture/test-shift.h: New file.
* gcc.target/avr/torture/shift-l-u32.c: New test.
* gcc.target/avr/torture/shift-r-u32.c: New test.
* gcc.target/avr/torture/shift-r-i32.c: New test.
* gcc.target/avr/torture/shift-l-u24.c: New test.
* gcc.target/avr/torture/shift-r-u24.c: New test.
* gcc.target/avr/torture/shift-r-i24.c: New test.
* gcc.target/avr/torture/shift-l-u16.c: New test.
* gcc.target/avr/torture/shift-r-u16.c: New test.
* gcc.target/avr/torture/shift-r-i16.c: New test.
* gcc.target/avr/torture/shift-l-u8.c: New test.
* gcc.target/avr/torture/shift-r-u8.c: New test.
* gcc.target/avr/torture/shift-r-i8.c: New test.
Diff:
---
gcc/config/avr/avr.cc | 1531
gcc/config/avr/avr.md | 158 +-
gcc/testsuite/gcc.target/avr/torture/shift-l-u16.c | 25 +
gcc/testsuite/gcc.target/avr/torture/shift-l-u24.c | 25 +
gcc/testsuite/gcc.target/avr/torture/shift-l-u32.c | 25 +
gcc/testsuite/gcc.target/avr/torture/shift-l-u8.c | 25 +
gcc/testsuite/gcc.target/avr/torture/shift-r-i16.c | 25 +
gcc/testsuite/gcc.target/avr/torture/shift-r-i24.c | 25 +
gcc/testsuite/gcc.target/avr/torture/shift-r-i32.c | 25 +
gcc/testsuite/gcc.target/avr/torture/shift-r-i8.c | 25 +
gcc/testsuite/gcc.target/avr/torture/shift-r-u16.c | 25 +
gcc/testsuite/gcc.target/avr/torture/shift-r-u24.c | 25 +
gcc/testsuite/gcc.target/avr/torture/shift-r-u32.c | 25 +
gcc/testsuite/gcc.target/avr/torture/shift-r-u8.c | 25 +
gcc/testsuite/gcc.target/avr/torture/test-shift.h | 125 ++
15 files changed, 1142 insertions(+), 972 deletions(-)
diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc
index 0a9d26af0755..4ad07acd789b 100644
--- a/gcc/config/avr/avr.cc
+++ b/gcc/config/avr/avr.cc
@@ -6598,7 +6598,9 @@ avr_out_cmp_ext (rtx xop[], rtx_code code, int *plen)
available and SCRATCH, otherwise (no scratch available)
TEMPL is an assembler template that shifts by one position.
- T_LEN is the length of this template. */
+ T_LEN is the length of this template.
+ PLEN != 0: Set *PLEN to the length of the sequence in words.
+ PLEN == 0: Output instructions. */
void
out_shift_with_cnt (const char *templ, rtx_insn *insn, rtx operands[],
@@ -6721,96 +6723,59 @@ out_shift_with_cnt (const char *templ, rtx_insn *insn,
rtx operands[],
/* 8bit shift left ((char)x << i) */
const char *
-ashlqi3_out (rtx_insn *insn, rtx operands[], int *len)
+ashlqi3_out (rtx_insn *insn, rtx operands[], int *plen)
{
if (CONST_INT_P (operands[2]))
{
- int k;
+ bool ldreg_p = test_hard_reg_class (LD_REGS, operands[0]);
+ int offs = INTVAL (operands[2]);
- if (!len)
- len = &k;
+ if (plen)
+ *plen = 0;
- switch (INTVAL (operands[2]))
+ if (offs <= 3
+ || (offs <= 6 && ! ldreg_p))
+ {
+ for (int i = 0; i < offs; ++i)
+ avr_asm_len ("lsl %0", operands, plen, 1);
+ return "";
+ }
+
+ switch (offs)
{
default:
- if (INTVAL (operands[2]) < 8)
+ if (offs < 8)
break;
-
- *len = 1;
- return "clr %0";
+ return avr_asm_len ("clr %0", operands, plen, 1);
case 1:
- *len = 1;
- return "lsl %0";
-
case 2:
- *len = 2;
- return
[gcc r14-10950] [PATCH] PR modula2/115276 bugfix libgm2 wraptime.InitTM returns NIL
https://gcc.gnu.org/g:0e3e2cc03e6a9d8d48fa5269070976f3d7d0a750
commit r14-10950-g0e3e2cc03e6a9d8d48fa5269070976f3d7d0a750
Author: Gaius Mulley
Date: Wed Nov 20 09:22:53 2024 +
[PATCH] PR modula2/115276 bugfix libgm2 wraptime.InitTM returns NIL
This patch fixes libgm2/libm2iso/wraptime.cc:InitTM so that
it does not always return NULL. The incorrect autoconf macro
was used (inside InitTM) and the function short circuited
to return NULL. The fix is to use HAVE_SYS_TIME_H and use
AC_HEADER_TIME in libgm2/configure.ac.
libgm2/ChangeLog:
PR modula2/115276
* config.h.in: Regenerate.
* configure: Regenerate.
* configure.ac: Use AC_HEADER_TIME.
* libm2iso/wraptime.cc (InitTM): Check HAVE_SYS_TIME_H
before using struct tm to obtain the size.
gcc/testsuite/ChangeLog:
PR modula2/115276
* gm2/isolib/run/pass/testinittm.mod: New test.
(cherry picked from commit d1a1f7e9f0bedea55c558ab95127679bc3e9ff72)
Signed-off-by: Gaius Mulley
Diff:
---
gcc/testsuite/gm2/isolib/run/pass/testinittm.mod | 17 +++
libgm2/config.h.in | 3 ++
libgm2/configure | 39 ++--
libgm2/configure.ac | 1 +
libgm2/libm2iso/wraptime.cc | 2 +-
5 files changed, 59 insertions(+), 3 deletions(-)
diff --git a/gcc/testsuite/gm2/isolib/run/pass/testinittm.mod
b/gcc/testsuite/gm2/isolib/run/pass/testinittm.mod
new file mode 100644
index ..dfe041140f17
--- /dev/null
+++ b/gcc/testsuite/gm2/isolib/run/pass/testinittm.mod
@@ -0,0 +1,17 @@
+MODULE testinittm ;
+
+FROM wraptime IMPORT InitTM, tm ;
+FROM libc IMPORT printf, exit ;
+
+VAR
+ m: tm ;
+BEGIN
+ m := InitTM () ;
+ IF m = NIL
+ THEN
+ printf ("InitTM failed\n");
+ exit (1)
+ ELSE
+ printf ("InitTM passed\n")
+ END
+END testinittm.
diff --git a/libgm2/config.h.in b/libgm2/config.h.in
index 7426cb26cf88..321ef3b807f7 100644
--- a/libgm2/config.h.in
+++ b/libgm2/config.h.in
@@ -335,6 +335,9 @@
/* Define to 1 if you have the ANSI C header files. */
#undef STDC_HEADERS
+/* Define to 1 if you can safely include both and . */
+#undef TIME_WITH_SYS_TIME
+
/* Enable extensions on AIX 3, Interix. */
#ifndef _ALL_SOURCE
# undef _ALL_SOURCE
diff --git a/libgm2/configure b/libgm2/configure
index 13861f0ff93e..c36fd7d4cac5 100755
--- a/libgm2/configure
+++ b/libgm2/configure
@@ -6837,6 +6837,41 @@ $as_echo "#define HAVE_SYS_WAIT_H 1" >>confdefs.h
fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether time.h and
sys/time.h may both be included" >&5
+$as_echo_n "checking whether time.h and sys/time.h may both be included... "
>&6; }
+if ${ac_cv_header_time+:} false; then :
+ $as_echo_n "(cached) " >&6
+else
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+#include
+#include
+#include
+
+int
+main ()
+{
+if ((struct tm *) 0)
+return 0;
+ ;
+ return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+ ac_cv_header_time=yes
+else
+ ac_cv_header_time=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_header_time" >&5
+$as_echo "$ac_cv_header_time" >&6; }
+if test $ac_cv_header_time = yes; then
+
+$as_echo "#define TIME_WITH_SYS_TIME 1" >>confdefs.h
+
+fi
+
ac_fn_c_check_header_mongrel "$LINENO" "math.h" "ac_cv_header_math_h"
"$ac_includes_default"
if test "x$ac_cv_header_math_h" = xyes; then :
@@ -14544,7 +14579,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 14547 "configure"
+#line 14582 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -14650,7 +14685,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 14653 "configure"
+#line 14688 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
diff --git a/libgm2/configure.ac b/libgm2/configure.ac
index 9563831ddc5f..1e6b82305ffc 100644
--- a/libgm2/configure.ac
+++ b/libgm2/configure.ac
@@ -88,6 +88,7 @@ AC_ARG_WITH(cross-host,
# Checks for header files.
AC_HEADER_STDC
AC_HEADER_SYS_WAIT
+AC_HEADER_TIME
AC_CHECK_HEADER([math.h],
[AC_DEFINE([HAVE_MATH_H], [1], [have math.h])])
diff --git a/libgm2/libm2iso/wraptime.cc b/libgm2/libm2iso/wraptime.cc
index 158086b75cc0..4bbd5f9701d7 100644
--- a/libgm2/libm2iso/wraptime.cc
+++ b/libgm2/libm2iso/wraptime.cc
@@ -113,7 +113,7 @@ EXPORT(KillTimezone) (struct timezone *tv)
/* InitTM - returns a newly created opaque type. */
-#if defined(HAVE_STRUCT_TM) && defined(HAVE_MALLOC_H)
+#if defined(HAVE_SYS_TIME_H) && defined(HAVE_MALLOC_H)
extern "C" struct tm *
EXPORT(InitTM) (void)
{
[gcc r15-5492] arm, mve: Fix arm_mve_dlstp_check_dec_counter's use of single_pred
https://gcc.gnu.org/g:3ec0b7cd7ce7b64b58cb0ee52fb95fb0875c805c
commit r15-5492-g3ec0b7cd7ce7b64b58cb0ee52fb95fb0875c805c
Author: Andre Vieira
Date: Wed Nov 20 09:23:50 2024 +
arm, mve: Fix arm_mve_dlstp_check_dec_counter's use of single_pred
Call 'single_pred_p' before 'single_pred' to verify it is safe to do so.
gcc/ChangeLog:
* config/arm/arm.cc (arm_mve_dlstp_check_dec_counter): Call
single_pred_p to verify it's safe to call single_pred.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/dlstp-loop-form.c: Add loop that triggered ICE.
Diff:
---
gcc/config/arm/arm.cc | 5 +++--
gcc/testsuite/gcc.target/arm/mve/dlstp-loop-form.c | 12
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
index 17d762be527f..fd7b4dc14beb 100644
--- a/gcc/config/arm/arm.cc
+++ b/gcc/config/arm/arm.cc
@@ -35379,9 +35379,10 @@ arm_mve_dlstp_check_dec_counter (loop *loop, rtx_insn*
vctp_insn,
return NULL;
else if (REG_P (condconst))
{
- basic_block pre_loop_bb = single_pred (loop_preheader_edge (loop)->src);
- if (!pre_loop_bb)
+ basic_block preheader_b = loop_preheader_edge (loop)->src;
+ if (!single_pred_p (preheader_b))
return NULL;
+ basic_block pre_loop_bb = single_pred (preheader_b);
rtx initial_compare = NULL_RTX;
if (!(prev_nonnote_nondebug_insn_bb (BB_END (pre_loop_bb))
diff --git a/gcc/testsuite/gcc.target/arm/mve/dlstp-loop-form.c
b/gcc/testsuite/gcc.target/arm/mve/dlstp-loop-form.c
index a1b26873d790..08811cef5687 100644
--- a/gcc/testsuite/gcc.target/arm/mve/dlstp-loop-form.c
+++ b/gcc/testsuite/gcc.target/arm/mve/dlstp-loop-form.c
@@ -25,3 +25,15 @@ void n() {
}
}
+int a;
+void g2() {
+ long b;
+ while (a) {
+char *c;
+for (long d = b; d > 0; d -= 4) {
+ mve_pred16_t e = vctp32q(d);
+ int32x4_t f;
+ vstrbq_p_s32(c, f, e);
+}
+ }
+}
[gcc r15-5498] RISC-V: Introduce riscv/rvv/autovec/sat folder to rvv.exp testsuite
https://gcc.gnu.org/g:b95d585fd490f21b8f9a8db70dbdacf7361555c1
commit r15-5498-gb95d585fd490f21b8f9a8db70dbdacf7361555c1
Author: Pan Li
Date: Wed Nov 20 13:32:47 2024 +0800
RISC-V: Introduce riscv/rvv/autovec/sat folder to rvv.exp testsuite
After we move vector SAT_ADD testcases into a isolated folder, aka
riscv/rvv/autovec/sat. We would like to add the folder as one of
the test items of the rvv.exp testsuite.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
It is test only patch and obvious up to a point, will commit it
directly if no comments in next 48H.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/rvv.exp: Add the vector sat folder to
the rvv.exp testsuite.
Signed-off-by: Pan Li
Diff:
---
gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
index dbe1f11c0e8c..71251737be2b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
+++ b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
@@ -122,6 +122,8 @@ foreach op $AUTOVEC_TEST_OPTS {
"" "$op"
dg-runtest [lsort [glob -nocomplain
$srcdir/$subdir/autovec/strided/*.\[cS\]]] \
"$op" ""
+ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/sat/*.\[cS\]]] \
+"$op" ""
}
# All done.
[gcc/devel/existing-fp8] aarch64: Add support for fp8dot2 and fp8dot4
https://gcc.gnu.org/g:ee10846d0216e4dae4e99b20054595e668575c47
commit ee10846d0216e4dae4e99b20054595e668575c47
Author: Saurabh Jha
Date: Wed Nov 13 19:48:26 2024 +
aarch64: Add support for fp8dot2 and fp8dot4
The AArch64 FEAT_FP8DOT2 and FEAT_FP8DOT4 extension introduces
instructions for dot product of vectors.
This patch introduces the following intrinsics:
1. vdot{q}_{fp16|fp32}_mf8_fpm.
2. vdot{q}_lane{q}_{fp16|fp32}_mf8_fpm.
It introduces two flags: fp8dot2 and fp8dot4.
We had to add space for another type in aarch64_pragma_builtins_data
struct. The macros were updated to reflect that.
We added a new aarch64_builtin_signature variant, quaternary, and added
support for it in the functions aarch64_fntype and
aarch64_expand_pragma_builtin.
We added a new namespace, function_checker, to implement range checks
for functions defined using the new pragma approach. The old intrinsic
range checks will continue to work. All the new AdvSIMD intrinsics we
define that need lane checks should be using the function in this
namespace to implement the checks.
gcc/ChangeLog:
* config/aarch64/aarch64-builtins.cc
(ENTRY): Change to handle extra type.
(enum class): Added new variant.
(struct aarch64_pragma_builtins_data): Add support for another
type.
(aarch64_get_number_of_args): Handle new signature.
(require_integer_constant): New function to check whether the
operand is an integer constant.
(require_immediate_range): New function to validate index
ranges.
(check_simd_lane_bounds): New function to validate index
operands.
(aarch64_general_check_builtin_call): Call
function_checker::check-simd_lane_bounds.
(aarch64_expand_pragma_builtin): Handle new signature.
* config/aarch64/aarch64-c.cc
(aarch64_update_cpp_builtins): New flags.
* config/aarch64/aarch64-option-extensions.def
(AARCH64_OPT_EXTENSION): New flags.
* config/aarch64/aarch64-simd-pragma-builtins.def
(ENTRY_BINARY): Change to handle extra type.
(ENTRY_BINARY_FPM): Change to handle extra type.
(ENTRY_UNARY_FPM): Change to handle extra type.
(ENTRY_TERNARY_FPM_LANE): Macro to declare fpm ternary with
lane intrinsics.
(ENTRY_VDOT_FPM): Macro to declare vdot intrinsics.
(REQUIRED_EXTENSIONS): Define to declare functions behind
command line flags.
* config/aarch64/aarch64-simd.md:
(@aarch64_):
Instruction pattern for vdot2 intrinsics.
(@aarch64_):
Instruction pattern for vdot2 intrinsics with lane.
(@aarch64_):
Instruction pattern for vdot4 intrinsics.
(@aarch64_):
Instruction pattern for vdo4 intrinsics with lane.
* config/aarch64/aarch64.h
(TARGET_FP8DOT2): New flag for fp8dot2 instructions.
(TARGET_FP8DOT4): New flag for fp8dot4 instructions.
* config/aarch64/iterators.md: New attributes and iterators.
* doc/invoke.texi: New flag for fp8dot2 and fp8dot4
instructions.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/simd/vdot2_fpmdot.c: New test.
* gcc.target/aarch64/simd/vdot4_fpmdot.c: New test.
Diff:
---
gcc/config/aarch64/aarch64-builtins.cc | 107 +++--
gcc/config/aarch64/aarch64-c.cc| 4 +
gcc/config/aarch64/aarch64-option-extensions.def | 4 +
.../aarch64/aarch64-simd-pragma-builtins.def | 39 ++--
gcc/config/aarch64/aarch64-simd.md | 58 +++
gcc/config/aarch64/aarch64.h | 6 ++
gcc/config/aarch64/iterators.md| 19 +++-
gcc/doc/invoke.texi| 4 +
.../gcc.target/aarch64/simd/vdot2_fpmdot.c | 77 +++
.../gcc.target/aarch64/simd/vdot4_fpmdot.c | 77 +++
10 files changed, 380 insertions(+), 15 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-builtins.cc
b/gcc/config/aarch64/aarch64-builtins.cc
index 9b7280a30d07..a71c8c9a64e9 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
+++ b/gcc/config/aarch64/aarch64-builtins.cc
@@ -780,7 +780,7 @@ typedef struct
AARCH64_SIMD_BUILTIN_##T##_##N##A,
#undef ENTRY
-#define ENTRY(N, S, M0, M1, M2, M3, USES_FPMR, U) \
+#define ENTRY(N, S, M0, M1, M2, M3, M4, USES_FPMR, U) \
AARCH64_##N,
enum aarch64_builtins
@@ -1590,9 +1590,10 @@ aarch64_init_simd_builtin_functions (bool
called_from_pragma)
enum class aarch64_builtin_signatures
{
+ unary,
binary,
ternary,
- unary,
+ quaternary,
};
namespace {
@@ -1617,6 +1618,7 @
[gcc/devel/existing-fp8] Work in progress for refactoring simd intrinsic
https://gcc.gnu.org/g:d54a66c1d81ca3874be4c086652f205b1d6ebe49
commit d54a66c1d81ca3874be4c086652f205b1d6ebe49
Author: Saurabh Jha
Date: Tue Nov 19 22:38:51 2024 +
Work in progress for refactoring simd intrinsic
Diff:
---
gcc/config/aarch64/aarch64-builtins.cc | 138 ++-
.../aarch64/aarch64-simd-pragma-builtins.def | 156 +++
gcc/config/aarch64/aarch64-simd.md | 21 +-
gcc/config/aarch64/arm_neon.h | 1183
gcc/config/aarch64/iterators.md|5 +
5 files changed, 518 insertions(+), 985 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-builtins.cc
b/gcc/config/aarch64/aarch64-builtins.cc
index 7b2decf671fa..62adc62976c8 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
+++ b/gcc/config/aarch64/aarch64-builtins.cc
@@ -696,6 +696,7 @@ static aarch64_simd_builtin_datum
aarch64_simd_builtin_data[] = {
VREINTERPRET_BUILTINS \
VREINTERPRETQ_BUILTINS
+/* Add fp8 here and in high */
#define AARCH64_SIMD_VGET_LOW_BUILTINS \
VGET_LOW_BUILTIN(f16) \
VGET_LOW_BUILTIN(f32) \
@@ -1608,31 +1609,85 @@ namespace simd_types {
constexpr simd_type f8 { V8QImode, qualifier_modal_float };
constexpr simd_type f8q { V16QImode, qualifier_modal_float };
+ constexpr simd_type s8_scalar_const_ptr
+{ QImode, qualifier_const_pointer_map_mode };
+ constexpr simd_type s8_scalar { QImode, qualifier_none };
constexpr simd_type s8 { V8QImode, qualifier_none };
- constexpr simd_type u8 { V8QImode, qualifier_unsigned };
constexpr simd_type s8q { V16QImode, qualifier_none };
+ constexpr simd_type u8_scalar_const_ptr
+{ QImode, qualifier_const_pointer_map_mode };
+ constexpr simd_type u8_scalar { QImode, qualifier_unsigned };
+ constexpr simd_type u8 { V8QImode, qualifier_unsigned };
constexpr simd_type u8q { V16QImode, qualifier_unsigned };
+ constexpr simd_type s16_scalar_const_ptr
+{ HImode, qualifier_const_pointer_map_mode };
+ constexpr simd_type s16_scalar { HImode, qualifier_none };
constexpr simd_type s16 { V4HImode, qualifier_none };
+ constexpr simd_type u16_scalar_const_ptr
+{ HImode, qualifier_const_pointer_map_mode };
+ constexpr simd_type u16_scalar { HImode, qualifier_unsigned };
constexpr simd_type u16 { V4HImode, qualifier_unsigned };
constexpr simd_type s16q { V8HImode, qualifier_none };
constexpr simd_type u16q { V8HImode, qualifier_unsigned };
+ constexpr simd_type s32_scalar_const_ptr
+{ SImode, qualifier_const_pointer_map_mode };
constexpr simd_type s32_index { SImode, qualifier_lane_index };
+ constexpr simd_type s32_scalar { SImode, qualifier_none };
constexpr simd_type s32 { V2SImode, qualifier_none };
+ constexpr simd_type u32_scalar_const_ptr
+{ SImode, qualifier_const_pointer_map_mode };
+ constexpr simd_type u32_scalar { SImode, qualifier_unsigned };
+ constexpr simd_type u32 { V2SImode, qualifier_unsigned };
constexpr simd_type s32q { V4SImode, qualifier_none };
-
+ constexpr simd_type u32q { V4SImode, qualifier_unsigned };
+
+ constexpr simd_type s64_scalar_const_ptr
+{ DImode, qualifier_const_pointer_map_mode };
+ constexpr simd_type s64_scalar { DImode, qualifier_none };
+ constexpr simd_type s64 { V1DImode, qualifier_none };
+ constexpr simd_type u64_scalar_const_ptr
+{ DImode, qualifier_const_pointer_map_mode };
+ constexpr simd_type u64_scalar { DImode, qualifier_unsigned };
+ constexpr simd_type u64 { V1DImode, qualifier_unsigned };
constexpr simd_type s64q { V2DImode, qualifier_none };
+ constexpr simd_type u64q { V2DImode, qualifier_unsigned };
+ constexpr simd_type p8_scalar_const_ptr
+{ QImode, qualifier_const_pointer_map_mode };
+ constexpr simd_type p8_scalar { QImode, qualifier_poly };
constexpr simd_type p8 { V8QImode, qualifier_poly };
constexpr simd_type p8q { V16QImode, qualifier_poly };
+
+ constexpr simd_type p16_scalar_const_ptr
+{ HImode, qualifier_const_pointer_map_mode };
+ constexpr simd_type p16_scalar { HImode, qualifier_poly };
constexpr simd_type p16 { V4HImode, qualifier_poly };
constexpr simd_type p16q { V8HImode, qualifier_poly };
+ constexpr simd_type p64_scalar_const_ptr
+{ DImode, qualifier_const_pointer_map_mode };
+ constexpr simd_type p64_scalar { DImode, qualifier_poly };
+ constexpr simd_type p64 { V1DImode, qualifier_poly };
+ constexpr simd_type p64q { V2DImode, qualifier_poly };
+
+ constexpr simd_type f16_scalar_const_ptr
+{ HFmode, qualifier_const_pointer_map_mode };
+ constexpr simd_type f16_scalar { HFmode, qualifier_none };
constexpr simd_type f16 { V4HFmode, qualifier_none };
constexpr simd_type f16q { V8HFmode, qualifier_none };
+
+ constexpr simd_type f32_scalar_const_ptr
+{ SFmode, qualifier_const_pointer_map_mode };
+ constexpr simd_type f32_scalar { SFmode, qualifier_none };
constexpr simd_type f32 { V2SFmode, qualifier_none };
constexpr simd_type f32q { V4SFmode, qualif
[gcc/devel/existing-fp8] aarch64: Add support for fp8 convert and scale
https://gcc.gnu.org/g:3103441079fa30dc9f75a75bda38c39f1ffd708e
commit 3103441079fa30dc9f75a75bda38c39f1ffd708e
Author: Saurabh Jha
Date: Mon Nov 4 09:11:33 2024 +
aarch64: Add support for fp8 convert and scale
The AArch64 FEAT_FP8 extension introduces instructions for conversion
and scaling.
This patch introduces the following intrinsics:
1. vcvt{1|2}_{bf16|high_bf16|low_bf16}_mf8_fpm.
2. vcvt{q}_mf8_f16_fpm.
3. vcvt_{high}_mf8_f32_fpm.
4. vscale{q}_{f16|f32|f64}.
We introduced two aarch64_builtin_signatures enum variants, unary and
ternary, and added support for these variants in the functions
aarch64_fntype and aarch64_expand_pragma_builtin.
We added new simd_types for integers (s32, s32q, and s64q) and for
floating points (f8 and f8q).
Because we added support for fp8 intrinsics here, we modified the check
in acle/fp8.c that was checking that __ARM_FEATURE_FP8 macro is not
defined.
gcc/ChangeLog:
* config/aarch64/aarch64-builtins.cc
(ENTRY): Modified to support uses_fpmr flag.
(enum class): New variants to support new signatures.
(struct aarch64_pragma_builtins_data): Add a new boolean field,
uses_fpmr.
(aarch64_get_number_of_args): Helper function used in
aarch64_fntype and aarch64_expand_pragma_builtin.
(aarch64_fntype): Handle new signatures.
(aarch64_expand_pragma_builtin): Handle new signatures.
* config/aarch64/aarch64-c.cc
(aarch64_update_cpp_builtins): New flag for FP8.
* config/aarch64/aarch64-simd-pragma-builtins.def
(ENTRY_BINARY): Macro to declare binary intrinsics.
(ENTRY_TERNARY): Macro to declare ternary intrinsics.
(ENTRY_UNARY): Macro to declare unary intrinsics.
(ENTRY_VHSDF): Macro to declare binary intrinsics.
(ENTRY_VHSDF_VHSDI): Macro to declare binary intrinsics.
(REQUIRED_EXTENSIONS): Define to declare functions behind
command line flags.
* config/aarch64/aarch64-simd.md
(@aarch64_): Unary
pattern.
(@aarch64_): Unary
pattern.
(@aarch64_lower_):
Unary pattern.
(@aarch64_lower_):
Unary pattern.
(@aarch64):
Binary pattern.
(@aarch64_):
Unary pattern.
(@aarch64_): Binary pattern.
* config/aarch64/iterators.md: New attributes and iterators.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/acle/fp8.c: Remove check that fp8 feature
macro doesn't exist.
* gcc.target/aarch64/simd/scale_fpm.c: New test.
* gcc.target/aarch64/simd/vcvt_fpm.c: New test.
Diff:
---
gcc/config/aarch64/aarch64-builtins.cc | 137 +++---
gcc/config/aarch64/aarch64-c.cc| 2 +
.../aarch64/aarch64-simd-pragma-builtins.def | 67 +--
gcc/config/aarch64/aarch64-simd.md | 98 ++
gcc/config/aarch64/iterators.md| 65 +++
gcc/testsuite/gcc.target/aarch64/acle/fp8.c| 10 --
gcc/testsuite/gcc.target/aarch64/simd/scale_fpm.c | 60 +++
gcc/testsuite/gcc.target/aarch64/simd/vcvt_fpm.c | 197 +
8 files changed, 587 insertions(+), 49 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-builtins.cc
b/gcc/config/aarch64/aarch64-builtins.cc
index ad82c680c6a0..9b7280a30d07 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
+++ b/gcc/config/aarch64/aarch64-builtins.cc
@@ -780,7 +780,7 @@ typedef struct
AARCH64_SIMD_BUILTIN_##T##_##N##A,
#undef ENTRY
-#define ENTRY(N, S, M0, M1, M2, M3, U) \
+#define ENTRY(N, S, M0, M1, M2, M3, USES_FPMR, U) \
AARCH64_##N,
enum aarch64_builtins
@@ -1591,6 +1591,8 @@ aarch64_init_simd_builtin_functions (bool
called_from_pragma)
enum class aarch64_builtin_signatures
{
binary,
+ ternary,
+ unary,
};
namespace {
@@ -1602,6 +1604,9 @@ struct simd_type {
namespace simd_types {
+ constexpr simd_type f8 { V8QImode, qualifier_modal_float };
+ constexpr simd_type f8q { V16QImode, qualifier_modal_float };
+
constexpr simd_type s8 { V8QImode, qualifier_none };
constexpr simd_type u8 { V8QImode, qualifier_unsigned };
constexpr simd_type s8q { V16QImode, qualifier_none };
@@ -1612,6 +1617,11 @@ namespace simd_types {
constexpr simd_type s16q { V8HImode, qualifier_none };
constexpr simd_type u16q { V8HImode, qualifier_unsigned };
+ constexpr simd_type s32 { V2SImode, qualifier_none };
+ constexpr simd_type s32q { V4SImode, qualifier_none };
+
+ constexpr simd_type s64q { V2DImode, qualifier_none };
+
constexpr simd_type p8 { V8QImode, qualifier_poly };
constexpr simd_type p8q { V16QImode, qualifier_poly };
constexpr simd_type p16 { V4HImode,
[gcc/devel/existing-fp8] aarch64: Add support for fp8fma instructions
https://gcc.gnu.org/g:8e45a01d0fd36d21c9743f30a25e277b67e79f0e
commit 8e45a01d0fd36d21c9743f30a25e277b67e79f0e
Author: Saurabh Jha
Date: Wed Nov 13 17:16:37 2024 +
aarch64: Add support for fp8fma instructions
The AArch64 FEAT_FP8FMA extension introduces instructions for
multiply-add of vectors.
This patch introduces the following instructions:
1. {vmlalbq|vmlaltq}_f16_mf8_fpm.
2. {vmlalbq|vmlaltq}_lane{q}_f16_mf8_fpm.
3. {vmlallbbq|vmlallbtq|vmlalltbq|vmlallttq}_f32_mf8_fpm.
4. {vmlallbbq|vmlallbtq|vmlalltbq|vmlallttq}_lane{q}_f32_mf8_fpm.
It introduces the fp8fma flag.
gcc/ChangeLog:
* config/aarch64/aarch64-builtins.cc
(check_simd_lane_bounds): Add support for new unspecs.
(aarch64_expand_pragma_builtins): Add support for new unspecs.
* config/aarch64/aarch64-c.cc
(aarch64_update_cpp_builtins): New flags.
* config/aarch64/aarch64-option-extensions.def
(AARCH64_OPT_EXTENSION): New flags.
* config/aarch64/aarch64-simd-pragma-builtins.def
(ENTRY_FMA_FPM): Macro to declare fma intrinsics.
(REQUIRED_EXTENSIONS): Define to declare functions behind
command line flags.
* config/aarch64/aarch64-simd.md:
(@aarch64_unspec == UNSPEC_VDOT2
- ? vector_to_index_mode_size / 2 - 1
- : vector_to_index_mode_size / 4 - 1;
+ int high;
+ switch (builtin_data->unspec)
+ {
+ case UNSPEC_VDOT2:
+ high = vector_to_index_mode_size / 2 - 1;
+ break;
+ case UNSPEC_VDOT4:
+ high = vector_to_index_mode_size / 4 - 1;
+ break;
+ case UNSPEC_FMLALB:
+ case UNSPEC_FMLALT:
+ case UNSPEC_FMLALLBB:
+ case UNSPEC_FMLALLBT:
+ case UNSPEC_FMLALLTB:
+ case UNSPEC_FMLALLTT:
+ high = vector_to_index_mode_size - 1;
+ break;
+ default:
+ gcc_unreachable ();
+ }
require_immediate_range (location, index_arg, low, high);
break;
}
@@ -3552,6 +3568,12 @@ aarch64_expand_pragma_builtin (tree exp, rtx target,
case UNSPEC_VDOT2:
case UNSPEC_VDOT4:
+case UNSPEC_FMLALB:
+case UNSPEC_FMLALT:
+case UNSPEC_FMLALLBB:
+case UNSPEC_FMLALLBT:
+case UNSPEC_FMLALLTB:
+case UNSPEC_FMLALLTT:
if (builtin_data->signature == aarch64_builtin_signatures::ternary)
icode = code_for_aarch64 (builtin_data->unspec,
builtin_data->types[0].mode,
diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-c.cc
index ae1472e0fcf2..03f912cde077 100644
--- a/gcc/config/aarch64/aarch64-c.cc
+++ b/gcc/config/aarch64/aarch64-c.cc
@@ -264,6 +264,8 @@ aarch64_update_cpp_builtins (cpp_reader *pfile)
aarch64_def_or_undef (TARGET_FP8DOT4, "__ARM_FEATURE_FP8DOT4", pfile);
+ aarch64_def_or_undef (TARGET_FP8FMA, "__ARM_FEATURE_FP8FMA", pfile);
+
aarch64_def_or_undef (TARGET_LS64,
"__ARM_FEATURE_LS64", pfile);
aarch64_def_or_undef (TARGET_RCPC, "__ARM_FEATURE_RCPC", pfile);
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def
b/gcc/config/aarch64/aarch64-option-extensions.def
index 44d2e18d46bd..8446d1bcd5dc 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -240,6 +240,8 @@ AARCH64_OPT_EXTENSION("fp8dot2", FP8DOT2, (SIMD), (), (),
"fp8dot2")
AARCH64_OPT_EXTENSION("fp8dot4", FP8DOT4, (SIMD), (), (), "fp8dot4")
+AARCH64_OPT_EXTENSION("fp8fma", FP8FMA, (SIMD), (), (), "fp8fma")
+
AARCH64_OPT_EXTENSION("faminmax", FAMINMAX, (SIMD), (), (), "faminmax")
#undef AARCH64_OPT_FMV_EXTENSION
diff --git a/gcc/config/aarch64/aarch64-simd-pragma-builtins.def
b/gcc/config/aarch64/aarch64-simd-pragma-builtins.def
index 4a94a6613f08..c7857123ca03 100644
--- a/gcc/config/aarch64/aarch64-simd-pragma-builtins.def
+++ b/gcc/config/aarch64/aarch64-simd-pragma-builtins.def
@@ -48,6 +48,12 @@
ENTRY_TERNARY_FPM_LANE (vdotq_lane_##T##_mf8_fpm, T##q, T##q, f8q, f8, U) \
ENTRY_TERNARY_FPM_LANE (vdotq_laneq_##T##_mf8_fpm, T##q, T##q, f8q, f8q, U)
+#undef ENTRY_FMA_FPM
+#define ENTRY_FMA_FPM(N, T, U) \
+ ENTRY_TERNARY_FPM (N##_##T##_mf8_fpm, T##q, T##q, f8q, f8q, U) \
+ ENTRY_TERNARY_FPM_LANE (N##_lane_##T##_mf8_fpm, T##q, T##q, f8q, f8, U) \
+ ENTRY_TERNARY_FPM_LANE (N##_laneq_##T##_mf8_fpm, T##q, T##q, f8q, f8q, U)
+
#undef ENTRY_VHSDF
#define ENTRY_VHSDF(NAME, UNSPEC) \
ENTRY_BINARY (NAME##_f16, f16, f16, f16, UNSPEC) \
@@ -106,3 +112,13 @@ ENTRY_VDOT_FPM (f16, UNSPEC_VDOT2)
#define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_FP8DOT4)
ENTRY_VDOT_FPM (f32, UNSPEC_VDOT4)
#undef REQUIRED_EXTENSIONS
+
+// fp8 multiply-add
+#define REQUIRED_EXTENSIONS nonstreaming_only (AARCH64_FL_FP8FMA)
+ENTR
[gcc/devel/existing-fp8] aarch64: Refactor infrastructure for advsimd intrinsics
https://gcc.gnu.org/g:1b6b028e272228c54801d7e038ec0536f92b22bb
commit 1b6b028e272228c54801d7e038ec0536f92b22bb
Author: Vladimir Miloserdov
Date: Fri Nov 1 12:35:59 2024 +
aarch64: Refactor infrastructure for advsimd intrinsics
This patch refactors the infrastructure for defining advsimd pragma
intrinsics, adding support for more flexible type and signature
handling in future SIMD extensions.
A new simd_type structure is introduced, which allows for consistent
mode and qualifier management across various advsimd operations.
gcc/ChangeLog:
* config/aarch64/aarch64-builtins.cc (ENTRY): Modify to
include modes and qualifiers for simd_type structure.
(ENTRY_VHSDF): Move to aarch64-builtins.cc to decouple.
(struct simd_type): New structure for managing mode and
qualifier combinations for SIMD types.
(struct aarch64_pragma_builtins_data): Replace mode with
simd_type to support multiple argument types for intrinsics.
(aarch64_fntype): Modify to handle different shapes type.
(aarch64_expand_pragma_builtin): Modify to handle different
shapes type.
* config/aarch64/aarch64-simd-pragma-builtins.def (ENTRY_BINARY):
Move from aarch64-builtins.cc.
(ENTRY_VHSDF): Move from aarch64-builtins.cc.
(REQUIRED_EXTENSIONS): New macro.
Diff:
---
gcc/config/aarch64/aarch64-builtins.cc | 81 ++
.../aarch64/aarch64-simd-pragma-builtins.def | 15 ++--
2 files changed, 77 insertions(+), 19 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-builtins.cc
b/gcc/config/aarch64/aarch64-builtins.cc
index 97bde7c15d3b..ad82c680c6a0 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
+++ b/gcc/config/aarch64/aarch64-builtins.cc
@@ -780,7 +780,7 @@ typedef struct
AARCH64_SIMD_BUILTIN_##T##_##N##A,
#undef ENTRY
-#define ENTRY(N, S, M, U) \
+#define ENTRY(N, S, M0, M1, M2, M3, U) \
AARCH64_##N,
enum aarch64_builtins
@@ -1593,10 +1593,49 @@ enum class aarch64_builtin_signatures
binary,
};
+namespace {
+
+struct simd_type {
+ machine_mode mode;
+ aarch64_type_qualifiers qualifiers;
+};
+
+namespace simd_types {
+
+ constexpr simd_type s8 { V8QImode, qualifier_none };
+ constexpr simd_type u8 { V8QImode, qualifier_unsigned };
+ constexpr simd_type s8q { V16QImode, qualifier_none };
+ constexpr simd_type u8q { V16QImode, qualifier_unsigned };
+
+ constexpr simd_type s16 { V4HImode, qualifier_none };
+ constexpr simd_type u16 { V4HImode, qualifier_unsigned };
+ constexpr simd_type s16q { V8HImode, qualifier_none };
+ constexpr simd_type u16q { V8HImode, qualifier_unsigned };
+
+ constexpr simd_type p8 { V8QImode, qualifier_poly };
+ constexpr simd_type p8q { V16QImode, qualifier_poly };
+ constexpr simd_type p16 { V4HImode, qualifier_poly };
+ constexpr simd_type p16q { V8HImode, qualifier_poly };
+
+ constexpr simd_type f16 { V4HFmode, qualifier_none };
+ constexpr simd_type f16q { V8HFmode, qualifier_none };
+ constexpr simd_type f32 { V2SFmode, qualifier_none };
+ constexpr simd_type f32q { V4SFmode, qualifier_none };
+ constexpr simd_type f64q { V2DFmode, qualifier_none };
+
+ constexpr simd_type bf16 { V4BFmode, qualifier_none };
+ constexpr simd_type bf16q { V8BFmode, qualifier_none };
+
+ constexpr simd_type none { VOIDmode, qualifier_none };
+}
+
+}
+
#undef ENTRY
-#define ENTRY(N, S, M, U) \
- {#N, aarch64_builtin_signatures::S, E_##M##mode, U, \
- aarch64_required_extensions::REQUIRED_EXTENSIONS},
+#define ENTRY(N, S, T0, T1, T2, T3, U) \
+ {#N, aarch64_builtin_signatures::S, simd_types::T0, simd_types::T1, \
+simd_types::T2, simd_types::T3, U, \
+aarch64_required_extensions::REQUIRED_EXTENSIONS},
/* Initialize pragma builtins. */
@@ -1604,7 +1643,7 @@ struct aarch64_pragma_builtins_data
{
const char *name;
aarch64_builtin_signatures signature;
- machine_mode mode;
+ simd_type types[4];
int unspec;
aarch64_required_extensions required_extensions;
};
@@ -1616,11 +1655,19 @@ static aarch64_pragma_builtins_data
aarch64_pragma_builtins[] = {
static tree
aarch64_fntype (const aarch64_pragma_builtins_data &builtin_data)
{
- auto type = aarch64_simd_builtin_type (builtin_data.mode, qualifier_none);
+ tree type0, type1, type2;
+
switch (builtin_data.signature)
{
case aarch64_builtin_signatures::binary:
- return build_function_type_list (type, type, type, NULL_TREE);
+ type0 = aarch64_simd_builtin_type (builtin_data.types[0].mode,
+ builtin_data.types[0].qualifiers);
+ type1 = aarch64_simd_builtin_type (builtin_data.types[1].mode,
+ builtin_data.types[1].qualifiers);
+ type2 = aarch64_simd_builtin_type (builtin_data.types[2].mode,
+ builtin_data.types[2].qualifiers);
+ return build_function_type_list (type0, type1, type2, NULL_TREE);
+
default
[gcc r15-5491] fortran: Check for empty MINLOC/MAXLOC ARRAY along DIM only
https://gcc.gnu.org/g:95b5fd731649fbc3b5720b9c81d1aa4547dfd6bf
commit r15-5491-g95b5fd731649fbc3b5720b9c81d1aa4547dfd6bf
Author: Mikael Morin
Date: Sat Nov 18 20:54:20 2023 +0100
fortran: Check for empty MINLOC/MAXLOC ARRAY along DIM only
In the function generating inline code to implement MINLOC and MAXLOC, only
check for ARRAY size along DIM if DIM is present.
The check for ARRAY emptyness had been checking the size of the full array,
which is correct for MINLOC and MAXLOC without DIM. But if DIM is
present, the reduction is along DIM only so the check for emptyness
should consider that dimension only as well.
This sounds like a correctness issue, but fortunately the cases where it
makes a difference are cases where ARRAY is empty, so even if the value
calculated for MINLOC or MAXLOC is wrong, it's wrapped in a zero iteration
loop, and the wrong values are not actually used. In the end this just
avoids unnecessary calculations.
A previous version of this patch regressed on non-constant DIM with rank 1
ARRAY. The new testcase checks that that case is supported.
gcc/fortran/ChangeLog:
* trans-intrinsic.cc (gfc_conv_intrinsic_minmaxloc): Only get the
size
along DIM instead of the full size if DIM is present.
gcc/testsuite/ChangeLog:
* gfortran.dg/minmaxloc_22.f90: New test.
Diff:
---
gcc/fortran/trans-intrinsic.cc | 19 ++-
gcc/testsuite/gfortran.dg/minmaxloc_22.f90 | 26 ++
2 files changed, 44 insertions(+), 1 deletion(-)
diff --git a/gcc/fortran/trans-intrinsic.cc b/gcc/fortran/trans-intrinsic.cc
index 12bda2108bf4..8b4fd8e23312 100644
--- a/gcc/fortran/trans-intrinsic.cc
+++ b/gcc/fortran/trans-intrinsic.cc
@@ -5642,7 +5642,24 @@ gfc_conv_intrinsic_minmaxloc (gfc_se * se, gfc_expr *
expr, enum tree_code op)
if (!(maskexpr && maskexpr->rank > 0))
{
mpz_t asize;
- if (gfc_array_size (arrayexpr, &asize))
+ bool reduction_size_known;
+
+ if (dim_present)
+ {
+ int reduction_dim;
+ if (dim_arg->expr->expr_type == EXPR_CONSTANT)
+ reduction_dim = mpz_get_si (dim_arg->expr->value.integer) - 1;
+ else if (arrayexpr->rank == 1)
+ reduction_dim = 0;
+ else
+ gcc_unreachable ();
+ reduction_size_known = gfc_array_dimen_size (arrayexpr, reduction_dim,
+ &asize);
+ }
+ else
+ reduction_size_known = gfc_array_size (arrayexpr, &asize);
+
+ if (reduction_size_known)
{
nonempty = gfc_conv_mpz_to_tree (asize, gfc_index_integer_kind);
mpz_clear (asize);
diff --git a/gcc/testsuite/gfortran.dg/minmaxloc_22.f90
b/gcc/testsuite/gfortran.dg/minmaxloc_22.f90
new file mode 100644
index ..ec97d1435af8
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/minmaxloc_22.f90
@@ -0,0 +1,26 @@
+! { dg-do compile }
+! { dg-additional-options "-O" }
+!
+! Check that the inline code generated for MINLOC and MAXLOC supports
+! a non-constant DIM argument if ARRAY has rank 1.
+
+program p
+ implicit none
+ integer, parameter :: n = 5
+ integer :: a(n), i
+ a = (/ (i**2, i=1,n) /)
+ print *, f(a, 1), g(a, 1)
+contains
+ function f(a, d)
+integer :: a(n)
+integer :: d
+integer :: f
+f = minloc(a, dim=d)
+ end function
+ function g(a, d)
+integer :: a(n)
+integer :: d
+integer :: g
+g = maxloc(a, dim=d)
+ end function
+end program p
[gcc r15-5503] aarch64: Rework sme_2mode_function insns
https://gcc.gnu.org/g:12c60ff1ffd03410eb583c4231188f431ae81fa8 commit r15-5503-g12c60ff1ffd03410eb583c4231188f431ae81fa8 Author: Richard Sandiford Date: Wed Nov 20 13:27:38 2024 + aarch64: Rework sme_2mode_function insns Many of the SME ZA intrinsics have two type suffixes: one for ZA and one for the vectors. The ZA suffix only conveys an element size, while the vector suffix conveys both an element type and an element size. Internally, the ZA suffix maps to an integer mode; e.g. za32 maps to VNx4SI. For SME2, it was relatively convenient to use the modes associated with both suffixes directly. For example, the (non-widening) FMLA intrinsics used SME_ZA_SDF_I to iterate over the possible ZA modes, used SME_ZA_SDFx24 to iterate over the possible vector tuple modes, and used a C++ condition to make sure that the element sizes agree. However, for later patches it's more convenient to rely only on the vector mode in cases where the ZA and vector element sizes are the same. This means splitting the widening MOPA/S patterns from the non-widening ones, but otherwise it's not a big change. gcc/ * config/aarch64/iterators.md (SME_ZA_SDF_I): Delete. (SME_MOP_HSDF): Replace with... (SME_MOP_SDF): ...this. * config/aarch64/aarch64-sme.md: Change the non-widening FMLA and FMLS patterns so that both mode parameters are the same, rather than using both SME_ZA_SDF_I and SME_ZA_SDFx24 and checking that their element sizes are the same. Split the FMOPA and FMOPS patterns into separate non-widening and widening forms, then update the non-widening forms in a similar way to FMLA and FMLS. * config/aarch64/aarch64-sve-builtins-functions.h (sme_2mode_function_t::expand): If the two type suffixes have the same element size, use the vector tuple mode for both mode parameters. Diff: --- gcc/config/aarch64/aarch64-sme.md | 114 +++-- .../aarch64/aarch64-sve-builtins-functions.h | 15 ++- gcc/config/aarch64/iterators.md| 5 +- 3 files changed, 73 insertions(+), 61 deletions(-) diff --git a/gcc/config/aarch64/aarch64-sme.md b/gcc/config/aarch64/aarch64-sme.md index 8fca138314c2..088bdd8d869d 100644 --- a/gcc/config/aarch64/aarch64-sme.md +++ b/gcc/config/aarch64/aarch64-sme.md @@ -1633,54 +1633,51 @@ ;; - FMLS ;; - -(define_insn "@aarch64_sme_" - [(set (reg:SME_ZA_SDF_I ZA_REGNUM) - (unspec:SME_ZA_SDF_I - [(reg:SME_ZA_SDF_I ZA_REGNUM) +(define_insn "@aarch64_sme_" + [(set (reg:SME_ZA_SDFx24 ZA_REGNUM) + (unspec:SME_ZA_SDFx24 + [(reg:SME_ZA_SDFx24 ZA_REGNUM) (reg:DI SME_STATE_REGNUM) (match_operand:SI 0 "register_operand" "Uci") (match_operand:SME_ZA_SDFx24 1 "aligned_register_operand" "Uw") (match_operand:SME_ZA_SDFx24 2 "aligned_register_operand" "Uw")] SME_FP_TERNARY_SLICE))] - "TARGET_STREAMING_SME2 - && == " - "\tza.[%w0, 0, vgx], %1, %2" + "TARGET_STREAMING_SME2" + "\tza.[%w0, 0, vgx], %1, %2" ) -(define_insn "*aarch64_sme__plus" - [(set (reg:SME_ZA_SDF_I ZA_REGNUM) - (unspec:SME_ZA_SDF_I - [(reg:SME_ZA_SDF_I ZA_REGNUM) +(define_insn "*aarch64_sme__plus" + [(set (reg:SME_ZA_SDFx24 ZA_REGNUM) + (unspec:SME_ZA_SDFx24 + [(reg:SME_ZA_SDFx24 ZA_REGNUM) (reg:DI SME_STATE_REGNUM) (plus:SI (match_operand:SI 0 "register_operand" "Uci") (match_operand:SI 1 "const_0_to_7_operand")) (match_operand:SME_ZA_SDFx24 2 "aligned_register_operand" "Uw") (match_operand:SME_ZA_SDFx24 3 "aligned_register_operand" "Uw")] SME_FP_TERNARY_SLICE))] - "TARGET_STREAMING_SME2 - && == " - "\tza.[%w0, %1, vgx], %2, %3" + "TARGET_STREAMING_SME2" + "\tza.[%w0, %1, vgx], %2, %3" ) -(define_insn "@aarch64_sme_single_" - [(set (reg:SME_ZA_SDF_I ZA_REGNUM) - (unspec:SME_ZA_SDF_I - [(reg:SME_ZA_SDF_I ZA_REGNUM) +(define_insn "@aarch64_sme_single_" + [(set (reg:SME_ZA_SDFx24 ZA_REGNUM) + (unspec:SME_ZA_SDFx24 + [(reg:SME_ZA_SDFx24 ZA_REGNUM) (reg:DI SME_STATE_REGNUM) (match_operand:SI 0 "register_operand" "Uci") (match_operand:SME_ZA_SDFx24 1 "register_operand" "w") (vec_duplicate:SME_ZA_SDFx24 (match_operand: 2 "register_operand" "x"))] SME_FP_TERNARY_SLICE))] - "TARGET_STREAMING_SME2 - && == " - "\tza.[%w0, 0, vgx], %1, %2." + "TARGET_STREAMING_SME2" + "\tza.[%w0, 0, vgx], %1, %2." ) -(define_insn "*aarch64_sme_single__plus" - [(set (reg:SME_ZA_SDF_I ZA_REGNUM) - (unspec:SME_ZA_SDF_I - [(reg:SME_ZA_SDF_I ZA_REGNUM) +(define_insn "*aarch64_sme_single__plus" +
[gcc r15-5508] aarch64: Add support for SME_F16F16
https://gcc.gnu.org/g:e6751e1deb636bbd1538ccded4d9b3abfec8e0cf commit r15-5508-ge6751e1deb636bbd1538ccded4d9b3abfec8e0cf Author: Richard Sandiford Date: Wed Nov 20 13:27:41 2024 + aarch64: Add support for SME_F16F16 This patch adds support for the SME_F16F16 extension. The extension adds two new instructions to convert from a single vector of f16s to two vectors of f32s. It also adds f16 variants of existing SME ZA instructions. gcc/ * config/aarch64/aarch64-option-extensions.def (sme-f16f16): New extension. * doc/invoke.texi: Document it. Also document that sme-i16i64 and sme-f64f64 enable SME. * config/aarch64/aarch64.h (TARGET_STREAMING_SME_F16F16): New macro. * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Conditionally define __ARM_FEATURE_SME_F16F16. * config/aarch64/aarch64-sve-builtins-sve2.def (svcvt, svcvtl): Add new SME_F16F16 intrinsics. * config/aarch64/aarch64-sve-builtins-sme.def: Add SME_F16F16 forms of existing intrinsics. * config/aarch64/aarch64-sve-builtins.cc (TYPES_h_float) (TYPES_cvt_f32_f16, TYPES_za_h_float): New type macros. * config/aarch64/aarch64-sve-builtins-base.cc (svcvt_impl::expand): Add sext_optab as another possibility. * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtl): Declare. * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtl_impl): New class. (svcvtl): New function. * config/aarch64/iterators.md (VNx8SF_ONLY): New mode iterator. (SME_ZA_SDFx24): Replace with... (SME_ZA_HSDFx24): ...this. (SME_MOP_SDF): Replace with... (SME_MOP_HSDF): ...this. (SME_BINARY_SLICE_SDF): Replace with... (SME_BINARY_SLICE_HSDF): ...this. * config/aarch64/aarch64-sve2.md (extendvnx8hfvnx8sf2) (@aarch64_sve_cvtl): New patterns. * config/aarch64/aarch64-sme.md (@aarch64_sme_): Extend to... (@aarch64_sme_): ...this. (*aarch64_sme__plus): Extend to... (*aarch64_sme__plus): ...this. (@aarch64_sme_): Extend to HF modes. (*aarch64_sme__plus) (@aarch64_sme_single_) (*aarch64_sme_single__plus) (@aarch64_sme_lane_) (*aarch64_sme_lane_) (@aarch64_sme_): Likewise. gcc/testsuite/ * lib/target-supports.exp: Test the assembler for sve-f16f16 support. * gcc.target/aarch64/pragma_cpp_predefs_4.c: Add tests for __ARM_FEATURE_SME_F16F16. Also extend the existing SME tests. * gcc.target/aarch64/sve/acle/asm/test_sve_acle.h (TEST_X2_WIDE): New macro * gcc.target/aarch64/sme2/acle-asm/add_za16_f16_vg1x2.c: New test. * gcc.target/aarch64/sme2/acle-asm/add_za16_f16_vg1x4.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/cvt_f32_f16_x2.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/cvtl_f32_f16_x2.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mla_lane_za16_f16_vg1x2.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mla_lane_za16_f16_vg1x4.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mla_za16_f16_vg1x2.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mla_za16_f16_vg1x4.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mls_lane_za16_f16_vg1x2.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mls_lane_za16_f16_vg1x4.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mls_za16_f16_vg1x2.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mls_za16_f16_vg1x4.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mopa_za16_f16.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mops_za16_f16.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/sub_za16_f16_vg1x2.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/sub_za16_f16_vg1x4.c: Likewise. Diff: --- gcc/config/aarch64/aarch64-c.cc| 2 + gcc/config/aarch64/aarch64-option-extensions.def | 2 + gcc/config/aarch64/aarch64-sme.md | 101 +-- gcc/config/aarch64/aarch64-sve-builtins-base.cc| 5 +- gcc/config/aarch64/aarch64-sve-builtins-sme.def| 15 ++ gcc/config/aarch64/aarch64-sve-builtins-sve2.cc| 11 ++ gcc/config/aarch64/aarch64-sve-builtins-sve2.def | 5 + gcc/config/aarch64/aarch64-sve-builtins-sve2.h | 1 + gcc/config/aarch64/aarch64-sve-builtins.cc | 15 ++ gcc/config/aarch64/aarch64-sve2.md | 26 +++ gcc/config/aarch64/aarch64.h | 4 + gcc/config/aarch64/iterators.md| 15 +- gcc/doc/invoke.texi| 9 +- .../gcc.target/
[gcc r15-5509] aarch64: Add support for SME_B16B16
https://gcc.gnu.org/g:cdacb32bd5cd8e09f03a7df4339832f436d43a27 commit r15-5509-gcdacb32bd5cd8e09f03a7df4339832f436d43a27 Author: Richard Sandiford Date: Wed Nov 20 13:27:41 2024 + aarch64: Add support for SME_B16B16 This patch adds support for the SME_B16B16 extension. It follows similar lines to the SME_F16F16 extension added earlier. gcc/ * config/aarch64/aarch64-option-extensions.def (sme-b16b16): New extension. * doc/invoke.texi: Document it. * config/aarch64/aarch64.h (TARGET_STREAMING_SME_B16B16): New macro. * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Conditionally define __ARM_FEATURE_SME_B16B16. * config/aarch64/aarch64-sve-builtins-sme.def: Add SME_B16B16 forms of existing intrinsics. * config/aarch64/aarch64-sme.md (@aarch64_sme_) (*aarch64_sme__plus) (@aarch64_sme_) (*aarch64_sme__plus) (@aarch64_sme_single_) (*aarch64_sme_single__plus) (@aarch64_sme_lane_) (*aarch64_sme_lane_) (@aarch64_sme_): Extend to BF16 modes. * config/aarch64/aarch64-sve-builtins.cc (TYPES_za_h_bfloat): New type macro. * config/aarch64/iterators.md (SME_ZA_HSDFx24): Add BF16 modes. (SME_MOP_HSDF): Likewise. gcc/testsuite/ * lib/target-supports.exp: Test the assembler for sve-b16b16 support. * gcc.target/aarch64/pragma_cpp_predefs_4.c: Add tests for __ARM_FEATURE_SME_B16B16. * gcc.target/aarch64/sme2/acle-asm/add_za16_bf16_vg1x2.c: New test. * gcc.target/aarch64/sme2/acle-asm/add_za16_bf16_vg1x4.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mla_lane_za16_bf16_vg1x2.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mla_lane_za16_bf16_vg1x4.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mla_za16_bf16_vg1x2.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mla_za16_bf16_vg1x4.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mls_lane_za16_bf16_vg1x2.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mls_lane_za16_bf16_vg1x4.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mls_za16_bf16_vg1x2.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mls_za16_bf16_vg1x4.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mopa_za16_bf16.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/mops_za16_bf16.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/sub_za16_bf16_vg1x2.c: Likewise. * gcc.target/aarch64/sme2/acle-asm/sub_za16_bf16_vg1x4.c: Likewise. Diff: --- gcc/config/aarch64/aarch64-c.cc| 2 + gcc/config/aarch64/aarch64-option-extensions.def | 2 + gcc/config/aarch64/aarch64-sme.md | 20 ++- gcc/config/aarch64/aarch64-sve-builtins-sme.def| 15 ++ gcc/config/aarch64/aarch64-sve-builtins.cc | 5 + gcc/config/aarch64/aarch64.h | 4 + gcc/config/aarch64/iterators.md| 7 +- gcc/doc/invoke.texi| 3 + .../gcc.target/aarch64/pragma_cpp_predefs_4.c | 17 ++ .../aarch64/sme2/acle-asm/add_za16_bf16_vg1x2.c| 126 ++ .../aarch64/sme2/acle-asm/add_za16_bf16_vg1x4.c| 141 .../sme2/acle-asm/mla_lane_za16_bf16_vg1x2.c | 106 .../sme2/acle-asm/mla_lane_za16_bf16_vg1x4.c | 112 + .../aarch64/sme2/acle-asm/mla_za16_bf16_vg1x2.c| 184 + .../aarch64/sme2/acle-asm/mla_za16_bf16_vg1x4.c| 176 .../sme2/acle-asm/mls_lane_za16_bf16_vg1x2.c | 106 .../sme2/acle-asm/mls_lane_za16_bf16_vg1x4.c | 112 + .../aarch64/sme2/acle-asm/mls_za16_bf16_vg1x2.c| 184 + .../aarch64/sme2/acle-asm/mls_za16_bf16_vg1x4.c| 176 .../aarch64/sme2/acle-asm/mopa_za16_bf16.c | 34 .../aarch64/sme2/acle-asm/mops_za16_bf16.c | 34 .../aarch64/sme2/acle-asm/sub_za16_bf16_vg1x2.c| 126 ++ .../aarch64/sme2/acle-asm/sub_za16_bf16_vg1x4.c| 141 gcc/testsuite/lib/target-supports.exp | 2 +- 24 files changed, 1824 insertions(+), 11 deletions(-) diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-c.cc index db1a93b7e054..78224eaedfba 100644 --- a/gcc/config/aarch64/aarch64-c.cc +++ b/gcc/config/aarch64/aarch64-c.cc @@ -271,6 +271,8 @@ aarch64_update_cpp_builtins (cpp_reader *pfile) aarch64_def_or_undef (TARGET_SME, "__ARM_FEATURE_SME", pfile); aarch64_def_or_undef (TARGET_SME_I16I64, "__ARM_FEATURE_SME_I16I64", pfile); + aarch64_def_or_undef (AARCH64_HAVE_ISA (SME_B16B16), + "__ARM_FEATURE_SME_B16B16", pfile
[gcc r15-5505] aarch64: Rename some SME iterators
https://gcc.gnu.org/g:3e582f8c79793a9e583f208f1d8ca0368010302c
commit r15-5505-g3e582f8c79793a9e583f208f1d8ca0368010302c
Author: Richard Sandiford
Date: Wed Nov 20 13:27:39 2024 +
aarch64: Rename some SME iterators
This patch just renames the iterators SME_READ and SME_WRITE to
SME_READ_HV and SME_WRITE_HV, to distinguish them from other forms
of ZA read and write.
gcc/
* config/aarch64/iterators.md (SME_READ): Rename to...
(SME_READ_HV): ...this.
(SME_WRITE): Rename to...
(SME_WRITE_HV): ...this.
* config/aarch64/aarch64-sme.md: Update accordingly.
Diff:
---
gcc/config/aarch64/aarch64-sme.md | 20 ++--
gcc/config/aarch64/iterators.md | 4 ++--
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-sme.md
b/gcc/config/aarch64/aarch64-sme.md
index 088bdd8d869d..525ded44c99f 100644
--- a/gcc/config/aarch64/aarch64-sme.md
+++ b/gcc/config/aarch64/aarch64-sme.md
@@ -662,7 +662,7 @@
(match_operand: 2 "register_operand" "Upl")
(match_operand:DI 3 "const_int_operand")
(match_operand:SI 4 "register_operand" "Ucj")]
- SME_READ))]
+ SME_READ_HV))]
"TARGET_STREAMING"
"mova\t%0., %2/m, za%3.[%w4, 0]"
)
@@ -677,7 +677,7 @@
(match_operand:DI 3 "const_int_operand")
(plus:SI (match_operand:SI 4 "register_operand" "Ucj")
(match_operand:SI 5 "const_int_operand"))]
- SME_READ))]
+ SME_READ_HV))]
"TARGET_STREAMING
&& UINTVAL (operands[5]) < 128 / "
"mova\t%0., %2/m, za%3.[%w4, %5]"
@@ -692,7 +692,7 @@
(match_operand:VNx2BI 2 "register_operand" "Upl")
(match_operand:DI 3 "const_int_operand")
(match_operand:SI 4 "register_operand" "Ucj")]
- SME_READ))]
+ SME_READ_HV))]
"TARGET_STREAMING"
"mova\t%0.q, %2/m, za%3.q[%w4, 0]"
)
@@ -706,7 +706,7 @@
(match_operand:SI 1 "register_operand" "Ucj")
(match_operand: 2 "register_operand" "Upl")
(match_operand:SVE_FULL 3 "register_operand" "w")]
- SME_WRITE))]
+ SME_WRITE_HV))]
"TARGET_STREAMING"
"mova\tza%0.[%w1, 0], %2/m, %3."
)
@@ -721,7 +721,7 @@
(match_operand:SI 2 "const_int_operand"))
(match_operand: 3 "register_operand" "Upl")
(match_operand:SVE_FULL 4 "register_operand" "w")]
- SME_WRITE))]
+ SME_WRITE_HV))]
"TARGET_STREAMING
&& UINTVAL (operands[2]) < 128 / "
"mova\tza%0.[%w1, %2], %3/m, %4."
@@ -736,7 +736,7 @@
(match_operand:SI 1 "register_operand" "Ucj")
(match_operand:VNx2BI 2 "register_operand" "Upl")
(match_operand:SVE_FULL 3 "register_operand" "w")]
- SME_WRITE))]
+ SME_WRITE_HV))]
"TARGET_STREAMING"
"mova\tza%0.q[%w1, 0], %2/m, %3.q"
)
@@ -755,7 +755,7 @@
(reg:DI SME_STATE_REGNUM)
(match_operand:DI 1 "const_int_operand")
(match_operand:SI 2 "register_operand" "Ucj")]
- SME_READ))]
+ SME_READ_HV))]
"TARGET_STREAMING_SME2"
{
operands[3] = GEN_INT ( - 1);
@@ -772,7 +772,7 @@
(plus:SI
(match_operand:SI 2 "register_operand" "Ucj")
(match_operand:SI 3 "const_int_operand"))]
- SME_READ))]
+ SME_READ_HV))]
"TARGET_STREAMING_SME2
&& UINTVAL (operands[3]) % == 0
&& UINTVAL (operands[3]) < 128 / "
@@ -813,7 +813,7 @@
(match_operand:DI 0 "const_int_operand")
(match_operand:SI 1 "register_operand" "Ucj")
(match_operand:SVE_FULLx24 2 "aligned_register_operand"
"Uw")]
- SME_WRITE))]
+ SME_WRITE_HV))]
"TARGET_STREAMING_SME2"
{
operands[3] = GEN_INT ( - 1);
@@ -831,7 +831,7 @@
(match_operand:SI 1 "register_operand" "Ucj")
(match_operand:SI 2 "const_int_operand"))
(match_operand:SVE_FULLx24 3 "aligned_register_operand"
"Uw")]
- SME_WRITE))]
+ SME_WRITE_HV))]
"TARGET_STREAMING_SME2
&& UINTVAL (operands[2]) % == 0
&& UINTVAL (operands[2]) < 128 / "
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index 0137700d4890..415713773c94 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -3641,9 +3641,9 @@
(define_int_iterator UNSPEC_REVD_ONLY [UNSPEC_REVD])
(define_int_iterator SME_LD1 [UNSPEC_SME_LD1_HOR UNSPEC_SME_LD1_VER])
-(define_int_iterator SME_READ [UNSPEC_SME_READ_HOR UNSPEC_SME_READ_VER])
+(define_int_iterator SME_READ_HV [UNSPEC_SME_READ_HOR UNSPEC_SME_READ_VER])
(define_int_iterator SME_ST1 [UNSPEC_SME_ST1_HOR UNSPEC_SME_ST1_VER])
-(define_int_iterator SME_WRITE [UNSPEC_SME_WRITE_HOR UNSPEC_SME_WRITE_VER])
+(define_int_iterator SME_WRITE_HV [UNSPEC_SME_WRITE_HOR UNSPEC_SME_WRITE_VER])
(define_int_iterator SME_BINARY_SDI [UNSPEC_SME_ADDHA UNSPEC_SME_ADDVA])
[gcc r15-5496] tree-optimization/117574 - bougs niter lt-to-ne
https://gcc.gnu.org/g:ff5a14abeb31cd6bd0ca55e7043d05c8141a8c7f
commit r15-5496-gff5a14abeb31cd6bd0ca55e7043d05c8141a8c7f
Author: Richard Biener
Date: Fri Nov 15 11:56:14 2024 +0100
tree-optimization/117574 - bougs niter lt-to-ne
When trying to change a IV from IV0 < IV1 to IV0' != IV1' we apply
fancy adjustments to the may_be_zero condition we compute rather
than using the obvious IV0->base >= IV1->base expression (to be
able to use > instead of >=?). This doesn't seem to go well.
PR tree-optimization/117574
* tree-ssa-loop-niter.cc (number_of_iterations_lt_to_ne):
Use the obvious may_be_zero condition.
* gcc.dg/torture/pr117574-1.c: New testcase.
Diff:
---
gcc/testsuite/gcc.dg/torture/pr117574-1.c | 20
gcc/tree-ssa-loop-niter.cc| 31 +++
2 files changed, 27 insertions(+), 24 deletions(-)
diff --git a/gcc/testsuite/gcc.dg/torture/pr117574-1.c
b/gcc/testsuite/gcc.dg/torture/pr117574-1.c
new file mode 100644
index ..2e99cec13b65
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr117574-1.c
@@ -0,0 +1,20 @@
+/* { dg-do run } */
+
+void abort (void);
+int a, c;
+long b;
+short d;
+static long e(long f, long h, long i) {
+ for (long g = f; g <= h; g += i)
+b += g;
+ return b;
+}
+int main() {
+ c = 1;
+ for (; c >= 0; c--)
+;
+ for (; e(d + 40, d + 76, c + 51) < 4;)
+;
+ if (a != 0)
+abort ();
+}
diff --git a/gcc/tree-ssa-loop-niter.cc b/gcc/tree-ssa-loop-niter.cc
index 9518bf969cd6..1be4b5522066 100644
--- a/gcc/tree-ssa-loop-niter.cc
+++ b/gcc/tree-ssa-loop-niter.cc
@@ -1200,17 +1200,6 @@ number_of_iterations_lt_to_ne (tree type, affine_iv
*iv0, affine_iv *iv1,
if (integer_zerop (assumption))
return false;
}
- if (mpz_cmp (mmod, bnds->below) < 0)
- noloop = boolean_false_node;
- else if (POINTER_TYPE_P (type))
- noloop = fold_build2 (GT_EXPR, boolean_type_node,
- iv0->base,
- fold_build_pointer_plus (iv1->base, tmod));
- else
- noloop = fold_build2 (GT_EXPR, boolean_type_node,
- iv0->base,
- fold_build2 (PLUS_EXPR, type1,
- iv1->base, tmod));
}
else
{
@@ -1226,21 +1215,15 @@ number_of_iterations_lt_to_ne (tree type, affine_iv
*iv0, affine_iv *iv1,
if (integer_zerop (assumption))
return false;
}
- if (mpz_cmp (mmod, bnds->below) < 0)
- noloop = boolean_false_node;
- else if (POINTER_TYPE_P (type))
- noloop = fold_build2 (GT_EXPR, boolean_type_node,
- fold_build_pointer_plus (iv0->base,
- fold_build1 (NEGATE_EXPR,
- type1,
tmod)),
- iv1->base);
- else
- noloop = fold_build2 (GT_EXPR, boolean_type_node,
- fold_build2 (MINUS_EXPR, type1,
- iv0->base, tmod),
- iv1->base);
}
+ /* IV0 < IV1 does not loop if IV0->base >= IV1->base. */
+ if (mpz_cmp (mmod, bnds->below) < 0)
+noloop = boolean_false_node;
+ else
+noloop = fold_build2 (GE_EXPR, boolean_type_node,
+ iv0->base, iv1->base);
+
if (!integer_nonzerop (assumption))
niter->assumptions = fold_build2 (TRUTH_AND_EXPR, boolean_type_node,
niter->assumptions,
[gcc r15-5506] aarch64: Fix the choice of unspec in two SME patterns
https://gcc.gnu.org/g:164fbe01d59a56ab6eb381345fa1555263c854fa commit r15-5506-g164fbe01d59a56ab6eb381345fa1555263c854fa Author: Richard Sandiford Date: Wed Nov 20 13:27:40 2024 + aarch64: Fix the choice of unspec in two SME patterns @aarch64_sme_write and *aarch64_sme_write_plus were using UNSPEC_SME_READ instead of UNSPEC_SME_WRITE. gcc/ * config/aarch64/aarch64-sme.md (@aarch64_sme_write) (*aarch64_sme_write_plus): Use UNSPEC_SME_WRITE instead of UNSPEC_SME_READ. Diff: --- gcc/config/aarch64/aarch64-sme.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config/aarch64/aarch64-sme.md b/gcc/config/aarch64/aarch64-sme.md index 525ded44c99f..e8a24e0b2f6f 100644 --- a/gcc/config/aarch64/aarch64-sme.md +++ b/gcc/config/aarch64/aarch64-sme.md @@ -848,7 +848,7 @@ (reg:DI SME_STATE_REGNUM) (match_operand:SI 0 "register_operand" "Uci") (match_operand:SVE_DIx24 1 "aligned_register_operand" "Uw")] - UNSPEC_SME_READ))] + UNSPEC_SME_WRITE))] "TARGET_STREAMING_SME2" "mova\tza.d[%w0, 0, vgx], %1" ) @@ -861,7 +861,7 @@ (plus:SI (match_operand:SI 0 "register_operand" "Uci") (match_operand:SI 1 "const_0_to_7_operand")) (match_operand:SVE_DIx24 2 "aligned_register_operand" "Uw")] - UNSPEC_SME_READ))] + UNSPEC_SME_WRITE))] "TARGET_STREAMING_SME2" "mova\tza.d[%w0, %1, vgx], %2" )
[gcc r14-10948] [PATCH] modula2: fix xref fourth parameter in documentation, change from gm2 to m2
https://gcc.gnu.org/g:a6ee740ff3412baa85f7ec7a99da5d74d7a6a575
commit r14-10948-ga6ee740ff3412baa85f7ec7a99da5d74d7a6a575
Author: Gaius Mulley
Date: Wed Nov 20 08:14:10 2024 +
[PATCH] modula2: fix xref fourth parameter in documentation, change from
gm2 to m2
This patch corrects the gm2.texi xref for the modula-2 documentation.
gcc/ChangeLog:
* doc/gm2.texi: Replace all occurrences of xref {, , , gm2}
with xref {, , , m2}.
(cherry picked from commit 5833e5b8ef40367764325f4f3c80cfa129fbe1da)
Signed-off-by: Gaius Mulley
Diff:
---
gcc/doc/gm2.texi | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/gcc/doc/gm2.texi b/gcc/doc/gm2.texi
index 19b864573c12..14a9e2b1e3c5 100644
--- a/gcc/doc/gm2.texi
+++ b/gcc/doc/gm2.texi
@@ -291,7 +291,7 @@ This manual only documents the options specific to
@command{gm2}.
This section describes how to compile and link a simple hello world
program. It provides a few examples of using the different options
-mentioned in @pxref{Compiler options, , ,gm2}. Assuming that you have
+mentioned in @pxref{Compiler options, , ,m2}. Assuming that you have
a file called @file{hello.mod} in your current directory which
contains:
@@ -442,7 +442,7 @@ turn on ISO standard features. Currently this enables the
ISO
@code{SYSTEM} module and alters the default library search path so
that the ISO libraries are searched before the PIM libraries. It also
effects the behavior of @code{DIV} and @code{MOD} operators.
-@xref{Dialect, , ,gm2}.
+@xref{Dialect, , ,m2}.
@item -flibs=
modifies the default library search path. The libraries supplied are:
@@ -529,30 +529,30 @@ turn on PIM standard features. Currently this enables
the PIM
@code{SYSTEM} module and determines which identifiers are pervasive
(declared in the base module). If no other @samp{-fpim[234]} switch is
used then division and modulus operators behave as defined in PIM4.
-@xref{Dialect, , ,gm2}.
+@xref{Dialect, , ,m2}.
@item -fpim2
turn on PIM-2 standard features. Currently this removes @code{SIZE}
from being a pervasive identifier (declared in the base module). It
places @code{SIZE} in the @code{SYSTEM} module. It also effects the
behavior of @code{DIV} and @code{MOD} operators.
-@xref{Dialect, , ,gm2}.
+@xref{Dialect, , ,m2}.
@item -fpim3
turn on PIM-3 standard features. Currently this only effects the
behavior of @code{DIV} and @code{MOD} operators.
-@xref{Dialect, , ,gm2}.
+@xref{Dialect, , ,m2}.
@item -fpim4
turn on PIM-4 standard features. Currently this only effects the
behavior of @code{DIV} and @code{MOD} operators.
-@xref{Dialect, , ,gm2}.
+@xref{Dialect, , ,m2}.
@item -fpositive-mod-floor-div
forces the @code{DIV} and @code{MOD} operators to behave as defined by PIM4.
All modulus results are positive and the results from the division are
rounded to the floor.
-@xref{Dialect, , ,gm2}.
+@xref{Dialect, , ,m2}.
@item -fpthread
link against the pthread library. By default this option is on. It
@@ -847,8 +847,8 @@ LONGCOMPLEX complex long double
Note that GNU Modula-2 also supports fixed sized data types which are
exported from the @code{SYSTEM} module.
-@xref{The PIM system module, , ,gm2}.
-@xref{The ISO system module, , ,gm2}.
+@xref{The PIM system module, , ,m2}.
+@xref{The ISO system module, , ,m2}.
@node Standard procedures, High procedure function, Elementary data types,
Using
@section Permanently accessible base procedures.
@@ -1599,7 +1599,7 @@ This section introduces the GNU Modula-2 language
extensions.
The GNU Modula-2 compiler allows abstract data types to be any type,
not just restricted to a pointer type providing the
@samp{-fextended-opaque} option is supplied
-@xref{Compiler options, , ,gm2}.
+@xref{Compiler options, , ,m2}.
Declarations can be made in any order, whether they are
types, constants, procedures, nested modules or variables.
@@ -1800,8 +1800,8 @@ program module.
GNU Modula-2 also provides additional fixed sized data types which
are all exported from the @code{SYSTEM} module.
-@xref{The PIM system module, , ,gm2}.
-@xref{The ISO system module, , ,gm2}.
+@xref{The PIM system module, , ,m2}.
+@xref{The ISO system module, , ,m2}.
@node Type compatibility, Unbounded by reference, Extensions, Using
@section Type compatibility
@@ -2176,7 +2176,7 @@ $ python3 testnum.py
1234 x 2 = 2468
@end example
-@xref{Producing a Python module, , ,gm2} for another example which
+@xref{Producing a Python module, , ,m2} for another example which
uses the @code{UNQUALIFIED} keyword to reduce the module name clutter
from the viewport of Python3.
[gcc r14-10949] [PATCH] modula2: simplify xref usage in documentation, remove external ref to gm2.
https://gcc.gnu.org/g:83c51f98e726026bce717b7130f55f3bcfe303f2
commit r14-10949-g83c51f98e726026bce717b7130f55f3bcfe303f2
Author: Gaius Mulley
Date: Wed Nov 20 08:15:45 2024 +
[PATCH] modula2: simplify xref usage in documentation, remove external ref
to gm2.
This patch simplifies all the xref usage for gm2 nodes in the
modula-2 documentation.
gcc/ChangeLog:
* doc/gm2.texi: Replace all occurrences of xref
{foo, , , gm2} with xref {foo}.
(cherry picked from commit a209f219b862def8fed166b31984b8c6c3bb74a0)
Signed-off-by: Gaius Mulley
Diff:
---
gcc/doc/gm2.texi | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/gcc/doc/gm2.texi b/gcc/doc/gm2.texi
index 14a9e2b1e3c5..72b659bdde01 100644
--- a/gcc/doc/gm2.texi
+++ b/gcc/doc/gm2.texi
@@ -291,7 +291,7 @@ This manual only documents the options specific to
@command{gm2}.
This section describes how to compile and link a simple hello world
program. It provides a few examples of using the different options
-mentioned in @pxref{Compiler options, , ,m2}. Assuming that you have
+mentioned in @pxref{Compiler options}. Assuming that you have
a file called @file{hello.mod} in your current directory which
contains:
@@ -442,7 +442,7 @@ turn on ISO standard features. Currently this enables the
ISO
@code{SYSTEM} module and alters the default library search path so
that the ISO libraries are searched before the PIM libraries. It also
effects the behavior of @code{DIV} and @code{MOD} operators.
-@xref{Dialect, , ,m2}.
+@xref{Dialect}.
@item -flibs=
modifies the default library search path. The libraries supplied are:
@@ -529,30 +529,30 @@ turn on PIM standard features. Currently this enables
the PIM
@code{SYSTEM} module and determines which identifiers are pervasive
(declared in the base module). If no other @samp{-fpim[234]} switch is
used then division and modulus operators behave as defined in PIM4.
-@xref{Dialect, , ,m2}.
+@xref{Dialect}.
@item -fpim2
turn on PIM-2 standard features. Currently this removes @code{SIZE}
from being a pervasive identifier (declared in the base module). It
places @code{SIZE} in the @code{SYSTEM} module. It also effects the
behavior of @code{DIV} and @code{MOD} operators.
-@xref{Dialect, , ,m2}.
+@xref{Dialect}.
@item -fpim3
turn on PIM-3 standard features. Currently this only effects the
behavior of @code{DIV} and @code{MOD} operators.
-@xref{Dialect, , ,m2}.
+@xref{Dialect}.
@item -fpim4
turn on PIM-4 standard features. Currently this only effects the
behavior of @code{DIV} and @code{MOD} operators.
-@xref{Dialect, , ,m2}.
+@xref{Dialect}.
@item -fpositive-mod-floor-div
forces the @code{DIV} and @code{MOD} operators to behave as defined by PIM4.
All modulus results are positive and the results from the division are
rounded to the floor.
-@xref{Dialect, , ,m2}.
+@xref{Dialect}.
@item -fpthread
link against the pthread library. By default this option is on. It
@@ -847,8 +847,8 @@ LONGCOMPLEX complex long double
Note that GNU Modula-2 also supports fixed sized data types which are
exported from the @code{SYSTEM} module.
-@xref{The PIM system module, , ,m2}.
-@xref{The ISO system module, , ,m2}.
+@xref{The PIM system module}.
+@xref{The ISO system module}.
@node Standard procedures, High procedure function, Elementary data types,
Using
@section Permanently accessible base procedures.
@@ -1599,7 +1599,7 @@ This section introduces the GNU Modula-2 language
extensions.
The GNU Modula-2 compiler allows abstract data types to be any type,
not just restricted to a pointer type providing the
@samp{-fextended-opaque} option is supplied
-@xref{Compiler options, , ,m2}.
+@xref{Compiler options}.
Declarations can be made in any order, whether they are
types, constants, procedures, nested modules or variables.
@@ -1800,8 +1800,8 @@ program module.
GNU Modula-2 also provides additional fixed sized data types which
are all exported from the @code{SYSTEM} module.
-@xref{The PIM system module, , ,m2}.
-@xref{The ISO system module, , ,m2}.
+@xref{The PIM system module}.
+@xref{The ISO system module}.
@node Type compatibility, Unbounded by reference, Extensions, Using
@section Type compatibility
@@ -2176,7 +2176,7 @@ $ python3 testnum.py
1234 x 2 = 2468
@end example
-@xref{Producing a Python module, , ,m2} for another example which
+@xref{Producing a Python module} for another example which
uses the @code{UNQUALIFIED} keyword to reduce the module name clutter
from the viewport of Python3.
[gcc r15-5512] libgccjit: Add type checks in gcc_jit_block_add_assignment_op
https://gcc.gnu.org/g:efdc80a8bfea63433d8959e7913c9864208c630e
commit r15-5512-gefdc80a8bfea63433d8959e7913c9864208c630e
Author: Antoni Boucher
Date: Wed Oct 18 18:33:18 2023 -0400
libgccjit: Add type checks in gcc_jit_block_add_assignment_op
gcc/jit/ChangeLog:
* libgccjit.cc (RETURN_IF_FAIL_PRINTF3): New macro.
(gcc_jit_block_add_assignment_op): Add numeric checks.
gcc/testsuite/ChangeLog:
* jit.dg/test-error-bad-assignment-op.c: New test.
Diff:
---
gcc/jit/libgccjit.cc | 21
.../jit.dg/test-error-bad-assignment-op.c | 57 ++
2 files changed, 78 insertions(+)
diff --git a/gcc/jit/libgccjit.cc b/gcc/jit/libgccjit.cc
index 664180177fea..398a0ff2d35c 100644
--- a/gcc/jit/libgccjit.cc
+++ b/gcc/jit/libgccjit.cc
@@ -267,6 +267,16 @@ struct gcc_jit_extended_asm : public
gcc::jit::recording::extended_asm
}\
JIT_END_STMT
+#define RETURN_IF_FAIL_PRINTF3(TEST_EXPR, CTXT, LOC, ERR_FMT, A0, A1, A2) \
+ JIT_BEGIN_STMT \
+if (!(TEST_EXPR)) \
+ {\
+ jit_error ((CTXT), (LOC), "%s: " ERR_FMT, \
+ __func__, (A0), (A1), (A2)); \
+ return; \
+ }\
+ JIT_END_STMT
+
#define RETURN_IF_FAIL_PRINTF4(TEST_EXPR, CTXT, LOC, ERR_FMT, A0, A1, A2, A3) \
JIT_BEGIN_STMT \
if (!(TEST_EXPR)) \
@@ -2984,6 +2994,17 @@ gcc_jit_block_add_assignment_op (gcc_jit_block *block,
lvalue->get_type ()->get_debug_string (),
rvalue->get_debug_string (),
rvalue->get_type ()->get_debug_string ());
+ // TODO: check if it is a numeric vector?
+ RETURN_IF_FAIL_PRINTF3 (
+lvalue->get_type ()->is_numeric (), ctxt, loc,
+"gcc_jit_block_add_assignment_op %s has non-numeric lvalue %s (type: %s)",
+gcc::jit::binary_op_reproducer_strings[op],
+lvalue->get_debug_string (), lvalue->get_type ()->get_debug_string ());
+ RETURN_IF_FAIL_PRINTF3 (
+rvalue->get_type ()->is_numeric (), ctxt, loc,
+"gcc_jit_block_add_assignment_op %s has non-numeric rvalue %s (type: %s)",
+gcc::jit::binary_op_reproducer_strings[op],
+rvalue->get_debug_string (), rvalue->get_type ()->get_debug_string ());
gcc::jit::recording::statement *stmt = block->add_assignment_op (loc,
lvalue, op, rvalue);
diff --git a/gcc/testsuite/jit.dg/test-error-bad-assignment-op.c
b/gcc/testsuite/jit.dg/test-error-bad-assignment-op.c
new file mode 100644
index ..683ebbfb1fed
--- /dev/null
+++ b/gcc/testsuite/jit.dg/test-error-bad-assignment-op.c
@@ -0,0 +1,57 @@
+#include
+#include
+
+#include "libgccjit.h"
+
+#include "harness.h"
+
+void
+create_code (gcc_jit_context *ctxt, void *user_data)
+{
+ /* Let's try to inject the equivalent of:
+
+ void
+ test_fn ()
+ {
+const char *variable;
+variable += "test";
+ }
+
+ and verify that the API complains about the mismatching types
+ in the assignments.
+ */
+ gcc_jit_type *void_type =
+gcc_jit_context_get_type (ctxt, GCC_JIT_TYPE_VOID);
+ gcc_jit_type *const_char_ptr_type =
+gcc_jit_context_get_type (ctxt, GCC_JIT_TYPE_CONST_CHAR_PTR);
+
+ gcc_jit_function *func =
+gcc_jit_context_new_function (ctxt, NULL,
+ GCC_JIT_FUNCTION_EXPORTED,
+ void_type,
+ "test_fn",
+ 0, NULL,
+ 0);
+
+ gcc_jit_lvalue *variable = gcc_jit_function_new_local (func, NULL,
const_char_ptr_type, "variable");
+ gcc_jit_block *initial =
+gcc_jit_function_new_block (func, "initial");
+ gcc_jit_rvalue *string =
+gcc_jit_context_new_string_literal (ctxt, "test");
+ gcc_jit_block_add_assignment_op (initial, NULL, variable,
GCC_JIT_BINARY_OP_PLUS, string);
+
+ gcc_jit_block_end_with_void_return (initial, NULL);
+}
+
+void
+verify_code (gcc_jit_context *ctxt, gcc_jit_result *result)
+{
+ CHECK_VALUE (result, NULL);
+
+ /* Verify that the correct error messages were emitted. */
+ CHECK_STRING_VALUE (gcc_jit_context_get_first_error (ctxt),
+ "gcc_jit_block_add_assignment_op:"
+ " gcc_jit_block_add_assignment_op GCC_JIT_BINARY_OP_PLUS"
+ " has non-numeric lvalue variable (type: const char *)");
+}
+
[gcc r15-5504] aarch64: Refactor SVE predicated-to-unpredicated splits
https://gcc.gnu.org/g:338121378003260ace30295f47e17b74aa5b7d17 commit r15-5504-g338121378003260ace30295f47e17b74aa5b7d17 Author: Richard Sandiford Date: Wed Nov 20 13:27:39 2024 + aarch64: Refactor SVE predicated-to-unpredicated splits There are separate patterns for predicated FADD, FSUB, and FMUL. Previously they each had their own in-built split to convert the instruction to unpredicated form where appropriate. However, it's more convenient for later patches if we use a single separate split instead. gcc/ * config/aarch64/iterators.md (SVE_COND_FP): New code attribute. * config/aarch64/aarch64-sve.md: Use a single define_split to handle the conversion of predicated FADD, FSUB, and FMUL into unpredicated forms. Diff: --- gcc/config/aarch64/aarch64-sve.md | 47 +-- gcc/config/aarch64/iterators.md | 6 + 2 files changed, 27 insertions(+), 26 deletions(-) diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index 7a48f900fa52..64ff0a86cd48 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -5310,9 +5310,25 @@ ;; - FSUB ;; - +;; Split a predicated instruction whose predicate is unused into an +;; unpredicated instruction. +(define_split + [(set (match_operand:SVE_FULL_F 0 "register_operand") + (unspec:SVE_FULL_F + [(match_operand: 1 "register_operand") + (match_operand:SI 4 "aarch64_sve_gp_strictness") + (match_operand:SVE_FULL_F 2 "register_operand") + (match_operand:SVE_FULL_F 3 "register_operand")] + ))] + "TARGET_SVE + && reload_completed + && INTVAL (operands[4]) == SVE_RELAXED_GP" + [(set (match_dup 0) + (SVE_UNPRED_FP_BINARY:SVE_FULL_F (match_dup 2) (match_dup 3)))] +) + ;; Unpredicated floating-point binary operations (post-RA only). -;; These are generated by splitting a predicated instruction whose -;; predicate is unused. +;; These are generated by the split above. (define_insn "*post_ra_3" [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w") (SVE_UNPRED_FP_BINARY:SVE_FULL_F @@ -5678,7 +5694,7 @@ ;; - ;; Predicated floating-point addition. -(define_insn_and_split "@aarch64_pred_" +(define_insn "@aarch64_pred_" [(set (match_operand:SVE_FULL_F 0 "register_operand") (unspec:SVE_FULL_F [(match_operand: 1 "register_operand") @@ -5696,13 +5712,6 @@ [ ?&w , Upl , w , vsN , i ; yes] movprfx\t%0, %2\;fsub\t%0., %1/m, %0., #%N3 [ ?&w , Upl , w , w , Ui1 ; yes] movprfx\t%0, %2\;fadd\t%0., %1/m, %0., %3. } - ; Split the unpredicated form after reload, so that we don't have - ; the unnecessary PTRUE. - "&& reload_completed - && register_operand (operands[3], mode) - && INTVAL (operands[4]) == SVE_RELAXED_GP" - [(set (match_dup 0) (plus:SVE_FULL_F (match_dup 2) (match_dup 3)))] - "" ) ;; Predicated floating-point addition of a constant, merging with the @@ -6001,7 +6010,7 @@ ;; - ;; Predicated floating-point subtraction. -(define_insn_and_split "@aarch64_pred_" +(define_insn "@aarch64_pred_" [(set (match_operand:SVE_FULL_F 0 "register_operand") (unspec:SVE_FULL_F [(match_operand: 1 "register_operand") @@ -6018,13 +6027,6 @@ [ ?&w , Upl , vsA , w , i ; yes] movprfx\t%0, %3\;fsubr\t%0., %1/m, %0., #%2 [ ?&w , Upl , w , w , Ui1 ; yes] movprfx\t%0, %2\;fsub\t%0., %1/m, %0., %3. } - ; Split the unpredicated form after reload, so that we don't have - ; the unnecessary PTRUE. - "&& reload_completed - && register_operand (operands[2], mode) - && INTVAL (operands[4]) == SVE_RELAXED_GP" - [(set (match_dup 0) (minus:SVE_FULL_F (match_dup 2) (match_dup 3)))] - "" ) ;; Predicated floating-point subtraction from a constant, merging with the @@ -6430,7 +6432,7 @@ ;; - ;; Predicated floating-point multiplication. -(define_insn_and_split "@aarch64_pred_" +(define_insn "@aarch64_pred_" [(set (match_operand:SVE_FULL_F 0 "register_operand") (unspec:SVE_FULL_F [(match_operand: 1 "register_operand") @@ -6446,13 +6448,6 @@ [ ?&w , Upl , w , vsM , i ; yes] movprfx\t%0, %2\;fmul\t%0., %1/m, %0., #%3 [ ?&w , Upl , w , w , Ui1 ; yes] movprfx\t%0, %2\;fmul\t%0., %1/m, %0., %3. } - ; Split the unpredicated form after reload, so that we don't have - ; the unnecessary PTRUE. - "&& reload_completed - && register_operand (operands[3], mode) - && INTVAL (operands[4]) == SVE_RELAXED_GP" - [(set (mat
[gcc r15-5514] libgccjit: Fix float playback for cross-compilation
https://gcc.gnu.org/g:fa720364e4ed3154b7f2dd8f4c2c71f890990552
commit r15-5514-gfa720364e4ed3154b7f2dd8f4c2c71f890990552
Author: Antoni Boucher
Date: Sat Oct 21 11:20:46 2023 -0400
libgccjit: Fix float playback for cross-compilation
gcc/jit/ChangeLog:
PR jit/113343
* jit-playback.cc (new_rvalue_from_const): Fix to have the
correct value when cross-compiling.
Diff:
---
gcc/jit/jit-playback.cc | 21 -
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/gcc/jit/jit-playback.cc b/gcc/jit/jit-playback.cc
index e32e837f2fea..88513a6ba70d 100644
--- a/gcc/jit/jit-playback.cc
+++ b/gcc/jit/jit-playback.cc
@@ -43,6 +43,7 @@ along with GCC; see the file COPYING3. If not see
#include "gcc.h"
#include "diagnostic.h"
#include "stmt.h"
+#include "realmpfr.h"
#include "jit-playback.h"
#include "jit-result.h"
@@ -1078,22 +1079,16 @@ new_rvalue_from_const (type *type,
// FIXME: type-checking, or coercion?
tree inner_type = type->as_tree ();
+ mpfr_t mpf_value;
+
+ mpfr_init2 (mpf_value, 64);
+ mpfr_set_d (mpf_value, value, MPFR_RNDN);
+
/* We have a "double", we want a REAL_VALUE_TYPE.
- real.cc:real_from_target appears to require the representation to be
- split into 32-bit values, and then sent as an pair of host long
- ints. */
+ realmpfr.cc:real_from_mpfr. */
REAL_VALUE_TYPE real_value;
- union
- {
-double as_double;
-uint32_t as_uint32s[2];
- } u;
- u.as_double = value;
- long int as_long_ints[2];
- as_long_ints[0] = u.as_uint32s[0];
- as_long_ints[1] = u.as_uint32s[1];
- real_from_target (&real_value, as_long_ints, DFmode);
+ real_from_mpfr (&real_value, mpf_value, inner_type, MPFR_RNDN);
tree inner = build_real (inner_type, real_value);
return new rvalue (this, inner);
}
[gcc r14-10953] diagnostics: fixes to SARIF output [PR109360]
https://gcc.gnu.org/g:07485ccd31935b1f82d321f91c677840bd05247c
commit r14-10953-g07485ccd31935b1f82d321f91c677840bd05247c
Author: David Malcolm
Date: Fri Jun 21 08:46:13 2024 -0400
diagnostics: fixes to SARIF output [PR109360]
When adding validation of .sarif files against the schema
(PR testsuite/109360) I discovered various issues where we were
generating invalid .sarif files.
Specifically, in
c-c++-common/diagnostic-format-sarif-file-bad-utf8-pr109098-1.c
the relatedLocations for the "note" diagnostics were missing column
numbers, leading to validation failure due to non-unique elements,
such as multiple:
"message": {"text": "invalid UTF-8 character "}},
on line 25 with no column information.
Root cause is that for some diagnostics in libcpp we have a location_t
representing the line as a whole, setting a column_override on the
rich_location (since the line hasn't been fully read yet). We were
handling this column override for plain text output, but not for .sarif
output.
Similarly, in diagnostic-format-sarif-file-pr111700.c there is a warning
emitted on "line 0" of the file, whereas SARIF requires line numbers to
be positive.
We also use column == 0 internally to mean "the line as a whole",
whereas SARIF required column numbers to be positive.
This patch fixes these various issues.
gcc/ChangeLog:
PR testsuite/109360
* diagnostic-format-sarif.cc
(sarif_builder::make_location_object): Pass any column override
from rich_loc to maybe_make_physical_location_object.
(sarif_builder::maybe_make_physical_location_object): Add
"column_override" param and pass it to maybe_make_region_object.
(sarif_builder::maybe_make_region_object): Add "column_override"
param and use it when the location has 0 for a column. Don't
add "startLine", "startColumn", "endLine", or "endColumn" if
the values aren't positive.
(sarif_builder::maybe_make_region_object_for_context): Don't
add "startLine" or "endLine" if the values aren't positive.
libcpp/ChangeLog:
PR testsuite/109360
* include/rich-location.h (rich_location::get_column_override):
New accessor.
Signed-off-by: David Malcolm
(cherry picked from commit 9f4fdc3acebcf6b045edea1361570658da4bc0ab)
Diff:
---
gcc/diagnostic-format-sarif.cc | 79 ++
libcpp/include/rich-location.h | 2 ++
2 files changed, 59 insertions(+), 22 deletions(-)
diff --git a/gcc/diagnostic-format-sarif.cc b/gcc/diagnostic-format-sarif.cc
index 97c5943cd339..d27614d6c87b 100644
--- a/gcc/diagnostic-format-sarif.cc
+++ b/gcc/diagnostic-format-sarif.cc
@@ -189,11 +189,14 @@ private:
make_thread_flow_location_object (const diagnostic_event &event,
int path_event_idx);
json::array *maybe_make_kinds_array (diagnostic_event::meaning m) const;
- json::object *maybe_make_physical_location_object (location_t loc);
+ json::object *
+ maybe_make_physical_location_object (location_t loc,
+ int column_override);
json::object *make_artifact_location_object (location_t loc);
json::object *make_artifact_location_object (const char *filename);
json::object *make_artifact_location_object_for_pwd () const;
- json::object *maybe_make_region_object (location_t loc) const;
+ json::object *maybe_make_region_object (location_t loc,
+ int column_override) const;
json::object *maybe_make_region_object_for_context (location_t loc) const;
json::object *make_region_object_for_hint (const fixit_hint &hint) const;
json::object *make_multiformat_message_string (const char *msg) const;
@@ -771,7 +774,9 @@ sarif_builder::make_location_object (const rich_location
&rich_loc,
location_t loc = rich_loc.get_loc ();
/* "physicalLocation" property (SARIF v2.1.0 section 3.28.3). */
- if (json::object *phs_loc_obj = maybe_make_physical_location_object (loc))
+ if (json::object *phs_loc_obj
+ = maybe_make_physical_location_object (loc,
+ rich_loc.get_column_override ()))
location_obj->set ("physicalLocation", phs_loc_obj);
/* "logicalLocations" property (SARIF v2.1.0 section 3.28.4). */
@@ -790,7 +795,8 @@ sarif_builder::make_location_object (const diagnostic_event
&event)
/* "physicalLocation" property (SARIF v2.1.0 section 3.28.3). */
location_t loc = event.get_location ();
- if (json::object *phs_loc_obj = maybe_make_physical_location_object (loc))
+ if (json::object *phs_loc_obj
+ = maybe_make_physical_location_object (loc, 0))
location_obj->set ("physicalLocation", phs_loc_obj);
/* "logicalLocations" property (SARIF v2.1.0
[gcc r15-5511] libgccjit: Support signed char flag
https://gcc.gnu.org/g:04b67ac1e8ae4e918a804197dfff8e69b0ccf955
commit r15-5511-g04b67ac1e8ae4e918a804197dfff8e69b0ccf955
Author: Antoni Boucher
Date: Mon Oct 3 19:11:39 2022 -0400
libgccjit: Support signed char flag
gcc/jit/ChangeLog:
* dummy-frontend.cc (jit_langhook_init): Send flag_signed_char
argument to build_common_tree_nodes.
gcc/testsuite/ChangeLog:
* jit.dg/all-non-failing-tests.h: Add test-signed-char.c.
* jit.dg/test-signed-char.c: New test.
Diff:
---
gcc/jit/dummy-frontend.cc| 2 +-
gcc/testsuite/jit.dg/all-non-failing-tests.h | 10 ++
gcc/testsuite/jit.dg/test-signed-char.c | 52
3 files changed, 63 insertions(+), 1 deletion(-)
diff --git a/gcc/jit/dummy-frontend.cc b/gcc/jit/dummy-frontend.cc
index 35475b5ad05d..327e8de4f94a 100644
--- a/gcc/jit/dummy-frontend.cc
+++ b/gcc/jit/dummy-frontend.cc
@@ -1077,7 +1077,7 @@ jit_langhook_init (void)
*gcc::jit::active_playback_ctxt);
global_dc->set_output_format (std::move (sink));
- build_common_tree_nodes (false);
+ build_common_tree_nodes (flag_signed_char);
build_common_builtin_nodes ();
diff --git a/gcc/testsuite/jit.dg/all-non-failing-tests.h
b/gcc/testsuite/jit.dg/all-non-failing-tests.h
index 32ca70da4374..7b8cf624bbaa 100644
--- a/gcc/testsuite/jit.dg/all-non-failing-tests.h
+++ b/gcc/testsuite/jit.dg/all-non-failing-tests.h
@@ -373,6 +373,13 @@
/* test-setting-alignment.c: This can't be in the testcases array as it
is target-specific. */
+/* test-signed-char.c */
+#define create_code create_code_signed_char
+#define verify_code verify_code_signed_char
+#include "test-signed-char.c"
+#undef create_code
+#undef verify_code
+
/* test-sizeof.c */
#define create_code create_code_sizeof
#define verify_code verify_code_sizeof
@@ -586,6 +593,9 @@ const struct testcase testcases[] = {
{"reflection",
create_code_reflection ,
verify_code_reflection },
+ {"signed-char",
+ create_code_signed_char,
+ verify_code_signed_char},
{"sizeof",
create_code_sizeof,
verify_code_sizeof},
diff --git a/gcc/testsuite/jit.dg/test-signed-char.c
b/gcc/testsuite/jit.dg/test-signed-char.c
new file mode 100644
index ..c12b41d92cc3
--- /dev/null
+++ b/gcc/testsuite/jit.dg/test-signed-char.c
@@ -0,0 +1,52 @@
+#include
+#include
+#include
+
+#include "libgccjit.h"
+
+#include "harness.h"
+
+void
+create_code (gcc_jit_context *ctxt, void *user_data)
+{
+ /* Let's try to inject the equivalent of:
+int test_signed_char ()
+{
+char val = -2;
+return (int) val;
+}
+*/
+ gcc_jit_type *char_type =
+gcc_jit_context_get_type (ctxt, GCC_JIT_TYPE_CHAR);
+ gcc_jit_type *int_type =
+gcc_jit_context_get_type (ctxt, GCC_JIT_TYPE_INT);
+
+ gcc_jit_function *test_fn =
+gcc_jit_context_new_function (ctxt, NULL,
+ GCC_JIT_FUNCTION_EXPORTED,
+ int_type,
+ "test_signed_char",
+ 0, NULL,
+ 0);
+
+ gcc_jit_block *block = gcc_jit_function_new_block(test_fn, "entry");
+
+ gcc_jit_rvalue *val = gcc_jit_context_new_rvalue_from_int (ctxt,
+char_type, -2);
+ gcc_jit_rvalue *return_value = gcc_jit_context_new_cast (
+ctxt, NULL, val, int_type);
+
+ gcc_jit_block_end_with_return (block, NULL, return_value);
+}
+
+void
+verify_code (gcc_jit_context *ctxt, gcc_jit_result *result)
+{
+ CHECK_NON_NULL (result);
+
+ typedef int (*fn_type) ();
+ fn_type test_signed_char =
+(fn_type)gcc_jit_result_get_code (result, "test_signed_char");
+ CHECK_NON_NULL (test_signed_char);
+ CHECK_VALUE (test_signed_char (), -2);
+}
[gcc r15-5463] fortran: Inline MINLOC/MAXLOC with DIM and scalar MASK [PR90608]
https://gcc.gnu.org/g:f74f52642fc0bd6b4c6828bd6e86aa5bb206cbca
commit r15-5463-gf74f52642fc0bd6b4c6828bd6e86aa5bb206cbca
Author: Mikael Morin
Date: Tue Nov 19 17:31:25 2024 +0100
fortran: Inline MINLOC/MAXLOC with DIM and scalar MASK [PR90608]
Enable the generation of inline code for MINLOC/MAXLOC when argument
ARRAY is of integral type and has rank > 1, DIM is a constant, and MASK is
scalar (only absent MASK or rank 1 ARRAY were inlined before).
Scalar masks are implemented with a wrapping condition around the code
one would generate if MASK wasn't present, so they are easy to support
once inline code without MASK is working.
With this change, there are both expressions evaluated inside the nested
loop (ARRAY, and in the future MASK if non-scalar) and expressions evaluated
outside of it (MASK if scalar). For both one has to advance the
scalarization chain passed as argument SE to gfc_conv_intrinsic_minmaxloc as
they are evaluated, but for expressions evaluated from within the nested
loop one has to advance additionally the nested scalarization chain of the
reduction loop. This is normally handled transparently through the
inheritance that is defined when initializing gfc_se structs, but there has
to be some variable to inherit from, and there is a single one, SE. This
variable is kept as base for out of nested loop expressions only (i.e. for
scalar MASK), and this change introduces a new variable to hold the current
advance of the nested loop scalarization chain and serve as inheritance base
to evaluate nested loop expressions (just ARRAY for now, additionally
non-scalar MASK later).
PR fortran/90608
gcc/fortran/ChangeLog:
* trans-intrinsic.cc (gfc_inline_intrinsic_function_p): Return TRUE
if MASK is scalar.
(walk_inline_intrinsic_minmaxloc): Append to the scalarization chain
a scalar element for MASK if it's present.
(gfc_conv_intrinsic_minmaxloc): Use a local gfc_se struct to serve
as base for all the expressions evaluated in the nested loop. To
evaluate MASK when there is a nested loop, enable usage of the
scalarizer and set the original passed in SE argument as current
scalarization chain element to use. And use the nested loop from
the scalarizer instead of the local loop in that case.
gcc/testsuite/ChangeLog:
* gfortran.dg/maxloc_bounds_8.f90: Accept the error message
generated by the scalarizer in case the MAXLOC intrinsic call is
implemented through inline code.
* gfortran.dg/minmaxloc_20.f90: New test.
Diff:
---
gcc/fortran/trans-intrinsic.cc| 35 +++--
gcc/testsuite/gfortran.dg/maxloc_bounds_8.f90 | 4 +-
gcc/testsuite/gfortran.dg/minmaxloc_20.f90| 182 ++
3 files changed, 209 insertions(+), 12 deletions(-)
diff --git a/gcc/fortran/trans-intrinsic.cc b/gcc/fortran/trans-intrinsic.cc
index aab642f1797a..6a47c2305110 100644
--- a/gcc/fortran/trans-intrinsic.cc
+++ b/gcc/fortran/trans-intrinsic.cc
@@ -5480,6 +5480,7 @@ gfc_conv_intrinsic_minmaxloc (gfc_se * se, gfc_expr *
expr, enum tree_code op)
gfc_ss *maskss = nullptr;
gfc_se arrayse;
gfc_se maskse;
+ gfc_se nested_se;
gfc_se *base_se;
gfc_expr *arrayexpr;
gfc_expr *maskexpr;
@@ -5617,7 +5618,10 @@ gfc_conv_intrinsic_minmaxloc (gfc_se * se, gfc_expr *
expr, enum tree_code op)
gfc_add_block_to_block (&se->pre, &backse.post);
if (nested_loop)
-base_se = se;
+{
+ gfc_init_se (&nested_se, se);
+ base_se = &nested_se;
+}
else
{
/* Walk the arguments. */
@@ -5707,7 +5711,7 @@ gfc_conv_intrinsic_minmaxloc (gfc_se * se, gfc_expr *
expr, enum tree_code op)
if (nested_loop)
{
- ploop = enter_nested_loop (se);
+ ploop = enter_nested_loop (&nested_se);
ploop->temp_dim = 1;
}
else
@@ -6064,21 +6068,19 @@ gfc_conv_intrinsic_minmaxloc (gfc_se * se, gfc_expr *
expr, enum tree_code op)
{
tree ifmask;
- gcc_assert (!nested_loop);
-
- gfc_init_se (&maskse, NULL);
+ gfc_init_se (&maskse, nested_loop ? se : nullptr);
gfc_conv_expr_val (&maskse, maskexpr);
gfc_add_block_to_block (&se->pre, &maskse.pre);
gfc_init_block (&block);
- gfc_add_block_to_block (&block, &loop.pre);
- gfc_add_block_to_block (&block, &loop.post);
+ gfc_add_block_to_block (&block, &ploop->pre);
+ gfc_add_block_to_block (&block, &ploop->post);
tmp = gfc_finish_block (&block);
/* For the else part of the scalar mask, just initialize
the pos variable the same way as above. */
gfc_init_block (&elseblock);
- for (int i = 0; i < loop.dimen; i++)
+ for (int i = 0; i < ploop->dimen; i++)
gfc_add_modify (&elseblock,
[gcc r14-10951] testsuite: fix analyzer C++ failures on Solaris [PR111475]
https://gcc.gnu.org/g:156051d083d91f31caf15a70f2d85d65fde3ff08 commit r14-10951-g156051d083d91f31caf15a70f2d85d65fde3ff08 Author: David Malcolm Date: Fri May 3 09:05:29 2024 -0400 testsuite: fix analyzer C++ failures on Solaris [PR111475] As part of PR analyzer/96395, these patches moved testcases from gcc.dg/analyzer to c-c++-common/analyzer: - r14-3503-g55f6a7d949abc7 - r14-3823-g50b5199cff6908 - r14-6564-gae034b9106fbdd Unfortunately this led to numerous g++ testsuite failures on Solaris, tracked as PR analyzer/111475. Almost all of the failures are due to standard library differences where including a C standard library on C++ e.g. leads to the plain symbols referencing the symbols "std::" via a "using" declaration, whereas I had written the code expecting them to use symbols in the root namespace. The analyzer has special-case handling of many functions by name. This patch generalizes such handling to also match against functions in "std::" for all of the cases I found in the testsuite (via manual inspection of the preprocessed test cases against Solaris headers). This fixes cases where the analyzer was failing to "know about" the behavior of such functions. Other such failures are due to "std::" prefixes appearing in names of functions in the output, leading to mismatches against expected output. The patch adds regexes to some cases, and moves some other cases back from c-c++-common to gcc.dg where the dg-multiline syntax isn't expressive enough. Various "fd-*.c" failures relate to Solaris's socket-handling functions not being marked with "noexcept", where due to PR analyzer/97111 we mishandle the exception-handling edges in the CFG, leading to leak false positives. The patch works around this by adding -fno-exceptions to these cases, pending a proper fix for PR analyzer/97111. gcc/analyzer/ChangeLog: PR analyzer/111475 * analyzer.cc (is_special_named_call_p): Add "look_in_std" param. (is_std_function_p): Make non-static. * analyzer.h (is_special_named_call_p): Add optional "look_in_std" param. (is_std_function_p): New decl. * engine.cc (stmt_requires_new_enode_p): Look for both "signal" and "std::signal". * kf.cc (register_known_functions): Add various "std::" copies of the known functions. * known-function-manager.cc (known_function_manager::~known_function_manager): Clean up m_std_ns_map_id_to_kf. (known_function_manager::add_std_ns): New. (known_function_manager::get_match): Also look for known "std::" functions. (known_function_manager::get_by_identifier_in_std_ns): New. * known-function-manager.h (known_function_manager::add_std_ns): New decl. (known_function_manager::get_by_identifier_in_std_ns): New decl. (known_function_manager::m_std_ns_map_id_to_kf): New field. * sm-file.cc (register_known_file_functions): Add various "std::" copies of the known functions. * sm-malloc.cc (malloc_state_machine::on_stmt): Handle "std::realloc". * sm-signal.cc (signal_unsafe_p): Consider "std::" copies of the functions as also being async-signal-unsafe. (signal_state_machine::on_stmt): Consider "std::signal". gcc/testsuite/ChangeLog: PR analyzer/111475 * c-c++-common/analyzer/fd-glibc-byte-stream-socket.c: Add -fno-exceptions for now. * c-c++-common/analyzer/fd-manpage-getaddrinfo-client.c: Likewise. * c-c++-common/analyzer/fd-mappage-getaddrinfo-server.c: Rename to... * c-c++-common/analyzer/fd-manpage-getaddrinfo-server.c: ...this, and add -fno-exceptions for now. * c-c++-common/analyzer/fd-socket-meaning.c: Add -fno-exceptions for now. * c-c++-common/analyzer/fd-symbolic-socket.c: Likewise. * c-c++-common/analyzer/flexible-array-member-1.c: Use regexp to handle C vs C++ differences in spelling of function name, which could have a "std::" prefix on some targets. * c-c++-common/analyzer/pr106539.c: Likewise. * c-c++-common/analyzer/malloc-ipa-8-unchecked.c: Move back to... * gcc.dg/analyzer/malloc-ipa-8-unchecked.c: ...here, dropping attempt to generalize output for C vs C++. * c-c++-common/analyzer/signal-4a.c: Move back to... * gcc.dg/analyzer/signal-4a.c: ...here, dropping attempt to generalize output for C vs C++. * c-c++-common/analyzer/signal-4b.c: Move back to... * gcc.dg/analyzer/signal-4b.c: ...here, dropping attempt to generaliz
[gcc r14-10956] analyzer: handle at -O0 [PR115724]
https://gcc.gnu.org/g:0f26f4f76961cdc7ebf7f07bec0b370fd1a04972
commit r14-10956-g0f26f4f76961cdc7ebf7f07bec0b370fd1a04972
Author: David Malcolm
Date: Thu Jul 4 14:44:51 2024 -0400
analyzer: handle at -O0 [PR115724]
At -O0, glibc's:
__extern_always_inline void
error (int __status, int __errnum, const char *__format, ...)
{
if (__builtin_constant_p (__status) && __status != 0)
__error_noreturn (__status, __errnum, __format, __builtin_va_arg_pack
());
else
__error_alias (__status, __errnum, __format, __builtin_va_arg_pack ());
}
becomes just:
__extern_always_inline void
error (int __status, int __errnum, const char *__format, ...)
{
if (0)
__error_noreturn (__status, __errnum, __format, __builtin_va_arg_pack
());
else
__error_alias (__status, __errnum, __format, __builtin_va_arg_pack ());
}
and thus calls to "error" are calls to "__error_alias" by the
time -fanalyzer "sees" them.
Handle them with more special-casing in kf.cc.
gcc/analyzer/ChangeLog:
PR analyzer/115724
* kf.cc (register_known_functions): Add __error_alias and
__error_at_line_alias.
gcc/testsuite/ChangeLog:
PR analyzer/115724
* c-c++-common/analyzer/error-pr115724.c: New test.
Signed-off-by: David Malcolm
(cherry picked from commit a6fdb1a2a2906103afd70fa68cf7c45e896b8fbb)
Diff:
---
gcc/analyzer/kf.cc | 4 +
.../c-c++-common/analyzer/error-pr115724.c | 86 ++
2 files changed, 90 insertions(+)
diff --git a/gcc/analyzer/kf.cc b/gcc/analyzer/kf.cc
index c60e220dd1b9..e47786d0bcbf 100644
--- a/gcc/analyzer/kf.cc
+++ b/gcc/analyzer/kf.cc
@@ -2324,6 +2324,10 @@ register_known_functions (known_function_manager &kfm,
kfm.add ("__errno_location", make_unique ());
kfm.add ("error", make_unique (3));
kfm.add ("error_at_line", make_unique (5));
+/* Variants of "error" and "error_at_line" seen by the
+ analyzer at -O0 (PR analyzer/115724). */
+kfm.add ("__error_alias", make_unique (3));
+kfm.add ("__error_at_line_alias", make_unique (5));
}
/* Other implementations of C standard library. */
diff --git a/gcc/testsuite/c-c++-common/analyzer/error-pr115724.c
b/gcc/testsuite/c-c++-common/analyzer/error-pr115724.c
new file mode 100644
index ..ae606ad89d6a
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/analyzer/error-pr115724.c
@@ -0,0 +1,86 @@
+/* Verify that the analyzer handles the no-optimization case in
+ glibc's when error,error_at_line calls become
+ __error_alias and __error_at_line_alias. */
+
+typedef __SIZE_TYPE__ size_t;
+#define EXIT_FAILURE 1
+#define __extern_always_inline extern inline __attribute__
((__always_inline__)) __attribute__ ((__gnu_inline__))
+
+int errno;
+
+/* Adapted from glibc's bits/error.h. */
+
+extern void __error_alias (int __status, int __errnum,
+ const char *__format, ...)
+ __attribute__ ((__format__ (__printf__, 3, 4)));
+extern void __error_noreturn (int __status, int __errnum,
+ const char *__format, ...)
+ __attribute__ ((__noreturn__, __format__ (__printf__, 3, 4)));
+
+/* If we know the function will never return make sure the compiler
+ realizes that, too. */
+__extern_always_inline void
+error (int __status, int __errnum, const char *__format, ...)
+{
+ if (__builtin_constant_p (__status) && __status != 0)
+__error_noreturn (__status, __errnum, __format, __builtin_va_arg_pack ());
+ else
+__error_alias (__status, __errnum, __format, __builtin_va_arg_pack ());
+}
+
+extern void __error_at_line_alias (int __status, int __errnum,
+ const char *__fname,
+ unsigned int __line,
+ const char *__format, ...)
+ __attribute__ ((__format__ (__printf__, 5, 6)));
+extern void __error_at_line_noreturn (int __status, int __errnum,
+ const char *__fname,
+ unsigned int __line,
+ const char *__format,
+ ...)
+ __attribute__ ((__noreturn__, __format__ (__printf__, 5, 6)));
+
+/* If we know the function will never return make sure the compiler
+ realizes that, too. */
+__extern_always_inline void
+error_at_line (int __status, int __errnum, const char *__fname,
+ unsigned int __line, const char *__format, ...)
+{
+ if (__builtin_constant_p (__status) && __status != 0)
+__error_at_line_noreturn (__status, __errnum, __fname, __line, __format,
+ __builtin_va_arg_pack ());
+ else
+__error_at_line_alias (__status, __errnum, __fname, __line,
+ __format, __builtin_va_arg_pack ());
+}
+
+
+stru
[gcc r14-10954] testsuite: check that generated .sarif files validate against the SARIF schema [PR109360]
https://gcc.gnu.org/g:bf01dcd117ceabff839bb002b9eba4494656fd02
commit r14-10954-gbf01dcd117ceabff839bb002b9eba4494656fd02
Author: David Malcolm
Date: Fri Jun 21 08:46:14 2024 -0400
testsuite: check that generated .sarif files validate against the SARIF
schema [PR109360]
This patch extends the dg directive verify-sarif-file so that if
the "jsonschema" tool is available, it will be used to validate the
generated .sarif file.
Tested with jsonschema 3.2 with Python 3.8
gcc/ChangeLog:
PR testsuite/109360
* doc/install.texi: Mention optional usage of "jsonschema" tool.
gcc/testsuite/ChangeLog:
PR testsuite/109360
* lib/sarif-schema-2.1.0.json: New file, downloaded from
https://docs.oasis-open.org/sarif/sarif/v2.1.0/os/schemas/sarif-schema-2.1.0.json
Licensing information can be seen at
https://github.com/oasis-tcs/sarif-spec/issues/583
which states "They are free to incorporate it into their
implementation. No need for special permission or paperwork from
OASIS."
* lib/scansarif.exp (verify-sarif-file): If "jsonschema" is
available, use it to verify that the .sarif file complies with the
SARIF schema.
* lib/target-supports.exp (check_effective_target_jsonschema):
New.
Signed-off-by: David Malcolm
(cherry picked from commit a84fe222029ff21903283cc8ee4bc760ebf80ec2)
Diff:
---
gcc/doc/install.texi |5 +
gcc/testsuite/lib/sarif-schema-2.1.0.json | 3370 +
gcc/testsuite/lib/scansarif.exp | 23 +
gcc/testsuite/lib/target-supports.exp | 12 +
4 files changed, 3410 insertions(+)
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 9f2e427be68b..0d93e6c428fc 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -463,6 +463,11 @@ is shown below:
@item g++ testsuite
@code{gcov}, @code{gzip}, @code{json}, @code{os} and @code{pytest}.
+@item SARIF testsuite
+Tests of SARIF output will use the @code{jsonschema} program from the
+@code{jsonschema} module (if available) to validate generated .sarif files.
+If this tool is not found, the validation parts of those tests are skipped.
+
@item c++ cxx api generation
@code{csv}, @code{os}, @code{sys} and @code{time}.
diff --git a/gcc/testsuite/lib/sarif-schema-2.1.0.json
b/gcc/testsuite/lib/sarif-schema-2.1.0.json
new file mode 100644
index ..e0b652457104
--- /dev/null
+++ b/gcc/testsuite/lib/sarif-schema-2.1.0.json
@@ -0,0 +1,3370 @@
+{
+ "$schema": "http://json-schema.org/draft-07/schema#";,
+ "title": "Static Analysis Results Format (SARIF) Version 2.1.0 JSON Schema",
+ "$id":
"https://raw.githubusercontent.com/oasis-tcs/sarif-spec/master/Schemata/sarif-schema-2.1.0.json";,
+ "description": "Static Analysis Results Format (SARIF) Version 2.1.0 JSON
Schema: a standard format for the output of static analysis tools.",
+ "additionalProperties": false,
+ "type": "object",
+ "properties": {
+
+"$schema": {
+ "description": "The URI of the JSON schema corresponding to the
version.",
+ "type": "string",
+ "format": "uri"
+},
+
+"version": {
+ "description": "The SARIF format version of this log file.",
+ "enum": [ "2.1.0" ]
+},
+
+"runs": {
+ "description": "The set of runs contained in this log file.",
+ "type": "array",
+ "minItems": 0,
+ "uniqueItems": false,
+ "items": {
+"$ref": "#/definitions/run"
+ }
+},
+
+"inlineExternalProperties": {
+ "description": "References to external property files that share data
between runs.",
+ "type": "array",
+ "minItems": 0,
+ "uniqueItems": true,
+ "items": {
+"$ref": "#/definitions/externalProperties"
+ }
+},
+
+"properties": {
+ "description": "Key/value pairs that provide additional information
about the log file.",
+ "$ref": "#/definitions/propertyBag"
+}
+ },
+
+ "required": [ "version", "runs" ],
+
+ "definitions": {
+
+"address": {
+ "description": "A physical or virtual address, or a range of addresses,
in an 'addressable region' (memory or a binary file).",
+ "additionalProperties": false,
+ "type": "object",
+ "properties": {
+
+"absoluteAddress": {
+ "description": "The address expressed as a byte offset from the
start of the addressable region.",
+ "type": "integer",
+ "minimum": -1,
+ "default": -1
+
+},
+
+"relativeAddress": {
+ "description": "The address expressed as a byte offset from the
absolute address of the top-most parent object.",
+ "type": "integer"
+
+},
+
+"length": {
+ "description": "The number of bytes in this range of addresses.",
+ "type": "integer"
+
[gcc r14-10955] testsuite: use check-jsonschema for validating .sarif files [PR109360]
https://gcc.gnu.org/g:d5d62a38493be4c4923cacf2e9cd2c93d4216001
commit r14-10955-gd5d62a38493be4c4923cacf2e9cd2c93d4216001
Author: David Malcolm
Date: Tue Jun 25 20:26:21 2024 -0400
testsuite: use check-jsonschema for validating .sarif files [PR109360]
As reported here:
https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655434.html
the schema validation I added for generated .sarif files in
r15-1541-ga84fe222029ff2 used the "jsonschema" command line tool, which
has been deprecated by more recent versions of the Python 3 "jsonschema"
module.
This patch updates the validation to use the more recent
"check-jsonschema" command line tool, from the Python 3 "check-jsonschema"
module, fixing the testsuite FAILs due to the deprecation message.
As an added bonus, the output on validation failures is *much* nicer, e.g.
if I undo r15-1540-g9f4fdc3acebcf6, the error messages begin like this:
verify-sarif-file: res: Schema validation errors were encountered.
diagnostic-format-sarif-file-bad-utf8-pr109098-1.c.sarif::$.runs[0].results[0].locations[0].physicalLocation.region.startColumn:
0 is less than the minimum of 1
diagnostic-format-sarif-file-bad-utf8-pr109098-1.c.sarif::$.runs[0].results[0].relatedLocations[0].physicalLocation.region.startColumn:
0 is less than the minimum of 1
diagnostic-format-sarif-file-bad-utf8-pr109098-1.c.sarif::$.runs[0].results[0].relatedLocations[1].physicalLocation.region.startColumn:
0 is less than the minimum of 1
diagnostic-format-sarif-file-bad-utf8-pr109098-1.c.sarif::$.runs[0].results[0].relatedLocations[2].physicalLocation.region.startColumn:
0 is less than the minimum of 1
child process exited abnormally
FAIL: c-c++-common/diagnostic-format-sarif-file-bad-utf8-pr109098-1.c
-Wc++-compat (test .sarif output against SARIF schema)
Tested with Python 3.8 with check_jsonschema 0.28.6
gcc/ChangeLog:
PR testsuite/109360
* doc/install.texi (Python3 modules): Update SARIF validation
requirement to use check-jsonschema rather than jsonschema.
gcc/testsuite/ChangeLog:
PR testsuite/109360
* lib/scansarif.exp (verify-sarif-file): Use check-jsonschema
rather than jsonschema, updating the invocation accordingly.
* lib/target-supports.exp (check_effective_target_jsonschema):
Convert
to...
(check_effective_target_check_jsonschema): ...this.
Signed-off-by: David Malcolm
(cherry picked from commit 17967907102099806dc80c71ee7665ffb22ffa23)
Diff:
---
gcc/doc/install.texi | 7 ---
gcc/testsuite/lib/scansarif.exp | 8
gcc/testsuite/lib/target-supports.exp | 6 +++---
3 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 0d93e6c428fc..f20336c2062f 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -464,9 +464,10 @@ is shown below:
@code{gcov}, @code{gzip}, @code{json}, @code{os} and @code{pytest}.
@item SARIF testsuite
-Tests of SARIF output will use the @code{jsonschema} program from the
-@code{jsonschema} module (if available) to validate generated .sarif files.
-If this tool is not found, the validation parts of those tests are skipped.
+Tests of SARIF output will use the @code{check-jsonschema} program from
+the @code{check-jsonschema} module (if available) to validate generated
+.sarif files. If this tool is not found, the validation parts of those
+tests are skipped.
@item c++ cxx api generation
@code{csv}, @code{os}, @code{sys} and @code{time}.
diff --git a/gcc/testsuite/lib/scansarif.exp b/gcc/testsuite/lib/scansarif.exp
index 3eb38b8102e9..cc0890ef5d8b 100644
--- a/gcc/testsuite/lib/scansarif.exp
+++ b/gcc/testsuite/lib/scansarif.exp
@@ -57,7 +57,7 @@ proc scan-sarif-file-not { args } {
# Assuming python3 is available, use verify-sarif-file.py to check
# that the .sarif file is UTF-8 encoded and is parseable as JSON.
#
-# Assuming "jsonschema" is available, use it to verify that the .sarif
+# Assuming "check-jsonschema" is available, use it to verify that the .sarif
# file complies with the SARIF schema.
proc verify-sarif-file { args } {
@@ -86,8 +86,8 @@ proc verify-sarif-file { args } {
# Verify that the file complies with the SARIF schema.
# Check that jsonschema is installed.
-if { ![check_effective_target_jsonschema] } {
- unsupported "$testcase verify-sarif-file: jsonschema is missing"
+if { ![check_effective_target_check_jsonschema] } {
+ unsupported "$testcase verify-sarif-file: check-jsonschema is missing"
return
}
@@ -95,7 +95,7 @@ proc verify-sarif-file { args } {
verbose "schema_file: $schema_file" 2
set what "$testcase (test .sarif output against SARIF schema)"
-if [catch {exec jsonschema --instance $output_file $schema_file} res ]
[gcc r14-10952] regenerate-opt-urls.py: fix transposed values for "vax" and "v850"
https://gcc.gnu.org/g:54504e8c704f4c99275fcaced15a0944345ea31c commit r14-10952-g54504e8c704f4c99275fcaced15a0944345ea31c Author: David Malcolm Date: Tue May 28 15:47:38 2024 -0400 regenerate-opt-urls.py: fix transposed values for "vax" and "v850" gcc/ChangeLog: * config/v850/v850.opt.urls: Regenerate, with fix. * config/vax/vax.opt.urls: Likewise. * regenerate-opt-urls.py (TARGET_SPECIFIC_PAGES): Fix transposed values for "vax" and "v850". Signed-off-by: David Malcolm (cherry picked from commit 7cc529fe514cc64e88208a6a7acfc6fe6419a453) Diff: --- gcc/config/v850/v850.opt.urls | 81 --- gcc/config/vax/vax.opt.urls | 21 --- gcc/regenerate-opt-urls.py| 4 +-- 3 files changed, 73 insertions(+), 33 deletions(-) diff --git a/gcc/config/v850/v850.opt.urls b/gcc/config/v850/v850.opt.urls index dc5a83107b3b..a06f4833f47c 100644 --- a/gcc/config/v850/v850.opt.urls +++ b/gcc/config/v850/v850.opt.urls @@ -1,60 +1,87 @@ ; Autogenerated by regenerate-opt-urls.py from gcc/config/v850/v850.opt and generated HTML -; skipping UrlSuffix for 'mapp-regs' due to finding no URLs +mapp-regs +UrlSuffix(gcc/V850-Options.html#index-mapp-regs-1) -; skipping UrlSuffix for 'mbig-switch' due to finding no URLs +mbig-switch +UrlSuffix(gcc/V850-Options.html#index-mbig-switch-1) ; skipping UrlSuffix for 'mdebug' due to finding no URLs -; skipping UrlSuffix for 'mdisable-callt' due to finding no URLs +mdisable-callt +UrlSuffix(gcc/V850-Options.html#index-mdisable-callt) -; skipping UrlSuffix for 'mep' due to finding no URLs +mep +UrlSuffix(gcc/V850-Options.html#index-mep) -; skipping UrlSuffix for 'mghs' due to finding no URLs +mghs +UrlSuffix(gcc/V850-Options.html#index-mghs) -; skipping UrlSuffix for 'mlong-calls' due to finding no URLs +mlong-calls +UrlSuffix(gcc/V850-Options.html#index-mlong-calls-7) -; skipping UrlSuffix for 'mprolog-function' due to finding no URLs +mprolog-function +UrlSuffix(gcc/V850-Options.html#index-mprolog-function) -; skipping UrlSuffix for 'msda=' due to finding no URLs +msda= +UrlSuffix(gcc/V850-Options.html#index-msda) -; skipping UrlSuffix for 'mspace' due to finding no URLs +mspace +UrlSuffix(gcc/V850-Options.html#index-mspace) -; skipping UrlSuffix for 'mtda=' due to finding no URLs +mtda= +UrlSuffix(gcc/V850-Options.html#index-mtda) ; skipping UrlSuffix for 'mno-strict-align' due to finding no URLs -; skipping UrlSuffix for 'mv850' due to finding no URLs +mv850 +UrlSuffix(gcc/V850-Options.html#index-mv850) -; skipping UrlSuffix for 'mv850e' due to finding no URLs +mv850e +UrlSuffix(gcc/V850-Options.html#index-mv850e) -; skipping UrlSuffix for 'mv850e1' due to finding no URLs +mv850e1 +UrlSuffix(gcc/V850-Options.html#index-mv850e1) -; skipping UrlSuffix for 'mv850es' due to finding no URLs +mv850es +UrlSuffix(gcc/V850-Options.html#index-mv850es) -; skipping UrlSuffix for 'mv850e2' due to finding no URLs +mv850e2 +UrlSuffix(gcc/V850-Options.html#index-mv850e2) -; skipping UrlSuffix for 'mv850e2v3' due to finding no URLs +mv850e2v3 +UrlSuffix(gcc/V850-Options.html#index-mv850e2v3) -; skipping UrlSuffix for 'mv850e3v5' due to finding no URLs +mv850e3v5 +UrlSuffix(gcc/V850-Options.html#index-mv850e3v5) -; skipping UrlSuffix for 'mv850e2v4' due to finding no URLs +mv850e2v4 +UrlSuffix(gcc/V850-Options.html#index-mv850e2v4) -; skipping UrlSuffix for 'mloop' due to finding no URLs +mloop +UrlSuffix(gcc/V850-Options.html#index-mloop-1) -; skipping UrlSuffix for 'mzda=' due to finding no URLs +mzda= +UrlSuffix(gcc/V850-Options.html#index-mzda) -; skipping UrlSuffix for 'mrelax' due to finding no URLs +mrelax +UrlSuffix(gcc/V850-Options.html#index-mrelax-9) -; skipping UrlSuffix for 'mlong-jumps' due to finding no URLs +mlong-jumps +UrlSuffix(gcc/V850-Options.html#index-mlong-jumps) -; skipping UrlSuffix for 'msoft-float' due to finding no URLs +msoft-float +UrlSuffix(gcc/V850-Options.html#index-msoft-float-14) -; skipping UrlSuffix for 'mhard-float' due to finding no URLs +mhard-float +UrlSuffix(gcc/V850-Options.html#index-mhard-float-9) -; skipping UrlSuffix for 'mrh850-abi' due to finding no URLs +mrh850-abi +UrlSuffix(gcc/V850-Options.html#index-mrh850-abi) -; skipping UrlSuffix for 'mgcc-abi' due to finding no URLs +mgcc-abi +UrlSuffix(gcc/V850-Options.html#index-mgcc-abi) -; skipping UrlSuffix for 'm8byte-align' due to finding no URLs +m8byte-align +UrlSuffix(gcc/V850-Options.html#index-m8byte-align) diff --git a/gcc/config/vax/vax.opt.urls b/gcc/config/vax/vax.opt.urls index c6b1c418b617..10bee25d8336 100644 --- a/gcc/config/vax/vax.opt.urls +++ b/gcc/config/vax/vax.opt.urls @@ -1,10 +1,23 @@ ; Autogenerated by regenerate-opt-urls.py from gcc/config/vax/vax.opt and generated HTML -; skipping UrlSuffix for 'mg' due to finding no URLs +md +UrlSuffix(gcc/VAX-Options.html#index-md) -; skipping UrlSuffix for
[gcc r14-10957] SARIF output: fix schema URL [§3.13.3, PR116603]
https://gcc.gnu.org/g:41344d6077953bf1d16883bea638d31d355b96fd
commit r14-10957-g41344d6077953bf1d16883bea638d31d355b96fd
Author: David Malcolm
Date: Mon Sep 9 19:38:11 2024 -0400
SARIF output: fix schema URL [§3.13.3, PR116603]
We were using
https://raw.githubusercontent.com/oasis-tcs/sarif-spec/master/Schemata/sarif-schema-2.1.0.json
as the URL for the SARIF 2.1 schema, but this is now a 404.
Update it to the URL listed in the spec (§3.13.3 "$schema property"),
which is:
https://docs.oasis-open.org/sarif/sarif/v2.1.0/errata01/os/schemas/sarif-schema-2.1.0.json
and update the copy in
gcc/testsuite/lib/sarif-schema-2.1.0.json
used by the "verify-sarif-file" DejaGnu directive to the version found at
that latter URL; the sha256 sum changes
from: 2b19d2358baef0251d7d24e208d05ffabf1b2a3ab5e1b3a816066fc57fd4a7e8
to: c3b4bb2d6093897483348925aaa73af03b3e3f4bd4ca38cef26dcb4212a2682e
Doing so added a validation error on
c-c++-common/diagnostic-format-sarif-file-pr111700.c
for which we emit this textual output:
this-file-does-not-exist.c: warning: #warning message [-Wcpp]
with no line number, and these invalid SARIF regions within the
physical location of the warning:
"region": {"startColumn": 2,
"endColumn": 9},
"contextRegion": {}
This is due to this directive:
# 0 "this-file-does-not-exist.c"
with line number 0.
The patch fixes this by not creating regions that have startLine <= 0.
gcc/ChangeLog:
PR other/116603
* diagnostic-format-sarif.cc (SARIF_SCHEMA): Update URL.
(sarif_builder::maybe_make_region_object): Don't create regions
with startLine <= 0.
(sarif_builder::maybe_make_region_object_for_context): Likewise.
gcc/testsuite/ChangeLog:
PR other/116603
* lib/sarif-schema-2.1.0.json: Update with copy downloaded from
https://docs.oasis-open.org/sarif/sarif/v2.1.0/errata01/os/schemas/sarif-schema-2.1.0.json
Signed-off-by: David Malcolm
(cherry picked from commit 38dc2c64710aa0e6a03c0c1201477e3e75b1a0b0)
Diff:
---
gcc/diagnostic-format-sarif.cc| 25 ---
gcc/testsuite/lib/sarif-schema-2.1.0.json | 73 +++
2 files changed, 65 insertions(+), 33 deletions(-)
diff --git a/gcc/diagnostic-format-sarif.cc b/gcc/diagnostic-format-sarif.cc
index d27614d6c87b..d651913be8b8 100644
--- a/gcc/diagnostic-format-sarif.cc
+++ b/gcc/diagnostic-format-sarif.cc
@@ -942,7 +942,10 @@ sarif_builder::get_sarif_column (expanded_location exploc)
const
or return NULL.
If COLUMN_OVERRIDE is non-zero, then use it as the column number
- if LOC has no column information. */
+ if LOC has no column information.
+
+ We only support text properties of regions ("text regions"),
+ not binary properties ("binary regions"); see 3.30.1. */
json::object *
sarif_builder::maybe_make_region_object (location_t loc,
@@ -965,11 +968,16 @@ sarif_builder::maybe_make_region_object (location_t loc,
if (exploc_finish.file !=exploc_caret.file)
return NULL;
+ /* We can have line == 0 in the presence of "#" lines.
+ SARIF requires lines > 0, so if we hit this case we don't have a
+ way of validly representing the region as SARIF; bail out. */
+ if (exploc_start.line <= 0)
+return nullptr;
+
json::object *region_obj = new json::object ();
/* "startLine" property (SARIF v2.1.0 section 3.30.5) */
- if (exploc_start.line > 0)
-region_obj->set_integer ("startLine", exploc_start.line);
+ region_obj->set_integer ("startLine", exploc_start.line);
/* "startColumn" property (SARIF v2.1.0 section 3.30.6).
@@ -1034,11 +1042,16 @@ sarif_builder::maybe_make_region_object_for_context
(location_t loc) const
if (exploc_finish.file !=exploc_caret.file)
return NULL;
+ /* We can have line == 0 in the presence of "#" lines.
+ SARIF requires lines > 0, so if we hit this case we don't have a
+ way of validly representing the region as SARIF; bail out. */
+ if (exploc_start.line <= 0)
+return nullptr;
+
json::object *region_obj = new json::object ();
/* "startLine" property (SARIF v2.1.0 section 3.30.5) */
- if (exploc_start.line > 0)
-region_obj->set_integer ("startLine", exploc_start.line);
+ region_obj->set_integer ("startLine", exploc_start.line);
/* "endLine" property (SARIF v2.1.0 section 3.30.7) */
if (exploc_finish.line != exploc_start.line
@@ -1308,7 +1321,7 @@ sarif_builder::make_multiformat_message_string (const
char *msg) const
return message_obj;
}
-#define SARIF_SCHEMA
"https://raw.githubusercontent.com/oasis-tcs/sarif-spec/master/Schemata/sarif-schema-2.1.0.json";
+#define SARIF_SCHEMA
"https://docs.oasis-open.org/sarif/sarif/v2.1.0/errata01/os/schemas/sarif-schema-2.1.0.json";
#define SARIF_VERSION "2.1.0"
[gcc r15-5522] libgccjit: Allow comparing aligned int types
https://gcc.gnu.org/g:16cf1c010dbee4e411f0d1289830bfb6ed5c7807
commit r15-5522-g16cf1c010dbee4e411f0d1289830bfb6ed5c7807
Author: Antoni Boucher
Date: Sun Oct 8 09:12:12 2023 -0400
libgccjit: Allow comparing aligned int types
gcc/jit/ChangeLog:
* jit-common.h: Add forward declaration of memento_of_get_aligned.
* jit-recording.h (type::is_same_type_as): Compare integer
types.
(dyn_cast_aligned_type): New method.
(type::is_aligned, memento_of_get_aligned::is_same_type_as,
memento_of_get_aligned::is_aligned): new methods.
gcc/testsuite/ChangeLog:
* jit.dg/test-types.c: Add checks comparing aligned types.
Diff:
---
gcc/jit/jit-common.h | 1 +
gcc/jit/jit-recording.h | 34 +++---
gcc/testsuite/jit.dg/test-types.c | 11 ---
3 files changed, 36 insertions(+), 10 deletions(-)
diff --git a/gcc/jit/jit-common.h b/gcc/jit/jit-common.h
index 655d94e0bab4..6ab96223e1e0 100644
--- a/gcc/jit/jit-common.h
+++ b/gcc/jit/jit-common.h
@@ -134,6 +134,7 @@ namespace recording {
class statement;
class extended_asm;
class case_;
+class memento_of_get_aligned;
class top_level_asm;
/* End of recording types. */
diff --git a/gcc/jit/jit-recording.h b/gcc/jit/jit-recording.h
index 13c2ea735027..ab4b0ff35b65 100644
--- a/gcc/jit/jit-recording.h
+++ b/gcc/jit/jit-recording.h
@@ -580,6 +580,7 @@ public:
virtual struct_ *dyn_cast_struct () { return NULL; }
virtual vector_type *dyn_cast_vector_type () { return NULL; }
virtual array_type *dyn_cast_array_type () { return NULL; }
+ virtual memento_of_get_aligned *dyn_cast_aligned_type () { return NULL; }
/* Is it typesafe to copy to this type from rtype? */
virtual bool accepts_writes_from (type *rtype)
@@ -590,6 +591,14 @@ public:
virtual bool is_same_type_as (type *other)
{
+if (is_int ()
+&& other->is_int ()
+&& get_size () == other->get_size ()
+&& is_signed () == other->is_signed ())
+{
+ /* LHS (this) is an integer of the same size and sign as rtype. */
+ return true;
+}
return this == other;
}
@@ -607,6 +616,7 @@ public:
virtual type *is_volatile () { return NULL; }
virtual type *is_restrict () { return NULL; }
virtual type *is_const () { return NULL; }
+ virtual type *is_aligned () { return NULL; }
virtual type *is_array () = 0;
virtual struct_ *is_struct () { return NULL; }
virtual bool is_union () const { return false; }
@@ -661,13 +671,6 @@ public:
accept it: */
return true;
}
- } else if (is_int ()
-&& rtype->is_int ()
-&& get_size () == rtype->get_size ()
-&& is_signed () == rtype->is_signed ())
- {
- /* LHS (this) is an integer of the same size and sign as rtype. */
- return true;
}
return type::accepts_writes_from (rtype);
@@ -844,10 +847,27 @@ public:
: decorated_type (other_type),
m_alignment_in_bytes (alignment_in_bytes) {}
+ bool is_same_type_as (type *other) final override
+ {
+if (!other->is_aligned ())
+{
+ return m_other_type->is_same_type_as (other);
+}
+return m_alignment_in_bytes
+ == other->dyn_cast_aligned_type ()->m_alignment_in_bytes
+ && m_other_type->is_same_type_as (other->is_aligned ());
+ }
+
+ type *is_aligned () final override { return m_other_type; }
+
/* Strip off the alignment, giving the underlying type. */
type *unqualified () final override { return m_other_type; }
void replay_into (replayer *) final override;
+ memento_of_get_aligned *dyn_cast_aligned_type () final override
+ {
+return this;
+ }
array_type *dyn_cast_array_type () final override
{
diff --git a/gcc/testsuite/jit.dg/test-types.c
b/gcc/testsuite/jit.dg/test-types.c
index bfdb76383c55..8573711cf8eb 100644
--- a/gcc/testsuite/jit.dg/test-types.c
+++ b/gcc/testsuite/jit.dg/test-types.c
@@ -486,10 +486,10 @@ verify_code (gcc_jit_context *ctxt, gcc_jit_result
*result)
CHECK_VALUE (z.m_FILE_ptr, stderr);
+ gcc_jit_type *long_type = gcc_jit_context_get_type (ctxt, GCC_JIT_TYPE_LONG);
+ gcc_jit_type *int64_type = gcc_jit_context_get_type (ctxt,
GCC_JIT_TYPE_INT64_T);
if (sizeof(long) == 8)
-CHECK (gcc_jit_compatible_types (
- gcc_jit_context_get_type (ctxt, GCC_JIT_TYPE_LONG),
- gcc_jit_context_get_type (ctxt, GCC_JIT_TYPE_INT64_T)));
+CHECK (gcc_jit_compatible_types (long_type, int64_type));
CHECK_VALUE (gcc_jit_type_get_size (gcc_jit_context_get_type (ctxt,
GCC_JIT_TYPE_FLOAT)), sizeof (float));
CHECK_VALUE (gcc_jit_type_get_size (gcc_jit_context_get_type (ctxt,
GCC_JIT_TYPE_DOUBLE)), sizeof (double));
@@ -501,4 +501,9 @@ verify_code (gcc_jit_context *ctxt, gcc_jit_result *result)
gcc_jit_type *array_type1 = gcc_jit_co
[gcc r15-5523] tree-optimization/117698 - SLP vectorization and alignment
https://gcc.gnu.org/g:2383ed144b54be6bae5ba5aec8859c6c2e215daf
commit r15-5523-g2383ed144b54be6bae5ba5aec8859c6c2e215daf
Author: Richard Biener
Date: Wed Nov 20 13:32:48 2024 +0100
tree-optimization/117698 - SLP vectorization and alignment
When SLP vectorizing we fail to mark the general alignment check
as irrelevant when using VMAT_STRIDED_SLP (the implementation checks
for itself) and when VMAT_INVARIANT the override isn't effective.
This results in extra FAILs on sparc which the following fixes.
PR tree-optimization/117698
* tree-vect-stmts.cc (get_group_load_store_type): Properly
disregard alignment for VMAT_STRIDED_SLP and VMAT_INVARIANT.
(vectorizable_load): Adjust guard for dumping whether we
vectorize and unaligned access.
(vectorizable_store): Likewise.
Diff:
---
gcc/tree-vect-stmts.cc | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc
index 5f7e1e622a86..752ee457f6dd 100644
--- a/gcc/tree-vect-stmts.cc
+++ b/gcc/tree-vect-stmts.cc
@@ -2121,9 +2121,6 @@ get_group_load_store_type (vec_info *vinfo, stmt_vec_info
stmt_info,
{
gcc_assert (vls_type == VLS_LOAD);
*memory_access_type = VMAT_INVARIANT;
- /* Invariant accesses perform only component accesses, alignment
-is irrelevant for them. */
- *alignment_support_scheme = dr_unaligned_supported;
}
/* Try using LOAD/STORE_LANES. */
else if (slp_node->ldst_lanes
@@ -2379,7 +2376,9 @@ get_group_load_store_type (vec_info *vinfo, stmt_vec_info
stmt_info,
*memory_access_type = VMAT_GATHER_SCATTER;
if (*memory_access_type == VMAT_GATHER_SCATTER
- || *memory_access_type == VMAT_ELEMENTWISE)
+ || *memory_access_type == VMAT_ELEMENTWISE
+ || *memory_access_type == VMAT_STRIDED_SLP
+ || *memory_access_type == VMAT_INVARIANT)
{
*alignment_support_scheme = dr_unaligned_supported;
*misalignment = DR_MISALIGNMENT_UNKNOWN;
@@ -8497,6 +8496,8 @@ vectorizable_store (vec_info *vinfo,
if (dump_enabled_p ()
&& memory_access_type != VMAT_ELEMENTWISE
&& memory_access_type != VMAT_GATHER_SCATTER
+ && memory_access_type != VMAT_STRIDED_SLP
+ && memory_access_type != VMAT_INVARIANT
&& alignment_support_scheme != dr_aligned)
dump_printf_loc (MSG_NOTE, vect_location,
"Vectorizing an unaligned access.\n");
@@ -10410,6 +10411,8 @@ vectorizable_load (vec_info *vinfo,
if (dump_enabled_p ()
&& memory_access_type != VMAT_ELEMENTWISE
&& memory_access_type != VMAT_GATHER_SCATTER
+ && memory_access_type != VMAT_STRIDED_SLP
+ && memory_access_type != VMAT_INVARIANT
&& alignment_support_scheme != dr_aligned)
dump_printf_loc (MSG_NOTE, vect_location,
"Vectorizing an unaligned access.\n");
[gcc r15-5519] OpenMP: common C/C++ testcases for dispatch + adjust_args
https://gcc.gnu.org/g:377eff7c38e8df1388b0a1eeb6afdbcaf12c3551
commit r15-5519-g377eff7c38e8df1388b0a1eeb6afdbcaf12c3551
Author: Paul-Antoine Arras
Date: Wed Nov 20 15:28:58 2024 +0100
OpenMP: common C/C++ testcases for dispatch + adjust_args
gcc/testsuite/ChangeLog:
* c-c++-common/gomp/declare-variant-2.c: Adjust dg-error directives.
* c-c++-common/gomp/adjust-args-1.c: New test.
* c-c++-common/gomp/adjust-args-2.c: New test.
* c-c++-common/gomp/declare-variant-dup-match-clause.c: New test.
* c-c++-common/gomp/dispatch-1.c: New test.
* c-c++-common/gomp/dispatch-2.c: New test.
* c-c++-common/gomp/dispatch-3.c: New test.
* c-c++-common/gomp/dispatch-4.c: New test.
* c-c++-common/gomp/dispatch-5.c: New test.
* c-c++-common/gomp/dispatch-6.c: New test.
* c-c++-common/gomp/dispatch-7.c: New test.
* c-c++-common/gomp/dispatch-8.c: New test.
* c-c++-common/gomp/dispatch-9.c: New test.
* c-c++-common/gomp/dispatch-10.c: New test.
libgomp/ChangeLog:
* testsuite/libgomp.c-c++-common/dispatch-1.c: New test.
* testsuite/libgomp.c-c++-common/dispatch-2.c: New test.
Diff:
---
gcc/testsuite/c-c++-common/gomp/adjust-args-1.c| 30
gcc/testsuite/c-c++-common/gomp/adjust-args-2.c| 31
.../c-c++-common/gomp/declare-variant-2.c | 4 +-
.../gomp/declare-variant-dup-match-clause.c| 6 ++
gcc/testsuite/c-c++-common/gomp/dispatch-1.c | 71 ++
gcc/testsuite/c-c++-common/gomp/dispatch-10.c | 36 ++
gcc/testsuite/c-c++-common/gomp/dispatch-2.c | 28
gcc/testsuite/c-c++-common/gomp/dispatch-3.c | 12
gcc/testsuite/c-c++-common/gomp/dispatch-4.c | 18 +
gcc/testsuite/c-c++-common/gomp/dispatch-5.c | 34 +
gcc/testsuite/c-c++-common/gomp/dispatch-6.c | 18 +
gcc/testsuite/c-c++-common/gomp/dispatch-7.c | 21 ++
gcc/testsuite/c-c++-common/gomp/dispatch-8.c | 63
gcc/testsuite/c-c++-common/gomp/dispatch-9.c | 17 +
.../testsuite/libgomp.c-c++-common/dispatch-1.c| 76
.../testsuite/libgomp.c-c++-common/dispatch-2.c| 84 ++
16 files changed, 547 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/c-c++-common/gomp/adjust-args-1.c
b/gcc/testsuite/c-c++-common/gomp/adjust-args-1.c
new file mode 100644
index ..728abe620922
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/gomp/adjust-args-1.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-fdump-tree-gimple" } */
+
+int f (int a, void *b, float c[2]);
+
+#pragma omp declare variant (f) match (construct={dispatch}) adjust_args
(nothing: a) adjust_args (need_device_ptr: b, c)
+int f0 (int a, void *b, float c[2]);
+#pragma omp declare variant (f) match (construct={dispatch}) adjust_args
(nothing: a) adjust_args (need_device_ptr: b) adjust_args (need_device_ptr: c)
+int f1 (int a, void *b, float c[2]);
+
+int test () {
+ int a;
+ void *b;
+ float c[2];
+ struct {int a;} s;
+
+ s.a = f0 (a, b, c);
+ #pragma omp dispatch
+ s.a = f0 (a, b, c);
+
+ f1 (a, b, c);
+ #pragma omp dispatch
+ s.a = f1 (a, b, c);
+
+ return s.a;
+}
+
+/* { dg-final { scan-tree-dump-times "__builtin_omp_get_default_device
\\(\\);" 2 "gimple" } } */
+/* { dg-final { scan-tree-dump-times "D\.\[0-9]+ =
__builtin_omp_get_mapped_ptr \\(&c, D\.\[0-9]+\\);" 2 "gimple" } } */
+/* { dg-final { scan-tree-dump-times "D\.\[0-9]+ =
__builtin_omp_get_mapped_ptr \\(b, D\.\[0-9]+\\);" 2 "gimple" } } */
diff --git a/gcc/testsuite/c-c++-common/gomp/adjust-args-2.c
b/gcc/testsuite/c-c++-common/gomp/adjust-args-2.c
new file mode 100644
index ..d2a4a5f4ec45
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/gomp/adjust-args-2.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-fdump-tree-gimple" } */
+
+int f (int a, void *b, float c[2]);
+
+#pragma omp declare variant (f) match (construct={dispatch}) adjust_args
(nothing: a) adjust_args (need_device_ptr: b, c)
+int f0 (int a, void *b, float c[2]);
+#pragma omp declare variant (f) adjust_args (need_device_ptr: b, c) match
(construct={dispatch}) adjust_args (nothing: a)
+int f1 (int a, void *b, float c[2]);
+
+void test () {
+ int a;
+ void *b;
+ float c[2];
+
+ #pragma omp dispatch
+ f0 (a, b, c);
+
+ #pragma omp dispatch device (-4852)
+ f0 (a, b, c);
+
+ #pragma omp dispatch device (a + a)
+ f0 (a, b, c);
+}
+
+/* { dg-final { scan-tree-dump-times "__builtin_omp_get_default_device
\\(\\);" 3 "gimple" } } */
+/* { dg-final { scan-tree-dump-times "D\.\[0-9]+ =
__builtin_omp_get_mapped_ptr \\(&c, D\.\[0-9]+\\);" 2 "gimple" } } */
+/* { dg-final { scan-tree-dump-times "D\.\[0-9]+ =
__builtin_omp_get_mapped_ptr \\(b, D\.\[0-9]+\\);" 2 "gimple"
[gcc r15-5516] OpenMP: middle-end support for dispatch + adjust_args
https://gcc.gnu.org/g:084ea8ad5845c9b69c1366fa6dfeaf1a6c5e423b commit r15-5516-g084ea8ad5845c9b69c1366fa6dfeaf1a6c5e423b Author: Paul-Antoine Arras Date: Wed Nov 20 15:28:57 2024 +0100 OpenMP: middle-end support for dispatch + adjust_args This patch adds middle-end support for the `dispatch` construct and the `adjust_args` clause. The heavy lifting is done in `gimplify_omp_dispatch` and `gimplify_call_expr` respectively. For `adjust_args`, this mostly consists in emitting a call to `omp_get_mapped_ptr` for the adequate device. For dispatch, the following steps are performed: * Handle the device clause, if any: set the default-device ICV at the top of the dispatch region and restore its previous value at the end. * Handle novariants and nocontext clauses, if any. Evaluate compile-time constants and select a variant, if possible. Otherwise, emit code to handle all possible cases at run time. gcc/ChangeLog: * builtins.cc (builtin_fnspec): Handle BUILT_IN_OMP_GET_MAPPED_PTR. * gimple-low.cc (lower_stmt): Handle GIMPLE_OMP_DISPATCH. * gimple-pretty-print.cc (dump_gimple_omp_dispatch): New function. (pp_gimple_stmt_1): Handle GIMPLE_OMP_DISPATCH. * gimple-walk.cc (walk_gimple_stmt): Likewise. * gimple.cc (gimple_build_omp_dispatch): New function. (gimple_copy): Handle GIMPLE_OMP_DISPATCH. * gimple.def (GIMPLE_OMP_DISPATCH): Define. * gimple.h (gimple_build_omp_dispatch): Declare. (gimple_has_substatements): Handle GIMPLE_OMP_DISPATCH. (gimple_omp_dispatch_clauses): New function. (gimple_omp_dispatch_clauses_ptr): Likewise. (gimple_omp_dispatch_set_clauses): Likewise. (gimple_return_set_retval): Handle GIMPLE_OMP_DISPATCH. * gimplify.cc (enum omp_region_type): Add ORT_DISPATCH. (struct gimplify_omp_ctx): Add in_call_args. (gimplify_call_expr): Handle need_device_ptr arguments. (is_gimple_stmt): Handle OMP_DISPATCH. (gimplify_scan_omp_clauses): Handle OMP_CLAUSE_DEVICE in a dispatch construct. Handle OMP_CLAUSE_NOVARIANTS and OMP_CLAUSE_NOCONTEXT. (omp_has_novariants): New function. (omp_has_nocontext): Likewise. (omp_construct_selector_matches): Handle OMP_DISPATCH with nocontext clause. (find_ifn_gomp_dispatch): New function. (gimplify_omp_dispatch): Likewise. (gimplify_expr): Handle OMP_DISPATCH. * gimplify.h (omp_has_novariants): Declare. * internal-fn.cc (expand_GOMP_DISPATCH): New function. * internal-fn.def (GOMP_DISPATCH): Define. * omp-builtins.def (BUILT_IN_OMP_GET_MAPPED_PTR): Define. (BUILT_IN_OMP_GET_DEFAULT_DEVICE): Define. (BUILT_IN_OMP_SET_DEFAULT_DEVICE): Define. * omp-general.cc (omp_construct_traits_to_codes): Add OMP_DISPATCH. (struct omp_ts_info): Add dispatch. (omp_resolve_declare_variant): Handle novariants. Adjust DECL_ASSEMBLER_NAME. * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_DISPATCH. (lower_omp_dispatch): New function. (lower_omp_1): Call it. * tree-inline.cc (remap_gimple_stmt): Handle GIMPLE_OMP_DISPATCH. (estimate_num_insns): Handle GIMPLE_OMP_DISPATCH. Diff: --- gcc/builtins.cc| 2 + gcc/gimple-low.cc | 1 + gcc/gimple-pretty-print.cc | 33 +++ gcc/gimple-walk.cc | 1 + gcc/gimple.cc | 20 ++ gcc/gimple.def | 5 + gcc/gimple.h | 33 ++- gcc/gimplify.cc| 497 +++-- gcc/gimplify.h | 1 + gcc/internal-fn.cc | 8 + gcc/internal-fn.def| 1 + gcc/omp-builtins.def | 6 + gcc/omp-general.cc | 13 +- gcc/omp-low.cc | 35 gcc/tree-inline.cc | 7 + 15 files changed, 641 insertions(+), 22 deletions(-) diff --git a/gcc/builtins.cc b/gcc/builtins.cc index 7243c408cf25..ce92b368a326 100644 --- a/gcc/builtins.cc +++ b/gcc/builtins.cc @@ -12583,6 +12583,8 @@ builtin_fnspec (tree callee) by its first argument. */ case BUILT_IN_POSIX_MEMALIGN: return ".cOt"; + case BUILT_IN_OMP_GET_MAPPED_PTR: + return ". R "; default: return ""; diff --git a/gcc/gimple-low.cc b/gcc/gimple-low.cc index 6475d7fadb4c..55d9dbf8167b 100644 --- a/gcc/gimple-low.cc +++ b/gcc/gimple-low.cc @@ -746,6 +746,7 @@ lower_stmt (gimple_stmt_iterator *gsi, struct lower_data *data) case GIMPLE_EH_MUST_NOT_THROW: case GIMPLE_OMP_FOR: case GIMPLE_OMP_SCOPE: +case GIMPLE_OMP_DISPATCH: case GIMPLE_OMP_SECTIONS: case GIMPLE_OMP_SECTIONS_SWITCH: case GIMPLE_OM
[gcc r15-5517] OpenMP: C front-end support for dispatch + adjust_args
https://gcc.gnu.org/g:d7d8d9dae9f86df6ca5d03f0eb5d78898e6aa804
commit r15-5517-gd7d8d9dae9f86df6ca5d03f0eb5d78898e6aa804
Author: Paul-Antoine Arras
Date: Wed Nov 20 15:28:57 2024 +0100
OpenMP: C front-end support for dispatch + adjust_args
This patch adds support to the C front-end to parse the `dispatch`
construct and
the `adjust_args` clause. It also includes some common C/C++ bits for
pragmas
and attributes.
Additional common C/C++ testcases are in a later patch in the series.
gcc/c-family/ChangeLog:
* c-attribs.cc (c_common_gnu_attributes): Add attribute for
adjust_args
need_device_ptr.
* c-omp.cc (c_omp_directives): Uncomment dispatch.
* c-pragma.cc (omp_pragmas): Add dispatch.
* c-pragma.h (enum pragma_kind): Add PRAGMA_OMP_DISPATCH.
(enum pragma_omp_clause): Add PRAGMA_OMP_CLAUSE_NOCONTEXT and
PRAGMA_OMP_CLAUSE_NOVARIANTS.
gcc/c/ChangeLog:
* c-parser.cc (c_parser_omp_dispatch): New function.
(c_parser_omp_clause_name): Handle nocontext and novariants clauses.
(c_parser_omp_clause_novariants): New function.
(c_parser_omp_clause_nocontext): Likewise.
(c_parser_omp_all_clauses): Handle nocontext and novariants clauses.
(c_parser_omp_dispatch_body): New function adapted from
c_parser_expr_no_commas.
(OMP_DISPATCH_CLAUSE_MASK): Define.
(c_parser_omp_dispatch): New function.
(c_finish_omp_declare_variant): Parse adjust_args.
(c_parser_omp_construct): Handle PRAGMA_OMP_DISPATCH.
* c-typeck.cc (c_finish_omp_clauses): Handle OMP_CLAUSE_NOVARIANTS
and
OMP_CLAUSE_NOCONTEXT.
gcc/testsuite/ChangeLog:
* gcc.dg/gomp/adjust-args-1.c: New test.
* gcc.dg/gomp/dispatch-1.c: New test.
* gcc.dg/gomp/dispatch-2.c: New test.
* gcc.dg/gomp/dispatch-3.c: New test.
* gcc.dg/gomp/dispatch-4.c: New test.
* gcc.dg/gomp/dispatch-5.c: New test.
Diff:
---
gcc/c-family/c-attribs.cc | 3 +
gcc/c-family/c-omp.cc | 4 +-
gcc/c-family/c-pragma.cc | 1 +
gcc/c-family/c-pragma.h | 3 +
gcc/c/c-parser.cc | 487 ++
gcc/c/c-typeck.cc | 2 +
gcc/testsuite/gcc.dg/gomp/adjust-args-1.c | 32 ++
gcc/testsuite/gcc.dg/gomp/dispatch-1.c| 53
gcc/testsuite/gcc.dg/gomp/dispatch-2.c| 30 ++
gcc/testsuite/gcc.dg/gomp/dispatch-3.c| 16 +
gcc/testsuite/gcc.dg/gomp/dispatch-4.c| 19 ++
gcc/testsuite/gcc.dg/gomp/dispatch-5.c| 21 ++
12 files changed, 614 insertions(+), 57 deletions(-)
diff --git a/gcc/c-family/c-attribs.cc b/gcc/c-family/c-attribs.cc
index 7fd480e6d41b..a1c5d0c895be 100644
--- a/gcc/c-family/c-attribs.cc
+++ b/gcc/c-family/c-attribs.cc
@@ -572,6 +572,9 @@ const struct attribute_spec c_common_gnu_attributes[] =
handle_omp_declare_variant_attribute, NULL },
{ "omp declare variant variant", 0, -1, true, false, false, false,
handle_omp_declare_variant_attribute, NULL },
+ { "omp declare variant adjust_args need_device_ptr", 0, -1, true, false,
+ false, false,
+ handle_omp_declare_variant_attribute, NULL },
{ "simd", 0, 1, true, false, false, false,
handle_simd_attribute, NULL },
{ "omp declare target", 0, -1, true, false, false, false,
diff --git a/gcc/c-family/c-omp.cc b/gcc/c-family/c-omp.cc
index eacfcdc3437c..ed6ce8fc4764 100644
--- a/gcc/c-family/c-omp.cc
+++ b/gcc/c-family/c-omp.cc
@@ -4300,8 +4300,8 @@ const struct c_omp_directive c_omp_directives[] = {
C_OMP_DIR_DECLARATIVE, false },
{ "depobj", nullptr, nullptr, PRAGMA_OMP_DEPOBJ,
C_OMP_DIR_STANDALONE, false },
- /* { "dispatch", nullptr, nullptr, PRAGMA_OMP_DISPATCH,
-C_OMP_DIR_CONSTRUCT, false }, */
+ { "dispatch", nullptr, nullptr, PRAGMA_OMP_DISPATCH,
+C_OMP_DIR_DECLARATIVE, false },
{ "distribute", nullptr, nullptr, PRAGMA_OMP_DISTRIBUTE,
C_OMP_DIR_CONSTRUCT, true },
{ "end", "assumes", nullptr, PRAGMA_OMP_END,
diff --git a/gcc/c-family/c-pragma.cc b/gcc/c-family/c-pragma.cc
index c78721824e3f..b6824bbe6911 100644
--- a/gcc/c-family/c-pragma.cc
+++ b/gcc/c-family/c-pragma.cc
@@ -1525,6 +1525,7 @@ static const struct omp_pragma_def omp_pragmas[] = {
{ "cancellation", PRAGMA_OMP_CANCELLATION_POINT },
{ "critical", PRAGMA_OMP_CRITICAL },
{ "depobj", PRAGMA_OMP_DEPOBJ },
+ { "dispatch", PRAGMA_OMP_DISPATCH },
{ "error", PRAGMA_OMP_ERROR },
{ "end", PRAGMA_OMP_END },
{ "flush", PRAGMA_OMP_FLUSH },
diff --git a/gcc/c-family/c-pragma.h b/gcc/c-family/c-pragma.h
index 2ebde06c471c..6b6
[gcc r15-5515] OpenMP: dispatch + adjust_args tree data structures and front-end interfaces
https://gcc.gnu.org/g:0e15f1df4ae86cf8542cee6c15ad11b85f968f2e
commit r15-5515-g0e15f1df4ae86cf8542cee6c15ad11b85f968f2e
Author: Paul-Antoine Arras
Date: Wed Nov 20 15:28:57 2024 +0100
OpenMP: dispatch + adjust_args tree data structures and front-end interfaces
This patch introduces the OMP_DISPATCH tree node, as well as two new clauses
`nocontext` and `novariants`. It defines/exposes interfaces that will be
used in subsequent patches that add front-end and middle-end support, but
nothing generates these nodes yet.
gcc/ChangeLog:
* builtin-types.def (BT_FN_PTR_CONST_PTR_INT): New.
* omp-selectors.h (enum omp_ts_code): Add
OMP_TRAIT_CONSTRUCT_DISPATCH.
* tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_NOVARIANTS and
OMP_CLAUSE_NOCONTEXT.
* tree-pretty-print.cc (dump_omp_clause): Handle
OMP_CLAUSE_NOVARIANTS
and OMP_CLAUSE_NOCONTEXT.
(dump_generic_node): Handle OMP_DISPATCH.
* tree.cc (omp_clause_num_ops): Add OMP_CLAUSE_NOVARIANTS and
OMP_CLAUSE_NOCONTEXT.
(omp_clause_code_name): Add "novariants" and "nocontext".
* tree.def (OMP_DISPATCH): New.
* tree.h (OMP_DISPATCH_BODY): New macro.
(OMP_DISPATCH_CLAUSES): New macro.
(OMP_CLAUSE_NOVARIANTS_EXPR): New macro.
(OMP_CLAUSE_NOCONTEXT_EXPR): New macro.
gcc/fortran/ChangeLog:
* types.def (BT_FN_PTR_CONST_PTR_INT): Declare.
Diff:
---
gcc/builtin-types.def| 1 +
gcc/fortran/types.def| 1 +
gcc/omp-selectors.h | 1 +
gcc/tree-core.h | 7 +++
gcc/tree-pretty-print.cc | 21 +
gcc/tree.cc | 4
gcc/tree.def | 5 +
gcc/tree.h | 7 +++
8 files changed, 47 insertions(+)
diff --git a/gcc/builtin-types.def b/gcc/builtin-types.def
index 66ce164828fe..12f49e01de86 100644
--- a/gcc/builtin-types.def
+++ b/gcc/builtin-types.def
@@ -684,6 +684,7 @@ DEF_FUNCTION_TYPE_2 (BT_FN_INT_FEXCEPT_T_PTR_INT, BT_INT,
BT_FEXCEPT_T_PTR,
DEF_FUNCTION_TYPE_2 (BT_FN_INT_CONST_FEXCEPT_T_PTR_INT, BT_INT,
BT_CONST_FEXCEPT_T_PTR, BT_INT)
DEF_FUNCTION_TYPE_2 (BT_FN_PTR_CONST_PTR_UINT8, BT_PTR, BT_CONST_PTR, BT_UINT8)
+DEF_FUNCTION_TYPE_2 (BT_FN_PTR_CONST_PTR_INT, BT_PTR, BT_CONST_PTR, BT_INT)
DEF_POINTER_TYPE (BT_PTR_FN_VOID_PTR_PTR, BT_FN_VOID_PTR_PTR)
diff --git a/gcc/fortran/types.def b/gcc/fortran/types.def
index a69e25206f14..467393c3f07a 100644
--- a/gcc/fortran/types.def
+++ b/gcc/fortran/types.def
@@ -119,6 +119,7 @@ DEF_FUNCTION_TYPE_2 (BT_FN_BOOL_INT_BOOL, BT_BOOL, BT_INT,
BT_BOOL)
DEF_FUNCTION_TYPE_2 (BT_FN_VOID_PTR_PTRMODE,
BT_VOID, BT_PTR, BT_PTRMODE)
DEF_FUNCTION_TYPE_2 (BT_FN_VOID_CONST_PTR_SIZE, BT_VOID, BT_CONST_PTR, BT_SIZE)
+DEF_FUNCTION_TYPE_2 (BT_FN_PTR_CONST_PTR_INT, BT_PTR, BT_CONST_PTR, BT_INT)
DEF_POINTER_TYPE (BT_PTR_FN_VOID_PTR_PTR, BT_FN_VOID_PTR_PTR)
diff --git a/gcc/omp-selectors.h b/gcc/omp-selectors.h
index 730021ea7475..447c3b8173fb 100644
--- a/gcc/omp-selectors.h
+++ b/gcc/omp-selectors.h
@@ -56,6 +56,7 @@ enum omp_ts_code {
OMP_TRAIT_CONSTRUCT_PARALLEL,
OMP_TRAIT_CONSTRUCT_FOR,
OMP_TRAIT_CONSTRUCT_SIMD,
+ OMP_TRAIT_CONSTRUCT_DISPATCH,
OMP_TRAIT_LAST,
OMP_TRAIT_INVALID = -1
};
diff --git a/gcc/tree-core.h b/gcc/tree-core.h
index dd61ba3c23d3..c7229bd6d7dc 100644
--- a/gcc/tree-core.h
+++ b/gcc/tree-core.h
@@ -564,6 +564,13 @@ enum omp_clause_code {
/* OpenACC clause: nohost. */
OMP_CLAUSE_NOHOST,
+
+ /* OpenMP clause: novariants (scalar-expression). */
+ OMP_CLAUSE_NOVARIANTS,
+
+ /* OpenMP clause: nocontext (scalar-expression). */
+ OMP_CLAUSE_NOCONTEXT,
+
};
#undef DEFTREESTRUCT
diff --git a/gcc/tree-pretty-print.cc b/gcc/tree-pretty-print.cc
index eab5c60579da..5e3553012f3d 100644
--- a/gcc/tree-pretty-print.cc
+++ b/gcc/tree-pretty-print.cc
@@ -507,6 +507,22 @@ dump_omp_clause (pretty_printer *pp, tree clause, int spc,
dump_flags_t flags)
case OMP_CLAUSE_EXCLUSIVE:
name = "exclusive";
goto print_remap;
+case OMP_CLAUSE_NOVARIANTS:
+ pp_string (pp, "novariants");
+ pp_left_paren (pp);
+ gcc_assert (OMP_CLAUSE_NOVARIANTS_EXPR (clause));
+ dump_generic_node (pp, OMP_CLAUSE_NOVARIANTS_EXPR (clause), spc, flags,
+false);
+ pp_right_paren (pp);
+ break;
+case OMP_CLAUSE_NOCONTEXT:
+ pp_string (pp, "nocontext");
+ pp_left_paren (pp);
+ gcc_assert (OMP_CLAUSE_NOCONTEXT_EXPR (clause));
+ dump_generic_node (pp, OMP_CLAUSE_NOCONTEXT_EXPR (clause), spc, flags,
+false);
+ pp_right_paren (pp);
+ break;
case OMP_CLAUSE__LOOPTEMP_:
name = "_looptemp_";
goto print_remap;
@@ -3970,6 +3986,11 @@ dump_generic_node (pretty_printer *pp, tree node, int
spc, dump_flags_t flags,
[gcc r15-5518] OpenMP: C++ front-end support for dispatch + adjust_args
https://gcc.gnu.org/g:ed49709acda4938f71ef2dfac68450be5429db3d
commit r15-5518-ged49709acda4938f71ef2dfac68450be5429db3d
Author: Paul-Antoine Arras
Date: Wed Nov 20 15:28:58 2024 +0100
OpenMP: C++ front-end support for dispatch + adjust_args
This patch adds C++ support for the `dispatch` construct and the
`adjust_args`
clause. It relies on the c-family bits comprised in the corresponding C
front
end patch for pragmas and attributes.
Additional C/C++ common testcases are provided in a subsequent patch in the
series.
gcc/cp/ChangeLog:
* decl.cc (omp_declare_variant_finalize_one): Set adjust_args
need_device_ptr attribute.
* parser.cc (cp_parser_direct_declarator): Update call to
cp_parser_late_return_type_opt.
(cp_parser_late_return_type_opt): Add 'tree parms' parameter. Update
call to cp_parser_late_parsing_omp_declare_simd.
(cp_parser_omp_clause_name): Handle nocontext and novariants
clauses.
(cp_parser_omp_clause_novariants): New function.
(cp_parser_omp_clause_nocontext): Likewise.
(cp_parser_omp_all_clauses): Handle PRAGMA_OMP_CLAUSE_NOVARIANTS and
PRAGMA_OMP_CLAUSE_NOCONTEXT.
(cp_parser_omp_dispatch_body): New function, inspired from
cp_parser_assignment_expression and cp_parser_postfix_expression.
(OMP_DISPATCH_CLAUSE_MASK): Define.
(cp_parser_omp_dispatch): New function.
(cp_finish_omp_declare_variant): Add parameter. Handle adjust_args
clause.
(cp_parser_late_parsing_omp_declare_simd): Add parameter. Update
calls
to cp_finish_omp_declare_variant and cp_finish_omp_declare_variant.
(cp_parser_omp_construct): Handle PRAGMA_OMP_DISPATCH.
(cp_parser_pragma): Likewise.
* semantics.cc (finish_omp_clauses): Handle OMP_CLAUSE_NOCONTEXT and
OMP_CLAUSE_NOVARIANTS.
* pt.cc (tsubst_omp_clauses): Handle OMP_CLAUSE_NOCONTEXT and
OMP_CLAUSE_NOVARIANTS.
(tsubst_stmt): Handle OMP_DISPATCH.
(tsubst_expr): Handle IFN_GOMP_DISPATCH.
gcc/testsuite/ChangeLog:
* g++.dg/gomp/adjust-args-1.C: New test.
* g++.dg/gomp/adjust-args-2.C: New test.
* g++.dg/gomp/adjust-args-3.C: New test.
* g++.dg/gomp/dispatch-1.C: New test.
* g++.dg/gomp/dispatch-2.C: New test.
* g++.dg/gomp/dispatch-3.C: New test.
* g++.dg/gomp/dispatch-4.C: New test.
* g++.dg/gomp/dispatch-5.C: New test.
* g++.dg/gomp/dispatch-6.C: New test.
* g++.dg/gomp/dispatch-7.C: New test.
Diff:
---
gcc/cp/decl.cc| 7 +
gcc/cp/parser.cc | 466 +++---
gcc/cp/pt.cc | 28 ++
gcc/cp/semantics.cc | 20 ++
gcc/testsuite/g++.dg/gomp/adjust-args-1.C | 39 +++
gcc/testsuite/g++.dg/gomp/adjust-args-2.C | 51
gcc/testsuite/g++.dg/gomp/adjust-args-3.C | 6 +
gcc/testsuite/g++.dg/gomp/dispatch-1.C| 53
gcc/testsuite/g++.dg/gomp/dispatch-2.C| 62
gcc/testsuite/g++.dg/gomp/dispatch-3.C| 17 ++
gcc/testsuite/g++.dg/gomp/dispatch-4.C| 22 ++
gcc/testsuite/g++.dg/gomp/dispatch-5.C| 17 ++
gcc/testsuite/g++.dg/gomp/dispatch-6.C| 29 ++
gcc/testsuite/g++.dg/gomp/dispatch-7.C| 43 +++
14 files changed, 815 insertions(+), 45 deletions(-)
diff --git a/gcc/cp/decl.cc b/gcc/cp/decl.cc
index 25296a9de8f5..1ed1113f9e39 100644
--- a/gcc/cp/decl.cc
+++ b/gcc/cp/decl.cc
@@ -8401,6 +8401,13 @@ omp_declare_variant_finalize_one (tree decl, tree attr)
if (!omp_context_selector_matches (ctx))
return true;
TREE_PURPOSE (TREE_VALUE (attr)) = variant;
+
+ // Prepend adjust_args list to variant attributes
+ tree adjust_args_list = TREE_CHAIN (TREE_CHAIN (chain));
+ if (adjust_args_list != NULL_TREE)
+ DECL_ATTRIBUTES (variant) = tree_cons (
+ get_identifier ("omp declare variant variant adjust_args"),
+ TREE_VALUE (adjust_args_list), DECL_ATTRIBUTES (variant));
}
}
else if (!processing_template_decl)
diff --git a/gcc/cp/parser.cc b/gcc/cp/parser.cc
index 07b12224615a..ed10f58422ea 100644
--- a/gcc/cp/parser.cc
+++ b/gcc/cp/parser.cc
@@ -19,6 +19,7 @@ along with GCC; see the file COPYING3. If not see
[gcc r15-5520] libgccjit: Add vector permutation and vector access operations
https://gcc.gnu.org/g:452abe143e8b9254139f188fce7a674700a10d98 commit r15-5520-g452abe143e8b9254139f188fce7a674700a10d98 Author: Antoni Boucher Date: Fri Nov 17 17:23:28 2023 -0500 libgccjit: Add vector permutation and vector access operations gcc/jit/ChangeLog: PR jit/112602 * docs/topics/compatibility.rst (LIBGCCJIT_ABI_31): New ABI tag. * docs/topics/expressions.rst: Document gcc_jit_context_new_rvalue_vector_perm and gcc_jit_context_new_vector_access. * jit-playback.cc (playback::context::new_rvalue_vector_perm, common_mark_addressable_vec, gnu_vector_type_p, lvalue_p, convert_vector_to_array_for_subscript, new_vector_access): new functions. * jit-playback.h (new_rvalue_vector_perm, new_vector_access): New functions. * jit-recording.cc (recording::context::new_rvalue_vector_perm, recording::context::new_vector_access, memento_of_new_rvalue_vector_perm, recording::memento_of_new_rvalue_vector_perm::replay_into, recording::memento_of_new_rvalue_vector_perm::visit_children, recording::memento_of_new_rvalue_vector_perm::make_debug_string, recording::memento_of_new_rvalue_vector_perm::write_reproducer, recording::vector_access::replay_into, recording::vector_access::visit_children, recording::vector_access::make_debug_string, recording::vector_access::write_reproducer): New methods. * jit-recording.h (class memento_of_new_rvalue_vector_perm, class vector_access): New classes. * libgccjit.cc (gcc_jit_context_new_vector_access, gcc_jit_context_new_rvalue_vector_perm): New functions. * libgccjit.h (gcc_jit_context_new_rvalue_vector_perm, gcc_jit_context_new_vector_access): New functions. * libgccjit.map: New functions. gcc/testsuite/ChangeLog: PR jit/112602 * jit.dg/all-non-failing-tests.h: New test test-vector-perm.c. * jit.dg/test-vector-perm.c: New test. Diff: --- gcc/jit/docs/topics/compatibility.rst| 10 ++ gcc/jit/docs/topics/expressions.rst | 53 + gcc/jit/jit-playback.cc | 150 gcc/jit/jit-playback.h | 10 ++ gcc/jit/jit-recording.cc | 166 +++ gcc/jit/jit-recording.h | 72 gcc/jit/libgccjit.cc | 112 ++ gcc/jit/libgccjit.h | 29 + gcc/jit/libgccjit.map| 6 + gcc/testsuite/jit.dg/all-non-failing-tests.h | 12 +- gcc/testsuite/jit.dg/test-vector-perm.c | 96 11 files changed, 715 insertions(+), 1 deletion(-) diff --git a/gcc/jit/docs/topics/compatibility.rst b/gcc/jit/docs/topics/compatibility.rst index 33fa763d0213..77b4c5df9979 100644 --- a/gcc/jit/docs/topics/compatibility.rst +++ b/gcc/jit/docs/topics/compatibility.rst @@ -418,3 +418,13 @@ on functions and variables: ``LIBGCCJIT_ABI_30`` covers the addition of :func:`gcc_jit_context_convert_vector` +=== + +.. _LIBGCCJIT_ABI_31: + +``LIBGCCJIT_ABI_31`` + +``LIBGCCJIT_ABI_31`` covers the addition of functions to manipulate vectors: + + * :func:`gcc_jit_context_new_rvalue_vector_perm` + * :func:`gcc_jit_context_new_vector_access` diff --git a/gcc/jit/docs/topics/expressions.rst b/gcc/jit/docs/topics/expressions.rst index ca923e7f60c2..2b6e71d5b1bc 100644 --- a/gcc/jit/docs/topics/expressions.rst +++ b/gcc/jit/docs/topics/expressions.rst @@ -323,6 +323,35 @@ Vector expressions #ifdef LIBGCCJIT_HAVE_gcc_jit_context_new_rvalue_from_vector +.. function:: gcc_jit_rvalue * \ + gcc_jit_context_new_rvalue_vector_perm (gcc_jit_context *ctxt, \ + gcc_jit_location *loc, \ + gcc_jit_rvalue *elements1, \ + gcc_jit_rvalue *elements2, \ + gcc_jit_rvalue *mask); + + Build a permutation of two vectors. + + "elements1" and "elements2" should have the same type. + The length of "mask" and "elements1" should be the same. + The element type of "mask" should be integral. + The size of the element type of "mask" and "elements1" should be the same. + + This entrypoint was added in :ref:`LIBGCCJIT_ABI_31`; you can test for + its presence using + + .. code-block:: c + + #ifdef LIBGCCJIT_HAVE_VECTOR_OPERATIONS + +Analogous to: + +.. code-block:: c + + __builtin_shuffle (elements1, elements2, mask) + +in C. + Unary Operations **
[gcc r15-5521] libgccjit: Add option to allow special characters in function names
https://gcc.gnu.org/g:ede14092bc33e182ee6c811c335bf9aac789d7be
commit r15-5521-gede14092bc33e182ee6c811c335bf9aac789d7be
Author: Antoni Boucher
Date: Thu Feb 15 17:03:22 2024 -0500
libgccjit: Add option to allow special characters in function names
gcc/jit/ChangeLog:
* docs/topics/contexts.rst: Add documentation for new option.
* jit-recording.cc (recording::context::get_str_option): New
method.
* jit-recording.h (get_str_option): New method.
* libgccjit.cc (gcc_jit_context_new_function): Allow special
characters in function names.
* libgccjit.h (enum gcc_jit_str_option): New option.
gcc/testsuite/ChangeLog:
* jit.dg/test-special-chars.c: New test.
Diff:
---
gcc/jit/docs/topics/contexts.rst | 9 +--
gcc/jit/jit-recording.cc | 17 +++--
gcc/jit/jit-recording.h | 3 +++
gcc/jit/libgccjit.cc | 8 --
gcc/jit/libgccjit.h | 3 +++
gcc/testsuite/jit.dg/test-special-chars.c | 41 +++
6 files changed, 75 insertions(+), 6 deletions(-)
diff --git a/gcc/jit/docs/topics/contexts.rst b/gcc/jit/docs/topics/contexts.rst
index 10a0e50f9f62..ba075cd71d35 100644
--- a/gcc/jit/docs/topics/contexts.rst
+++ b/gcc/jit/docs/topics/contexts.rst
@@ -317,13 +317,18 @@ String Options
copy of the underlying string, so it is valid to pass in a pointer to
an on-stack buffer.
- There is just one string option specified this way:
-
.. macro:: GCC_JIT_STR_OPTION_PROGNAME
The name of the program, for use as a prefix when printing error
messages to stderr. If `NULL`, or default, "libgccjit.so" is used.
+ .. macro:: GCC_JIT_STR_OPTION_SPECIAL_CHARS_IN_FUNC_NAMES
+
+ Alphabetic ASCII characters and underscores are always valid. Numeric
+ ASCII characters are always valid after the initial character of the
+ string. Use this entrypoint to specify additional ASCII characters that
+ are valid throughout function names (ex.: ".$").
+
Boolean options
***
diff --git a/gcc/jit/jit-recording.cc b/gcc/jit/jit-recording.cc
index 7cbe383c79db..90ac5bdafffc 100644
--- a/gcc/jit/jit-recording.cc
+++ b/gcc/jit/jit-recording.cc
@@ -1424,6 +1424,18 @@ recording::context::set_str_option (enum
gcc_jit_str_option opt,
log_str_option (opt);
}
+const char*
+recording::context::get_str_option (enum gcc_jit_str_option opt)
+{
+ if (opt < 0 || opt >= GCC_JIT_NUM_STR_OPTIONS)
+{
+ add_error (NULL,
+"unrecognized (enum gcc_jit_str_option) value: %i", opt);
+ return NULL;
+}
+ return m_str_options[opt];
+}
+
/* Set the given integer option for this context, or add an error if
it's not recognized.
@@ -1765,7 +1777,8 @@ recording::context::dump_to_file (const char *path, bool
update_locations)
static const char * const
str_option_reproducer_strings[GCC_JIT_NUM_STR_OPTIONS] = {
- "GCC_JIT_STR_OPTION_PROGNAME"
+ "GCC_JIT_STR_OPTION_PROGNAME",
+ "GCC_JIT_STR_OPTION_SPECIAL_CHARS_IN_FUNC_NAMES",
};
static const char * const
@@ -1782,7 +1795,7 @@ static const char * const
"GCC_JIT_BOOL_OPTION_DUMP_SUMMARY",
"GCC_JIT_BOOL_OPTION_DUMP_EVERYTHING",
"GCC_JIT_BOOL_OPTION_SELFCHECK_GC",
- "GCC_JIT_BOOL_OPTION_KEEP_INTERMEDIATES"
+ "GCC_JIT_BOOL_OPTION_KEEP_INTERMEDIATES",
};
static const char * const
diff --git a/gcc/jit/jit-recording.h b/gcc/jit/jit-recording.h
index e5a920fac499..13c2ea735027 100644
--- a/gcc/jit/jit-recording.h
+++ b/gcc/jit/jit-recording.h
@@ -255,6 +255,9 @@ public:
set_str_option (enum gcc_jit_str_option opt,
const char *value);
+ const char*
+ get_str_option (enum gcc_jit_str_option opt);
+
void
set_int_option (enum gcc_jit_int_option opt,
int value);
diff --git a/gcc/jit/libgccjit.cc b/gcc/jit/libgccjit.cc
index 63dee7049af9..3a7a4e26931f 100644
--- a/gcc/jit/libgccjit.cc
+++ b/gcc/jit/libgccjit.cc
@@ -1201,10 +1201,13 @@ gcc_jit_context_new_function (gcc_jit_context *ctxt,
Eventually we'll need some way to interact with e.g. C++ name
mangling. */
{
+const char* special_chars_allowed
+ = ctxt->get_str_option (GCC_JIT_STR_OPTION_SPECIAL_CHARS_IN_FUNC_NAMES);
/* Leading char: */
char ch = *name;
RETURN_NULL_IF_FAIL_PRINTF2 (
- ISALPHA (ch) || ch == '_',
+ ISALPHA (ch) || ch == '_' || (special_chars_allowed
+ && strchr (special_chars_allowed, ch)),
ctxt, loc,
"name \"%s\" contains invalid character: '%c'",
name, ch);
@@ -1212,7 +1215,8 @@ gcc_jit_context_new_function (gcc_jit_context *ctxt,
for (const char *ptr = name + 1; (ch = *ptr); ptr++)
{
RETURN_NULL_IF_FAIL_PRINTF2 (
- ISALNUM (ch) || ch == '_',
+ ISALNUM (ch) || ch == '_' || (special_chars_allowed
+ && strchr (spec
[gcc r15-5526] rtl-reader: Disable reuse_rtx support for generator building
https://gcc.gnu.org/g:e74f3eb1897745706b7b4d10bb60fc7f28f25b5e
commit r15-5526-ge74f3eb1897745706b7b4d10bb60fc7f28f25b5e
Author: Andrew Pinski
Date: Tue Nov 19 23:45:20 2024 -0800
rtl-reader: Disable reuse_rtx support for generator building
reuse_rtx is not documented nor the format to use it is ever documented.
So it should not be supported for the .md files.
This also fixes the problem if an invalid index is supplied for reuse_rtx,
instead of ICEing, put out a real error message. Note since this code
still uses atoi, an invalid index can still be used in some cases but that
is
recorded as part of PR 44574.
Note I did a grep of the sources to make sure that this was only used for
the read rtl in the GCC rather than while reading in .md files.
Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* read-md.h (class rtx_reader): Don't include m_reuse_rtx_by_id
when GENERATOR_FILE is defined.
* read-rtl.cc (rtx_reader::read_rtx_code): Disable reuse_rtx
support when GENERATOR_FILE is defined.
Signed-off-by: Andrew Pinski
Diff:
---
gcc/read-md.h | 2 ++
gcc/read-rtl.cc | 9 +++--
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/gcc/read-md.h b/gcc/read-md.h
index 9703551a8fd4..e613c42b7241 100644
--- a/gcc/read-md.h
+++ b/gcc/read-md.h
@@ -364,8 +364,10 @@ class rtx_reader : public md_reader
/* Analogous to rtx_writer's m_in_call_function_usage. */
bool m_in_call_function_usage;
+#ifndef GENERATOR_FILE
/* Support for "reuse_rtx" directives. */
auto_vec m_reuse_rtx_by_id;
+#endif
};
/* Global singleton; constrast with md_reader_ptr above. */
diff --git a/gcc/read-rtl.cc b/gcc/read-rtl.cc
index bfce806f9d69..630f9c59c37b 100644
--- a/gcc/read-rtl.cc
+++ b/gcc/read-rtl.cc
@@ -1672,7 +1672,6 @@ rtx_reader::read_rtx_code (const char *code_name)
struct md_name name;
rtx return_rtx;
int c;
- long reuse_id = -1;
/* Linked list structure for making RTXs: */
struct rtx_list
@@ -1681,6 +1680,8 @@ rtx_reader::read_rtx_code (const char *code_name)
rtx value; /* Value of this node. */
};
+#ifndef GENERATOR_FILE
+ long reuse_id = -1;
/* Handle reuse_rtx ids e.g. "(0|scratch:DI)". */
if (ISDIGIT (code_name[0]))
{
@@ -1696,10 +1697,12 @@ rtx_reader::read_rtx_code (const char *code_name)
read_name (&name);
unsigned idx = atoi (name.string);
/* Look it up by ID. */
- gcc_assert (idx < m_reuse_rtx_by_id.length ());
+ if (idx >= m_reuse_rtx_by_id.length ())
+ fatal_with_file_and_line ("invalid reuse index %u", idx);
return_rtx = m_reuse_rtx_by_id[idx];
return return_rtx;
}
+#endif
/* Handle "const_double_zero". */
if (strcmp (code_name, "const_double_zero") == 0)
@@ -1727,12 +1730,14 @@ rtx_reader::read_rtx_code (const char *code_name)
memset (return_rtx, 0, RTX_CODE_SIZE (code));
PUT_CODE (return_rtx, code);
+#ifndef GENERATOR_FILE
if (reuse_id != -1)
{
/* Store away for later reuse. */
m_reuse_rtx_by_id.safe_grow_cleared (reuse_id + 1, true);
m_reuse_rtx_by_id[reuse_id] = return_rtx;
}
+#endif
/* Check for flags. */
read_flags (return_rtx);
[gcc r15-5544] testsuite: arm: Use effective-target for vect-early-break-cbranch test
https://gcc.gnu.org/g:ec5adef9bec3c981e3332d621ac5e59c23aab593
commit r15-5544-gec5adef9bec3c981e3332d621ac5e59c23aab593
Author: Torbjörn SVENSSON
Date: Sun Oct 13 21:39:40 2024 +0200
testsuite: arm: Use effective-target for vect-early-break-cbranch test
Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.
gcc/testsuite/ChangeLog:
* gcc.target/arm/vect-early-break-cbranch.c: Use
effective-target arm_arch_v8a_hard.
Signed-off-by: Torbjörn SVENSSON
Diff:
---
gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
index 334e064a2393..4dc0edd874b4 100644
--- a/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
+++ b/gcc/testsuite/gcc.target/arm/vect-early-break-cbranch.c
@@ -1,8 +1,8 @@
/* { dg-do compile } */
/* { dg-require-effective-target vect_early_break } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-require-effective-target arm32 } */
-/* { dg-options "-O3 -march=armv8-a+simd -mfpu=auto -mfloat-abi=hard
-fno-schedule-insns -fno-reorder-blocks -fno-schedule-insns2" } */
+/* { dg-require-effective-target arm_arch_v8a_hard_ok } */
+/* { dg-options "-O3 -fno-schedule-insns -fno-reorder-blocks
-fno-schedule-insns2" } */
+/* { dg-add-options arm_arch_v8a_hard } */
/* { dg-final { check-function-bodies "**" "" "" } } */
#define N 640
[gcc r15-5545] testsuite: arm: Use effective-target for nomve_fp_1.c test
https://gcc.gnu.org/g:115ae676fc7b77b7544fc5393479c7d9759b7297
commit r15-5545-g115ae676fc7b77b7544fc5393479c7d9759b7297
Author: Torbjörn SVENSSON
Date: Fri Oct 18 21:00:31 2024 +0200
testsuite: arm: Use effective-target for nomve_fp_1.c test
Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.
gcc/testsuite/ChangeLog:
* g++.target/arm/mve/general-c++/nomve_fp_1.c: Added option
"-mcpu=unset".
Signed-off-by: Torbjörn SVENSSON
Diff:
---
gcc/testsuite/g++.target/arm/mve/general-c++/nomve_fp_1.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/g++.target/arm/mve/general-c++/nomve_fp_1.c
b/gcc/testsuite/g++.target/arm/mve/general-c++/nomve_fp_1.c
index a2069d353cf9..fd8c05b0eed4 100644
--- a/gcc/testsuite/g++.target/arm/mve/general-c++/nomve_fp_1.c
+++ b/gcc/testsuite/g++.target/arm/mve/general-c++/nomve_fp_1.c
@@ -4,7 +4,7 @@
/* Do not use dg-add-options arm_v8_1m_mve, because this might expand to "",
which could imply mve+fp depending on the user settings. We want to make
sure the '+fp' extension is not enabled. */
-/* { dg-options "-mfpu=auto -march=armv8.1-m.main+mve" } */
+/* { dg-options "-mfpu=auto -mcpu=unset -march=armv8.1-m.main+mve" } */
/* { dg-add-options arm_fp } */
#include
[gcc r15-5547] testsuite: arm: Use -march=unset for cortex-m55* tests
https://gcc.gnu.org/g:49d3da051827b0c609b43f474ce723d3ada48055
commit r15-5547-g49d3da051827b0c609b43f474ce723d3ada48055
Author: Torbjörn SVENSSON
Date: Sun Oct 13 13:33:05 2024 +0200
testsuite: arm: Use -march=unset for cortex-m55* tests
Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.
gcc/testsuite/ChangeLog:
* gcc.target/arm/cortex-m55-nodsp-flag-hard.c: Added option
"-march=unset".
* gcc.target/arm/cortex-m55-nodsp-flag-softfp.c: Likewise.
* gcc.target/arm/cortex-m55-nodsp-nofp-flag-softfp.c: Likesie.
* gcc.target/arm/cortex-m55-nofp-flag-hard.c: Likewise.
* gcc.target/arm/cortex-m55-nofp-flag-softfp.c: Likewise.
* gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c: Likewise.
* gcc.target/arm/cortex-m55-nomve-flag-hard.c: Likewise.
* gcc.target/arm/cortex-m55-nomve-flag-softfp.c: Likewise.
* gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c: Likewise.
* gcc.target/arm/cortex-m55-nomve.fp-flag-softfp.c: Likewise.
Signed-off-by: Torbjörn SVENSSON
Diff:
---
gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-flag-hard.c| 2 +-
gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-flag-softfp.c | 2 +-
gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-nofp-flag-softfp.c | 2 +-
gcc/testsuite/gcc.target/arm/cortex-m55-nofp-flag-hard.c | 2 +-
gcc/testsuite/gcc.target/arm/cortex-m55-nofp-flag-softfp.c | 2 +-
gcc/testsuite/gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c | 2 +-
gcc/testsuite/gcc.target/arm/cortex-m55-nomve-flag-hard.c| 2 +-
gcc/testsuite/gcc.target/arm/cortex-m55-nomve-flag-softfp.c | 2 +-
gcc/testsuite/gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c | 2 +-
gcc/testsuite/gcc.target/arm/cortex-m55-nomve.fp-flag-softfp.c | 2 +-
10 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-flag-hard.c
b/gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-flag-hard.c
index 92c15112ae7a..9810e28f58d6 100644
--- a/gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-flag-hard.c
+++ b/gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-flag-hard.c
@@ -1,6 +1,6 @@
/* { dg-do assemble } */
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-additional-options "-mcpu=cortex-m55+nodsp -mthumb -mfloat-abi=hard
-mfpu=auto --save-temps" } */
+/* { dg-additional-options "-march=unset -mcpu=cortex-m55+nodsp -mthumb
-mfloat-abi=hard -mfpu=auto --save-temps" } */
/* { dg-final { scan-assembler "\.arch_extension fp" } } */
/* { dg-final { scan-assembler "\.arch_extension fp.dp" } } */
/* { dg-final { scan-assembler-not "\.arch_extension dsp" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-flag-softfp.c
b/gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-flag-softfp.c
index 89d778f8ecbf..cc92d8ccc60a 100644
--- a/gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-flag-softfp.c
+++ b/gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-flag-softfp.c
@@ -1,6 +1,6 @@
/* { dg-do assemble } */
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-additional-options "-mcpu=cortex-m55+nodsp -mthumb -mfloat-abi=softfp
-mfpu=auto --save-temps" } */
+/* { dg-additional-options "-march=unset -mcpu=cortex-m55+nodsp -mthumb
-mfloat-abi=softfp -mfpu=auto --save-temps" } */
/* { dg-final { scan-assembler "\.arch_extension fp" } } */
/* { dg-final { scan-assembler "\.arch_extension fp.dp" } } */
/* { dg-final { scan-assembler-not "\.arch_extension dsp" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-nofp-flag-softfp.c
b/gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-nofp-flag-softfp.c
index 405090ca9e9b..11d4634a30fe 100644
--- a/gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-nofp-flag-softfp.c
+++ b/gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-nofp-flag-softfp.c
@@ -1,6 +1,6 @@
/* { dg-do assemble } */
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-additional-options "-mcpu=cortex-m55+nodsp+nofp -mthumb
-mfloat-abi=softfp -mfpu=auto --save-temps" } */
+/* { dg-additional-options "-march=unset -mcpu=cortex-m55+nodsp+nofp -mthumb
-mfloat-abi=softfp -mfpu=auto --save-temps" } */
/* { dg-final { scan-assembler-not "\.arch_extension fp" } } */
/* { dg-final { scan-assembler-not "\.arch_extension fp.dp" } } */
/* { dg-final { scan-assembler-not "\.arch_extension dsp" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cortex-m55-nofp-flag-hard.c
b/gcc/testsuite/gcc.target/arm/cortex-m55-nofp-flag-hard.c
index e0fb307ac306..bed231fc711c 100644
--- a/gcc/testsuite/gcc.target/arm/cortex-m55-nofp-flag-hard.c
+++ b/gcc/testsuite/gcc.target/arm/cortex-m55-nofp-flag-hard.c
@@ -1,6 +1,6 @@
/* { dg-do assemble } */
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-additional-options "-mcpu=cortex-m55+nofp -mthumb -mfloat-abi=hard
-mfpu=auto --save-tem
[gcc r15-5543] testsuite: arm: Use effective-target for {gcc, g++}.target/arm/ tests
https://gcc.gnu.org/g:3192c1df360c18b9443280507322777f3a81077b
commit r15-5543-g3192c1df360c18b9443280507322777f3a81077b
Author: Torbjörn SVENSSON
Date: Sun Oct 13 20:52:50 2024 +0200
testsuite: arm: Use effective-target for {gcc,g++}.target/arm/ tests
Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.
gcc/testsuite/ChangeLog:
* g++.target/arm/pr103676.C: Use effective-target
arm_cpu_cortex_m7.
* gcc.target/arm/no-volatile-in-it.c: Likewise.
* gcc.target/arm/fma-sp.c: Use effective-target
arm_cpu_cortex_m4_hard.
* gcc.target/arm/pr53859.c: Use effective-target
arm_cpu_cortex_m4.
* gcc.target/arm/mve/intrinsics/pr97327.c: Use effective-target
arm_cpu_cortex_m55.
* gcc.target/arm/pr65067.c: Use effective-target
arm_cpu_cortex_m3.
* lib/target-supports.exp: Define effective-target
arm_cpu_cortex_m3, arm_cpu_cortex_m4, arm_cpu_cortex_m4_hard,
arm_cpu_cortex_m7 and arm_cpu_cortex_m55.
Signed-off-by: Torbjörn SVENSSON
Diff:
---
gcc/testsuite/g++.target/arm/pr103676.C | 6 --
gcc/testsuite/gcc.target/arm/fma-sp.c | 8 +++-
gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c | 7 ---
gcc/testsuite/gcc.target/arm/no-volatile-in-it.c | 5 +++--
gcc/testsuite/gcc.target/arm/pr53859.c| 5 +++--
gcc/testsuite/gcc.target/arm/pr65067.c| 5 +++--
gcc/testsuite/lib/target-supports.exp | 5 +
7 files changed, 25 insertions(+), 16 deletions(-)
diff --git a/gcc/testsuite/g++.target/arm/pr103676.C
b/gcc/testsuite/g++.target/arm/pr103676.C
index 1607564ff5d1..eefcd9dc6a1c 100644
--- a/gcc/testsuite/g++.target/arm/pr103676.C
+++ b/gcc/testsuite/g++.target/arm/pr103676.C
@@ -1,6 +1,8 @@
/* { dg-do compile } */
-/* { dg-require-effective-target arm_thumb1_ok } */
-/* { dg-additional-options "-mcpu=cortex-m7 -mthumb -O2" } */
+/* { dg-require-effective-target arm_cpu_cortex_m7_ok } */
+/* { dg-additional-options "-O2" } */
+/* { dg-add-options arm_cpu_cortex_m7 } */
+
typedef unsigned long long uint64_t;
struct timer {
diff --git a/gcc/testsuite/gcc.target/arm/fma-sp.c
b/gcc/testsuite/gcc.target/arm/fma-sp.c
index e1884545f0db..570457bbc8af 100644
--- a/gcc/testsuite/gcc.target/arm/fma-sp.c
+++ b/gcc/testsuite/gcc.target/arm/fma-sp.c
@@ -1,9 +1,7 @@
/* { dg-do compile } */
-/* { dg-skip-if "avoid conflicts with multilib options" { ! arm_thumb2_ok } {
"-march=*" } { "" } } */
-/* { dg-skip-if "avoid conflicts with multilib options" { *-*-* } { "-mcpu=*"
} { "-mcpu=cortex-m4" } } */
-/* { dg-skip-if "avoid conflicts with multilib options" { *-*-* } { "-mfpu=*"
} { "-mfpu=fpv4-sp-d16" } } */
-/* { dg-skip-if "avoid conflicts with multilib options" { *-*-* } {
"-mfloat-abi=*" } { "-mfloat-abi=hard" } } */
-/* { dg-options "-O2 -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mthumb
-mfloat-abi=hard" } */
+/* { dg-require-effective-target arm_cpu_cortex_m4_hard_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_cpu_cortex_m4_hard } */
#include "fma.h"
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c
b/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c
index d19bde592663..dd6cc5986306 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr97327.c
@@ -1,6 +1,7 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-skip-if "Incompatible float ABI" { *-*-* } { "-mfloat-abi=hard" } { ""
} } */
-/* { dg-additional-options "-mcpu=cortex-m55 -mthumb -mfloat-abi=soft
-mfpu=auto -Werror" } */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_cpu_cortex_m55_ok } */
+/* { dg-add-options arm_cpu_cortex_m55 } */
+/* { dg-additional-options "-mfloat-abi=soft -Werror" } */
int main ()
{
diff --git a/gcc/testsuite/gcc.target/arm/no-volatile-in-it.c
b/gcc/testsuite/gcc.target/arm/no-volatile-in-it.c
index 6f3664d3b3d1..119e9ecf3217 100644
--- a/gcc/testsuite/gcc.target/arm/no-volatile-in-it.c
+++ b/gcc/testsuite/gcc.target/arm/no-volatile-in-it.c
@@ -1,7 +1,8 @@
/* { dg-do compile } */
+/* { dg-require-effective-target arm_cpu_cortex_m7_ok } */
/* { dg-require-effective-target arm_thumb2_ok } */
-/* { dg-skip-if "do not override -mcpu" { *-*-* } { "-march=*" "-mcpu=*" } {
"-mcpu=cortex-m7" } } */
-/* { dg-options "-Os -mthumb -mcpu=cortex-m7" } */
+/* { dg-options "-Os" } */
+/* { dg-add-options arm_cpu_cortex_m7 } */
int
foo (int a, int b, volatile int *c, volatile int *d)
diff --git a/gcc/testsuite/gcc.target/arm/pr53859.c
b/gcc/testsuite/gcc.target/arm/pr53859.c
index 003489e0bb7c..48d9df85be68 100644
--- a/gcc/testsuite/gcc.target/arm/pr53859.c
+++ b/gcc/testsuite/gcc.target/arm/pr53859.c
@@ -1,7 +1,8 @@
/* PR target/53859 */
/* { dg-do compile } */
[gcc r15-5537] testsuite: arm: Use effective-target for bti* and pac* tests
https://gcc.gnu.org/g:3ae9d01eb470841914ce96c30a33041e5dd30e1b
commit r15-5537-g3ae9d01eb470841914ce96c30a33041e5dd30e1b
Author: Torbjörn SVENSSON
Date: Sun Oct 13 11:58:07 2024 +0200
testsuite: arm: Use effective-target for bti* and pac* tests
Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.
gcc/testsuite/ChangeLog:
* gcc.target/arm/pac-1.c: Use effective-target
arm_arch_v8_1m_main_pacbti.
* gcc.target/arm/pac-2.c: Likewise.
* gcc.target/arm/pac-3.c: Likewise.
* gcc.target/arm/pac-4.c: Likewise.
* gcc.target/arm/pac-5.c: Likewise.
* gcc.target/arm/pac-7.c: Likewise.
* gcc.target/arm/pac-8.c: Likewise.
* gcc.target/arm/pac-9.c: Likewise.
* gcc.target/arm/pac-10.c: Likewise.
* gcc.target/arm/pac-11.c: Likewise.
* gcc.target/arm/pac-12.c: Added option "-mcpu=unset".
* gcc.target/arm/pac-13.c: Likewise.
* gcc.target/arm/pac-14.c: Likewise.
* lib/target-supports.exp
(check_effective_target_arm_pacbti_hw): Likewise.
* gcc.target/arm/pac-6.c: Use effective-target
arm_arch_v8_1m_main.
* gcc.target/arm/pac-15.c: Use effective-target
arm_arch_v8_1m_main_pacbti and added option "-mcpu=unset".
Signed-off-by: Torbjörn SVENSSON
Co-authored-by: Yvan ROUX
Diff:
---
gcc/testsuite/gcc.target/arm/pac-1.c | 4 +++-
gcc/testsuite/gcc.target/arm/pac-10.c | 4 +++-
gcc/testsuite/gcc.target/arm/pac-11.c | 4 +++-
gcc/testsuite/gcc.target/arm/pac-12.c | 2 +-
gcc/testsuite/gcc.target/arm/pac-13.c | 2 +-
gcc/testsuite/gcc.target/arm/pac-14.c | 2 +-
gcc/testsuite/gcc.target/arm/pac-15.c | 4 ++--
gcc/testsuite/gcc.target/arm/pac-2.c | 4 +++-
gcc/testsuite/gcc.target/arm/pac-3.c | 4 +++-
gcc/testsuite/gcc.target/arm/pac-4.c | 4 +++-
gcc/testsuite/gcc.target/arm/pac-5.c | 4 +++-
gcc/testsuite/gcc.target/arm/pac-6.c | 4 +++-
gcc/testsuite/gcc.target/arm/pac-7.c | 4 +++-
gcc/testsuite/gcc.target/arm/pac-8.c | 4 +++-
gcc/testsuite/gcc.target/arm/pac-9.c | 4 +++-
gcc/testsuite/lib/target-supports.exp | 2 +-
16 files changed, 39 insertions(+), 17 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/pac-1.c
b/gcc/testsuite/gcc.target/arm/pac-1.c
index e0eea0858e03..a2bec3552148 100644
--- a/gcc/testsuite/gcc.target/arm/pac-1.c
+++ b/gcc/testsuite/gcc.target/arm/pac-1.c
@@ -1,8 +1,10 @@
/* Testing return address signing. */
/* { dg-do run } */
+/* { dg-require-effective-target arm_arch_v8_1m_main_pacbti_link } */
/* { dg-require-effective-target mbranch_protection_ok } */
/* { dg-require-effective-target arm_pacbti_hw } */
-/* { dg-options "-march=armv8.1-m.main+pacbti+fp
-mbranch-protection=pac-ret+leaf -mthumb -mfloat-abi=hard --save-temps -O0" } */
+/* { dg-options "-mbranch-protection=pac-ret+leaf -mfloat-abi=hard
--save-temps -O0" } */
+/* { dg-add-options arm_arch_v8_1m_main_pacbti } */
#include "pac.h"
diff --git a/gcc/testsuite/gcc.target/arm/pac-10.c
b/gcc/testsuite/gcc.target/arm/pac-10.c
index 6da8434aeaf0..0882dad74069 100644
--- a/gcc/testsuite/gcc.target/arm/pac-10.c
+++ b/gcc/testsuite/gcc.target/arm/pac-10.c
@@ -1,7 +1,9 @@
/* Testing return address signing. */
/* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8_1m_main_pacbti_ok } */
/* { dg-require-effective-target mbranch_protection_ok } */
-/* { dg-options "-march=armv8.1-m.main+pacbti+fp -mbranch-protection=pac-ret
-mthumb -mfloat-abi=hard --save-temps -O0" } */
+/* { dg-options "-mbranch-protection=pac-ret -mfloat-abi=hard --save-temps
-O0" } */
+/* { dg-add-options arm_arch_v8_1m_main_pacbti } */
#include "pac.h"
diff --git a/gcc/testsuite/gcc.target/arm/pac-11.c
b/gcc/testsuite/gcc.target/arm/pac-11.c
index 0bb727c2c800..32685a726b71 100644
--- a/gcc/testsuite/gcc.target/arm/pac-11.c
+++ b/gcc/testsuite/gcc.target/arm/pac-11.c
@@ -1,7 +1,9 @@
/* Testing return address signing. */
/* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8_1m_main_pacbti_ok } */
/* { dg-require-effective-target mbranch_protection_ok } */
-/* { dg-options "-march=armv8.1-m.main+pacbti+fp
-mbranch-protection=bti+pac-ret+leaf -mthumb -mfloat-abi=hard --save-temps -O2"
} */
+/* { dg-options "-mbranch-protection=bti+pac-ret+leaf -mfloat-abi=hard
--save-temps -O2" } */
+/* { dg-add-options arm_arch_v8_1m_main_pacbti } */
#include "pac.h"
diff --git a/gcc/testsuite/gcc.target/arm/pac-12.c
b/gcc/testsuite/gcc.target/arm/pac-12.c
index 6e1295c834d0..37bf0047c2ec 100644
--- a/gcc/testsuite/gcc.target/arm/pac-12.c
+++ b/gcc/testsuite/gcc.target/arm/pac-12.c
@@ -2,6 +2,6 @@
/* { dg-do run } */
/* { dg-require-effective-target arm_pacbti_hw } */
/* { dg-skip-if "need fp instructions" { *-*-* } { "" } { "-mfloat-abi=hard" }
} */
-/* { dg-options "-march=armv8.1-m.main+dsp+f
[gcc r15-5539] testsuite: arm: Use effective-target for crc_hf_1.c test
https://gcc.gnu.org/g:0380051bba3f33c69d3114d6c4561ef48b633310
commit r15-5539-g0380051bba3f33c69d3114d6c4561ef48b633310
Author: Torbjörn SVENSSON
Date: Sun Oct 13 13:40:26 2024 +0200
testsuite: arm: Use effective-target for crc_hf_1.c test
Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.
gcc/testsuite/ChangeLog:
* gcc.target/arm/acle/crc_hf_1.c: Use effective-target
arm_arch_v8a_crc_hard.
* lib/target-supports.exp: Define effective-target
arm_arch_v8a_crc_hard.
Signed-off-by: Torbjörn SVENSSON
Diff:
---
gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c | 4 ++--
gcc/testsuite/lib/target-supports.exp| 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c
b/gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c
index f1de2bdffee4..b9c036a2c5ca 100644
--- a/gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c
+++ b/gcc/testsuite/gcc.target/arm/acle/crc_hf_1.c
@@ -2,8 +2,8 @@
break CRC intrinsics. */
/* { dg-do compile } */
-/* { dg-require-effective-target arm_hard_vfp_ok } */
-/* { dg-additional-options "-mfloat-abi=hard -march=armv8-a+simd+crc" } */
+/* { dg-require-effective-target arm_arch_v8a_crc_hard_ok } */
+/* { dg-add-options arm_arch_v8a_crc_hard }*/
#include
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index d5ed2808fabc..144d1a2d215d 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -5787,6 +5787,7 @@ foreach { armfunc armflag armdefs } {
"__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV && __ARM_NEON__"
v8a "-march=armv8-a+simd" __ARM_ARCH_8A__
v8a_hard "-march=armv8-a+simd -mfpu=auto -mfloat-abi=hard"
__ARM_ARCH_8A__
+ v8a_crc_hard "-march=armv8-a+crc+simd -mfpu=auto -mfloat-abi=hard"
"__ARM_ARCH_8A__ && __ARM_FEATURE_CRC32"
v8_1a "-march=armv8.1-a+simd" __ARM_ARCH_8A__
v8_2a "-march=armv8.2-a+simd" __ARM_ARCH_8A__
v8r "-march=armv8-r+fp.sp" __ARM_ARCH_8R__
[gcc r15-5548] testsuite: arm: Use -march=unset for pr69175.C test
https://gcc.gnu.org/g:e7e6608387dbb0d0b0d508b6b133e3b63ca61a42
commit r15-5548-ge7e6608387dbb0d0b0d508b6b133e3b63ca61a42
Author: Torbjörn SVENSSON
Date: Sun Nov 10 21:15:40 2024 +0100
testsuite: arm: Use -march=unset for pr69175.C test
Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.
gcc/testsuite/ChangeLog:
* g++.dg/opt/pr69175.C: Added option "-mcpu=unset".
Signed-off-by: Torbjörn SVENSSON
Diff:
---
gcc/testsuite/g++.dg/opt/pr69175.C | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/g++.dg/opt/pr69175.C
b/gcc/testsuite/g++.dg/opt/pr69175.C
index e24f6816b5f3..6d28951d5ae1 100644
--- a/gcc/testsuite/g++.dg/opt/pr69175.C
+++ b/gcc/testsuite/g++.dg/opt/pr69175.C
@@ -1,7 +1,7 @@
// PR target/69175
// { dg-do compile }
// { dg-options "-O2" }
-// { dg-additional-options "-march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16
-mthumb" { target { arm_hard_vfp_ok && arm_thumb2_ok } } }
+// { dg-additional-options "-mcpu=unset -march=armv7-a -mfloat-abi=hard
-mfpu=vfpv3-d16 -mthumb" { target { arm_hard_vfp_ok && arm_thumb2_ok } } }
struct A { A *c, *d; } a;
struct B { A *e; A *f; void foo (); };
[gcc r15-5542] testsuite: arm: Use effective-target for thumb2-slow-flash-data* tests
https://gcc.gnu.org/g:b12bc0bd59a344f9f6a9284ebdb2a7322fd7bcff
commit r15-5542-gb12bc0bd59a344f9f6a9284ebdb2a7322fd7bcff
Author: Torbjörn SVENSSON
Date: Sun Oct 13 20:42:23 2024 +0200
testsuite: arm: Use effective-target for thumb2-slow-flash-data* tests
Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.
gcc/testsuite/ChangeLog:
* gcc.target/arm/thumb2-slow-flash-data-2.c: Use
effective-target arm_arch_v7em_hard.
* gcc.target/arm/thumb2-slow-flash-data-3.c: Likewise.
* gcc.target/arm/thumb2-slow-flash-data-4.c: Likewise.
* gcc.target/arm/thumb2-slow-flash-data-5.c: Likewise.
Signed-off-by: Torbjörn SVENSSON
Diff:
---
gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-2.c | 9 +++--
gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-3.c | 9 +++--
gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-4.c | 9 +++--
gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-5.c | 9 +++--
4 files changed, 12 insertions(+), 24 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-2.c
b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-2.c
index 231243759cfe..8d74c227b812 100644
--- a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-2.c
+++ b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-2.c
@@ -1,11 +1,8 @@
/* { dg-do compile } */
-/* { dg-require-effective-target arm_cortex_m } */
-/* { dg-require-effective-target arm_thumb2_ok } */
-/* { dg-require-effective-target arm_fp_ok } */
-/* { dg-skip-if "avoid conflicts with multilib options" { *-*-* } { "-mcpu=*"
} { "-mcpu=cortex-m4" "-mcpu=cortex-m7" } } */
-/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } {
"-mfloat-abi=hard" } } */
+/* { dg-require-effective-target arm_arch_v7em_hard_ok } */
/* { dg-skip-if "-mslow-flash-data and -mword-relocations incompatible" {
*-*-* } { "-mword-relocations" } } */
-/* { dg-options "-march=armv7e-m+fp -mfloat-abi=hard -O2 -mthumb
-mslow-flash-data" } */
+/* { dg-options "-O2 -mslow-flash-data" } */
+/* { dg-add-options arm_arch_v7em_hard } */
float f (float);
diff --git a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-3.c
b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-3.c
index 27e72ec20863..09d25d62002f 100644
--- a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-3.c
+++ b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-3.c
@@ -1,11 +1,8 @@
/* { dg-do compile } */
-/* { dg-require-effective-target arm_cortex_m } */
-/* { dg-require-effective-target arm_thumb2_ok } */
-/* { dg-require-effective-target arm_fp_ok } */
-/* { dg-skip-if "avoid conflicts with multilib options" { *-*-* } { "-mcpu=*"
} { "-mcpu=cortex-m4" "-mcpu=cortex-m7" } } */
-/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } {
"-mfloat-abi=hard" } } */
+/* { dg-require-effective-target arm_arch_v7em_hard_ok } */
/* { dg-skip-if "-mslow-flash-data and -mword-relocations incompatible" {
*-*-* } { "-mword-relocations" } } */
-/* { dg-options "-march=armv7e-m+fp -mfloat-abi=hard -mthumb
-mslow-flash-data" } */
+/* { dg-options "-mslow-flash-data" } */
+/* { dg-add-options arm_arch_v7em_hard } */
/* From PR71607 */
diff --git a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-4.c
b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-4.c
index 8dbe87a1e68d..5e1f99e8 100644
--- a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-4.c
+++ b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-4.c
@@ -1,11 +1,8 @@
/* { dg-do compile } */
-/* { dg-require-effective-target arm_cortex_m } */
-/* { dg-require-effective-target arm_thumb2_ok } */
-/* { dg-require-effective-target arm_fp_ok } */
-/* { dg-skip-if "avoid conflicts with multilib options" { *-*-* } { "-mcpu=*"
} { "-mcpu=cortex-m4" "-mcpu=cortex-m7" } } */
-/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } {
"-mfloat-abi=hard" } } */
+/* { dg-require-effective-target arm_arch_v7em_hard_ok } */
/* { dg-skip-if "-mslow-flash-data and -mword-relocations incompatible" {
*-*-* } { "-mword-relocations" } } */
-/* { dg-options "-march=armv7e-m+fp -mfloat-abi=hard -O2 -mthumb
-mslow-flash-data" } */
+/* { dg-options "-O2 -mslow-flash-data" } */
+/* { dg-add-options arm_arch_v7em_hard } */
double __attribute__ ((target ("fpu=fpv5-d16")))
foo (void)
diff --git a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-5.c
b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-5.c
index b98eb7624e42..17bea15a9e11 100644
--- a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-5.c
+++ b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-5.c
@@ -1,11 +1,8 @@
/* { dg-do compile } */
-/* { dg-require-effective-target arm_cortex_m } */
-/* { dg-require-effective-target arm_thumb2_ok } */
-/* { dg-require-effective-target arm_fp_ok } */
-/* { dg-skip-if "avoid conflicts with multilib options" { *-*
[gcc r15-5546] testsuite: arm: Use effective target for pr57735.C test
https://gcc.gnu.org/g:3b21edeef9648c99df371f861f393e1b6ca253dd
commit r15-5546-g3b21edeef9648c99df371f861f393e1b6ca253dd
Author: Torbjörn SVENSSON
Date: Sun Nov 10 20:42:25 2024 +0100
testsuite: arm: Use effective target for pr57735.C test
Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.
gcc/testsuite/ChangeLog:
* g++.dg/ext/pr57735.C: Use effective-target arm_cpu_xscale_arm.
Signed-off-by: Torbjörn SVENSSON
Diff:
---
gcc/testsuite/g++.dg/ext/pr57735.C | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/gcc/testsuite/g++.dg/ext/pr57735.C
b/gcc/testsuite/g++.dg/ext/pr57735.C
index d9fc9e4aa5e4..256a57ad0e22 100644
--- a/gcc/testsuite/g++.dg/ext/pr57735.C
+++ b/gcc/testsuite/g++.dg/ext/pr57735.C
@@ -1,8 +1,7 @@
/* { dg-do compile { target arm*-*-* } } */
-/* { dg-require-effective-target arm_arch_v5te_ok } */
-/* { dg-require-effective-target arm_arm_ok } */
-/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" }
{"-mfloat-abi=soft" } } */
-/* { dg-options "-march=armv5te -marm -mtune=xscale -mfloat-abi=soft -O1
-Wno-return-type" } */
+/* { dg-require-effective-target arm_cpu_xscale_arm_ok } */
+/* { dg-options "-O1 -Wno-return-type" } */
+/* { dg-add-options arm_cpu_xscale_arm } */
typedef unsigned int size_t;
__extension__
[gcc r15-5538] testsuite: arm: Use effective-target for pacbti-m-predef* tests
https://gcc.gnu.org/g:dc044641a0cb9a6a1a731c142b61c2dba25039ff
commit r15-5538-gdc044641a0cb9a6a1a731c142b61c2dba25039ff
Author: Torbjörn SVENSSON
Date: Sun Oct 13 13:29:38 2024 +0200
testsuite: arm: Use effective-target for pacbti-m-predef* tests
Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.
gcc/testsuite/ChangeLog:
* gcc.target/arm/acle/pacbti-m-predef-1.c: Use effective-target
arm_arch_v8_1m_main.
* gcc.target/arm/acle/pacbti-m-predef-2.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-3.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-4.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-5.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-6.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-8.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-9.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-10.c: Likewise.
Signed-off-by: Torbjörn SVENSSON
Diff:
---
gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-1.c | 4 +++-
gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-10.c | 4 +++-
gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-2.c | 4 +++-
gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-3.c | 4 +++-
gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-4.c | 4 +++-
gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-5.c | 5 +++--
gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-6.c | 4 +++-
gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-8.c | 4 +++-
gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-9.c | 4 +++-
9 files changed, 27 insertions(+), 10 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-1.c
b/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-1.c
index 122f7a762a71..0abc33721494 100644
--- a/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-1.c
+++ b/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-1.c
@@ -1,6 +1,8 @@
/* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8_1m_main_ok } */
/* { dg-require-effective-target mbranch_protection_ok } */
-/* { dg-options "-march=armv8.1-m.main+fp -mbranch-protection=pac-ret+bti
-mfloat-abi=hard --save-temps" } */
+/* { dg-options "-mbranch-protection=pac-ret+bti -mfloat-abi=hard
--save-temps" } */
+/* { dg-add-options arm_arch_v8_1m_main } */
#if !defined (__ARM_FEATURE_BTI_DEFAULT)
#error "Feature test macro __ARM_FEATURE_BTI_DEFAULT should be defined."
diff --git a/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-10.c
b/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-10.c
index 52d18238109f..08f90a9d9c18 100644
--- a/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-10.c
+++ b/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-10.c
@@ -1,6 +1,8 @@
/* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8_1m_main_ok } */
/* { dg-require-effective-target mbranch_protection_ok } */
-/* { dg-additional-options "-march=armv8.1-m.main+fp
-mbranch-protection=bti+pac-ret -mfloat-abi=hard" } */
+/* { dg-additional-options "-mbranch-protection=bti+pac-ret -mfloat-abi=hard"
} */
+/* { dg-add-options arm_arch_v8_1m_main } */
#if (__ARM_FEATURE_BTI_DEFAULT != 1)
#error "Feature test macro __ARM_FEATURE_BTI_DEFAULT should be defined to 1."
diff --git a/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-2.c
b/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-2.c
index cd418ce0c7fc..de34cc87f99d 100644
--- a/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-2.c
+++ b/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-2.c
@@ -1,7 +1,9 @@
/* { dg-do run } */
+/* { dg-require-effective-target arm_arch_v8_1m_main_pacbti_link } */
/* { dg-require-effective-target mbranch_protection_ok } */
/* { dg-require-effective-target arm_pacbti_hw } */
-/* { dg-options "-march=armv8.1-m.main+pacbti+fp
-mbranch-protection=bti+pac-ret+leaf -mthumb -mfloat-abi=hard" } */
+/* { dg-options "-mbranch-protection=bti+pac-ret+leaf -mfloat-abi=hard" } */
+/* { dg-add-options arm_arch_v8_1m_main_pacbti } */
#if !defined (__ARM_FEATURE_BTI_DEFAULT)
#error "Feature test macro __ARM_FEATURE_BTI_DEFAULT should be defined."
diff --git a/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-3.c
b/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-3.c
index b94f3447ad97..e19e41626ddf 100644
--- a/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-3.c
+++ b/gcc/testsuite/gcc.target/arm/acle/pacbti-m-predef-3.c
@@ -1,6 +1,8 @@
/* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8_1m_main_ok } */
/* { dg-require-effective-target mbranch_protection_ok } */
-/* { dg-options "-march=armv8.1-m.main+fp -mbranch-protection=pac-ret+leaf
-mfloat-abi=hard --save-temps" } */
+/* { dg-options "-mbranch-protection=pac-ret+leaf -mfloat-abi=hard
--save-temps" } */
+/* { dg-add-options arm_arch_v8_1m_main } */
#if defined (__ARM_FEATURE_BTI_DEFAULT)
#error "Feature test macro __ARM_FEA
[gcc r15-5554] rs6000: Adjust FLOAT128 signbit2 expander for P8 LE [PR114567]
https://gcc.gnu.org/g:10e702789eeabcc88451e34c2a5c7dccb96190a5
commit r15-5554-g10e702789eeabcc88451e34c2a5c7dccb96190a5
Author: Kewen Lin
Date: Thu Nov 21 07:41:34 2024 +
rs6000: Adjust FLOAT128 signbit2 expander for P8 LE [PR114567]
As the associated test case shows, signbit generated assembly
is sub-optimal for _Float128 argument from memory on P8 LE.
On P8 LE, p8swap pass puts an explicit AND -16 on the memory,
which causes mode_dependent_address_p considers it's invalid
to change its mode and combine fails to make use of the
existing pattern signbit2_dm_mem. Considering
it's always more efficient to make use of 8 bytes load and
shift on P8 LE, this patch is to adjust the current expander
and treat it specially.
PR target/114567
gcc/ChangeLog:
* config/rs6000/rs6000.md (expander signbit2):
Adjust.
(*signbit2_dm_mem): Rename to ...
(signbit2_dm_mem): ... this.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr114567.c: New test.
Diff:
---
gcc/config/rs6000/rs6000.md | 22 ++
gcc/testsuite/gcc.target/powerpc/pr114567.c | 17 +
2 files changed, 35 insertions(+), 4 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ca91a24795b1..95be36d5a726 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -5287,7 +5287,7 @@
;; when little-endian.
(define_expand "signbit2"
[(set (match_dup 2)
- (float_truncate:DF (match_operand:FLOAT128 1 "gpc_reg_operand")))
+ (float_truncate:DF (match_operand:FLOAT128 1 "reg_or_mem_operand")))
(set (match_dup 3)
(subreg:DI (match_dup 2) 0))
(set (match_dup 4)
@@ -5303,12 +5303,26 @@
rtx dest = operands[0];
rtx src = operands[1];
rtx tmp = gen_reg_rtx (DImode);
+ /* For P8 LE, we generate memory access with subreg:V1TI which
+ prevents the related gen_signbitkf2_dm_mem being matched so
+ directly emit it here and leave the other cases alone. */
+ if (!BYTES_BIG_ENDIAN
+ && !TARGET_P9_VECTOR
+ && memory_operand (src, mode))
+emit_insn (gen_signbitkf2_dm_mem (tmp, src));
+ else
+{
+ if (!gpc_reg_operand (src, mode))
+src = copy_to_mode_reg (mode, src);
+ gcc_assert (gpc_reg_operand (src, mode));
+ emit_insn (gen_signbit2_dm (mode, tmp, src));
+}
rtx dest_di = gen_lowpart (DImode, dest);
-
- emit_insn (gen_signbit2_dm (mode, tmp, src));
emit_insn (gen_lshrdi3 (dest_di, tmp, GEN_INT (63)));
DONE;
}
+ if (!gpc_reg_operand (operands[1], mode))
+operands[1] = copy_to_mode_reg (mode, operands[1]);
operands[2] = gen_reg_rtx (DFmode);
operands[3] = gen_reg_rtx (DImode);
if (TARGET_POWERPC64)
@@ -5354,7 +5368,7 @@
;; Optimize IEEE 128-bit signbit on to avoid loading the value into a vector
;; register and then doing a direct move if the value comes from memory. On
;; little endian, we have to load the 2nd double-word to get the sign bit.
-(define_insn_and_split "*signbit2_dm_mem"
+(define_insn_and_split "signbit2_dm_mem"
[(set (match_operand:DI 0 "gpc_reg_operand" "=b")
(unspec:DI [(match_operand:SIGNBIT 1 "memory_operand" "m")]
UNSPEC_SIGNBIT))]
diff --git a/gcc/testsuite/gcc.target/powerpc/pr114567.c
b/gcc/testsuite/gcc.target/powerpc/pr114567.c
new file mode 100644
index ..b904387dca4f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr114567.c
@@ -0,0 +1,17 @@
+/* { dg-options "-O2 -mabi=ibmlongdouble -Wno-psabi" } */
+/* { dg-additional-options "-mdejagnu-cpu=power8" { target { ! has_arch_pwr8 }
} } */
+/* { dg-require-effective-target powerpc_vsx } */
+/* { dg-require-effective-target float128 } */
+
+/* Verify there is no lxv.*x? and mfvsrd (vector load and move). */
+
+int
+sbm (_Float128 *a)
+{
+ return __builtin_signbit (*a);
+}
+
+/* { dg-final { scan-assembler-times {\ml(d|wz)\M} 1 } } */
+/* { dg-final { scan-assembler-not {\mlxv\M} } } */
+/* { dg-final { scan-assembler-not {\mlxvd2x\M} } } */
+/* { dg-final { scan-assembler-not {\mmfvsrd\M} } } */
[gcc r15-5552] rs6000: Remove entry for V1TImode from VI_unit
https://gcc.gnu.org/g:ca96c1d1bc04b498e401571e99296e526db5db58 commit r15-5552-gca96c1d1bc04b498e401571e99296e526db5db58 Author: Kewen Lin Date: Thu Nov 21 07:41:33 2024 + rs6000: Remove entry for V1TImode from VI_unit When making a patch to adjust VECTOR_P8_VECTOR rs6000_vector enum, I noticed that V1TImode's mode attribute in VI_unit VECTOR_UNIT_ALTIVEC_P (V1TImode) is never true, since VECTOR_UNIT_ALTIVEC_P checks if vector_unit[V1TImode] is equal to VECTOR_ALTIVEC, but vector_unit[V1TImode] can only be VECTOR_NONE or VECTOR_P8_VECTOR, there is no chance to be VECTOR_ALTIVEC: rs6000_vector_unit[V1TImode] = (TARGET_P8_VECTOR) ? VECTOR_P8_VECTOR : VECTOR_NONE; By checking all uses of VI_unit, the used mode iterator is one of VI2, VI, VP_small and VP, none of them has V1TImode, so the entry for V1TImode is useless. I guessed it was designed to have one mode attribute to cover all integer vector modes, but later we separated V1TI handlings to its own patterns (those guarded with TARGET_VADDUQM). Anyway, this patch is to remove this useless and confusing entry. gcc/ChangeLog: * config/rs6000/altivec.md (mode attr for V1TI in VI_unit): Remove. Diff: --- gcc/config/rs6000/altivec.md | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 00dad4b91f1c..687c3c0ac7e1 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -227,8 +227,7 @@ (define_mode_attr VI_unit [(V16QI "VECTOR_UNIT_ALTIVEC_P (V16QImode)") (V8HI "VECTOR_UNIT_ALTIVEC_P (V8HImode)") (V4SI "VECTOR_UNIT_ALTIVEC_P (V4SImode)") - (V2DI "VECTOR_UNIT_P8_VECTOR_P (V2DImode)") - (V1TI "VECTOR_UNIT_ALTIVEC_P (V1TImode)")]) + (V2DI "VECTOR_UNIT_P8_VECTOR_P (V2DImode)")]) ;; Vector pack/unpack (define_mode_iterator VP [V2DI V4SI V8HI])
