[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/91870

>From d4908fb17a57ddc75032e838241ff4f0e929cd36 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sat, 11 May 2024 00:15:50 -0700
Subject: [PATCH 1/2] [clang][ARM] Fix warning for using VFP from interrupts.

This warning has three issues:
 - The interrupt attribute causes the function to return using an exception
   return instruction. This warning allows calls from one function with
   the interrupt attribute to another, and the diagnostic text suggests
   that not having the attribute on the callee is a problem. Actually
   making such a call will lead to a double exception return, which is
   unpredictable according to the ARM architecture manual section
   B9.1.1, "Restrictions on exception return instructions". Even on
   machines where an exception return from user/system mode is
   tolerated, if the callee's interrupt type is anything other than a
   supervisor call or secure monitor call, it will also return to a
   different address than a normal function would. For example,
   returning from an "IRQ" handler will return to lr - 4, which will
   generally result in calling the same function again.
 - The interrupt attribute currently does not cause caller-saved VFP
   registers to be saved and restored if they are used, so putting
   __attribute__((interrupt)) on a called function doesn't prevent it
   from clobbering VFP state.
 - It is part of the -Wextra diagnostic group and can't be individually
   disabled when using -Wextra, which also means the diagnostic text of
   this specific warning appears in the documentation of -Wextra.

This change addresses all three issues by instead generating a warning
for any interrupt handler where the vfp feature is enabled. The warning is
also given its own diagnostic group.

Closes #34876.
---
 clang/docs/ReleaseNotes.rst   | 10 +
 .../clang/Basic/DiagnosticSemaKinds.td|  7 +--
 clang/lib/Sema/SemaARM.cpp|  5 +++
 clang/lib/Sema/SemaExpr.cpp   | 14 +-
 clang/test/Sema/arm-interrupt-attr.c  | 45 +++
 5 files changed, 26 insertions(+), 55 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 181d10008bc8c..b637fe1f7ebd8 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -442,6 +442,9 @@ New Compiler Flags
   Matches MSVC behaviour by defining ``__STDC__`` to ``1`` when
   MSVC compatibility mode is used. It has no effect for C++ code.
 
+- For the ARM target, added ``-Warm-interrupt-vfp-clobber`` that will emit a
+  diagnostic when an interrupt handler is declared and VFP is enabled.
+
 Deprecated Compiler Flags
 -
 
@@ -480,6 +483,13 @@ Modified Compiler Flags
   evaluating to ``true`` and an empty body such as ``while(1);``)
   are considered infinite, even when the ``-ffinite-loop`` flag is set.
 
+- Removed the "arm interrupt calling convention" warning that was included in
+  ``-Wextra`` without its own flag. This warning suggested adding
+  ``__attribute__((interrupt))`` to functions that are called from interrupt
+  handlers to prevent clobbering VFP registers. Following this suggestion leads
+  to unpredictable behavior by causing multiple exception returns from one
+  exception. Fixes #GH34876.
+
 Removed Compiler Flags
 -
 
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 3df64b2ecef1b..c116c951918ac 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -336,9 +336,10 @@ def warn_anyx86_excessive_regsave : Warning<
   " with attribute 'no_caller_saved_registers'"
   " or be compiled with '-mgeneral-regs-only'">,
   InGroup>;
-def warn_arm_interrupt_calling_convention : Warning<
-   "call to function without interrupt attribute could clobber interruptee's 
VFP registers">,
-   InGroup;
+def warn_arm_interrupt_vfp_clobber : Warning<
+  "interrupt service routine with vfp enabled may clobber the "
+  "interruptee's vfp state">,
+  InGroup>;
 def warn_interrupt_attribute_invalid : Warning<
"%select{MIPS|MSP430|RISC-V}0 'interrupt' attribute only applies to "
"functions that have %select{no parameters|a 'void' return type}1">,
diff --git a/clang/lib/Sema/SemaARM.cpp b/clang/lib/Sema/SemaARM.cpp
index 281d534152054..8259be77d9ee6 100644
--- a/clang/lib/Sema/SemaARM.cpp
+++ b/clang/lib/Sema/SemaARM.cpp
@@ -1326,6 +1326,11 @@ void SemaARM::handleInterruptAttr(Decl *D, const 
ParsedAttr &AL) {
 return;
   }
 
+  const TargetInfo &TI = getASTContext().getTargetInfo();
+  if (TI.hasFeature("vfp")) {
+Diag(D->getLocation(), diag::warn_arm_interrupt_vfp_clobber);
+  }
+
   D->addAttr(::new (getASTContext())
  ARMInterruptAttr(getASTContext(), AL, Kind));
 }
diff --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib

[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Fixed more release notes conflicts.

https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang] Define ATOMIC_FLAG_INIT correctly for C++. (PR #97534)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Without this change, trying to use `ATOMIC_FLAG_INIT` in a constant 
initialization context yields the following:

https://godbolt.org/z/sTvMs5a95

```
:3:17: error: non-constant-expression cannot be narrowed from type 
'int' to 'atomic_bool' (aka '_Atomic(bool)') in initializer list 
[-Wc++11-narrowing]
3 | atomic_flag x = ATOMIC_FLAG_INIT;
  | ^~~~
/opt/compiler-explorer/clang-trunk-20240703/lib/clang/19/include/stdatomic.h:169:28:
 note: expanded from macro 'ATOMIC_FLAG_INIT'
  169 | #define ATOMIC_FLAG_INIT { 0 }
  |^
:3:17: note: insert an explicit cast to silence this issue
3 | atomic_flag x = ATOMIC_FLAG_INIT;
  | ^~~~
/opt/compiler-explorer/clang-trunk-20240703/lib/clang/19/include/stdatomic.h:169:28:
 note: expanded from macro 'ATOMIC_FLAG_INIT'
  169 | #define ATOMIC_FLAG_INIT { 0 }
  |^
1 error generated.
Compiler returned: 1
```

https://github.com/llvm/llvm-project/pull/97534
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[clang] [clang] Define ATOMIC_FLAG_INIT correctly for C++. (PR #97534)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/97534

>From b7857c25e56ea59956d8ae0aac068358bcf67a03 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Wed, 3 Jul 2024 00:11:39 -0700
Subject: [PATCH] [clang] Define ATOMIC_FLAG_INIT correctly for C++.

---
 clang/docs/ReleaseNotes.rst   | 2 ++
 clang/lib/Headers/stdatomic.h | 4 
 2 files changed, 6 insertions(+)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 1537eaaba0c66..3d85065a7ff8a 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -750,6 +750,8 @@ Bug Fixes in This Version
 
 - Fixed `static_cast` to array of unknown bound. Fixes (#GH62863).
 
+- Fixed the definition of ATOMIC_FLAG_INIT in stdatomic.h so it can be used in 
C++.
+
 Bug Fixes to Compiler Builtins
 ^^
 
diff --git a/clang/lib/Headers/stdatomic.h b/clang/lib/Headers/stdatomic.h
index 9c103d98af8c5..51a5d004e82d8 100644
--- a/clang/lib/Headers/stdatomic.h
+++ b/clang/lib/Headers/stdatomic.h
@@ -166,7 +166,11 @@ typedef _Atomic(uintmax_t)  atomic_uintmax_t;
 
 typedef struct atomic_flag { atomic_bool _Value; } atomic_flag;
 
+#ifdef __cplusplus
+#define ATOMIC_FLAG_INIT {false}
+#else
 #define ATOMIC_FLAG_INIT { 0 }
+#endif
 
 /* These should be provided by the libc implementation. */
 #ifdef __cplusplus

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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc created 
https://github.com/llvm/llvm-project/pull/88287

None

>From 23ca20716ce1401c0f7b7e07bd817f3f9a925784 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 5 Apr 2024 22:40:46 -0700
Subject: [PATCH] [ARM] Armv8-R does not require fp64 or neon.

---
 clang/test/Preprocessor/arm-target-features.c  | 2 +-
 llvm/include/llvm/TargetParser/ARMTargetParser.def | 2 +-
 llvm/lib/Target/ARM/ARM.td | 6 +++---
 llvm/test/Analysis/CostModel/ARM/arith.ll  | 2 +-
 llvm/test/Analysis/CostModel/ARM/cast.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cast_ldst.ll  | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cmps.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/divrem.ll | 2 +-
 llvm/test/CodeGen/ARM/build-attributes.ll  | 4 ++--
 llvm/test/CodeGen/ARM/fpconv.ll| 4 ++--
 llvm/test/CodeGen/ARM/half.ll  | 4 ++--
 llvm/test/CodeGen/ARM/pr42638-VMOVRRDCombine.ll| 2 +-
 llvm/test/CodeGen/ARM/useaa.ll | 4 ++--
 llvm/unittests/TargetParser/TargetParserTest.cpp   | 2 +-
 14 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/clang/test/Preprocessor/arm-target-features.c 
b/clang/test/Preprocessor/arm-target-features.c
index 236c9f2479b705..5805e9e0bf0b50 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -96,7 +96,7 @@
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_CRC32 1
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_DIRECTED_ROUNDING 1
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_NUMERIC_MAXMIN 1
-// CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FP 0xe
+// CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FP 0x4
 
 // RUN: %clang -target armv7a-none-linux-gnu -x c -E -dM %s -o - | FileCheck 
-match-full-lines --check-prefix=CHECK-V7 %s
 // CHECK-V7: #define __ARMEL__ 1
diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def 
b/llvm/include/llvm/TargetParser/ARMTargetParser.def
index b821d224d7a82c..dee0f383b4b234 100644
--- a/llvm/include/llvm/TargetParser/ARMTargetParser.def
+++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def
@@ -329,7 +329,7 @@ ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
 ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, true, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-r52", ARMV8R, FK_FPV5_SP_D16, true, ARM::AEK_NONE)
 ARM_CPU_NAME("sc300", ARMV7M, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m3", ARMV7M, FK_NONE, true, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m4", ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE)
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 66596dbda83c95..6ee8c0540e6488 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -1167,9 +1167,7 @@ def ARMv8r: Architecture<"armv8-r",   "ARMv8r",   
[HasV8Ops,
FeatureDSP,
FeatureCRC,
FeatureMP,
-   FeatureVirtualization,
-   FeatureFPARMv8,
-   FeatureNEON]>;
+   FeatureVirtualization]>;
 
 def ARMv8mBaseline : Architecture<"armv8-m.base", "ARMv8mBaseline",
   [HasV8MBaselineOps,
@@ -1726,6 +1724,8 @@ def : ProcNoItin<"kryo",
[ARMv8a, ProcKryo,
  FeatureCRC]>;
 
 def : ProcessorModel<"cortex-r52", CortexR52Model,  [ARMv8r, ProcR52,
+ FeatureFPARMv8_D16_SP,
+ FeatureFP16,
  FeatureUseMISched,
  FeatureFPAO]>;
 
diff --git a/llvm/test/Analysis/CostModel/ARM/arith.ll 
b/llvm/test/Analysis/CostModel/ARM/arith.ll
index 3a137a5af36664..8f173596c3b9a0 100644
--- a/llvm/test/Analysis/CostModel/ARM/arith.ll
+++ b/llvm/test/Analysis/CostModel/ARM/arith.ll
@@ -4,7 +4,7 @@
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8.1m.main-none-eabi -mattr=+mve,+mve4beat < %s | FileCheck %s 
--check-prefix=CHECK --check-prefix=CHECK-MVE4
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8m.main-none-eabi < %s | FileCheck %s 
--check-prefix=CHECK-V8M-MAIN
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8m.base-none-eabi < %s | FileCheck %s 
--check-prefix=CHECK-V8M-BASE
-; RUN: opt -passes="print" 2>&1 -disable-

[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc edited 
https://github.com/llvm/llvm-project/pull/88287
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc edited 
https://github.com/llvm/llvm-project/pull/88287
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc edited 
https://github.com/llvm/llvm-project/pull/88287
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/88287

>From 136ed3311445f498a9314a0feea0302327d5cf85 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 5 Apr 2024 22:40:46 -0700
Subject: [PATCH] [ARM] Armv8-R does not require fp64 or neon.

---
 clang/test/Preprocessor/arm-target-features.c  | 2 +-
 llvm/include/llvm/TargetParser/ARMTargetParser.def | 2 +-
 llvm/lib/Target/ARM/ARM.td | 6 +++---
 llvm/test/Analysis/CostModel/ARM/arith.ll  | 2 +-
 llvm/test/Analysis/CostModel/ARM/cast.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cast_ldst.ll  | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cmps.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/divrem.ll | 2 +-
 llvm/test/CodeGen/ARM/build-attributes.ll  | 4 ++--
 llvm/test/CodeGen/ARM/fpconv.ll| 4 ++--
 llvm/test/CodeGen/ARM/half.ll  | 4 ++--
 llvm/test/CodeGen/ARM/pr42638-VMOVRRDCombine.ll| 2 +-
 llvm/test/CodeGen/ARM/useaa.ll | 4 ++--
 llvm/unittests/TargetParser/TargetParserTest.cpp   | 2 +-
 14 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/clang/test/Preprocessor/arm-target-features.c 
b/clang/test/Preprocessor/arm-target-features.c
index 236c9f2479b705..ad418bf6bcdcbf 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -96,7 +96,7 @@
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_CRC32 1
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_DIRECTED_ROUNDING 1
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_NUMERIC_MAXMIN 1
-// CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FP 0xe
+// CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FP 0x6
 
 // RUN: %clang -target armv7a-none-linux-gnu -x c -E -dM %s -o - | FileCheck 
-match-full-lines --check-prefix=CHECK-V7 %s
 // CHECK-V7: #define __ARMEL__ 1
diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def 
b/llvm/include/llvm/TargetParser/ARMTargetParser.def
index b821d224d7a82c..dee0f383b4b234 100644
--- a/llvm/include/llvm/TargetParser/ARMTargetParser.def
+++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def
@@ -329,7 +329,7 @@ ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
 ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, true, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-r52", ARMV8R, FK_FPV5_SP_D16, true, ARM::AEK_NONE)
 ARM_CPU_NAME("sc300", ARMV7M, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m3", ARMV7M, FK_NONE, true, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m4", ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE)
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 66596dbda83c95..6ee8c0540e6488 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -1167,9 +1167,7 @@ def ARMv8r: Architecture<"armv8-r",   "ARMv8r",   
[HasV8Ops,
FeatureDSP,
FeatureCRC,
FeatureMP,
-   FeatureVirtualization,
-   FeatureFPARMv8,
-   FeatureNEON]>;
+   FeatureVirtualization]>;
 
 def ARMv8mBaseline : Architecture<"armv8-m.base", "ARMv8mBaseline",
   [HasV8MBaselineOps,
@@ -1726,6 +1724,8 @@ def : ProcNoItin<"kryo",
[ARMv8a, ProcKryo,
  FeatureCRC]>;
 
 def : ProcessorModel<"cortex-r52", CortexR52Model,  [ARMv8r, ProcR52,
+ FeatureFPARMv8_D16_SP,
+ FeatureFP16,
  FeatureUseMISched,
  FeatureFPAO]>;
 
diff --git a/llvm/test/Analysis/CostModel/ARM/arith.ll 
b/llvm/test/Analysis/CostModel/ARM/arith.ll
index 3a137a5af36664..8f173596c3b9a0 100644
--- a/llvm/test/Analysis/CostModel/ARM/arith.ll
+++ b/llvm/test/Analysis/CostModel/ARM/arith.ll
@@ -4,7 +4,7 @@
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8.1m.main-none-eabi -mattr=+mve,+mve4beat < %s | FileCheck %s 
--check-prefix=CHECK --check-prefix=CHECK-MVE4
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8m.main-none-eabi < %s | FileCheck %s 
--check-prefix=CHECK-V8M-MAIN
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8m.base-none-eabi < %s | FileCheck %s 
--check-prefix=CHECK-V8M-BASE
-; RUN: opt -passes="print" 2>&1 -disable-output

[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/88287

>From 58f4d1acb3a88ec0b7d623fd7607d355f6dfe2c3 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 5 Apr 2024 22:40:46 -0700
Subject: [PATCH] [ARM] Armv8-R does not require fp64 or neon.

---
 clang/test/Preprocessor/arm-target-features.c  | 2 +-
 llvm/include/llvm/TargetParser/ARMTargetParser.def | 2 +-
 llvm/lib/Target/ARM/ARM.td | 6 +++---
 llvm/test/Analysis/CostModel/ARM/arith.ll  | 2 +-
 llvm/test/Analysis/CostModel/ARM/cast.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cast_ldst.ll  | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cmps.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/divrem.ll | 2 +-
 llvm/test/CodeGen/ARM/build-attributes.ll  | 4 ++--
 llvm/test/CodeGen/ARM/cortex-a57-misched-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/fpconv.ll| 4 ++--
 llvm/test/CodeGen/ARM/half.ll  | 4 ++--
 llvm/test/CodeGen/ARM/misched-fp-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/pr42638-VMOVRRDCombine.ll| 2 +-
 llvm/test/CodeGen/ARM/useaa.ll | 4 ++--
 llvm/unittests/TargetParser/TargetParserTest.cpp   | 2 +-
 16 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/clang/test/Preprocessor/arm-target-features.c 
b/clang/test/Preprocessor/arm-target-features.c
index 236c9f2479b705..ad418bf6bcdcbf 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -96,7 +96,7 @@
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_CRC32 1
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_DIRECTED_ROUNDING 1
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_NUMERIC_MAXMIN 1
-// CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FP 0xe
+// CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FP 0x6
 
 // RUN: %clang -target armv7a-none-linux-gnu -x c -E -dM %s -o - | FileCheck 
-match-full-lines --check-prefix=CHECK-V7 %s
 // CHECK-V7: #define __ARMEL__ 1
diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def 
b/llvm/include/llvm/TargetParser/ARMTargetParser.def
index b821d224d7a82c..dee0f383b4b234 100644
--- a/llvm/include/llvm/TargetParser/ARMTargetParser.def
+++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def
@@ -329,7 +329,7 @@ ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
 ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, true, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-r52", ARMV8R, FK_FPV5_SP_D16, true, ARM::AEK_NONE)
 ARM_CPU_NAME("sc300", ARMV7M, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m3", ARMV7M, FK_NONE, true, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m4", ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE)
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 66596dbda83c95..6ee8c0540e6488 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -1167,9 +1167,7 @@ def ARMv8r: Architecture<"armv8-r",   "ARMv8r",   
[HasV8Ops,
FeatureDSP,
FeatureCRC,
FeatureMP,
-   FeatureVirtualization,
-   FeatureFPARMv8,
-   FeatureNEON]>;
+   FeatureVirtualization]>;
 
 def ARMv8mBaseline : Architecture<"armv8-m.base", "ARMv8mBaseline",
   [HasV8MBaselineOps,
@@ -1726,6 +1724,8 @@ def : ProcNoItin<"kryo",
[ARMv8a, ProcKryo,
  FeatureCRC]>;
 
 def : ProcessorModel<"cortex-r52", CortexR52Model,  [ARMv8r, ProcR52,
+ FeatureFPARMv8_D16_SP,
+ FeatureFP16,
  FeatureUseMISched,
  FeatureFPAO]>;
 
diff --git a/llvm/test/Analysis/CostModel/ARM/arith.ll 
b/llvm/test/Analysis/CostModel/ARM/arith.ll
index 3a137a5af36664..8f173596c3b9a0 100644
--- a/llvm/test/Analysis/CostModel/ARM/arith.ll
+++ b/llvm/test/Analysis/CostModel/ARM/arith.ll
@@ -4,7 +4,7 @@
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8.1m.main-none-eabi -mattr=+mve,+mve4beat < %s | FileCheck %s 
--check-prefix=CHECK --check-prefix=CHECK-MVE4
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8m.main-none-eabi < %s | FileCheck %s 
--check-prefix=CHECK-V8M-MAIN
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumb

[clang] [clang][docs] fix whitespace in AttrDocs.td (PR #88631)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc created 
https://github.com/llvm/llvm-project/pull/88631

None

>From 40d774ab8c598f0dfb76dcd087f1af17c7fdd01d Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 12 Apr 2024 23:42:32 -0700
Subject: [PATCH] [clang][docs] fix whitespace in AttrDocs.td

---
 clang/include/clang/Basic/AttrDocs.td | 32 +--
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/clang/include/clang/Basic/AttrDocs.td 
b/clang/include/clang/Basic/AttrDocs.td
index 8687c4f57d3f83..a0bbe5861c5722 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -1604,39 +1604,39 @@ specifies availability for the current target platform, 
the availability
 attributes are ignored. Supported platforms are:
 
 ``ios``
-  Apple's iOS operating system. The minimum deployment target is specified 
-  as part of the ``-target *arch*-apple-ios*version*`` command line argument. 
-  Alternatively, it can be specified by the ``-mtargetos=ios*version*`` 
+  Apple's iOS operating system. The minimum deployment target is specified
+  as part of the ``-target *arch*-apple-ios*version*`` command line argument.
+  Alternatively, it can be specified by the ``-mtargetos=ios*version*``
   command-line argument.
 
 ``macos``
-  Apple's macOS operating system. The minimum deployment target is specified 
-  as part of the ``-target *arch*-apple-macos*version*`` command line 
argument. 
-  Alternatively, it can be specified by the ``-mtargetos=macos*version*`` 
-  command-line argument. ``macosx`` is supported for 
+  Apple's macOS operating system. The minimum deployment target is specified
+  as part of the ``-target *arch*-apple-macos*version*`` command line argument.
+  Alternatively, it can be specified by the ``-mtargetos=macos*version*``
+  command-line argument. ``macosx`` is supported for
   backward-compatibility reasons, but it is deprecated.
 
 ``tvos``
-  Apple's tvOS operating system. The minimum deployment target is specified 
-  as part of the ``-target *arch*-apple-tvos*version*`` command line argument. 
-  Alternatively, it can be specified by the ``-mtargetos=tvos*version*`` 
+  Apple's tvOS operating system. The minimum deployment target is specified
+  as part of the ``-target *arch*-apple-tvos*version*`` command line argument.
+  Alternatively, it can be specified by the ``-mtargetos=tvos*version*``
   command-line argument.
 
 ``watchos``
   Apple's watchOS operating system. The minimum deployment target is specified
-  as part of the ``-target *arch*-apple-watchos*version*`` command line 
argument. 
-  Alternatively, it can be specified by the ``-mtargetos=watchos*version*`` 
+  as part of the ``-target *arch*-apple-watchos*version*`` command line 
argument.
+  Alternatively, it can be specified by the ``-mtargetos=watchos*version*``
   command-line argument.
 
 ``visionos``
   Apple's visionOS operating system. The minimum deployment target is specified
-  as part of the ``-target *arch*-apple-visionos*version*`` command line 
argument. 
-  Alternatively, it can be specified by the ``-mtargetos=visionos*version*`` 
+  as part of the ``-target *arch*-apple-visionos*version*`` command line 
argument.
+  Alternatively, it can be specified by the ``-mtargetos=visionos*version*``
   command-line argument.
 
 ``driverkit``
   Apple's DriverKit userspace kernel extensions. The minimum deployment target
-  is specified as part of the ``-target *arch*-apple-driverkit*version*`` 
+  is specified as part of the ``-target *arch*-apple-driverkit*version*``
   command line argument.
 
 A declaration can typically be used even when deploying back to a platform
@@ -7522,7 +7522,7 @@ means that it can e.g no longer be part of an initializer 
expression.
 
   /* This may print something else than "6 * 7 = 42",
  if there is a non-weak definition of "ANSWER" in
-an object linked in */
+ an object linked in */
   printf("6 * 7 = %d\n", ANSWER);
 
   return 0;

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[clang] [clang][docs] fix whitespace in AttrDocs.td (PR #88631)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc edited 
https://github.com/llvm/llvm-project/pull/88631
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[clang] [clang][docs] fix whitespace in AttrDocs.td (PR #88631)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/88631

>From d3e993c34e9d05f149b2670502794eaf93dee89a Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 12 Apr 2024 23:42:32 -0700
Subject: [PATCH] [clang][docs] fix whitespace in AttrDocs.td

---
 clang/include/clang/Basic/AttrDocs.td | 32 +--
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/clang/include/clang/Basic/AttrDocs.td 
b/clang/include/clang/Basic/AttrDocs.td
index 8687c4f57d3f83..a0bbe5861c5722 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -1604,39 +1604,39 @@ specifies availability for the current target platform, 
the availability
 attributes are ignored. Supported platforms are:
 
 ``ios``
-  Apple's iOS operating system. The minimum deployment target is specified 
-  as part of the ``-target *arch*-apple-ios*version*`` command line argument. 
-  Alternatively, it can be specified by the ``-mtargetos=ios*version*`` 
+  Apple's iOS operating system. The minimum deployment target is specified
+  as part of the ``-target *arch*-apple-ios*version*`` command line argument.
+  Alternatively, it can be specified by the ``-mtargetos=ios*version*``
   command-line argument.
 
 ``macos``
-  Apple's macOS operating system. The minimum deployment target is specified 
-  as part of the ``-target *arch*-apple-macos*version*`` command line 
argument. 
-  Alternatively, it can be specified by the ``-mtargetos=macos*version*`` 
-  command-line argument. ``macosx`` is supported for 
+  Apple's macOS operating system. The minimum deployment target is specified
+  as part of the ``-target *arch*-apple-macos*version*`` command line argument.
+  Alternatively, it can be specified by the ``-mtargetos=macos*version*``
+  command-line argument. ``macosx`` is supported for
   backward-compatibility reasons, but it is deprecated.
 
 ``tvos``
-  Apple's tvOS operating system. The minimum deployment target is specified 
-  as part of the ``-target *arch*-apple-tvos*version*`` command line argument. 
-  Alternatively, it can be specified by the ``-mtargetos=tvos*version*`` 
+  Apple's tvOS operating system. The minimum deployment target is specified
+  as part of the ``-target *arch*-apple-tvos*version*`` command line argument.
+  Alternatively, it can be specified by the ``-mtargetos=tvos*version*``
   command-line argument.
 
 ``watchos``
   Apple's watchOS operating system. The minimum deployment target is specified
-  as part of the ``-target *arch*-apple-watchos*version*`` command line 
argument. 
-  Alternatively, it can be specified by the ``-mtargetos=watchos*version*`` 
+  as part of the ``-target *arch*-apple-watchos*version*`` command line 
argument.
+  Alternatively, it can be specified by the ``-mtargetos=watchos*version*``
   command-line argument.
 
 ``visionos``
   Apple's visionOS operating system. The minimum deployment target is specified
-  as part of the ``-target *arch*-apple-visionos*version*`` command line 
argument. 
-  Alternatively, it can be specified by the ``-mtargetos=visionos*version*`` 
+  as part of the ``-target *arch*-apple-visionos*version*`` command line 
argument.
+  Alternatively, it can be specified by the ``-mtargetos=visionos*version*``
   command-line argument.
 
 ``driverkit``
   Apple's DriverKit userspace kernel extensions. The minimum deployment target
-  is specified as part of the ``-target *arch*-apple-driverkit*version*`` 
+  is specified as part of the ``-target *arch*-apple-driverkit*version*``
   command line argument.
 
 A declaration can typically be used even when deploying back to a platform
@@ -7522,7 +7522,7 @@ means that it can e.g no longer be part of an initializer 
expression.
 
   /* This may print something else than "6 * 7 = 42",
  if there is a non-weak definition of "ANSWER" in
-an object linked in */
+ an object linked in */
   printf("6 * 7 = %d\n", ANSWER);
 
   return 0;

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[clang] [clang][docs] fix whitespace in AttrDocs.td (PR #88631)

[Chris Copeland via cfe-commits]

chrisnc wrote:

@cachemeifyoucan @cyndyishida for review?

https://github.com/llvm/llvm-project/pull/88631
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[clang] [clang][docs] fix whitespace in AttrDocs.td (PR #88631)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Ready to merge, but I'm not able to myself.

https://github.com/llvm/llvm-project/pull/88631
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/88287

>From f707f292a6153f9d23734e490720db3abb5c00ac Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 5 Apr 2024 22:40:46 -0700
Subject: [PATCH] [ARM] Armv8-R does not require fp64 or neon.

---
 clang/test/Preprocessor/arm-target-features.c  | 2 +-
 llvm/include/llvm/TargetParser/ARMTargetParser.def | 2 +-
 llvm/lib/Target/ARM/ARM.td | 6 +++---
 llvm/test/Analysis/CostModel/ARM/arith.ll  | 2 +-
 llvm/test/Analysis/CostModel/ARM/cast.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cast_ldst.ll  | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cmps.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/divrem.ll | 2 +-
 llvm/test/CodeGen/ARM/build-attributes.ll  | 4 ++--
 llvm/test/CodeGen/ARM/cortex-a57-misched-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/fpconv.ll| 4 ++--
 llvm/test/CodeGen/ARM/half.ll  | 4 ++--
 llvm/test/CodeGen/ARM/misched-fp-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/pr42638-VMOVRRDCombine.ll| 2 +-
 llvm/test/CodeGen/ARM/useaa.ll | 4 ++--
 llvm/unittests/TargetParser/TargetParserTest.cpp   | 2 +-
 16 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/clang/test/Preprocessor/arm-target-features.c 
b/clang/test/Preprocessor/arm-target-features.c
index 236c9f2479b705..ad418bf6bcdcbf 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -96,7 +96,7 @@
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_CRC32 1
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_DIRECTED_ROUNDING 1
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_NUMERIC_MAXMIN 1
-// CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FP 0xe
+// CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FP 0x6
 
 // RUN: %clang -target armv7a-none-linux-gnu -x c -E -dM %s -o - | FileCheck 
-match-full-lines --check-prefix=CHECK-V7 %s
 // CHECK-V7: #define __ARMEL__ 1
diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def 
b/llvm/include/llvm/TargetParser/ARMTargetParser.def
index b821d224d7a82c..dee0f383b4b234 100644
--- a/llvm/include/llvm/TargetParser/ARMTargetParser.def
+++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def
@@ -329,7 +329,7 @@ ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
 ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, true, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-r52", ARMV8R, FK_FPV5_SP_D16, true, ARM::AEK_NONE)
 ARM_CPU_NAME("sc300", ARMV7M, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m3", ARMV7M, FK_NONE, true, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m4", ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE)
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 66596dbda83c95..6ee8c0540e6488 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -1167,9 +1167,7 @@ def ARMv8r: Architecture<"armv8-r",   "ARMv8r",   
[HasV8Ops,
FeatureDSP,
FeatureCRC,
FeatureMP,
-   FeatureVirtualization,
-   FeatureFPARMv8,
-   FeatureNEON]>;
+   FeatureVirtualization]>;
 
 def ARMv8mBaseline : Architecture<"armv8-m.base", "ARMv8mBaseline",
   [HasV8MBaselineOps,
@@ -1726,6 +1724,8 @@ def : ProcNoItin<"kryo",
[ARMv8a, ProcKryo,
  FeatureCRC]>;
 
 def : ProcessorModel<"cortex-r52", CortexR52Model,  [ARMv8r, ProcR52,
+ FeatureFPARMv8_D16_SP,
+ FeatureFP16,
  FeatureUseMISched,
  FeatureFPAO]>;
 
diff --git a/llvm/test/Analysis/CostModel/ARM/arith.ll 
b/llvm/test/Analysis/CostModel/ARM/arith.ll
index 3a137a5af36664..8f173596c3b9a0 100644
--- a/llvm/test/Analysis/CostModel/ARM/arith.ll
+++ b/llvm/test/Analysis/CostModel/ARM/arith.ll
@@ -4,7 +4,7 @@
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8.1m.main-none-eabi -mattr=+mve,+mve4beat < %s | FileCheck %s 
--check-prefix=CHECK --check-prefix=CHECK-MVE4
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8m.main-none-eabi < %s | FileCheck %s 
--check-prefix=CHECK-V8M-MAIN
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumb

[clang] [ARM][clang] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Ping @DavidSpickett @jthackray 

https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

@@ -336,9 +336,10 @@ def warn_anyx86_excessive_regsave : Warning<
   " with attribute 'no_caller_saved_registers'"
   " or be compiled with '-mgeneral-regs-only'">,
   InGroup>;
-def warn_arm_interrupt_calling_convention : Warning<
-   "call to function without interrupt attribute could clobber interruptee's 
VFP registers">,
-   InGroup;
+def warn_arm_interrupt_vfp_clobber : Warning<
+   "calling a VFP-enabled function from an interrupt could clobber the "

chrisnc wrote:

It's a phrasal adjective which would normally be hyphenated, but I will 
consider how to rephrase so it's not needed.

https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

@@ -384,6 +384,10 @@ Modified Compiler Flags
   evaluating to ``true`` and an empty body such as ``while(1);``)
   are considered infinite, even when the ``-ffinite-loop`` flag is set.
 
+- Removed "arm interrupt calling convention" warning that was included in

chrisnc wrote:

"Made into" implies that it's the more or less the same warning, but I'm trying 
to convey that the existing warning was removed because it's unsound, and the 
name is part of its confusedness. I will revisit this.

https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Thank you for the review!

> * Calling a function marked interrupt from a function marked interrupt is 
> still UB isn't it? Should there be another warning to cover that scenario as 
> well?

Correct. I can create a separate issue to describe such a warning.

> * I see that gcc has a warning in `-Wattributes` for this, you should raise a 
> bug there equivalent to the one llvm has, perhaps there even is one already.

It does, but `gcc`'s `-Wattributes` doesn't suffer from any of the issues being 
addressed here: it's already a separate flag, it cannot be silenced by putting 
`__attribute__((interrupt))` on the callee, and its warning text describes 
compiling with `-mgeneral-regs-only` to avoid the issue, though this only works 
when passed on the command line, not with 
`__attribute__((target("general-regs-only")))`.

It seems that LLVM does not have this target feature for 32-bit Arm, so I opted 
for `soft-float` as the escape hatch, which should achieve the same result, and 
check for it in function attributes. It is not checked transitively though, so 
this PR will not catch cases where an interrupt calls a soft-float function 
that then calls a function that uses VFP. The latter call is otherwise allowed 
though. IMO this is still a lot better than not having the escape hatch, but 
I'm open to suggestions.

https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/91870

>From a67b6703d384eb63b947e75c13d6421a5f961f6c Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sat, 11 May 2024 00:15:50 -0700
Subject: [PATCH] [ARM][clang] Fix warning for VFP function calls from
 interrupts.

This warning has two issues:
 - The interrupt attribute doesn't only change how volatile registers
   are treated; it also causes the function to return using an exception
   return instruction. This warning allows calls from one function with
   the interrupt attribute to another, and the diagnostic text suggests
   that not having the attribute on the callee is the problem. Actually
   making such a call will lead to a double exception return, which is
   unpredictable according to the ARM architecture manual section
   B9.1.1, "Restrictions on exception return instructions". Even on
   machines where an exception return from user/system mode is
   tolerated, if the callee's interrupt type is anything other than a
   supervisor call or secure monitor call, it will also return to a
   different address than a normal function would. For example,
   returning from an "IRQ" handler will return to lr - 4, which will
   generally result in calling the same function again.
 - It is part of the -Wextra diagnostic group and can't be individually
   disabled when using -Wextra, which also means the diagnostic text of
   this specific warning appears in the documentation of -Wextra.

This change addresses both issues. Rather than check that the callee has
the interrupt attribute, check that it uses the soft-float feature,
which will prevent use of VFP state. The warning is also given its own
diagnostic group.

Closes #34876.
---
 clang/docs/ReleaseNotes.rst   | 11 +++
 clang/include/clang/Basic/Attr.td |  7 +++
 .../clang/Basic/DiagnosticSemaKinds.td|  7 ---
 clang/lib/Sema/SemaExpr.cpp   | 19 ++-
 clang/test/Sema/arm-interrupt-attr.c  | 14 +++---
 5 files changed, 39 insertions(+), 19 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 148ff05008552..bcf1fd723273c 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -409,6 +409,11 @@ Modified Compiler Flags
   evaluating to ``true`` and an empty body such as ``while(1);``)
   are considered infinite, even when the ``-ffinite-loop`` flag is set.
 
+- Removed "arm interrupt calling convention" warning that was included in
+  ``-Wextra`` without its own flag.
+
+- Added ``-Warm-interrupt-vfp-clobber``, with its own warning group.
+
 Removed Compiler Flags
 -
 
@@ -569,6 +574,12 @@ Improvements to Clang's diagnostics
 - Clang no longer emits a "declared here" note for a builtin function that has 
no declaration in source.
   Fixes #GH93369.
 
+- For the ARM target, Clang no longer suggests adding 
``__attribute__((interrupt))`` to
+  functions that are called from interrupt handlers to prevent clobbering VFP 
registers
+  as part of ``-Wextra`` (#GH34876). Following this suggestion leads to 
unpredictable
+  behavior. Instead, a new warning, ``-Warm-interrupt-vfp-clobber`` will 
detect cases
+  where calling a function from an interrupt handler may clobber VFP state.
+
 Improvements to Clang's time-trace
 --
 
diff --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index b70b0c8b836a5..197defb410194 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3121,6 +3121,13 @@ def Target : InheritableAttr {
   }
 }
 
+bool hasFeature(StringRef Feature) const {
+  StringRef Features = getFeaturesStr();
+  SmallVector AttrFeatures;
+  Features.split(AttrFeatures, ",");
+  return Features.contains(Feature);
+}
+
 bool isDefaultVersion() const { return getFeaturesStr() == "default"; }
   }];
 }
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 193eae3bc41d6..7ea47e2f3eee2 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -336,9 +336,10 @@ def warn_anyx86_excessive_regsave : Warning<
   " with attribute 'no_caller_saved_registers'"
   " or be compiled with '-mgeneral-regs-only'">,
   InGroup>;
-def warn_arm_interrupt_calling_convention : Warning<
-   "call to function without interrupt attribute could clobber interruptee's 
VFP registers">,
-   InGroup;
+def warn_arm_interrupt_vfp_clobber : Warning<
+   "calling a function from an interrupt handler could clobber the "
+   "interruptee's VFP registers if the callee also uses VFP">,
+   InGroup>;
 def warn_interrupt_attribute_invalid : Warning<
"%select{MIPS|MSP430|RISC-V}0 'interrupt' attribute only applies to "
"functions that have %select{no parameters|a 'void' return typ

[clang] [clang][ARM] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

I've rebased, updated the warning text and release notes, and created 
https://github.com/llvm/llvm-project/issues/95359 for the future improvement to 
warn about calling interrupt handlers.

https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/91870

>From 16a00f4cf511e6dd96202d3013b41873f8dcba6b Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sat, 11 May 2024 00:15:50 -0700
Subject: [PATCH] [ARM][clang] Fix warning for VFP function calls from
 interrupts.

This warning has two issues:
 - The interrupt attribute doesn't only change how volatile registers
   are treated; it also causes the function to return using an exception
   return instruction. This warning allows calls from one function with
   the interrupt attribute to another, and the diagnostic text suggests
   that not having the attribute on the callee is the problem. Actually
   making such a call will lead to a double exception return, which is
   unpredictable according to the ARM architecture manual section
   B9.1.1, "Restrictions on exception return instructions". Even on
   machines where an exception return from user/system mode is
   tolerated, if the callee's interrupt type is anything other than a
   supervisor call or secure monitor call, it will also return to a
   different address than a normal function would. For example,
   returning from an "IRQ" handler will return to lr - 4, which will
   generally result in calling the same function again.
 - It is part of the -Wextra diagnostic group and can't be individually
   disabled when using -Wextra, which also means the diagnostic text of
   this specific warning appears in the documentation of -Wextra.

This change addresses both issues. Rather than check that the callee has
the interrupt attribute, check that it uses the soft-float feature,
which will prevent use of VFP state. The warning is also given its own
diagnostic group.

Closes #34876.
---
 clang/docs/ReleaseNotes.rst   | 11 +++
 clang/include/clang/Basic/Attr.td |  7 +++
 .../clang/Basic/DiagnosticSemaKinds.td|  7 ---
 clang/lib/Sema/SemaExpr.cpp   | 19 ++-
 clang/test/Sema/arm-interrupt-attr.c  | 14 +++---
 5 files changed, 39 insertions(+), 19 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 148ff05008552..bcf1fd723273c 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -409,6 +409,11 @@ Modified Compiler Flags
   evaluating to ``true`` and an empty body such as ``while(1);``)
   are considered infinite, even when the ``-ffinite-loop`` flag is set.
 
+- Removed "arm interrupt calling convention" warning that was included in
+  ``-Wextra`` without its own flag.
+
+- Added ``-Warm-interrupt-vfp-clobber``, with its own warning group.
+
 Removed Compiler Flags
 -
 
@@ -569,6 +574,12 @@ Improvements to Clang's diagnostics
 - Clang no longer emits a "declared here" note for a builtin function that has 
no declaration in source.
   Fixes #GH93369.
 
+- For the ARM target, Clang no longer suggests adding 
``__attribute__((interrupt))`` to
+  functions that are called from interrupt handlers to prevent clobbering VFP 
registers
+  as part of ``-Wextra`` (#GH34876). Following this suggestion leads to 
unpredictable
+  behavior. Instead, a new warning, ``-Warm-interrupt-vfp-clobber`` will 
detect cases
+  where calling a function from an interrupt handler may clobber VFP state.
+
 Improvements to Clang's time-trace
 --
 
diff --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index b70b0c8b836a5..197defb410194 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3121,6 +3121,13 @@ def Target : InheritableAttr {
   }
 }
 
+bool hasFeature(StringRef Feature) const {
+  StringRef Features = getFeaturesStr();
+  SmallVector AttrFeatures;
+  Features.split(AttrFeatures, ",");
+  return Features.contains(Feature);
+}
+
 bool isDefaultVersion() const { return getFeaturesStr() == "default"; }
   }];
 }
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 193eae3bc41d6..7ea47e2f3eee2 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -336,9 +336,10 @@ def warn_anyx86_excessive_regsave : Warning<
   " with attribute 'no_caller_saved_registers'"
   " or be compiled with '-mgeneral-regs-only'">,
   InGroup>;
-def warn_arm_interrupt_calling_convention : Warning<
-   "call to function without interrupt attribute could clobber interruptee's 
VFP registers">,
-   InGroup;
+def warn_arm_interrupt_vfp_clobber : Warning<
+   "calling a function from an interrupt handler could clobber the "
+   "interruptee's VFP registers if the callee also uses VFP">,
+   InGroup>;
 def warn_interrupt_attribute_invalid : Warning<
"%select{MIPS|MSP430|RISC-V}0 'interrupt' attribute only applies to "
"functions that have %select{no parameters|a 'void' return typ

[clang] [clang][ARM] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/91870

>From ef212138f895fb95df54798109375402c270c5da Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sat, 11 May 2024 00:15:50 -0700
Subject: [PATCH] [clang][ARM] Fix warning for VFP function calls from
 interrupts.

This warning has two issues:
 - The interrupt attribute doesn't only change how volatile registers
   are treated; it also causes the function to return using an exception
   return instruction. This warning allows calls from one function with
   the interrupt attribute to another, and the diagnostic text suggests
   that not having the attribute on the callee is the problem. Actually
   making such a call will lead to a double exception return, which is
   unpredictable according to the ARM architecture manual section
   B9.1.1, "Restrictions on exception return instructions". Even on
   machines where an exception return from user/system mode is
   tolerated, if the callee's interrupt type is anything other than a
   supervisor call or secure monitor call, it will also return to a
   different address than a normal function would. For example,
   returning from an "IRQ" handler will return to lr - 4, which will
   generally result in calling the same function again.
 - It is part of the -Wextra diagnostic group and can't be individually
   disabled when using -Wextra, which also means the diagnostic text of
   this specific warning appears in the documentation of -Wextra.

This change addresses both issues. Rather than check that the callee has
the interrupt attribute, check that it uses the soft-float feature,
which will prevent use of VFP state. The warning is also given its own
diagnostic group.

Closes #34876.
---
 clang/docs/ReleaseNotes.rst   | 11 +++
 clang/include/clang/Basic/Attr.td |  7 +++
 .../clang/Basic/DiagnosticSemaKinds.td|  7 ---
 clang/lib/Sema/SemaExpr.cpp   | 19 ++-
 clang/test/Sema/arm-interrupt-attr.c  | 14 +++---
 5 files changed, 39 insertions(+), 19 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 148ff05008552..bcf1fd723273c 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -409,6 +409,11 @@ Modified Compiler Flags
   evaluating to ``true`` and an empty body such as ``while(1);``)
   are considered infinite, even when the ``-ffinite-loop`` flag is set.
 
+- Removed "arm interrupt calling convention" warning that was included in
+  ``-Wextra`` without its own flag.
+
+- Added ``-Warm-interrupt-vfp-clobber``, with its own warning group.
+
 Removed Compiler Flags
 -
 
@@ -569,6 +574,12 @@ Improvements to Clang's diagnostics
 - Clang no longer emits a "declared here" note for a builtin function that has 
no declaration in source.
   Fixes #GH93369.
 
+- For the ARM target, Clang no longer suggests adding 
``__attribute__((interrupt))`` to
+  functions that are called from interrupt handlers to prevent clobbering VFP 
registers
+  as part of ``-Wextra`` (#GH34876). Following this suggestion leads to 
unpredictable
+  behavior. Instead, a new warning, ``-Warm-interrupt-vfp-clobber`` will 
detect cases
+  where calling a function from an interrupt handler may clobber VFP state.
+
 Improvements to Clang's time-trace
 --
 
diff --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index b70b0c8b836a5..197defb410194 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3121,6 +3121,13 @@ def Target : InheritableAttr {
   }
 }
 
+bool hasFeature(StringRef Feature) const {
+  StringRef Features = getFeaturesStr();
+  SmallVector AttrFeatures;
+  Features.split(AttrFeatures, ",");
+  return Features.contains(Feature);
+}
+
 bool isDefaultVersion() const { return getFeaturesStr() == "default"; }
   }];
 }
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 193eae3bc41d6..7ea47e2f3eee2 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -336,9 +336,10 @@ def warn_anyx86_excessive_regsave : Warning<
   " with attribute 'no_caller_saved_registers'"
   " or be compiled with '-mgeneral-regs-only'">,
   InGroup>;
-def warn_arm_interrupt_calling_convention : Warning<
-   "call to function without interrupt attribute could clobber interruptee's 
VFP registers">,
-   InGroup;
+def warn_arm_interrupt_vfp_clobber : Warning<
+   "calling a function from an interrupt handler could clobber the "
+   "interruptee's VFP registers if the callee also uses VFP">,
+   InGroup>;
 def warn_interrupt_attribute_invalid : Warning<
"%select{MIPS|MSP430|RISC-V}0 'interrupt' attribute only applies to "
"functions that have %select{no parameters|a 'void' return typ

[clang] [clang][ARM] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

While doing some more research and comparing `gcc` and `clang`, I noticed that 
`clang` doesn't even save the volatile fp registers in an interrupt handler 
when it uses them directly, so there's no point in just checking for function 
calls. `gcc` does except for `fpscr`, which it will still clobber if 
floating-point conditionals are computed. Maybe the behavior was different when 
this warning was introduced, but as of now, using fp at all in an interrupt 
handler will clobber vfp state, so I think the right path here is to just 
implement `-Wattributes` in essentially the same way `gcc` does...

https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/91870

>From b892c59a27089b4753b7677a1ada1ee8da59301b Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sat, 11 May 2024 00:15:50 -0700
Subject: [PATCH 1/2] [clang][ARM] Fix warning for using VFP from interrupts.

This warning has three issues:
 - The interrupt attribute causes the function to return using an exception
   return instruction. This warning allows calls from one function with
   the interrupt attribute to another, and the diagnostic text suggests
   that not having the attribute on the callee is a problem. Actually
   making such a call will lead to a double exception return, which is
   unpredictable according to the ARM architecture manual section
   B9.1.1, "Restrictions on exception return instructions". Even on
   machines where an exception return from user/system mode is
   tolerated, if the callee's interrupt type is anything other than a
   supervisor call or secure monitor call, it will also return to a
   different address than a normal function would. For example,
   returning from an "IRQ" handler will return to lr - 4, which will
   generally result in calling the same function again.
 - The interrupt attribute currently does not cause caller-saved VFP
   registers to be saved and restored if they are used, so putting
   __attribute__((interrupt)) on a called function doesn't prevent it
   from clobbering VFP state.
 - It is part of the -Wextra diagnostic group and can't be individually
   disabled when using -Wextra, which also means the diagnostic text of
   this specific warning appears in the documentation of -Wextra.

This change addresses all three issues by instead generating a warning
for any interrupt handler where the vfp feature is enabled. The warning is
also given its own diagnostic group.

Closes #34876.
---
 clang/docs/ReleaseNotes.rst   | 11 +
 .../clang/Basic/DiagnosticSemaKinds.td|  7 +--
 clang/lib/Sema/SemaARM.cpp|  5 +++
 clang/lib/Sema/SemaExpr.cpp   | 14 +-
 clang/test/Sema/arm-interrupt-attr.c  | 45 +++
 5 files changed, 27 insertions(+), 55 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 148ff05008552..9d007c3e28cd9 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -409,6 +409,11 @@ Modified Compiler Flags
   evaluating to ``true`` and an empty body such as ``while(1);``)
   are considered infinite, even when the ``-ffinite-loop`` flag is set.
 
+- Removed "arm interrupt calling convention" warning that was included in
+  ``-Wextra`` without its own flag.
+
+- Added ``-Warm-interrupt-vfp-clobber``, with its own warning group.
+
 Removed Compiler Flags
 -
 
@@ -569,6 +574,12 @@ Improvements to Clang's diagnostics
 - Clang no longer emits a "declared here" note for a builtin function that has 
no declaration in source.
   Fixes #GH93369.
 
+- For the ARM target, Clang no longer suggests adding 
``__attribute__((interrupt))`` to
+  functions that are called from interrupt handlers to prevent clobbering VFP 
registers
+  as part of ``-Wextra`` (#GH34876). Following this suggestion leads to 
unpredictable
+  behavior. Instead, a new warning, ``-Warm-interrupt-vfp-clobber`` will 
trigger for
+  interrupt handlers with VFP enabled.
+
 Improvements to Clang's time-trace
 --
 
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 193eae3bc41d6..56598cafdd0e6 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -336,9 +336,10 @@ def warn_anyx86_excessive_regsave : Warning<
   " with attribute 'no_caller_saved_registers'"
   " or be compiled with '-mgeneral-regs-only'">,
   InGroup>;
-def warn_arm_interrupt_calling_convention : Warning<
-   "call to function without interrupt attribute could clobber interruptee's 
VFP registers">,
-   InGroup;
+def warn_arm_interrupt_vfp_clobber : Warning<
+  "interrupt service routine with vfp enabled may clobber the "
+  "interruptee's vfp state">,
+  InGroup>;
 def warn_interrupt_attribute_invalid : Warning<
"%select{MIPS|MSP430|RISC-V}0 'interrupt' attribute only applies to "
"functions that have %select{no parameters|a 'void' return type}1">,
diff --git a/clang/lib/Sema/SemaARM.cpp b/clang/lib/Sema/SemaARM.cpp
index 02e68dbdb2e9d..5face34d145ae 100644
--- a/clang/lib/Sema/SemaARM.cpp
+++ b/clang/lib/Sema/SemaARM.cpp
@@ -1277,6 +1277,11 @@ void SemaARM::handleInterruptAttr(Decl *D, const 
ParsedAttr &AL) {
 return;
   }
 
+  const TargetInfo &TI = getASTContext().getTargetInfo();
+  if (TI.hasFeature("vfp")) {
+Diag(D->getLocation(), diag::warn_arm_interrupt_vfp_clobber);
+  }
+
   D->addAttr(::new (getASTContext())
  ARMInterruptAttr(getASTContext(), AL, Kind));
 }
diff

[clang] [clang][ARM] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc edited 
https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc edited 
https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Updated to just warn if the attribute is used while vfp is enabled, and added 
an error for calling an interrupt handler, similar to x86.

https://github.com/llvm/llvm-project/pull/91870
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[clang] [ARM][clang] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/91870

>From 846d22ff9d96c64c9b73f0270f49724b7ee1cb70 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sat, 11 May 2024 00:15:50 -0700
Subject: [PATCH] [ARM][clang] Fix warning for VFP function calls from
 interrupts.

This warning has two issues:
 - The interrupt attribute doesn't only change how volatile registers
   are treated; it also causes the function to return using an exception
   return instruction. This warning allows calls from one function with
   the interrupt attribute to another, and the diagnostic text suggests
   that not having the attribute on the callee is the problem. Actually
   making such a call will lead to a double exception return, which is
   unpredictable according to the ARM architecture manual section
   B9.1.1, "Restrictions on exception return instructions". Even on
   machines where an exception return from user/system mode is
   tolerated, if the callee's interrupt type is anything other than a
   supervisor call or secure monitor call, it will also return to a
   different address than a normal function would. For example,
   returning from an "IRQ" handler will return to lr - 4, which will
   generally result in calling the same function again.
 - It is part of the -Wextra diagnostic group and can't be individually
   disabled when using -Wextra, which also means the diagnostic text of
   this specific warning appears in the documentation of -Wextra.

This change addresses both issues. Rather than check that the callee has
the interrupt attribute, check that it uses the soft-float feature,
which will prevent use of VFP state. The warning is also given its own
diagnostic group.

Closes #34876.
---
 clang/docs/ReleaseNotes.rst   | 12 
 clang/include/clang/Basic/Attr.td |  7 +++
 .../clang/Basic/DiagnosticSemaKinds.td|  7 ---
 clang/lib/Sema/SemaExpr.cpp   | 19 ++-
 clang/test/Sema/arm-interrupt-attr.c  | 14 +++---
 5 files changed, 40 insertions(+), 19 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index bd92818f0c09d..6b27f5af97039 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -384,6 +384,10 @@ Modified Compiler Flags
   evaluating to ``true`` and an empty body such as ``while(1);``)
   are considered infinite, even when the ``-ffinite-loop`` flag is set.
 
+- Removed "arm interrupt calling convention" warning that was included in
+  ``-Wextra`` but did not have its own flag. Added
+  ``-Warm-interrupt-vfp-clobber`` that enables the modified warning.
+
 Removed Compiler Flags
 -
 
@@ -544,6 +548,14 @@ Improvements to Clang's diagnostics
 - Clang no longer emits a "declared here" note for a builtin function that has 
no declaration in source.
   Fixes #GH93369.
 
+- On ARM, Clang no longer suggests adding ``__attribute__((interrupt))`` to
+  normal functions that are called from interrupt handlers to prevent
+  clobbering VFP registers as part of ``-Wextra`` (#GH34876). Following this
+  suggestion leads to unpredictable behavior. Instead,
+  ``-Warm-interrupt-vfp-clobber`` can now be used to detect calling functions
+  that don't have VFP disabled with ``__attribute__((target("soft-float")))``
+  from an interrupt handler.
+
 Improvements to Clang's time-trace
 --
 
diff --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index ef9df1e9d8b4a..6bb64e46c7c3e 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3122,6 +3122,13 @@ def Target : InheritableAttr {
   }
 }
 
+bool hasFeature(StringRef Feature) const {
+  StringRef Features = getFeaturesStr();
+  SmallVector AttrFeatures;
+  Features.split(AttrFeatures, ",");
+  return Features.contains(Feature);
+}
+
 bool isDefaultVersion() const { return getFeaturesStr() == "default"; }
   }];
 }
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index f15cba63624ea..bf98c431a2b17 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -336,9 +336,10 @@ def warn_anyx86_excessive_regsave : Warning<
   " with attribute 'no_caller_saved_registers'"
   " or be compiled with '-mgeneral-regs-only'">,
   InGroup>;
-def warn_arm_interrupt_calling_convention : Warning<
-   "call to function without interrupt attribute could clobber interruptee's 
VFP registers">,
-   InGroup;
+def warn_arm_interrupt_vfp_clobber : Warning<
+   "calling a VFP-enabled function from an interrupt could clobber the "
+   "interruptee's VFP registers">,
+   InGroup>;
 def warn_interrupt_attribute_invalid : Warning<
"%select{MIPS|MSP430|RISC-V}0 'interrupt' attribute only applies to "
"functions that have %select{no par

[clang] [ARM][clang] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

ping (rebased and fixed another release notes conflict)

https://github.com/llvm/llvm-project/pull/91870
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[clang] [ARM][clang] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Ping

https://github.com/llvm/llvm-project/pull/91870
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/88287

>From 9317b1750b5208528ff716cee79e8666bebdba05 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 5 Apr 2024 22:40:46 -0700
Subject: [PATCH] [ARM] Armv8-R does not require fp64 or neon.

---
 clang/test/Preprocessor/arm-target-features.c  | 2 +-
 llvm/include/llvm/TargetParser/ARMTargetParser.def | 2 +-
 llvm/lib/Target/ARM/ARM.td | 5 ++---
 llvm/test/Analysis/CostModel/ARM/arith.ll  | 2 +-
 llvm/test/Analysis/CostModel/ARM/cast.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cast_ldst.ll  | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cmps.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/divrem.ll | 2 +-
 llvm/test/CodeGen/ARM/build-attributes.ll  | 4 ++--
 llvm/test/CodeGen/ARM/cortex-a57-misched-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/fpconv.ll| 4 ++--
 llvm/test/CodeGen/ARM/half.ll  | 4 ++--
 llvm/test/CodeGen/ARM/misched-fp-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/pr42638-VMOVRRDCombine.ll| 2 +-
 llvm/test/CodeGen/ARM/useaa.ll | 4 ++--
 llvm/unittests/TargetParser/TargetParserTest.cpp   | 2 +-
 16 files changed, 24 insertions(+), 25 deletions(-)

diff --git a/clang/test/Preprocessor/arm-target-features.c 
b/clang/test/Preprocessor/arm-target-features.c
index 236c9f2479b705..ad418bf6bcdcbf 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -96,7 +96,7 @@
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_CRC32 1
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_DIRECTED_ROUNDING 1
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FEATURE_NUMERIC_MAXMIN 1
-// CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FP 0xe
+// CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_FP 0x6
 
 // RUN: %clang -target armv7a-none-linux-gnu -x c -E -dM %s -o - | FileCheck 
-match-full-lines --check-prefix=CHECK-V7 %s
 // CHECK-V7: #define __ARMEL__ 1
diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def 
b/llvm/include/llvm/TargetParser/ARMTargetParser.def
index b821d224d7a82c..dee0f383b4b234 100644
--- a/llvm/include/llvm/TargetParser/ARMTargetParser.def
+++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def
@@ -329,7 +329,7 @@ ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
 ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, true, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-r52", ARMV8R, FK_FPV5_SP_D16, true, ARM::AEK_NONE)
 ARM_CPU_NAME("sc300", ARMV7M, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m3", ARMV7M, FK_NONE, true, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m4", ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE)
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 66596dbda83c95..5ffbaba9b27b88 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -1167,9 +1167,7 @@ def ARMv8r: Architecture<"armv8-r",   "ARMv8r",   
[HasV8Ops,
FeatureDSP,
FeatureCRC,
FeatureMP,
-   FeatureVirtualization,
-   FeatureFPARMv8,
-   FeatureNEON]>;
+   FeatureVirtualization]>;
 
 def ARMv8mBaseline : Architecture<"armv8-m.base", "ARMv8mBaseline",
   [HasV8MBaselineOps,
@@ -1726,6 +1724,7 @@ def : ProcNoItin<"kryo",
[ARMv8a, ProcKryo,
  FeatureCRC]>;
 
 def : ProcessorModel<"cortex-r52", CortexR52Model,  [ARMv8r, ProcR52,
+ FeatureFPARMv8_D16_SP,
  FeatureUseMISched,
  FeatureFPAO]>;
 
diff --git a/llvm/test/Analysis/CostModel/ARM/arith.ll 
b/llvm/test/Analysis/CostModel/ARM/arith.ll
index 3a137a5af36664..8f173596c3b9a0 100644
--- a/llvm/test/Analysis/CostModel/ARM/arith.ll
+++ b/llvm/test/Analysis/CostModel/ARM/arith.ll
@@ -4,7 +4,7 @@
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8.1m.main-none-eabi -mattr=+mve,+mve4beat < %s | FileCheck %s 
--check-prefix=CHECK --check-prefix=CHECK-MVE4
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8m.main-none-eabi < %s | FileCheck %s 
--check-prefix=CHECK-V8M-MAIN
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8m.base-none-eabi < %s | FileCheck %s 
--check-prefix=CHECK-V8M-BASE
-;

[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

chrisnc wrote:

ping @ostannard 

https://github.com/llvm/llvm-project/pull/88287
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

chrisnc wrote:

@davemgreen yes, this does change the cortex-r52 default features as well. The 
problem is that the cortex-r52 is the "default" CPU for armv8r (probably 
because it's the only one), so if I don't reduce the feature set of that CPU, 
armv8r will continue to imply features that are not true of all processors in 
that family. I can add this to the release notes if there's no other way to 
achieve what is needed here. Would removing the default CPU for armv8r be 
acceptable?
Regardless, this is an intentional behavior change because currently you get 
all neon and dp features just by using this architecture, so I can add release 
notes.

https://github.com/llvm/llvm-project/pull/88287
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/88287

>From ccc30221d11fe137da19c964c75b993368829647 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 5 Apr 2024 22:40:46 -0700
Subject: [PATCH] [ARM] Armv8-R does not require fp64 or neon.

---
 clang/test/Preprocessor/arm-target-features.c  | 4 ++--
 llvm/include/llvm/TargetParser/ARMTargetParser.def | 2 +-
 llvm/lib/Target/ARM/ARM.td | 6 +++---
 llvm/test/Analysis/CostModel/ARM/arith.ll  | 2 +-
 llvm/test/Analysis/CostModel/ARM/cast.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cast_ldst.ll  | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cmps.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/divrem.ll | 2 +-
 llvm/test/CodeGen/ARM/cortex-a57-misched-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/fpconv.ll| 4 ++--
 llvm/test/CodeGen/ARM/half.ll  | 4 ++--
 llvm/test/CodeGen/ARM/misched-fp-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/pr42638-VMOVRRDCombine.ll| 2 +-
 llvm/test/CodeGen/ARM/useaa.ll | 4 ++--
 llvm/unittests/TargetParser/TargetParserTest.cpp   | 2 +-
 15 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/clang/test/Preprocessor/arm-target-features.c 
b/clang/test/Preprocessor/arm-target-features.c
index 236c9f2479b705..2d65bfd4f43995 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -88,8 +88,8 @@
 // CHECK-V8R: #define __ARM_FEATURE_NUMERIC_MAXMIN 1
 // CHECK-V8R-NOT: #define __ARM_FP 0x
 
-// RUN: %clang -target armv8r-none-linux-gnueabi -x c -E -dM %s -o - | 
FileCheck -match-full-lines --check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
-// RUN: %clang -target armv8r-none-linux-gnueabihf -x c -E -dM %s -o - | 
FileCheck -match-full-lines --check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
+// RUN: %clang -target armv8r-none-linux-gnueabi -mcpu=cortex-r52 -x c -E -dM 
%s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
+// RUN: %clang -target armv8r-none-linux-gnueabihf -mcpu=cortex-r52 -x c -E 
-dM %s -o - | FileCheck -match-full-lines 
--check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARMEL__ 1
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_ARCH 8
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_ARCH_8R__ 1
diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def 
b/llvm/include/llvm/TargetParser/ARMTargetParser.def
index b821d224d7a82c..d787d988fbf69f 100644
--- a/llvm/include/llvm/TargetParser/ARMTargetParser.def
+++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def
@@ -329,7 +329,7 @@ ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
 ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, true, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, false, ARM::AEK_NONE)
 ARM_CPU_NAME("sc300", ARMV7M, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m3", ARMV7M, FK_NONE, true, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m4", ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE)
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 66596dbda83c95..dc40a7b56821d1 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -1167,9 +1167,7 @@ def ARMv8r: Architecture<"armv8-r",   "ARMv8r",   
[HasV8Ops,
FeatureDSP,
FeatureCRC,
FeatureMP,
-   FeatureVirtualization,
-   FeatureFPARMv8,
-   FeatureNEON]>;
+   FeatureVirtualization]>;
 
 def ARMv8mBaseline : Architecture<"armv8-m.base", "ARMv8mBaseline",
   [HasV8MBaselineOps,
@@ -1726,6 +1724,8 @@ def : ProcNoItin<"kryo",
[ARMv8a, ProcKryo,
  FeatureCRC]>;
 
 def : ProcessorModel<"cortex-r52", CortexR52Model,  [ARMv8r, ProcR52,
+ FeatureFPARMv8,
+ FeatureNEON,
  FeatureUseMISched,
  FeatureFPAO]>;
 
diff --git a/llvm/test/Analysis/CostModel/ARM/arith.ll 
b/llvm/test/Analysis/CostModel/ARM/arith.ll
index 3a137a5af36664..8f173596c3b9a0 100644
--- a/llvm/test/Analysis/CostModel/ARM/arith.ll
+++ b/llvm/test/Analysis/CostModel/ARM/arith.ll
@@ -4,7 +4,7 @@
 ; RUN: opt -passes="print" 2>&1

[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/88287

>From a021b579f609144c9139d3a8bd0fe87e9d028259 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 5 Apr 2024 22:40:46 -0700
Subject: [PATCH] [ARM] Armv8-R does not require fp64 or neon.

---
 clang/test/Preprocessor/arm-target-features.c  | 4 ++--
 llvm/include/llvm/TargetParser/ARMTargetParser.def | 2 +-
 llvm/lib/Target/ARM/ARM.td | 6 +++---
 llvm/test/Analysis/CostModel/ARM/arith.ll  | 2 +-
 llvm/test/Analysis/CostModel/ARM/cast.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cast_ldst.ll  | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cmps.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/divrem.ll | 2 +-
 llvm/test/CodeGen/ARM/cortex-a57-misched-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/fpconv.ll| 4 ++--
 llvm/test/CodeGen/ARM/half.ll  | 4 ++--
 llvm/test/CodeGen/ARM/misched-fp-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/pr42638-VMOVRRDCombine.ll| 2 +-
 llvm/test/CodeGen/ARM/useaa.ll | 4 ++--
 llvm/unittests/TargetParser/TargetParserTest.cpp   | 2 +-
 15 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/clang/test/Preprocessor/arm-target-features.c 
b/clang/test/Preprocessor/arm-target-features.c
index 236c9f2479b705..2d65bfd4f43995 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -88,8 +88,8 @@
 // CHECK-V8R: #define __ARM_FEATURE_NUMERIC_MAXMIN 1
 // CHECK-V8R-NOT: #define __ARM_FP 0x
 
-// RUN: %clang -target armv8r-none-linux-gnueabi -x c -E -dM %s -o - | 
FileCheck -match-full-lines --check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
-// RUN: %clang -target armv8r-none-linux-gnueabihf -x c -E -dM %s -o - | 
FileCheck -match-full-lines --check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
+// RUN: %clang -target armv8r-none-linux-gnueabi -mcpu=cortex-r52 -x c -E -dM 
%s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
+// RUN: %clang -target armv8r-none-linux-gnueabihf -mcpu=cortex-r52 -x c -E 
-dM %s -o - | FileCheck -match-full-lines 
--check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARMEL__ 1
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_ARCH 8
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_ARCH_8R__ 1
diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def 
b/llvm/include/llvm/TargetParser/ARMTargetParser.def
index b821d224d7a82c..d787d988fbf69f 100644
--- a/llvm/include/llvm/TargetParser/ARMTargetParser.def
+++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def
@@ -329,7 +329,7 @@ ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
 ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, true, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, false, ARM::AEK_NONE)
 ARM_CPU_NAME("sc300", ARMV7M, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m3", ARMV7M, FK_NONE, true, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m4", ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE)
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 66596dbda83c95..dc40a7b56821d1 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -1167,9 +1167,7 @@ def ARMv8r: Architecture<"armv8-r",   "ARMv8r",   
[HasV8Ops,
FeatureDSP,
FeatureCRC,
FeatureMP,
-   FeatureVirtualization,
-   FeatureFPARMv8,
-   FeatureNEON]>;
+   FeatureVirtualization]>;
 
 def ARMv8mBaseline : Architecture<"armv8-m.base", "ARMv8mBaseline",
   [HasV8MBaselineOps,
@@ -1726,6 +1724,8 @@ def : ProcNoItin<"kryo",
[ARMv8a, ProcKryo,
  FeatureCRC]>;
 
 def : ProcessorModel<"cortex-r52", CortexR52Model,  [ARMv8r, ProcR52,
+ FeatureFPARMv8,
+ FeatureNEON,
  FeatureUseMISched,
  FeatureFPAO]>;
 
diff --git a/llvm/test/Analysis/CostModel/ARM/arith.ll 
b/llvm/test/Analysis/CostModel/ARM/arith.ll
index 3a137a5af36664..8f173596c3b9a0 100644
--- a/llvm/test/Analysis/CostModel/ARM/arith.ll
+++ b/llvm/test/Analysis/CostModel/ARM/arith.ll
@@ -4,7 +4,7 @@
 ; RUN: opt -passes="print" 2>&1

[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/88287

>From 4681c3016a0d035b4b23fa9349125901f6e8e4d8 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 5 Apr 2024 22:40:46 -0700
Subject: [PATCH] [ARM] Armv8-R does not require fp64 or neon.

---
 clang/test/Preprocessor/arm-target-features.c  | 4 ++--
 llvm/include/llvm/TargetParser/ARMTargetParser.def | 2 +-
 llvm/lib/Target/ARM/ARM.td | 6 +++---
 llvm/test/Analysis/CostModel/ARM/arith.ll  | 2 +-
 llvm/test/Analysis/CostModel/ARM/cast.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cast_ldst.ll  | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cmps.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/divrem.ll | 2 +-
 llvm/test/CodeGen/ARM/cortex-a57-misched-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/fpconv.ll| 4 ++--
 llvm/test/CodeGen/ARM/half.ll  | 4 ++--
 llvm/test/CodeGen/ARM/misched-fp-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/useaa.ll | 4 ++--
 llvm/unittests/TargetParser/TargetParserTest.cpp   | 4 ++--
 14 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/clang/test/Preprocessor/arm-target-features.c 
b/clang/test/Preprocessor/arm-target-features.c
index 236c9f2479b705..2d65bfd4f43995 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -88,8 +88,8 @@
 // CHECK-V8R: #define __ARM_FEATURE_NUMERIC_MAXMIN 1
 // CHECK-V8R-NOT: #define __ARM_FP 0x
 
-// RUN: %clang -target armv8r-none-linux-gnueabi -x c -E -dM %s -o - | 
FileCheck -match-full-lines --check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
-// RUN: %clang -target armv8r-none-linux-gnueabihf -x c -E -dM %s -o - | 
FileCheck -match-full-lines --check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
+// RUN: %clang -target armv8r-none-linux-gnueabi -mcpu=cortex-r52 -x c -E -dM 
%s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
+// RUN: %clang -target armv8r-none-linux-gnueabihf -mcpu=cortex-r52 -x c -E 
-dM %s -o - | FileCheck -match-full-lines 
--check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARMEL__ 1
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_ARCH 8
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_ARCH_8R__ 1
diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def 
b/llvm/include/llvm/TargetParser/ARMTargetParser.def
index b821d224d7a82c..d787d988fbf69f 100644
--- a/llvm/include/llvm/TargetParser/ARMTargetParser.def
+++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def
@@ -329,7 +329,7 @@ ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
 ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, true, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, false, ARM::AEK_NONE)
 ARM_CPU_NAME("sc300", ARMV7M, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m3", ARMV7M, FK_NONE, true, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m4", ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE)
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 66596dbda83c95..dc40a7b56821d1 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -1167,9 +1167,7 @@ def ARMv8r: Architecture<"armv8-r",   "ARMv8r",   
[HasV8Ops,
FeatureDSP,
FeatureCRC,
FeatureMP,
-   FeatureVirtualization,
-   FeatureFPARMv8,
-   FeatureNEON]>;
+   FeatureVirtualization]>;
 
 def ARMv8mBaseline : Architecture<"armv8-m.base", "ARMv8mBaseline",
   [HasV8MBaselineOps,
@@ -1726,6 +1724,8 @@ def : ProcNoItin<"kryo",
[ARMv8a, ProcKryo,
  FeatureCRC]>;
 
 def : ProcessorModel<"cortex-r52", CortexR52Model,  [ARMv8r, ProcR52,
+ FeatureFPARMv8,
+ FeatureNEON,
  FeatureUseMISched,
  FeatureFPAO]>;
 
diff --git a/llvm/test/Analysis/CostModel/ARM/arith.ll 
b/llvm/test/Analysis/CostModel/ARM/arith.ll
index 3a137a5af36664..8f173596c3b9a0 100644
--- a/llvm/test/Analysis/CostModel/ARM/arith.ll
+++ b/llvm/test/Analysis/CostModel/ARM/arith.ll
@@ -4,7 +4,7 @@
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8.1m.main-none-eabi -mat

[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

chrisnc wrote:

I've updated the PR to use the proposed approach of making `"generic"` the 
default CPU for armv8r. Let me know if this is alright. I still need to fix up 
a few of the tests to match this new behavior.

https://github.com/llvm/llvm-project/pull/88287
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/88287

>From 65e44d63a0939a4b91d084a2405f8a091329e311 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 5 Apr 2024 22:40:46 -0700
Subject: [PATCH] [ARM] Armv8-R does not require fp64 or neon.

---
 clang/test/Preprocessor/arm-target-features.c  | 4 ++--
 llvm/include/llvm/TargetParser/ARMTargetParser.def | 2 +-
 llvm/lib/Target/ARM/ARM.td | 6 +++---
 llvm/test/Analysis/CostModel/ARM/arith.ll  | 2 +-
 llvm/test/Analysis/CostModel/ARM/cast.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cast_ldst.ll  | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cmps.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/divrem.ll | 2 +-
 llvm/test/CodeGen/ARM/cortex-a57-misched-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/fpconv.ll| 4 ++--
 llvm/test/CodeGen/ARM/half.ll  | 4 ++--
 llvm/test/CodeGen/ARM/misched-fp-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/useaa.ll | 2 +-
 llvm/unittests/TargetParser/TargetParserTest.cpp   | 4 ++--
 14 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/clang/test/Preprocessor/arm-target-features.c 
b/clang/test/Preprocessor/arm-target-features.c
index 236c9f2479b705..2d65bfd4f43995 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -88,8 +88,8 @@
 // CHECK-V8R: #define __ARM_FEATURE_NUMERIC_MAXMIN 1
 // CHECK-V8R-NOT: #define __ARM_FP 0x
 
-// RUN: %clang -target armv8r-none-linux-gnueabi -x c -E -dM %s -o - | 
FileCheck -match-full-lines --check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
-// RUN: %clang -target armv8r-none-linux-gnueabihf -x c -E -dM %s -o - | 
FileCheck -match-full-lines --check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
+// RUN: %clang -target armv8r-none-linux-gnueabi -mcpu=cortex-r52 -x c -E -dM 
%s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
+// RUN: %clang -target armv8r-none-linux-gnueabihf -mcpu=cortex-r52 -x c -E 
-dM %s -o - | FileCheck -match-full-lines 
--check-prefix=CHECK-V8R-ALLOW-FP-INSTR %s
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARMEL__ 1
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_ARCH 8
 // CHECK-V8R-ALLOW-FP-INSTR: #define __ARM_ARCH_8R__ 1
diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def 
b/llvm/include/llvm/TargetParser/ARMTargetParser.def
index b821d224d7a82c..d787d988fbf69f 100644
--- a/llvm/include/llvm/TargetParser/ARMTargetParser.def
+++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def
@@ -329,7 +329,7 @@ ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
 ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false,
  (ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, true, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, false, ARM::AEK_NONE)
 ARM_CPU_NAME("sc300", ARMV7M, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m3", ARMV7M, FK_NONE, true, ARM::AEK_NONE)
 ARM_CPU_NAME("cortex-m4", ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE)
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 66596dbda83c95..dc40a7b56821d1 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -1167,9 +1167,7 @@ def ARMv8r: Architecture<"armv8-r",   "ARMv8r",   
[HasV8Ops,
FeatureDSP,
FeatureCRC,
FeatureMP,
-   FeatureVirtualization,
-   FeatureFPARMv8,
-   FeatureNEON]>;
+   FeatureVirtualization]>;
 
 def ARMv8mBaseline : Architecture<"armv8-m.base", "ARMv8mBaseline",
   [HasV8MBaselineOps,
@@ -1726,6 +1724,8 @@ def : ProcNoItin<"kryo",
[ARMv8a, ProcKryo,
  FeatureCRC]>;
 
 def : ProcessorModel<"cortex-r52", CortexR52Model,  [ARMv8r, ProcR52,
+ FeatureFPARMv8,
+ FeatureNEON,
  FeatureUseMISched,
  FeatureFPAO]>;
 
diff --git a/llvm/test/Analysis/CostModel/ARM/arith.ll 
b/llvm/test/Analysis/CostModel/ARM/arith.ll
index 3a137a5af36664..8f173596c3b9a0 100644
--- a/llvm/test/Analysis/CostModel/ARM/arith.ll
+++ b/llvm/test/Analysis/CostModel/ARM/arith.ll
@@ -4,7 +4,7 @@
 ; RUN: opt -passes="print" 2>&1 -disable-output 
-mtriple=thumbv8.1m.main-none-eabi -mattr

[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/88287

>From a4a27e9db447fde7f38952618b877fc1ff741279 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 5 Apr 2024 22:40:46 -0700
Subject: [PATCH] [ARM] Armv8-R does not require fp64 or neon.

---
 clang/test/Driver/arm-cortex-cpus-1.c  | 8 
 clang/test/Driver/arm-features.c   | 2 +-
 clang/test/Preprocessor/arm-target-features.c  | 4 ++--
 llvm/include/llvm/TargetParser/ARMTargetParser.def | 2 +-
 llvm/lib/Target/ARM/ARM.td | 6 +++---
 llvm/test/Analysis/CostModel/ARM/arith.ll  | 2 +-
 llvm/test/Analysis/CostModel/ARM/cast.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cast_ldst.ll  | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cmps.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/divrem.ll | 2 +-
 llvm/test/CodeGen/ARM/cortex-a57-misched-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/fpconv.ll| 4 ++--
 llvm/test/CodeGen/ARM/half.ll  | 4 ++--
 llvm/test/CodeGen/ARM/misched-fp-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/useaa.ll | 2 +-
 llvm/unittests/TargetParser/TargetParserTest.cpp   | 4 ++--
 16 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/clang/test/Driver/arm-cortex-cpus-1.c 
b/clang/test/Driver/arm-cortex-cpus-1.c
index 25abbe1e3a8ad7..6f0b64910f9b07 100644
--- a/clang/test/Driver/arm-cortex-cpus-1.c
+++ b/clang/test/Driver/arm-cortex-cpus-1.c
@@ -153,23 +153,23 @@
 // RUN: %clang -target armv8r-linux-gnueabi -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8R %s
 // RUN: %clang -target arm -march=armv8r -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8R %s
 // RUN: %clang -target arm -march=armv8-r -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8R %s
-// CHECK-V8R: "-cc1"{{.*}} "-triple" "armv8r-{{.*}} "-target-cpu" "cortex-r52"
+// CHECK-V8R: "-cc1"{{.*}} "-triple" "armv8r-{{.*}} "-target-cpu" "generic"
 
 // RUN: %clang -target armv8r-linux-gnueabi -mbig-endian -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8R-BIG %s
 // RUN: %clang -target arm -march=armv8r -mbig-endian -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8R-BIG %s
 // RUN: %clang -target arm -march=armv8-r -mbig-endian -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8R-BIG %s
-// CHECK-V8R-BIG: "-cc1"{{.*}} "-triple" "armebv8r-{{.*}} "-target-cpu" 
"cortex-r52"
+// CHECK-V8R-BIG: "-cc1"{{.*}} "-triple" "armebv8r-{{.*}} "-target-cpu" 
"generic"
 
 // RUN: %clang -target armv8r-linux-gnueabi -mthumb -### -c %s 2>&1 | \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB %s
 // RUN: %clang -target arm -march=armv8r -mthumb -### -c %s 2>&1 | \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB %s
-// CHECK-V8R-THUMB: "-cc1"{{.*}} "-triple" "thumbv8r-{{.*}} "-target-cpu" 
"cortex-r52"
+// CHECK-V8R-THUMB: "-cc1"{{.*}} "-triple" "thumbv8r-{{.*}} "-target-cpu" 
"generic"
 // RUN: %clang -target armv8r-linux-gnueabi -mthumb -mbig-endian -### -c %s 
2>&1 | \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB-BIG %s
 // RUN: %clang -target arm -march=armv8r -mthumb -mbig-endian -### -c %s 2>&1 
| \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB-BIG %s
-// CHECK-V8R-THUMB-BIG: "-cc1"{{.*}} "-triple" "thumbebv8r-{{.*}} 
"-target-cpu" "cortex-r52"
+// CHECK-V8R-THUMB-BIG: "-cc1"{{.*}} "-triple" "thumbebv8r-{{.*}} 
"-target-cpu" "generic"
 
 // RUN: %clang -mcpu=generic -target armv8 -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8A-GENERIC %s
 // RUN: %clang -mcpu=generic -target arm -march=armv8 -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8A-GENERIC %s
diff --git a/clang/test/Driver/arm-features.c b/clang/test/Driver/arm-features.c
index e043244f18a61f..eb424f5f61116b 100644
--- a/clang/test/Driver/arm-features.c
+++ b/clang/test/Driver/arm-features.c
@@ -74,7 +74,7 @@
 // Check +crypto for M and R profiles:
 //
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-r+crypto   -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-CRYPTO-R %s
-// CHECK-CRYPTO-R: "-cc1"{{.*}} "-target-cpu" "cortex-r52"{{.*}} 
"-target-feature" "+sha2" "-target-feature" "+aes"
+// CHECK-CRYPTO-R: "-cc1"{{.*}} "-target-cpu" "generic"{{.*}} 
"-target-feature" "+sha2" "-target-feature" "+aes"
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-m.base+crypto -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO5 %s
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-m.main+crypto -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO5 %s
 // RUN: %clang -target arm-arm-none-eabi -mcpu=cortex-m23+crypto -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO5 %s
diff --git a/clang/test/Preprocessor/arm-target-features.c 
b/clang/test/Preprocessor/arm-target-features.c
index 236c9f2479b705..2d65bfd4f43995 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -88,8 +88,8 @@
 // CHECK-V8R: #define __ARM_FEATURE_NUMER

[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Another option is to include `FeatureFPARMv8_D16_SP` in `ARMv8r`. The R-profile 
supplement of the Arm manual does say that this is a minimum feature 
requirement (as opposed to just being a variant of the R52).

https://github.com/llvm/llvm-project/pull/88287
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/88287

>From 575128cc6b494fed2065cae07754477426cb1c24 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 5 Apr 2024 22:40:46 -0700
Subject: [PATCH] [ARM] Armv8-R does not require fp64 or neon.

Specifying cortex-r52 still enables neon and fp64.
Change the default Armv8-R cpu from cortex-r52 to generic so it will not
enable these features by default.
---
 clang/test/Driver/arm-cortex-cpus-1.c  | 8 
 clang/test/Driver/arm-features.c   | 2 +-
 clang/test/Preprocessor/arm-target-features.c  | 4 ++--
 llvm/docs/ReleaseNotes.rst | 2 ++
 llvm/include/llvm/TargetParser/ARMTargetParser.def | 4 ++--
 llvm/lib/Target/ARM/ARM.td | 7 ---
 llvm/test/Analysis/CostModel/ARM/arith.ll  | 2 +-
 llvm/test/Analysis/CostModel/ARM/cast.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cast_ldst.ll  | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cmps.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/divrem.ll | 2 +-
 llvm/test/CodeGen/ARM/cortex-a57-misched-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/fpconv.ll| 4 ++--
 llvm/test/CodeGen/ARM/half.ll  | 4 ++--
 llvm/test/CodeGen/ARM/useaa.ll | 2 +-
 llvm/unittests/TargetParser/TargetParserTest.cpp   | 4 ++--
 16 files changed, 31 insertions(+), 28 deletions(-)

diff --git a/clang/test/Driver/arm-cortex-cpus-1.c 
b/clang/test/Driver/arm-cortex-cpus-1.c
index 25abbe1e3a8ad7..6f0b64910f9b07 100644
--- a/clang/test/Driver/arm-cortex-cpus-1.c
+++ b/clang/test/Driver/arm-cortex-cpus-1.c
@@ -153,23 +153,23 @@
 // RUN: %clang -target armv8r-linux-gnueabi -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8R %s
 // RUN: %clang -target arm -march=armv8r -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8R %s
 // RUN: %clang -target arm -march=armv8-r -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8R %s
-// CHECK-V8R: "-cc1"{{.*}} "-triple" "armv8r-{{.*}} "-target-cpu" "cortex-r52"
+// CHECK-V8R: "-cc1"{{.*}} "-triple" "armv8r-{{.*}} "-target-cpu" "generic"
 
 // RUN: %clang -target armv8r-linux-gnueabi -mbig-endian -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8R-BIG %s
 // RUN: %clang -target arm -march=armv8r -mbig-endian -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8R-BIG %s
 // RUN: %clang -target arm -march=armv8-r -mbig-endian -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8R-BIG %s
-// CHECK-V8R-BIG: "-cc1"{{.*}} "-triple" "armebv8r-{{.*}} "-target-cpu" 
"cortex-r52"
+// CHECK-V8R-BIG: "-cc1"{{.*}} "-triple" "armebv8r-{{.*}} "-target-cpu" 
"generic"
 
 // RUN: %clang -target armv8r-linux-gnueabi -mthumb -### -c %s 2>&1 | \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB %s
 // RUN: %clang -target arm -march=armv8r -mthumb -### -c %s 2>&1 | \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB %s
-// CHECK-V8R-THUMB: "-cc1"{{.*}} "-triple" "thumbv8r-{{.*}} "-target-cpu" 
"cortex-r52"
+// CHECK-V8R-THUMB: "-cc1"{{.*}} "-triple" "thumbv8r-{{.*}} "-target-cpu" 
"generic"
 // RUN: %clang -target armv8r-linux-gnueabi -mthumb -mbig-endian -### -c %s 
2>&1 | \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB-BIG %s
 // RUN: %clang -target arm -march=armv8r -mthumb -mbig-endian -### -c %s 2>&1 
| \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB-BIG %s
-// CHECK-V8R-THUMB-BIG: "-cc1"{{.*}} "-triple" "thumbebv8r-{{.*}} 
"-target-cpu" "cortex-r52"
+// CHECK-V8R-THUMB-BIG: "-cc1"{{.*}} "-triple" "thumbebv8r-{{.*}} 
"-target-cpu" "generic"
 
 // RUN: %clang -mcpu=generic -target armv8 -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8A-GENERIC %s
 // RUN: %clang -mcpu=generic -target arm -march=armv8 -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8A-GENERIC %s
diff --git a/clang/test/Driver/arm-features.c b/clang/test/Driver/arm-features.c
index e043244f18a61f..eb424f5f61116b 100644
--- a/clang/test/Driver/arm-features.c
+++ b/clang/test/Driver/arm-features.c
@@ -74,7 +74,7 @@
 // Check +crypto for M and R profiles:
 //
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-r+crypto   -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-CRYPTO-R %s
-// CHECK-CRYPTO-R: "-cc1"{{.*}} "-target-cpu" "cortex-r52"{{.*}} 
"-target-feature" "+sha2" "-target-feature" "+aes"
+// CHECK-CRYPTO-R: "-cc1"{{.*}} "-target-cpu" "generic"{{.*}} 
"-target-feature" "+sha2" "-target-feature" "+aes"
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-m.base+crypto -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO5 %s
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-m.main+crypto -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO5 %s
 // RUN: %clang -target arm-arm-none-eabi -mcpu=cortex-m23+crypto -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO5 %s
diff --git a/clang/test/Preprocessor/arm-target-features.c 
b/clang/test/Preprocessor/arm-target-features.c
index 236c9f2479b705..2d65bfd4f43995 100644
---

[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Added an item to the release notes and fixed another place where fp64+neon was 
being added (the target parser); now I see the expected results when using just 
armv8r-none-eabi (sans -mcpu=cortex-r52).

https://github.com/llvm/llvm-project/pull/88287
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/88287

>From 46803a6da62b8348f3eb8759c74ec6abf8693c92 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 5 Apr 2024 22:40:46 -0700
Subject: [PATCH] [ARM] Armv8-R does not require fp64 or neon.

Specifying cortex-r52 still enables neon and fp64.
Change the default Armv8-R cpu from cortex-r52 to generic so it will not
enable these features by default.

Remove the GENERIC case from llvm/test/CodeGen/ARM/useaa.ll because it
is the same as the USEAA case now that AA is enabled for all targets.
---
 clang/test/Driver/arm-cortex-cpus-1.c  | 8 
 clang/test/Driver/arm-features.c   | 2 +-
 clang/test/Preprocessor/arm-target-features.c  | 4 ++--
 llvm/docs/ReleaseNotes.rst | 2 ++
 llvm/include/llvm/TargetParser/ARMTargetParser.def | 4 ++--
 llvm/lib/Target/ARM/ARM.td | 7 ---
 llvm/test/Analysis/CostModel/ARM/arith.ll  | 2 +-
 llvm/test/Analysis/CostModel/ARM/cast.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cast_ldst.ll  | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cmps.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/divrem.ll | 2 +-
 llvm/test/CodeGen/ARM/cortex-a57-misched-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/fpconv.ll| 4 ++--
 llvm/test/CodeGen/ARM/half.ll  | 4 ++--
 llvm/test/CodeGen/ARM/useaa.ll | 6 +-
 llvm/unittests/TargetParser/TargetParserTest.cpp   | 4 ++--
 16 files changed, 31 insertions(+), 32 deletions(-)

diff --git a/clang/test/Driver/arm-cortex-cpus-1.c 
b/clang/test/Driver/arm-cortex-cpus-1.c
index 25abbe1e3a8ad7..6f0b64910f9b07 100644
--- a/clang/test/Driver/arm-cortex-cpus-1.c
+++ b/clang/test/Driver/arm-cortex-cpus-1.c
@@ -153,23 +153,23 @@
 // RUN: %clang -target armv8r-linux-gnueabi -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8R %s
 // RUN: %clang -target arm -march=armv8r -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8R %s
 // RUN: %clang -target arm -march=armv8-r -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8R %s
-// CHECK-V8R: "-cc1"{{.*}} "-triple" "armv8r-{{.*}} "-target-cpu" "cortex-r52"
+// CHECK-V8R: "-cc1"{{.*}} "-triple" "armv8r-{{.*}} "-target-cpu" "generic"
 
 // RUN: %clang -target armv8r-linux-gnueabi -mbig-endian -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8R-BIG %s
 // RUN: %clang -target arm -march=armv8r -mbig-endian -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8R-BIG %s
 // RUN: %clang -target arm -march=armv8-r -mbig-endian -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8R-BIG %s
-// CHECK-V8R-BIG: "-cc1"{{.*}} "-triple" "armebv8r-{{.*}} "-target-cpu" 
"cortex-r52"
+// CHECK-V8R-BIG: "-cc1"{{.*}} "-triple" "armebv8r-{{.*}} "-target-cpu" 
"generic"
 
 // RUN: %clang -target armv8r-linux-gnueabi -mthumb -### -c %s 2>&1 | \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB %s
 // RUN: %clang -target arm -march=armv8r -mthumb -### -c %s 2>&1 | \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB %s
-// CHECK-V8R-THUMB: "-cc1"{{.*}} "-triple" "thumbv8r-{{.*}} "-target-cpu" 
"cortex-r52"
+// CHECK-V8R-THUMB: "-cc1"{{.*}} "-triple" "thumbv8r-{{.*}} "-target-cpu" 
"generic"
 // RUN: %clang -target armv8r-linux-gnueabi -mthumb -mbig-endian -### -c %s 
2>&1 | \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB-BIG %s
 // RUN: %clang -target arm -march=armv8r -mthumb -mbig-endian -### -c %s 2>&1 
| \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB-BIG %s
-// CHECK-V8R-THUMB-BIG: "-cc1"{{.*}} "-triple" "thumbebv8r-{{.*}} 
"-target-cpu" "cortex-r52"
+// CHECK-V8R-THUMB-BIG: "-cc1"{{.*}} "-triple" "thumbebv8r-{{.*}} 
"-target-cpu" "generic"
 
 // RUN: %clang -mcpu=generic -target armv8 -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8A-GENERIC %s
 // RUN: %clang -mcpu=generic -target arm -march=armv8 -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8A-GENERIC %s
diff --git a/clang/test/Driver/arm-features.c b/clang/test/Driver/arm-features.c
index e043244f18a61f..eb424f5f61116b 100644
--- a/clang/test/Driver/arm-features.c
+++ b/clang/test/Driver/arm-features.c
@@ -74,7 +74,7 @@
 // Check +crypto for M and R profiles:
 //
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-r+crypto   -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-CRYPTO-R %s
-// CHECK-CRYPTO-R: "-cc1"{{.*}} "-target-cpu" "cortex-r52"{{.*}} 
"-target-feature" "+sha2" "-target-feature" "+aes"
+// CHECK-CRYPTO-R: "-cc1"{{.*}} "-target-cpu" "generic"{{.*}} 
"-target-feature" "+sha2" "-target-feature" "+aes"
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-m.base+crypto -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO5 %s
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-m.main+crypto -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO5 %s
 // RUN: %clang -target arm-arm-none-eabi -mcpu=cortex-m23+crypto -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO5 %s
diff --gi

[clang] [clang] Define ATOMIC_FLAG_INIT correctly for C++. (PR #97534)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/97534

>From 1b39c59e0ec3cbe1f2cabc650b983883439dde31 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Wed, 3 Jul 2024 00:11:39 -0700
Subject: [PATCH] [clang] Define `ATOMIC_FLAG_INIT` correctly for C++.

---
 clang/docs/ReleaseNotes.rst| 3 +++
 clang/lib/Headers/stdatomic.h  | 4 
 clang/test/Headers/stdatomic.c | 5 +
 3 files changed, 12 insertions(+)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index d03459f7cc42c..587921850798b 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -891,6 +891,9 @@ Bug Fixes in This Version
 - Fixed an assertion failure when a template non-type parameter contains
   an invalid expression.
 
+- Fixed the definition of ``ATOMIC_FLAG_INIT`` in  so it can
+  be used in C++.
+
 Bug Fixes to Compiler Builtins
 ^^
 
diff --git a/clang/lib/Headers/stdatomic.h b/clang/lib/Headers/stdatomic.h
index 2027055f38796..1991351f9e9ef 100644
--- a/clang/lib/Headers/stdatomic.h
+++ b/clang/lib/Headers/stdatomic.h
@@ -172,7 +172,11 @@ typedef _Atomic(uintmax_t)  atomic_uintmax_t;
 
 typedef struct atomic_flag { atomic_bool _Value; } atomic_flag;
 
+#ifdef __cplusplus
+#define ATOMIC_FLAG_INIT {false}
+#else
 #define ATOMIC_FLAG_INIT { 0 }
+#endif
 
 /* These should be provided by the libc implementation. */
 #ifdef __cplusplus
diff --git a/clang/test/Headers/stdatomic.c b/clang/test/Headers/stdatomic.c
index 3643fd4245b31..9afd531a9ed9b 100644
--- a/clang/test/Headers/stdatomic.c
+++ b/clang/test/Headers/stdatomic.c
@@ -1,5 +1,8 @@
 // RUN: %clang_cc1 -std=c11 -E %s | FileCheck %s
 // RUN: %clang_cc1 -std=c11 -fms-compatibility -E %s | FileCheck %s
+// RUN: %clang_cc1 -std=c11 %s -verify
+// RUN: %clang_cc1 -x c++ -std=c++11 %s -verify
+// expected-no-diagnostics
 #include 
 
 int bool_lock_free = ATOMIC_BOOL_LOCK_FREE;
@@ -31,3 +34,5 @@ int llong_lock_free = ATOMIC_LLONG_LOCK_FREE;
 
 int pointer_lock_free = ATOMIC_POINTER_LOCK_FREE;
 // CHECK: pointer_lock_free = {{ *[012] *;}}
+
+atomic_flag f = ATOMIC_FLAG_INIT;

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[clang] [clang] Define ATOMIC_FLAG_INIT correctly for C++. (PR #97534)

[Chris Copeland via cfe-commits]

@@ -750,6 +750,8 @@ Bug Fixes in This Version
 
 - Fixed `static_cast` to array of unknown bound. Fixes (#GH62863).
 
+- Fixed the definition of ATOMIC_FLAG_INIT in stdatomic.h so it can be used in 
C++.

chrisnc wrote:

Done.

https://github.com/llvm/llvm-project/pull/97534
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[clang] [clang] Define ATOMIC_FLAG_INIT correctly for C++. (PR #97534)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Rebased and added a test case. I confirmed that the test fails using the 
current definition of `ATOMIC_FLAG_INIT`:

```
error: 'expected-error' diagnostics seen but not expected:
  Line 38: non-constant-expression cannot be narrowed from type 'int' to 
'atomic_bool' (aka '_Atomic(bool)') in initializer list
error: 'expected-note' diagnostics seen but not expected:
  Line 38: insert an explicit cast to silence this issue
2 errors generated.
```

https://github.com/llvm/llvm-project/pull/97534
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[clang] [clang] Define `ATOMIC_FLAG_INIT` correctly for C++. (PR #97534)

[Chris Copeland via cfe-commits]

chrisnc wrote:

@AaronBallman yes, that would be great! I'm just a contributor, not a 
collaborator.

https://github.com/llvm/llvm-project/pull/97534
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[clang] [clang] Define ATOMIC_FLAG_INIT correctly for C++. (PR #97534)

[Chris Copeland via cfe-commits]

chrisnc wrote:

ping

https://github.com/llvm/llvm-project/pull/97534
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/88287

>From 0a3a3c29b599df0cc6e3066b3388151fdb313cc2 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Fri, 5 Apr 2024 22:40:46 -0700
Subject: [PATCH] [ARM] Armv8-R does not require fp64 or neon.

Specifying cortex-r52 still enables neon and fp64.
Change the default Armv8-R cpu from cortex-r52 to generic so it will not
enable these features by default.

Remove the GENERIC case from llvm/test/CodeGen/ARM/useaa.ll because it
is the same as the USEAA case now that AA is enabled for all targets.
---
 clang/test/Driver/arm-cortex-cpus-1.c  | 8 
 clang/test/Driver/arm-features.c   | 2 +-
 clang/test/Preprocessor/arm-target-features.c  | 4 ++--
 llvm/docs/ReleaseNotes.rst | 2 ++
 llvm/include/llvm/TargetParser/ARMTargetParser.def | 4 ++--
 llvm/lib/Target/ARM/ARMArchitectures.td| 5 ++---
 llvm/lib/Target/ARM/ARMProcessors.td   | 2 ++
 llvm/test/Analysis/CostModel/ARM/arith.ll  | 2 +-
 llvm/test/Analysis/CostModel/ARM/cast.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cast_ldst.ll  | 4 ++--
 llvm/test/Analysis/CostModel/ARM/cmps.ll   | 4 ++--
 llvm/test/Analysis/CostModel/ARM/divrem.ll | 2 +-
 llvm/test/CodeGen/ARM/cortex-a57-misched-basic.ll  | 2 +-
 llvm/test/CodeGen/ARM/fpconv.ll| 4 ++--
 llvm/test/CodeGen/ARM/half.ll  | 4 ++--
 llvm/test/CodeGen/ARM/useaa.ll | 6 +-
 llvm/unittests/TargetParser/TargetParserTest.cpp   | 4 ++--
 17 files changed, 31 insertions(+), 32 deletions(-)

diff --git a/clang/test/Driver/arm-cortex-cpus-1.c 
b/clang/test/Driver/arm-cortex-cpus-1.c
index 25abbe1e3a8ad7..6f0b64910f9b07 100644
--- a/clang/test/Driver/arm-cortex-cpus-1.c
+++ b/clang/test/Driver/arm-cortex-cpus-1.c
@@ -153,23 +153,23 @@
 // RUN: %clang -target armv8r-linux-gnueabi -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8R %s
 // RUN: %clang -target arm -march=armv8r -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8R %s
 // RUN: %clang -target arm -march=armv8-r -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8R %s
-// CHECK-V8R: "-cc1"{{.*}} "-triple" "armv8r-{{.*}} "-target-cpu" "cortex-r52"
+// CHECK-V8R: "-cc1"{{.*}} "-triple" "armv8r-{{.*}} "-target-cpu" "generic"
 
 // RUN: %clang -target armv8r-linux-gnueabi -mbig-endian -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8R-BIG %s
 // RUN: %clang -target arm -march=armv8r -mbig-endian -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8R-BIG %s
 // RUN: %clang -target arm -march=armv8-r -mbig-endian -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8R-BIG %s
-// CHECK-V8R-BIG: "-cc1"{{.*}} "-triple" "armebv8r-{{.*}} "-target-cpu" 
"cortex-r52"
+// CHECK-V8R-BIG: "-cc1"{{.*}} "-triple" "armebv8r-{{.*}} "-target-cpu" 
"generic"
 
 // RUN: %clang -target armv8r-linux-gnueabi -mthumb -### -c %s 2>&1 | \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB %s
 // RUN: %clang -target arm -march=armv8r -mthumb -### -c %s 2>&1 | \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB %s
-// CHECK-V8R-THUMB: "-cc1"{{.*}} "-triple" "thumbv8r-{{.*}} "-target-cpu" 
"cortex-r52"
+// CHECK-V8R-THUMB: "-cc1"{{.*}} "-triple" "thumbv8r-{{.*}} "-target-cpu" 
"generic"
 // RUN: %clang -target armv8r-linux-gnueabi -mthumb -mbig-endian -### -c %s 
2>&1 | \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB-BIG %s
 // RUN: %clang -target arm -march=armv8r -mthumb -mbig-endian -### -c %s 2>&1 
| \
 // RUN: FileCheck -check-prefix=CHECK-V8R-THUMB-BIG %s
-// CHECK-V8R-THUMB-BIG: "-cc1"{{.*}} "-triple" "thumbebv8r-{{.*}} 
"-target-cpu" "cortex-r52"
+// CHECK-V8R-THUMB-BIG: "-cc1"{{.*}} "-triple" "thumbebv8r-{{.*}} 
"-target-cpu" "generic"
 
 // RUN: %clang -mcpu=generic -target armv8 -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-V8A-GENERIC %s
 // RUN: %clang -mcpu=generic -target arm -march=armv8 -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-V8A-GENERIC %s
diff --git a/clang/test/Driver/arm-features.c b/clang/test/Driver/arm-features.c
index e043244f18a61f..eb424f5f61116b 100644
--- a/clang/test/Driver/arm-features.c
+++ b/clang/test/Driver/arm-features.c
@@ -74,7 +74,7 @@
 // Check +crypto for M and R profiles:
 //
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-r+crypto   -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-CRYPTO-R %s
-// CHECK-CRYPTO-R: "-cc1"{{.*}} "-target-cpu" "cortex-r52"{{.*}} 
"-target-feature" "+sha2" "-target-feature" "+aes"
+// CHECK-CRYPTO-R: "-cc1"{{.*}} "-target-cpu" "generic"{{.*}} 
"-target-feature" "+sha2" "-target-feature" "+aes"
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-m.base+crypto -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO5 %s
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-m.main+crypto -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO5 %s
 // RUN: %clang -target arm-arm-none-eabi -mcpu=cortex-m23+crypto -### -c %s 
2>

[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Updated to fix the conflict with the ARM.td refactor. Ready for review.

https://github.com/llvm/llvm-project/pull/88287
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

chrisnc wrote:

@davemgreen which change? Specifying `-mcpu=cortex-r52` will behave the same 
way as before. The original manual for the R52 provided for a no-neon sp-only 
variant, and they exist in the wild, and this lets "architecture-generic" 
builds automatically support both.

One example where this comes up is in the Rust project, which recently gained 
armv8r support, but due to the over-spec'ing of the base armv8r in LLVM, it 
requires `-feature` additions in the default target feature list to build the 
`core` crate in a way that will support lesser r52's by default. Then, when 
users specify cortex-r52 as their target cpu, they are still left with the 
`-feature` additions overriding what the r52 should enable by default. 
https://github.com/rust-lang/rust/pull/123159 This change will allow the 
feature flags and target CPUs to interact in a more predictable way as compared 
to other Cortex-R and -M CPUs.

https://github.com/llvm/llvm-project/pull/88287
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[clang] [clang] Define ATOMIC_FLAG_INIT correctly for C++. (PR #97534)

[Chris Copeland via cfe-commits]

chrisnc wrote:

ping

https://github.com/llvm/llvm-project/pull/97534
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[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/91870

>From 947526935e78dfcb40ffde6aeb273c6120884339 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sat, 11 May 2024 00:15:50 -0700
Subject: [PATCH 1/2] [clang][ARM] Fix warning for using VFP from interrupts.

This warning has three issues:
 - The interrupt attribute causes the function to return using an exception
   return instruction. This warning allows calls from one function with
   the interrupt attribute to another, and the diagnostic text suggests
   that not having the attribute on the callee is a problem. Actually
   making such a call will lead to a double exception return, which is
   unpredictable according to the ARM architecture manual section
   B9.1.1, "Restrictions on exception return instructions". Even on
   machines where an exception return from user/system mode is
   tolerated, if the callee's interrupt type is anything other than a
   supervisor call or secure monitor call, it will also return to a
   different address than a normal function would. For example,
   returning from an "IRQ" handler will return to lr - 4, which will
   generally result in calling the same function again.
 - The interrupt attribute currently does not cause caller-saved VFP
   registers to be saved and restored if they are used, so putting
   __attribute__((interrupt)) on a called function doesn't prevent it
   from clobbering VFP state.
 - It is part of the -Wextra diagnostic group and can't be individually
   disabled when using -Wextra, which also means the diagnostic text of
   this specific warning appears in the documentation of -Wextra.

This change addresses all three issues by instead generating a warning
for any interrupt handler where the vfp feature is enabled. The warning is
also given its own diagnostic group.

Closes #34876.
---
 clang/docs/ReleaseNotes.rst   | 10 +
 .../clang/Basic/DiagnosticSemaKinds.td|  7 +--
 clang/lib/Sema/SemaARM.cpp|  5 +++
 clang/lib/Sema/SemaExpr.cpp   | 14 +-
 clang/test/Sema/arm-interrupt-attr.c  | 45 +++
 5 files changed, 26 insertions(+), 55 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index e086b4fa43743..c7fed20e2bd9a 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -442,6 +442,9 @@ New Compiler Flags
 - ``-Wc++2c-compat`` group was added to help migrating existing codebases
   to upcoming C++26.
 
+- For the ARM target, added ``-Warm-interrupt-vfp-clobber`` that will emit a
+  diagnostic when an interrupt handler is declared and VFP is enabled.
+
 Deprecated Compiler Flags
 -
 
@@ -484,6 +487,13 @@ Modified Compiler Flags
   now include dianostics about C++26 features that are not present in older
   versions.
 
+- Removed the "arm interrupt calling convention" warning that was included in
+  ``-Wextra`` without its own flag. This warning suggested adding
+  ``__attribute__((interrupt))`` to functions that are called from interrupt
+  handlers to prevent clobbering VFP registers. Following this suggestion leads
+  to unpredictable behavior by causing multiple exception returns from one
+  exception. Fixes #GH34876.
+
 Removed Compiler Flags
 -
 
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 1aba8bc24ba2f..a29287153a604 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -336,9 +336,10 @@ def warn_anyx86_excessive_regsave : Warning<
   " with attribute 'no_caller_saved_registers'"
   " or be compiled with '-mgeneral-regs-only'">,
   InGroup>;
-def warn_arm_interrupt_calling_convention : Warning<
-   "call to function without interrupt attribute could clobber interruptee's 
VFP registers">,
-   InGroup;
+def warn_arm_interrupt_vfp_clobber : Warning<
+  "interrupt service routine with vfp enabled may clobber the "
+  "interruptee's vfp state">,
+  InGroup>;
 def warn_interrupt_attribute_invalid : Warning<
"%select{MIPS|MSP430|RISC-V}0 'interrupt' attribute only applies to "
"functions that have %select{no parameters|a 'void' return type}1">,
diff --git a/clang/lib/Sema/SemaARM.cpp b/clang/lib/Sema/SemaARM.cpp
index 370db341e997e..d4668fbdcd2a8 100644
--- a/clang/lib/Sema/SemaARM.cpp
+++ b/clang/lib/Sema/SemaARM.cpp
@@ -1329,6 +1329,11 @@ void SemaARM::handleInterruptAttr(Decl *D, const 
ParsedAttr &AL) {
 return;
   }
 
+  const TargetInfo &TI = getASTContext().getTargetInfo();
+  if (TI.hasFeature("vfp")) {
+Diag(D->getLocation(), diag::warn_arm_interrupt_vfp_clobber);
+  }
+
   D->addAttr(::new (getASTContext())
  ARMInterruptAttr(getASTContext(), AL, Kind));
 }
diff --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp
index 852344d895ffd..be579be7bf331 100644
--- a/clang/lib/Sema/Sem

[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Fixed another release notes conflict.

Ping @DavidSpickett @ostannard @jthackray.

https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

@@ -1329,6 +1329,11 @@ void SemaARM::handleInterruptAttr(Decl *D, const 
ParsedAttr &AL) {
 return;
   }
 
+  const TargetInfo &TI = getASTContext().getTargetInfo();
+  if (TI.hasFeature("vfp")) {
+Diag(D->getLocation(), diag::warn_arm_interrupt_vfp_clobber);
+  }

chrisnc wrote:

Huh, I guess the rule has exceptions so the clang-format checker doesn't flag 
it? Will fix.

https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Thanks!

https://github.com/llvm/llvm-project/pull/91870
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Friendly bump. :) @ostannard @davemgreen 

https://github.com/llvm/llvm-project/pull/88287
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Understood. FWIW, `arm-none-eabi-gcc` does not enable any FPU features by 
default with `-march=armv8-r` (and will error out if you combine that with 
`-mfloat-abi=hard`), which is what the first pass of this PR went for, but I 
think where we landed is a decent middle ground.

https://github.com/llvm/llvm-project/pull/88287
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

chrisnc wrote:

@smithp35 thanks! Yes, I iterated on the specific direction here after the 
feedback about not changing the behavior of `-mcpu=cortex-r52`, but the first 
comment in the thread reflects the initial state, so I'll change that. I 
believe the cortex-r82 is AArch64-only, and so is not relevant here except 
w.r.t. consistency. I'm not familiar with how default CPUs are set in AArch64, 
but experimentally, `--target=aarch64-none-elf -march=armv8-r` does not 
generate the same code on a simple example as using `--target=aarch64-none-elf 
-march=cortex-r82` currently, so it does not appear to be a default there, 
either. Other than that, I confirm that what you've written is in line with 
what this change is doing.

https://github.com/llvm/llvm-project/pull/88287
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc edited 
https://github.com/llvm/llvm-project/pull/88287
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[clang] [llvm] [ARM] Armv8-R does not require fp64 or neon. (PR #88287)

[Chris Copeland via cfe-commits]

chrisnc wrote:

If there's no other feedback, could someone hit the merge button for me?

https://github.com/llvm/llvm-project/pull/88287
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[clang] [ARM][clang] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc created 
https://github.com/llvm/llvm-project/pull/91870

This warning has two issues:
 - The interrupt attribute doesn't only change how volatile registers
   are treated; it also causes the function to return using an exception
   return instruction. This warning allows calls from one function with
   the interrupt attribute to another, and the diagnostic text suggests
   that not having the attribute on the callee is the problem. Actually
   making such a call will lead to a double exception return, which is
   unpredictable according to the ARM architecture manual section
   B9.1.1, "Restrictions on exception return instructions". Even on
   machines where an exception return from user/system mode is
   tolerated, if the callee's interrupt type is anything other than a
   supervisor call or secure monitor call, it will also return to a
   different address than a normal function would. For example,
   returning from an "IRQ" handler will return to lr - 4, which will
   generally result in calling the same function again.
 - It is part of the -Wextra diagnostic group and can't be individually
   disabled when using -Wextra, which also means the diagnostic text of
   this specific warning appears in the documentation of -Wextra.

This change addresses both issues. Rather than check that the callee has
the interrupt attribute, check that it uses the soft-float feature,
which will prevent use of VFP state. The warning is also given its own
diagnostic group.


>From 62052b274264c1c69be4bb1579a8627b63eaa380 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sat, 11 May 2024 00:15:50 -0700
Subject: [PATCH] [ARM][clang] Fix warning for VFP function calls from
 interrupts.

This warning has two issues:
 - The interrupt attribute doesn't only change how volatile registers
   are treated; it also causes the function to return using an exception
   return instruction. This warning allows calls from one function with
   the interrupt attribute to another, and the diagnostic text suggests
   that not having the attribute on the callee is the problem. Actually
   making such a call will lead to a double exception return, which is
   unpredictable according to the ARM architecture manual section
   B9.1.1, "Restrictions on exception return instructions". Even on
   machines where an exception return from user/system mode is
   tolerated, if the callee's interrupt type is anything other than a
   supervisor call or secure monitor call, it will also return to a
   different address than a normal function would. For example,
   returning from an "IRQ" handler will return to lr - 4, which will
   generally result in calling the same function again.
 - It is part of the -Wextra diagnostic group and can't be individually
   disabled when using -Wextra, which also means the diagnostic text of
   this specific warning appears in the documentation of -Wextra.

This change addresses both issues. Rather than check that the callee has
the interrupt attribute, check that it uses the soft-float feature,
which will prevent use of VFP state. The warning is also given its own
diagnostic group.
---
 clang/docs/ReleaseNotes.rst   | 11 +++
 clang/include/clang/Basic/Attr.td |  7 +++
 .../clang/Basic/DiagnosticSemaKinds.td|  7 ---
 clang/lib/Sema/SemaExpr.cpp   | 19 ++-
 clang/test/Sema/arm-interrupt-attr.c  |  6 +++---
 5 files changed, 35 insertions(+), 15 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 7c5dcc59c7016..3f9f81bc2bfac 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -352,6 +352,10 @@ Modified Compiler Flags
   evaluating to ``true`` and an empty body such as ``while(1);``)
   are considered infinite, even when the ``-ffinite-loop`` flag is set.
 
+- Removed "arm interrupt calling convention" warning that was included in
+  ``-Wextra`` but did not have its own flag. Added
+  ``-Warm-interrupt-vfp-clobber`` that enables the modified warning.
+
 Removed Compiler Flags
 -
 
@@ -484,6 +488,13 @@ Improvements to Clang's diagnostics
}
  };
 
+- On ARM, Clang no longer suggests adding ``__attribute__((interrupt))`` to 
normal
+  functions that are called from interrupt handlers to prevent clobbering VFP
+  registers as part of ``-Wextra``. Following this suggestion leads to
+  unpredictable behavior. Instead, ``-Warm-interrupt-vfp-clobber`` can now be
+  used to detect calling functions that don't have VFP disabled with
+  ``__attribute((target("soft-float")))`` from an interrupt handler.
+
 Improvements to Clang's time-trace
 --
 
diff --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index 52552ba488560..04e3b8f949992 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3090,6 +3090,13 @@ def Target : Inhe

[clang] [ARM][clang] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Here is an example of the existing warning in action. 
https://godbolt.org/z/9e84EfeYP
It warns for calling a normal function, but the same function with an interrupt 
attribute does not warn. The `subs pc, lr, 4` in `bar_irq` goes back to `bl 
bar_irq`, creating an infinite loop, where the second `subs pc, lr, 4` from 
`bar_irq` is also unpredictable, because the processor mode will most likely be 
system/user.

https://github.com/llvm/llvm-project/pull/91870
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[clang] [ARM][clang] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/91870

>From ef08eb6e2526c5d4f97dbcc42715ae5daf74de3d Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sat, 11 May 2024 00:15:50 -0700
Subject: [PATCH] [ARM][clang] Fix warning for VFP function calls from
 interrupts.

This warning has two issues:
 - The interrupt attribute doesn't only change how volatile registers
   are treated; it also causes the function to return using an exception
   return instruction. This warning allows calls from one function with
   the interrupt attribute to another, and the diagnostic text suggests
   that not having the attribute on the callee is the problem. Actually
   making such a call will lead to a double exception return, which is
   unpredictable according to the ARM architecture manual section
   B9.1.1, "Restrictions on exception return instructions". Even on
   machines where an exception return from user/system mode is
   tolerated, if the callee's interrupt type is anything other than a
   supervisor call or secure monitor call, it will also return to a
   different address than a normal function would. For example,
   returning from an "IRQ" handler will return to lr - 4, which will
   generally result in calling the same function again.
 - It is part of the -Wextra diagnostic group and can't be individually
   disabled when using -Wextra, which also means the diagnostic text of
   this specific warning appears in the documentation of -Wextra.

This change addresses both issues. Rather than check that the callee has
the interrupt attribute, check that it uses the soft-float feature,
which will prevent use of VFP state. The warning is also given its own
diagnostic group.
---
 clang/docs/ReleaseNotes.rst   | 11 +++
 clang/include/clang/Basic/Attr.td |  7 +++
 .../clang/Basic/DiagnosticSemaKinds.td|  7 ---
 clang/lib/Sema/SemaExpr.cpp   | 19 ++-
 clang/test/Sema/arm-interrupt-attr.c  |  6 +++---
 5 files changed, 35 insertions(+), 15 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 7c5dcc59c7016..ebf26c3ab4deb 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -352,6 +352,10 @@ Modified Compiler Flags
   evaluating to ``true`` and an empty body such as ``while(1);``)
   are considered infinite, even when the ``-ffinite-loop`` flag is set.
 
+- Removed "arm interrupt calling convention" warning that was included in
+  ``-Wextra`` but did not have its own flag. Added
+  ``-Warm-interrupt-vfp-clobber`` that enables the modified warning.
+
 Removed Compiler Flags
 -
 
@@ -484,6 +488,13 @@ Improvements to Clang's diagnostics
}
  };
 
+- On ARM, Clang no longer suggests adding ``__attribute__((interrupt))`` to 
normal
+  functions that are called from interrupt handlers to prevent clobbering VFP
+  registers as part of ``-Wextra``. Following this suggestion leads to
+  unpredictable behavior. Instead, ``-Warm-interrupt-vfp-clobber`` can now be
+  used to detect calling functions that don't have VFP disabled with
+  ``__attribute__((target("soft-float")))`` from an interrupt handler.
+
 Improvements to Clang's time-trace
 --
 
diff --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index 52552ba488560..04e3b8f949992 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3090,6 +3090,13 @@ def Target : InheritableAttr {
   }
 }
 
+bool hasFeature(StringRef Feature) const {
+  StringRef Features = getFeaturesStr();
+  SmallVector AttrFeatures;
+  Features.split(AttrFeatures, ",");
+  return Features.contains(Feature);
+}
+
 bool isDefaultVersion() const { return getFeaturesStr() == "default"; }
   }];
 }
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index d6863f90edb6e..1c5f5ffb03dc5 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -336,9 +336,10 @@ def warn_anyx86_excessive_regsave : Warning<
   " with attribute 'no_caller_saved_registers'"
   " or be compiled with '-mgeneral-regs-only'">,
   InGroup>;
-def warn_arm_interrupt_calling_convention : Warning<
-   "call to function without interrupt attribute could clobber interruptee's 
VFP registers">,
-   InGroup;
+def warn_arm_interrupt_vfp_clobber : Warning<
+   "calling a VFP-enabled function from an interrupt could clobber the "
+   "interruptee's VFP registers">,
+   InGroup>;
 def warn_interrupt_attribute_invalid : Warning<
"%select{MIPS|MSP430|RISC-V}0 'interrupt' attribute only applies to "
"functions that have %select{no parameters|a 'void' return type}1">,
diff --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp
index c688cb21f2364..c514820bd899c 10064

[clang] [ARM][clang] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/91870

>From b72b63c51b1859e1a7e792eda20549ef93c8d6c0 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sat, 11 May 2024 00:15:50 -0700
Subject: [PATCH] [ARM][clang] Fix warning for VFP function calls from
 interrupts.

This warning has two issues:
 - The interrupt attribute doesn't only change how volatile registers
   are treated; it also causes the function to return using an exception
   return instruction. This warning allows calls from one function with
   the interrupt attribute to another, and the diagnostic text suggests
   that not having the attribute on the callee is the problem. Actually
   making such a call will lead to a double exception return, which is
   unpredictable according to the ARM architecture manual section
   B9.1.1, "Restrictions on exception return instructions". Even on
   machines where an exception return from user/system mode is
   tolerated, if the callee's interrupt type is anything other than a
   supervisor call or secure monitor call, it will also return to a
   different address than a normal function would. For example,
   returning from an "IRQ" handler will return to lr - 4, which will
   generally result in calling the same function again.
 - It is part of the -Wextra diagnostic group and can't be individually
   disabled when using -Wextra, which also means the diagnostic text of
   this specific warning appears in the documentation of -Wextra.

This change addresses both issues. Rather than check that the callee has
the interrupt attribute, check that it uses the soft-float feature,
which will prevent use of VFP state. The warning is also given its own
diagnostic group.

Closes #34876.
---
 clang/docs/ReleaseNotes.rst   | 11 +++
 clang/include/clang/Basic/Attr.td |  7 +++
 .../clang/Basic/DiagnosticSemaKinds.td|  7 ---
 clang/lib/Sema/SemaExpr.cpp   | 19 ++-
 clang/test/Sema/arm-interrupt-attr.c  |  6 +++---
 5 files changed, 35 insertions(+), 15 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 7c5dcc59c7016..ebf26c3ab4deb 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -352,6 +352,10 @@ Modified Compiler Flags
   evaluating to ``true`` and an empty body such as ``while(1);``)
   are considered infinite, even when the ``-ffinite-loop`` flag is set.
 
+- Removed "arm interrupt calling convention" warning that was included in
+  ``-Wextra`` but did not have its own flag. Added
+  ``-Warm-interrupt-vfp-clobber`` that enables the modified warning.
+
 Removed Compiler Flags
 -
 
@@ -484,6 +488,13 @@ Improvements to Clang's diagnostics
}
  };
 
+- On ARM, Clang no longer suggests adding ``__attribute__((interrupt))`` to 
normal
+  functions that are called from interrupt handlers to prevent clobbering VFP
+  registers as part of ``-Wextra``. Following this suggestion leads to
+  unpredictable behavior. Instead, ``-Warm-interrupt-vfp-clobber`` can now be
+  used to detect calling functions that don't have VFP disabled with
+  ``__attribute__((target("soft-float")))`` from an interrupt handler.
+
 Improvements to Clang's time-trace
 --
 
diff --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index 52552ba488560..04e3b8f949992 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3090,6 +3090,13 @@ def Target : InheritableAttr {
   }
 }
 
+bool hasFeature(StringRef Feature) const {
+  StringRef Features = getFeaturesStr();
+  SmallVector AttrFeatures;
+  Features.split(AttrFeatures, ",");
+  return Features.contains(Feature);
+}
+
 bool isDefaultVersion() const { return getFeaturesStr() == "default"; }
   }];
 }
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index d6863f90edb6e..1c5f5ffb03dc5 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -336,9 +336,10 @@ def warn_anyx86_excessive_regsave : Warning<
   " with attribute 'no_caller_saved_registers'"
   " or be compiled with '-mgeneral-regs-only'">,
   InGroup>;
-def warn_arm_interrupt_calling_convention : Warning<
-   "call to function without interrupt attribute could clobber interruptee's 
VFP registers">,
-   InGroup;
+def warn_arm_interrupt_vfp_clobber : Warning<
+   "calling a VFP-enabled function from an interrupt could clobber the "
+   "interruptee's VFP registers">,
+   InGroup>;
 def warn_interrupt_attribute_invalid : Warning<
"%select{MIPS|MSP430|RISC-V}0 'interrupt' attribute only applies to "
"functions that have %select{no parameters|a 'void' return type}1">,
diff --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp
index c688cb21f2364..c51

[clang] [ARM][clang] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc edited 
https://github.com/llvm/llvm-project/pull/91870
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[clang] [ARM][clang] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

I'd like to also address #47815, but I wasn't able to find the right path to 
answer "is this M-profile" from `TargetInfo`. Would appreciate any suggestions 
on that. I think it may require `dynamic_cast`-ing the `TargetInfo` to an 
`ARMTargetInfo`, and then change one of the methods in there to be public...

https://github.com/llvm/llvm-project/pull/91870
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[clang] [ARM][clang] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

ping @ostannard @smithp35 

https://github.com/llvm/llvm-project/pull/91870
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[clang] [ARM][clang] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/91870

>From b9aae83e94aab9ebed9b3dc3fe23bee4bd3c0756 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sat, 11 May 2024 00:15:50 -0700
Subject: [PATCH] [ARM][clang] Fix warning for VFP function calls from
 interrupts.

This warning has two issues:
 - The interrupt attribute doesn't only change how volatile registers
   are treated; it also causes the function to return using an exception
   return instruction. This warning allows calls from one function with
   the interrupt attribute to another, and the diagnostic text suggests
   that not having the attribute on the callee is the problem. Actually
   making such a call will lead to a double exception return, which is
   unpredictable according to the ARM architecture manual section
   B9.1.1, "Restrictions on exception return instructions". Even on
   machines where an exception return from user/system mode is
   tolerated, if the callee's interrupt type is anything other than a
   supervisor call or secure monitor call, it will also return to a
   different address than a normal function would. For example,
   returning from an "IRQ" handler will return to lr - 4, which will
   generally result in calling the same function again.
 - It is part of the -Wextra diagnostic group and can't be individually
   disabled when using -Wextra, which also means the diagnostic text of
   this specific warning appears in the documentation of -Wextra.

This change addresses both issues. Rather than check that the callee has
the interrupt attribute, check that it uses the soft-float feature,
which will prevent use of VFP state. The warning is also given its own
diagnostic group.

Closes #34876.
---
 clang/docs/ReleaseNotes.rst   | 11 +++
 clang/include/clang/Basic/Attr.td |  7 +++
 .../clang/Basic/DiagnosticSemaKinds.td|  7 ---
 clang/lib/Sema/SemaExpr.cpp   | 19 ++-
 clang/test/Sema/arm-interrupt-attr.c  | 14 +++---
 5 files changed, 39 insertions(+), 19 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 0c4a343b70009..73bf7eb8c411a 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -379,6 +379,10 @@ Modified Compiler Flags
   evaluating to ``true`` and an empty body such as ``while(1);``)
   are considered infinite, even when the ``-ffinite-loop`` flag is set.
 
+- Removed "arm interrupt calling convention" warning that was included in
+  ``-Wextra`` but did not have its own flag. Added
+  ``-Warm-interrupt-vfp-clobber`` that enables the modified warning.
+
 Removed Compiler Flags
 -
 
@@ -518,6 +522,13 @@ Improvements to Clang's diagnostics
 - Clang emits a ``-Wparentheses`` warning for expressions with consecutive 
comparisons like ``x < y < z``.
   Fixes #GH20456.
 
+- On ARM, Clang no longer suggests adding ``__attribute__((interrupt))`` to
+  normal functions that are called from interrupt handlers to prevent
+  clobbering VFP registers as part of ``-Wextra``. Following this suggestion
+  leads to unpredictable behavior. Instead, ``-Warm-interrupt-vfp-clobber`` can
+  now be used to detect calling functions that don't have VFP disabled with
+  ``__attribute__((target("soft-float")))`` from an interrupt handler.
+
 Improvements to Clang's time-trace
 --
 
diff --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index a2c8cc42195fd..d68d4a7d3c69c 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -3118,6 +3118,13 @@ def Target : InheritableAttr {
   }
 }
 
+bool hasFeature(StringRef Feature) const {
+  StringRef Features = getFeaturesStr();
+  SmallVector AttrFeatures;
+  Features.split(AttrFeatures, ",");
+  return Features.contains(Feature);
+}
+
 bool isDefaultVersion() const { return getFeaturesStr() == "default"; }
   }];
 }
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index cc402182687f3..5a3d361ffeb12 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -336,9 +336,10 @@ def warn_anyx86_excessive_regsave : Warning<
   " with attribute 'no_caller_saved_registers'"
   " or be compiled with '-mgeneral-regs-only'">,
   InGroup>;
-def warn_arm_interrupt_calling_convention : Warning<
-   "call to function without interrupt attribute could clobber interruptee's 
VFP registers">,
-   InGroup;
+def warn_arm_interrupt_vfp_clobber : Warning<
+   "calling a VFP-enabled function from an interrupt could clobber the "
+   "interruptee's VFP registers">,
+   InGroup>;
 def warn_interrupt_attribute_invalid : Warning<
"%select{MIPS|MSP430|RISC-V}0 'interrupt' attribute only applies to "
"functions that have %select{no parameters|a 'vo

[clang] [ARM][clang] Fix warning for VFP function calls from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Rebased and fixed conflict in release notes.

https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

@ahmedbougacha yes, I think it's correct that calling an 
`__attribute__((interrupt))` function is safe to do on M-profile because there 
is no difference in the return sequence; all it does is not assume that the 
stack is 8-byte aligned initially. Even then, this is only needed when not 
using the STKALIGN bit in CCR, which is on by default on most (all?) Cortex-M 
processors. This feature, along with the automatic volatile register saving, 
mean that `__attribute__((interrupt))` has almost no legitimate uses on 
M-profile.

https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/91870

>From ef65cf4803496f3c0627b488e150fd827657d63d Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sat, 11 May 2024 00:15:50 -0700
Subject: [PATCH 1/2] [clang][ARM] Fix warning for using VFP from interrupts.

This warning has three issues:
 - The interrupt attribute causes the function to return using an exception
   return instruction. This warning allows calls from one function with
   the interrupt attribute to another, and the diagnostic text suggests
   that not having the attribute on the callee is a problem. Actually
   making such a call will lead to a double exception return, which is
   unpredictable according to the ARM architecture manual section
   B9.1.1, "Restrictions on exception return instructions". Even on
   machines where an exception return from user/system mode is
   tolerated, if the callee's interrupt type is anything other than a
   supervisor call or secure monitor call, it will also return to a
   different address than a normal function would. For example,
   returning from an "IRQ" handler will return to lr - 4, which will
   generally result in calling the same function again.
 - The interrupt attribute currently does not cause caller-saved VFP
   registers to be saved and restored if they are used, so putting
   __attribute__((interrupt)) on a called function doesn't prevent it
   from clobbering VFP state.
 - It is part of the -Wextra diagnostic group and can't be individually
   disabled when using -Wextra, which also means the diagnostic text of
   this specific warning appears in the documentation of -Wextra.

This change addresses all three issues by instead generating a warning
for any interrupt handler where the vfp feature is enabled. The warning is
also given its own diagnostic group.

Closes #34876.
---
 clang/docs/ReleaseNotes.rst   | 11 +
 .../clang/Basic/DiagnosticSemaKinds.td|  7 +--
 clang/lib/Sema/SemaARM.cpp|  5 +++
 clang/lib/Sema/SemaExpr.cpp   | 14 +-
 clang/test/Sema/arm-interrupt-attr.c  | 45 +++
 5 files changed, 27 insertions(+), 55 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 9c8f8c4a4fbaf..0dfd4d92e9a2f 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -448,6 +448,11 @@ Modified Compiler Flags
   evaluating to ``true`` and an empty body such as ``while(1);``)
   are considered infinite, even when the ``-ffinite-loop`` flag is set.
 
+- Removed "arm interrupt calling convention" warning that was included in
+  ``-Wextra`` without its own flag.
+
+- Added ``-Warm-interrupt-vfp-clobber``, with its own warning group.
+
 Removed Compiler Flags
 -
 
@@ -612,6 +617,12 @@ Improvements to Clang's diagnostics
   used rather than when they are needed for constant evaluation or when code 
is generated for them.
   The check is now stricter to prevent crashes for some unsupported 
declarations (Fixes #GH95495).
 
+- For the ARM target, Clang no longer suggests adding 
``__attribute__((interrupt))`` to
+  functions that are called from interrupt handlers to prevent clobbering VFP 
registers
+  as part of ``-Wextra`` (#GH34876). Following this suggestion leads to 
unpredictable
+  behavior. Instead, a new warning, ``-Warm-interrupt-vfp-clobber`` will 
trigger for
+  interrupt handlers with VFP enabled.
+
 Improvements to Clang's time-trace
 --
 
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 25a87078a5709..bb97162e99d35 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -336,9 +336,10 @@ def warn_anyx86_excessive_regsave : Warning<
   " with attribute 'no_caller_saved_registers'"
   " or be compiled with '-mgeneral-regs-only'">,
   InGroup>;
-def warn_arm_interrupt_calling_convention : Warning<
-   "call to function without interrupt attribute could clobber interruptee's 
VFP registers">,
-   InGroup;
+def warn_arm_interrupt_vfp_clobber : Warning<
+  "interrupt service routine with vfp enabled may clobber the "
+  "interruptee's vfp state">,
+  InGroup>;
 def warn_interrupt_attribute_invalid : Warning<
"%select{MIPS|MSP430|RISC-V}0 'interrupt' attribute only applies to "
"functions that have %select{no parameters|a 'void' return type}1">,
diff --git a/clang/lib/Sema/SemaARM.cpp b/clang/lib/Sema/SemaARM.cpp
index 281d534152054..8259be77d9ee6 100644
--- a/clang/lib/Sema/SemaARM.cpp
+++ b/clang/lib/Sema/SemaARM.cpp
@@ -1326,6 +1326,11 @@ void SemaARM::handleInterruptAttr(Decl *D, const 
ParsedAttr &AL) {
 return;
   }
 
+  const TargetInfo &TI = getASTContext().getTargetInfo();
+  if (TI.hasFeature("vfp")) {
+Diag(D->getLocation(), diag::warn_arm_interrupt_vfp_clobber);
+  }
+
   D->addAttr(::new (getASTConte

[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc edited 
https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Rebased to fix release not conflict. @DavidSpickett @llvm/pr-subscribers-arm

https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/91870

>From 88654f834fcf5bccca86f08d1b107c7ec9be41b4 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sat, 11 May 2024 00:15:50 -0700
Subject: [PATCH 1/2] [clang][ARM] Fix warning for using VFP from interrupts.

This warning has three issues:
 - The interrupt attribute causes the function to return using an exception
   return instruction. This warning allows calls from one function with
   the interrupt attribute to another, and the diagnostic text suggests
   that not having the attribute on the callee is a problem. Actually
   making such a call will lead to a double exception return, which is
   unpredictable according to the ARM architecture manual section
   B9.1.1, "Restrictions on exception return instructions". Even on
   machines where an exception return from user/system mode is
   tolerated, if the callee's interrupt type is anything other than a
   supervisor call or secure monitor call, it will also return to a
   different address than a normal function would. For example,
   returning from an "IRQ" handler will return to lr - 4, which will
   generally result in calling the same function again.
 - The interrupt attribute currently does not cause caller-saved VFP
   registers to be saved and restored if they are used, so putting
   __attribute__((interrupt)) on a called function doesn't prevent it
   from clobbering VFP state.
 - It is part of the -Wextra diagnostic group and can't be individually
   disabled when using -Wextra, which also means the diagnostic text of
   this specific warning appears in the documentation of -Wextra.

This change addresses all three issues by instead generating a warning
for any interrupt handler where the vfp feature is enabled. The warning is
also given its own diagnostic group.

Closes #34876.
---
 clang/docs/ReleaseNotes.rst   |  9 
 .../clang/Basic/DiagnosticSemaKinds.td|  7 +--
 clang/lib/Sema/SemaARM.cpp|  5 +++
 clang/lib/Sema/SemaExpr.cpp   | 14 +-
 clang/test/Sema/arm-interrupt-attr.c  | 45 +++
 5 files changed, 25 insertions(+), 55 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index da967fcdda808..b1dbac241417f 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -420,6 +420,9 @@ New Compiler Flags
   Matches MSVC behaviour by defining ``__STDC__`` to ``1`` when
   MSVC compatibility mode is used. It has no effect for C++ code.
 
+- For the ARM target, added ``-Warm-interrupt-vfp-clobber`` that will emit a
+  diagnostic when an interrupt handler is declared and VFP is enabled.
+
 Deprecated Compiler Flags
 -
 
@@ -458,6 +461,12 @@ Modified Compiler Flags
   evaluating to ``true`` and an empty body such as ``while(1);``)
   are considered infinite, even when the ``-ffinite-loop`` flag is set.
 
+- Removed the "arm interrupt calling convention" warning that was included in
+  ``-Wextra`` without its own flag (#GH34876). This warning suggested adding
+  ``__attribute__((interrupt))`` to functions that are called from interrupt 
handlers
+  to prevent clobbering VFP registers. Following this suggestion leads to 
unpredictable
+  behavior by causing multiple exception returns from one exception.
+
 Removed Compiler Flags
 -
 
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 96f0c0f0205c2..ce2683eeba574 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -336,9 +336,10 @@ def warn_anyx86_excessive_regsave : Warning<
   " with attribute 'no_caller_saved_registers'"
   " or be compiled with '-mgeneral-regs-only'">,
   InGroup>;
-def warn_arm_interrupt_calling_convention : Warning<
-   "call to function without interrupt attribute could clobber interruptee's 
VFP registers">,
-   InGroup;
+def warn_arm_interrupt_vfp_clobber : Warning<
+  "interrupt service routine with vfp enabled may clobber the "
+  "interruptee's vfp state">,
+  InGroup>;
 def warn_interrupt_attribute_invalid : Warning<
"%select{MIPS|MSP430|RISC-V}0 'interrupt' attribute only applies to "
"functions that have %select{no parameters|a 'void' return type}1">,
diff --git a/clang/lib/Sema/SemaARM.cpp b/clang/lib/Sema/SemaARM.cpp
index 281d534152054..8259be77d9ee6 100644
--- a/clang/lib/Sema/SemaARM.cpp
+++ b/clang/lib/Sema/SemaARM.cpp
@@ -1326,6 +1326,11 @@ void SemaARM::handleInterruptAttr(Decl *D, const 
ParsedAttr &AL) {
 return;
   }
 
+  const TargetInfo &TI = getASTContext().getTargetInfo();
+  if (TI.hasFeature("vfp")) {
+Diag(D->getLocation(), diag::warn_arm_interrupt_vfp_clobber);
+  }
+
   D->addAttr(::new (getASTContext())
  ARMInterruptAttr(getASTContext(), AL, Kind));
 }
diff --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/S

[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

@@ -448,6 +448,11 @@ Modified Compiler Flags
   evaluating to ``true`` and an empty body such as ``while(1);``)
   are considered infinite, even when the ``-ffinite-loop`` flag is set.
 
+- Removed "arm interrupt calling convention" warning that was included in
+  ``-Wextra`` without its own flag.
+
+- Added ``-Warm-interrupt-vfp-clobber``, with its own warning group.

chrisnc wrote:

Moved these around, and split up the content that was previously in the 
`Improvements to Clang's diagnostics` section.

https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

@@ -336,9 +336,12 @@ def warn_anyx86_excessive_regsave : Warning<
   " with attribute 'no_caller_saved_registers'"
   " or be compiled with '-mgeneral-regs-only'">,
   InGroup>;
-def warn_arm_interrupt_calling_convention : Warning<
-   "call to function without interrupt attribute could clobber interruptee's 
VFP registers">,
-   InGroup;
+def warn_arm_interrupt_vfp_clobber : Warning<
+  "interrupt service routine with vfp enabled may clobber the "
+  "interruptee's vfp state">,
+  InGroup>;
+def err_arm_interrupt_called : Error<
+  "interrupt service routine cannot be called directly">;

chrisnc wrote:

Added.

https://github.com/llvm/llvm-project/pull/91870
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[clang] [clang][ARM] Fix warning for using VFP from interrupts. (PR #91870)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Clarified the release notes changes and added a test case for the new error.

https://github.com/llvm/llvm-project/pull/91870
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

chrisnc wrote:

> It looks like there is already a warning for this in clang, it only triggers 
> from -mfloat-abi=hard though: https://godbolt.org/z/dcaz8had4. Could it be 
> made to work with any hard-float env? And maybe be made an error 
> down-gradable to a warning?
> 
> Generally clang-level warnings/errors are more user friendly then the 
> llvm-level errors (but both may be useful for other frontends).

That seems like a decent improvement to the clang warning, but the backend 
behavior of still emitting the VFP ABI tag in this case seems like a bug, 
regardless of the frontend, so IMO codegen should be aborted in this situation.

https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

chrisnc wrote:

clang tests are passing now, but some llvm tests are not, e.g., invocations of 
llc in `CodeGen/ARM/arm-eabi.ll` that specify e.g., `--target=arm-none-eabihf` 
don't include enough features to actually use eabihf. Any suggestions on the 
right place to address this would be appreciated.

https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/111334

>From b73e1b342dbbfae004ad0fa62184c106ab00c12a Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sun, 6 Oct 2024 20:27:48 -0700
Subject: [PATCH] [ARM] Emit an error when the hard-float ABI is enabled but
 can't be used.

Currently, compiling for eabihf with a CPU lacking floating-point
registers will silently use the soft-float ABI instead, even though the
Arm attributes section still has Tag_ABI_VFP_args: VFP registers, which
leads to silent ABI mismatches at link time.

Fixes #110383.
---
 clang/test/Driver/arm-float-abi-lto.c| 4 ++--
 llvm/lib/Target/ARM/ARMTargetMachine.cpp | 6 +-
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/clang/test/Driver/arm-float-abi-lto.c 
b/clang/test/Driver/arm-float-abi-lto.c
index 83c2435d97a4d2..0a5a6cebf97e45 100644
--- a/clang/test/Driver/arm-float-abi-lto.c
+++ b/clang/test/Driver/arm-float-abi-lto.c
@@ -4,7 +4,7 @@
 
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s 
-flto=full -c -o %t.call_full.bc -DCALL_LIB
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s 
-flto=full -c -o %t.define_full.bc -DDEFINE_LIB
-// RUN: llvm-lto2 run -o %t.lto_full -save-temps %t.call_full.bc 
%t.define_full.bc \
+// RUN: llvm-lto2 run --mcpu=cortex-m33 --float-abi=hard -o %t.lto_full 
-save-temps %t.call_full.bc %t.define_full.bc \
 // RUN:  -r %t.call_full.bc,fn,px \
 // RUN:  -r %t.call_full.bc,fwrite,l \
 // RUN:  -r %t.call_full.bc,putchar,l \
@@ -16,7 +16,7 @@
 
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s 
-flto=thin -c -o %t.call_thin.bc -DCALL_LIB
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s 
-flto=thin -c -o %t.define_thin.bc -DDEFINE_LIB
-// RUN: llvm-lto2 run -o %t.lto_thin -save-temps %t.call_thin.bc 
%t.define_thin.bc \
+// RUN: llvm-lto2 run --mcpu=cortex-m33 --float-abi=hard -o %t.lto_thin 
-save-temps %t.call_thin.bc %t.define_thin.bc \
 // RUN:  -r %t.call_thin.bc,fn,px \
 // RUN:  -r %t.call_thin.bc,fwrite,l \
 // RUN:  -r %t.call_thin.bc,putchar,l \
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp 
b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 7553778c574033..3a6d1b9472fe17 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -309,11 +309,15 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) 
const {
 // function that reside in TargetOptions.
 resetTargetOptions(F);
 I = std::make_unique(TargetTriple, CPU, FS, *this, isLittle,
-F.hasMinSize());
+   F.hasMinSize());
 
 if (!I->isThumb() && !I->hasARMOps())
   F.getContext().emitError("Function '" + F.getName() + "' uses ARM "
   "instructions, but the target does not support ARM mode execution.");
+
+if (I->isTargetHardFloat() && !I->hasFPRegs())
+  F.getContext().emitError("The hard-float ABI is enabled, but the target "
+   "lacks floating-point registers.");
   }
 
   return I.get();

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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Among those options, my preference would be to remove the clang warning and add 
the LLVM error so that other frontends can benefit from this checking, as well 
as the LLVM tools themselves. The LLVM test failures reveal a few places where 
this issue seems to be ignored.

https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

chrisnc wrote:

I've updated this PR to remove the aforementioned `clang` warning for this 
case, and I've updated all `clang` and `llvm` tests that were implicitly using 
the soft-float ABI despite requesting hard-float. In some cases, explicitly 
testing hard-float seemed to be intended because there was a corresponding line 
for the soft-float version, so I added a feature or CPU selection that 
accomplishes this. In other cases, the hard-float-ness of the test did not seem 
relevant, so I just switched those to soft-float. I attempted to write a test 
case for the new LLVM error, but I'm struggling with having a `lit` test that 
tolerates `llc` exiting with a nonzero exit code, even if I can get the `CHECK` 
directives to match. Any pointers on this would be appreciated.

https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/111334

>From 5e916c3c4d2579318fa990eca178f4cfd4ab35b0 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sun, 6 Oct 2024 20:27:48 -0700
Subject: [PATCH] [ARM] Emit an error when the hard-float ABI is enabled but
 can't be used.

Currently, compiling for an eabihf target with a CPU lacking
floating-point registers will silently use the soft-float ABI instead,
even though the Arm attributes section still has Tag_ABI_VFP_args: VFP
registers, which leads to silent ABI mismatches at link time.

Update all ARM tests that were using an affected combination to enable
the necessary FPU features or use a soft-float ABI.

[clang] Remove the warning from clang that detected this case only if
-mfloat-abi=hard or -mhard-float were specified explicitly.

Fixes #110383.
---
 .../clang/Basic/DiagnosticDriverKinds.td  |  3 ---
 clang/lib/Driver/ToolChains/Arch/ARM.cpp  | 18 --
 clang/test/Driver/arm-float-abi-lto.c |  4 ++--
 clang/test/Driver/arm-no-float-regs.c | 22 -
 llvm/lib/Target/ARM/ARMTargetMachine.cpp  |  6 -
 .../2013-04-05-Small-ByVal-Structs-PR15293.ll |  2 +-
 .../ARM/2013-05-13-AAPCS-byval-padding.ll |  2 +-
 .../ARM/2013-05-13-AAPCS-byval-padding2.ll|  2 +-
 .../2014-02-21-byval-reg-split-alignment.ll   |  2 +-
 llvm/test/CodeGen/ARM/arm-eabi.ll | 24 +--
 llvm/test/CodeGen/ARM/block-order.mir |  4 ++--
 llvm/test/CodeGen/ARM/constantpool-promote.ll | 24 +--
 llvm/test/CodeGen/ARM/fp16-promote.ll |  7 +++---
 llvm/test/CodeGen/ARM/macho-extern-hidden.ll  |  2 +-
 llvm/test/CodeGen/ARM/memfunc.ll  |  6 ++---
 .../ARM/no-expand-memcpy-no-builtins.ll   |  2 +-
 llvm/test/CodeGen/ARM/readtp.ll   | 16 ++---
 llvm/test/CodeGen/ARM/subtarget-align.ll  |  6 ++---
 llvm/test/CodeGen/Thumb2/emit-unwinding.ll|  2 +-
 .../ARM/dbgcallsite-noreg-is-imm-check.mir|  4 ++--
 20 files changed, 59 insertions(+), 99 deletions(-)
 delete mode 100644 clang/test/Driver/arm-no-float-regs.c

diff --git a/clang/include/clang/Basic/DiagnosticDriverKinds.td 
b/clang/include/clang/Basic/DiagnosticDriverKinds.td
index cdfdaa01fb121d..e5103cb7a5bebc 100644
--- a/clang/include/clang/Basic/DiagnosticDriverKinds.td
+++ b/clang/include/clang/Basic/DiagnosticDriverKinds.td
@@ -459,9 +459,6 @@ def warn_drv_assuming_mfloat_abi_is : Warning<
 def warn_drv_unsupported_float_abi_by_lib : Warning<
   "float ABI '%0' is not supported by current library">,
   InGroup;
-def warn_drv_no_floating_point_registers: Warning<
-  "'%0': selected processor lacks floating point registers">,
-  InGroup;
 def warn_ignoring_ftabstop_value : Warning<
   "ignoring invalid -ftabstop value '%0', using default value %1">;
 def warn_drv_overriding_option : Warning<
diff --git a/clang/lib/Driver/ToolChains/Arch/ARM.cpp 
b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
index 0489911ecd9dee..f597d67eb1c89c 100644
--- a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -158,22 +158,6 @@ static void checkARMCPUName(const Driver &D, const Arg *A, 
const ArgList &Args,
 << A->getSpelling() << A->getValue();
 }
 
-// If -mfloat-abi=hard or -mhard-float are specified explicitly then check that
-// floating point registers are available on the target CPU.
-static void checkARMFloatABI(const Driver &D, const ArgList &Args,
- bool HasFPRegs) {
-  if (HasFPRegs)
-return;
-  const Arg *A =
-  Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
-  options::OPT_mfloat_abi_EQ);
-  if (A && (A->getOption().matches(options::OPT_mhard_float) ||
-(A->getOption().matches(options::OPT_mfloat_abi_EQ) &&
- A->getValue() == StringRef("hard"
-D.Diag(clang::diag::warn_drv_no_floating_point_registers)
-<< A->getAsString(Args);
-}
-
 bool arm::useAAPCSForMachO(const llvm::Triple &T) {
   // The backend is hardwired to assume AAPCS for M-class processors, ensure
   // the frontend matches that.
@@ -985,8 +969,6 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver 
&D,
   if (Args.getLastArg(options::OPT_mno_bti_at_return_twice))
 Features.push_back("+no-bti-at-return-twice");
 
-  checkARMFloatABI(D, Args, HasFPRegs);
-
   return FPUKind;
 }
 
diff --git a/clang/test/Driver/arm-float-abi-lto.c 
b/clang/test/Driver/arm-float-abi-lto.c
index 83c2435d97a4d2..0a5a6cebf97e45 100644
--- a/clang/test/Driver/arm-float-abi-lto.c
+++ b/clang/test/Driver/arm-float-abi-lto.c
@@ -4,7 +4,7 @@
 
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s 
-flto=full -c -o %t.call_full.bc -DCALL_LIB
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s 
-flto=full -c -o %t.define_full.bc -DDEFINE_LIB
-// RUN: llvm-lto2 run -o %t.lto_full -save-temps %t.ca

[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

chrisnc wrote:

Friendly bump :) @davemgreen @smithp35 

https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

chrisnc wrote:

LLVM not checking for this leads to it producing incorrect outputs given 
certain inputs and arguments when using `llc` and the like directly. Even in an 
ideal world where every frontend is target-aware and implements the rules 
itself (or delegates to LLVM to check before attempting to codegen), LLVM 
itself should still generate correct artifacts and emit an error if it's not 
possible to do so when invoked with invalid options.

https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/111334

>From 4bd5ec308b2d99c6a48457f3c9dbd96e70557e04 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sun, 6 Oct 2024 20:27:48 -0700
Subject: [PATCH] [ARM] Emit an error when the hard-float ABI is enabled but
 can't be used.

Currently, compiling for an eabihf target with a CPU lacking
floating-point registers will silently use the soft-float ABI instead,
even though the Arm attributes section still has Tag_ABI_VFP_args: VFP
registers, which leads to silent ABI mismatches at link time.

Update all ARM tests that were using an affected combination to enable
the necessary FPU features or use a soft-float ABI.

[clang] Remove the warning from clang that detected this case only if
-mfloat-abi=hard or -mhard-float were specified explicitly.

Fixes #110383.
---
 .../clang/Basic/DiagnosticDriverKinds.td  |  3 ---
 clang/lib/Driver/ToolChains/Arch/ARM.cpp  | 18 --
 clang/test/Driver/arm-float-abi-lto.c |  4 ++--
 clang/test/Driver/arm-no-float-regs.c | 22 -
 llvm/lib/Target/ARM/ARMTargetMachine.cpp  |  6 -
 .../2013-04-05-Small-ByVal-Structs-PR15293.ll |  2 +-
 .../ARM/2013-05-13-AAPCS-byval-padding.ll |  2 +-
 .../ARM/2013-05-13-AAPCS-byval-padding2.ll|  2 +-
 .../2014-02-21-byval-reg-split-alignment.ll   |  2 +-
 llvm/test/CodeGen/ARM/arm-eabi.ll | 24 +--
 llvm/test/CodeGen/ARM/block-order.mir |  4 ++--
 llvm/test/CodeGen/ARM/constantpool-promote.ll | 24 +--
 llvm/test/CodeGen/ARM/eabihf-no-float-regs.ll | 15 
 llvm/test/CodeGen/ARM/fp16-promote.ll |  7 +++---
 llvm/test/CodeGen/ARM/macho-extern-hidden.ll  |  2 +-
 llvm/test/CodeGen/ARM/memfunc.ll  |  6 ++---
 .../ARM/no-expand-memcpy-no-builtins.ll   |  2 +-
 llvm/test/CodeGen/ARM/readtp.ll   | 16 ++---
 llvm/test/CodeGen/ARM/subtarget-align.ll  |  6 ++---
 llvm/test/CodeGen/Thumb2/emit-unwinding.ll|  2 +-
 .../ARM/dbgcallsite-noreg-is-imm-check.mir|  4 ++--
 21 files changed, 74 insertions(+), 99 deletions(-)
 delete mode 100644 clang/test/Driver/arm-no-float-regs.c
 create mode 100644 llvm/test/CodeGen/ARM/eabihf-no-float-regs.ll

diff --git a/clang/include/clang/Basic/DiagnosticDriverKinds.td 
b/clang/include/clang/Basic/DiagnosticDriverKinds.td
index cdfdaa01fb121d..e5103cb7a5bebc 100644
--- a/clang/include/clang/Basic/DiagnosticDriverKinds.td
+++ b/clang/include/clang/Basic/DiagnosticDriverKinds.td
@@ -459,9 +459,6 @@ def warn_drv_assuming_mfloat_abi_is : Warning<
 def warn_drv_unsupported_float_abi_by_lib : Warning<
   "float ABI '%0' is not supported by current library">,
   InGroup;
-def warn_drv_no_floating_point_registers: Warning<
-  "'%0': selected processor lacks floating point registers">,
-  InGroup;
 def warn_ignoring_ftabstop_value : Warning<
   "ignoring invalid -ftabstop value '%0', using default value %1">;
 def warn_drv_overriding_option : Warning<
diff --git a/clang/lib/Driver/ToolChains/Arch/ARM.cpp 
b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
index 0489911ecd9dee..f597d67eb1c89c 100644
--- a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -158,22 +158,6 @@ static void checkARMCPUName(const Driver &D, const Arg *A, 
const ArgList &Args,
 << A->getSpelling() << A->getValue();
 }
 
-// If -mfloat-abi=hard or -mhard-float are specified explicitly then check that
-// floating point registers are available on the target CPU.
-static void checkARMFloatABI(const Driver &D, const ArgList &Args,
- bool HasFPRegs) {
-  if (HasFPRegs)
-return;
-  const Arg *A =
-  Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
-  options::OPT_mfloat_abi_EQ);
-  if (A && (A->getOption().matches(options::OPT_mhard_float) ||
-(A->getOption().matches(options::OPT_mfloat_abi_EQ) &&
- A->getValue() == StringRef("hard"
-D.Diag(clang::diag::warn_drv_no_floating_point_registers)
-<< A->getAsString(Args);
-}
-
 bool arm::useAAPCSForMachO(const llvm::Triple &T) {
   // The backend is hardwired to assume AAPCS for M-class processors, ensure
   // the frontend matches that.
@@ -985,8 +969,6 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver 
&D,
   if (Args.getLastArg(options::OPT_mno_bti_at_return_twice))
 Features.push_back("+no-bti-at-return-twice");
 
-  checkARMFloatABI(D, Args, HasFPRegs);
-
   return FPUKind;
 }
 
diff --git a/clang/test/Driver/arm-float-abi-lto.c 
b/clang/test/Driver/arm-float-abi-lto.c
index 83c2435d97a4d2..0a5a6cebf97e45 100644
--- a/clang/test/Driver/arm-float-abi-lto.c
+++ b/clang/test/Driver/arm-float-abi-lto.c
@@ -4,7 +4,7 @@
 
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s 
-flto=full -c -o %t.call_full.bc -DCALL_LIB
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m

[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc updated 
https://github.com/llvm/llvm-project/pull/111334

>From 990320636c8d1aadd61597ab6cfa328beae11382 Mon Sep 17 00:00:00 2001
From: Chris Copeland 
Date: Sun, 6 Oct 2024 20:27:48 -0700
Subject: [PATCH] [ARM] Emit an error when the hard-float ABI is enabled but
 can't be used.

Currently, compiling for an eabihf target with a CPU lacking
floating-point registers will silently use the soft-float ABI instead,
even though the Arm attributes section still has Tag_ABI_VFP_args: VFP
registers, which leads to silent ABI mismatches at link time.

Update all ARM tests that were using an affected combination to enable
the necessary FPU features or use a soft-float ABI.

[clang] Remove the warning from clang that detected this case only if
-mfloat-abi=hard or -mhard-float were specified explicitly.

Fixes #110383.
---
 .../clang/Basic/DiagnosticDriverKinds.td  |  3 ---
 clang/lib/Driver/ToolChains/Arch/ARM.cpp  | 18 --
 clang/test/Driver/arm-float-abi-lto.c |  4 ++--
 clang/test/Driver/arm-no-float-regs.c | 22 -
 llvm/lib/Target/ARM/ARMTargetMachine.cpp  |  6 -
 .../2013-04-05-Small-ByVal-Structs-PR15293.ll |  2 +-
 .../ARM/2013-05-13-AAPCS-byval-padding.ll |  2 +-
 .../ARM/2013-05-13-AAPCS-byval-padding2.ll|  2 +-
 .../2014-02-21-byval-reg-split-alignment.ll   |  2 +-
 llvm/test/CodeGen/ARM/arm-eabi.ll | 24 +--
 llvm/test/CodeGen/ARM/block-order.mir |  4 ++--
 llvm/test/CodeGen/ARM/constantpool-promote.ll | 24 +--
 llvm/test/CodeGen/ARM/eabihf-no-float-regs.ll | 15 
 llvm/test/CodeGen/ARM/fp16-promote.ll |  7 +++---
 llvm/test/CodeGen/ARM/macho-extern-hidden.ll  |  2 +-
 llvm/test/CodeGen/ARM/memfunc.ll  |  6 ++---
 .../ARM/no-expand-memcpy-no-builtins.ll   |  2 +-
 llvm/test/CodeGen/ARM/readtp.ll   | 16 ++---
 llvm/test/CodeGen/ARM/subtarget-align.ll  |  6 ++---
 llvm/test/CodeGen/Thumb2/emit-unwinding.ll|  2 +-
 llvm/test/DebugInfo/COFF/jump-table.ll|  2 +-
 .../ARM/dbgcallsite-noreg-is-imm-check.mir|  4 ++--
 22 files changed, 75 insertions(+), 100 deletions(-)
 delete mode 100644 clang/test/Driver/arm-no-float-regs.c
 create mode 100644 llvm/test/CodeGen/ARM/eabihf-no-float-regs.ll

diff --git a/clang/include/clang/Basic/DiagnosticDriverKinds.td 
b/clang/include/clang/Basic/DiagnosticDriverKinds.td
index cdfdaa01fb121d..e5103cb7a5bebc 100644
--- a/clang/include/clang/Basic/DiagnosticDriverKinds.td
+++ b/clang/include/clang/Basic/DiagnosticDriverKinds.td
@@ -459,9 +459,6 @@ def warn_drv_assuming_mfloat_abi_is : Warning<
 def warn_drv_unsupported_float_abi_by_lib : Warning<
   "float ABI '%0' is not supported by current library">,
   InGroup;
-def warn_drv_no_floating_point_registers: Warning<
-  "'%0': selected processor lacks floating point registers">,
-  InGroup;
 def warn_ignoring_ftabstop_value : Warning<
   "ignoring invalid -ftabstop value '%0', using default value %1">;
 def warn_drv_overriding_option : Warning<
diff --git a/clang/lib/Driver/ToolChains/Arch/ARM.cpp 
b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
index 0489911ecd9dee..f597d67eb1c89c 100644
--- a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -158,22 +158,6 @@ static void checkARMCPUName(const Driver &D, const Arg *A, 
const ArgList &Args,
 << A->getSpelling() << A->getValue();
 }
 
-// If -mfloat-abi=hard or -mhard-float are specified explicitly then check that
-// floating point registers are available on the target CPU.
-static void checkARMFloatABI(const Driver &D, const ArgList &Args,
- bool HasFPRegs) {
-  if (HasFPRegs)
-return;
-  const Arg *A =
-  Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
-  options::OPT_mfloat_abi_EQ);
-  if (A && (A->getOption().matches(options::OPT_mhard_float) ||
-(A->getOption().matches(options::OPT_mfloat_abi_EQ) &&
- A->getValue() == StringRef("hard"
-D.Diag(clang::diag::warn_drv_no_floating_point_registers)
-<< A->getAsString(Args);
-}
-
 bool arm::useAAPCSForMachO(const llvm::Triple &T) {
   // The backend is hardwired to assume AAPCS for M-class processors, ensure
   // the frontend matches that.
@@ -985,8 +969,6 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver 
&D,
   if (Args.getLastArg(options::OPT_mno_bti_at_return_twice))
 Features.push_back("+no-bti-at-return-twice");
 
-  checkARMFloatABI(D, Args, HasFPRegs);
-
   return FPUKind;
 }
 
diff --git a/clang/test/Driver/arm-float-abi-lto.c 
b/clang/test/Driver/arm-float-abi-lto.c
index 83c2435d97a4d2..0a5a6cebf97e45 100644
--- a/clang/test/Driver/arm-float-abi-lto.c
+++ b/clang/test/Driver/arm-float-abi-lto.c
@@ -4,7 +4,7 @@
 
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s 
-flto=full -c -o %t.call_full.bc -DCALL_L

[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

chrisnc wrote:

All unit tests are now updated and passing and this change is ready for review. 
Thanks!

https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

@@ -16,7 +16,7 @@
 
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s 
-flto=thin -c -o %t.call_thin.bc -DCALL_LIB
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s 
-flto=thin -c -o %t.define_thin.bc -DDEFINE_LIB
-// RUN: llvm-lto2 run -o %t.lto_thin -save-temps %t.call_thin.bc 
%t.define_thin.bc \
+// RUN: llvm-lto2 run --mcpu=cortex-m33 --float-abi=hard -o %t.lto_thin 
-save-temps %t.call_thin.bc %t.define_thin.bc \

chrisnc wrote:

I dug into this further as promised, and the error goes away for this test if 
you just remove the call to `printf` from the test, which the test expects to 
replace with a call to putchar. This means that the `llvm-lto2` invocation is 
eventually creating a new subtarget in which the target features and ABI are 
not inherited from the settings of either input file, and because the ones it 
lands on are incompatible, an error is raised. Pre-existing functions that were 
generated with a specific ABI and features are preserved as you would expect.

https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc edited 
https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc edited 
https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc edited 
https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

https://github.com/chrisnc edited 
https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

chrisnc wrote:

> One use case I'd want to keep working is where we have two functions in the 
> same object that are hardfp with hardware registers, and soft (with or 
> without hardware registers). Something like:
> 
> ```
> __attribute__((target("arch=cortex-m33"))) __attribute__((pcs("aapcs-vfp"))) 
> float f1(float a, float b) {
>   return a + b;
> }
> 
> __attribute__((target("arch=cortex-m0"))) __attribute__((pcs("aapcs"))) float 
> f2(float a, float b) {
>   return a + b;
> }
> ```
> 
> There are some source files that do run-time selection based on hardware 
> detection.

I can confirm that this does not emit an error.
The way this change is implemented, each function will be checked for 
consistency of ABI + features, and both of these are fine, so there's no issue.

https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

chrisnc wrote:

@ostannard or @davemgreen any other feedback on this change?

https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

chrisnc wrote:

> There's quite a lot of test changes that I presume needed to make

FWIW, virtually all of the test changes were due to cases where LLVM would 
silently use soft-float despite the hard-float ABI being explicitly requested, 
which is exactly the incorrect behavior that this PR is meant to fix. The total 
number of affected test cases is fairly small.

> and at least the LTO use case looks like we don't want to require extra 
> information.

The direct invocation of llvm-lto case without target information is one I will 
look into, however, this change was made again because llvm was generating code 
in a manner where the hard-float ABI was requested but couldn't be fulfilled. 
Anywhere that might be happening can lead to unsound ABI-mixing. To me the 
question is whether the equivalent of that command is invoked internally 
without the correct target information in typical usage of LTO driven by 
clang/lld. I'm inclined to say no, based on there being zero other test 
failures related to this change, but I will do some digging to understand the 
situation.

https://github.com/llvm/llvm-project/pull/111334
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[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via cfe-commits]

@@ -311,11 +311,15 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) 
const {
 // function that reside in TargetOptions.
 resetTargetOptions(F);
 I = std::make_unique(TargetTriple, CPU, FS, *this, isLittle,
-F.hasMinSize());
+   F.hasMinSize());
 
 if (!I->isThumb() && !I->hasARMOps())
   F.getContext().emitError("Function '" + F.getName() + "' uses ARM "
   "instructions, but the target does not support ARM mode execution.");
+

chrisnc wrote:

`getSubtargetImpl` takes a `const Function &` as a parameter, and looks at that 
function's attributes, and can give per-function diagnostics for the thumb 
check, so I believe it is not the "global" subtarget.

https://github.com/llvm/llvm-project/pull/111334
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