chrisnc wrote: > One use case I'd want to keep working is where we have two functions in the > same object that are hardfp with hardware registers, and soft (with or > without hardware registers). Something like: > > ``` > __attribute__((target("arch=cortex-m33"))) __attribute__((pcs("aapcs-vfp"))) > float f1(float a, float b) { > return a + b; > } > > __attribute__((target("arch=cortex-m0"))) __attribute__((pcs("aapcs"))) float > f2(float a, float b) { > return a + b; > } > ``` > > There are some source files that do run-time selection based on hardware > detection.
I can confirm that this does not emit an error. The way this change is implemented, each function will be checked for consistency of ABI + features, and both of these are fine, so there's no issue. https://github.com/llvm/llvm-project/pull/111334 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits