https://github.com/chrisnc updated
https://github.com/llvm/llvm-project/pull/111334
>From 5e916c3c4d2579318fa990eca178f4cfd4ab35b0 Mon Sep 17 00:00:00 2001
From: Chris Copeland <ch...@chrisnc.net>
Date: Sun, 6 Oct 2024 20:27:48 -0700
Subject: [PATCH] [ARM] Emit an error when the hard-float ABI is enabled but
can't be used.
Currently, compiling for an eabihf target with a CPU lacking
floating-point registers will silently use the soft-float ABI instead,
even though the Arm attributes section still has Tag_ABI_VFP_args: VFP
registers, which leads to silent ABI mismatches at link time.
Update all ARM tests that were using an affected combination to enable
the necessary FPU features or use a soft-float ABI.
[clang] Remove the warning from clang that detected this case only if
-mfloat-abi=hard or -mhard-float were specified explicitly.
Fixes #110383.
---
.../clang/Basic/DiagnosticDriverKinds.td | 3 ---
clang/lib/Driver/ToolChains/Arch/ARM.cpp | 18 --------------
clang/test/Driver/arm-float-abi-lto.c | 4 ++--
clang/test/Driver/arm-no-float-regs.c | 22 -----------------
llvm/lib/Target/ARM/ARMTargetMachine.cpp | 6 ++++-
.../2013-04-05-Small-ByVal-Structs-PR15293.ll | 2 +-
.../ARM/2013-05-13-AAPCS-byval-padding.ll | 2 +-
.../ARM/2013-05-13-AAPCS-byval-padding2.ll | 2 +-
.../2014-02-21-byval-reg-split-alignment.ll | 2 +-
llvm/test/CodeGen/ARM/arm-eabi.ll | 24 +++++++++----------
llvm/test/CodeGen/ARM/block-order.mir | 4 ++--
llvm/test/CodeGen/ARM/constantpool-promote.ll | 24 +++++++++----------
llvm/test/CodeGen/ARM/fp16-promote.ll | 7 +++---
llvm/test/CodeGen/ARM/macho-extern-hidden.ll | 2 +-
llvm/test/CodeGen/ARM/memfunc.ll | 6 ++---
.../ARM/no-expand-memcpy-no-builtins.ll | 2 +-
llvm/test/CodeGen/ARM/readtp.ll | 16 ++++++-------
llvm/test/CodeGen/ARM/subtarget-align.ll | 6 ++---
llvm/test/CodeGen/Thumb2/emit-unwinding.ll | 2 +-
.../ARM/dbgcallsite-noreg-is-imm-check.mir | 4 ++--
20 files changed, 59 insertions(+), 99 deletions(-)
delete mode 100644 clang/test/Driver/arm-no-float-regs.c
diff --git a/clang/include/clang/Basic/DiagnosticDriverKinds.td
b/clang/include/clang/Basic/DiagnosticDriverKinds.td
index cdfdaa01fb121d..e5103cb7a5bebc 100644
--- a/clang/include/clang/Basic/DiagnosticDriverKinds.td
+++ b/clang/include/clang/Basic/DiagnosticDriverKinds.td
@@ -459,9 +459,6 @@ def warn_drv_assuming_mfloat_abi_is : Warning<
def warn_drv_unsupported_float_abi_by_lib : Warning<
"float ABI '%0' is not supported by current library">,
InGroup<UnsupportedABI>;
-def warn_drv_no_floating_point_registers: Warning<
- "'%0': selected processor lacks floating point registers">,
- InGroup<UnsupportedABI>;
def warn_ignoring_ftabstop_value : Warning<
"ignoring invalid -ftabstop value '%0', using default value %1">;
def warn_drv_overriding_option : Warning<
diff --git a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
index 0489911ecd9dee..f597d67eb1c89c 100644
--- a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -158,22 +158,6 @@ static void checkARMCPUName(const Driver &D, const Arg *A,
const ArgList &Args,
<< A->getSpelling() << A->getValue();
}
-// If -mfloat-abi=hard or -mhard-float are specified explicitly then check that
-// floating point registers are available on the target CPU.
-static void checkARMFloatABI(const Driver &D, const ArgList &Args,
- bool HasFPRegs) {
- if (HasFPRegs)
- return;
- const Arg *A =
- Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
- options::OPT_mfloat_abi_EQ);
- if (A && (A->getOption().matches(options::OPT_mhard_float) ||
- (A->getOption().matches(options::OPT_mfloat_abi_EQ) &&
- A->getValue() == StringRef("hard"))))
- D.Diag(clang::diag::warn_drv_no_floating_point_registers)
- << A->getAsString(Args);
-}
-
bool arm::useAAPCSForMachO(const llvm::Triple &T) {
// The backend is hardwired to assume AAPCS for M-class processors, ensure
// the frontend matches that.
@@ -985,8 +969,6 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
if (Args.getLastArg(options::OPT_mno_bti_at_return_twice))
Features.push_back("+no-bti-at-return-twice");
- checkARMFloatABI(D, Args, HasFPRegs);
-
return FPUKind;
}
diff --git a/clang/test/Driver/arm-float-abi-lto.c
b/clang/test/Driver/arm-float-abi-lto.c
index 83c2435d97a4d2..0a5a6cebf97e45 100644
--- a/clang/test/Driver/arm-float-abi-lto.c
+++ b/clang/test/Driver/arm-float-abi-lto.c
@@ -4,7 +4,7 @@
// RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s
-flto=full -c -o %t.call_full.bc -DCALL_LIB
// RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s
-flto=full -c -o %t.define_full.bc -DDEFINE_LIB
-// RUN: llvm-lto2 run -o %t.lto_full -save-temps %t.call_full.bc
%t.define_full.bc \
+// RUN: llvm-lto2 run --mcpu=cortex-m33 --float-abi=hard -o %t.lto_full
-save-temps %t.call_full.bc %t.define_full.bc \
// RUN: -r %t.call_full.bc,fn,px \
// RUN: -r %t.call_full.bc,fwrite,l \
// RUN: -r %t.call_full.bc,putchar,l \
@@ -16,7 +16,7 @@
// RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s
-flto=thin -c -o %t.call_thin.bc -DCALL_LIB
// RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s
-flto=thin -c -o %t.define_thin.bc -DDEFINE_LIB
-// RUN: llvm-lto2 run -o %t.lto_thin -save-temps %t.call_thin.bc
%t.define_thin.bc \
+// RUN: llvm-lto2 run --mcpu=cortex-m33 --float-abi=hard -o %t.lto_thin
-save-temps %t.call_thin.bc %t.define_thin.bc \
// RUN: -r %t.call_thin.bc,fn,px \
// RUN: -r %t.call_thin.bc,fwrite,l \
// RUN: -r %t.call_thin.bc,putchar,l \
diff --git a/clang/test/Driver/arm-no-float-regs.c
b/clang/test/Driver/arm-no-float-regs.c
deleted file mode 100644
index 175636c220f2a5..00000000000000
--- a/clang/test/Driver/arm-no-float-regs.c
+++ /dev/null
@@ -1,22 +0,0 @@
-// Check that -mfloat-abi=hard gives a warning if FP registers aren't
available.
-// RUN: %clang --target=arm-none-eabi -mcpu=cortex-m0 -mfloat-abi=hard -### -c
%s 2>&1 \
-// RUN: | FileCheck %s
-
-// RUN: %clang --target=arm-none-eabi -mcpu=cortex-m0 -mhard-float -### -c %s
2>&1 \
-// RUN: | FileCheck -check-prefix=HARDFLOAT %s
-
-// -mfloat-abi=hard and -march=...+nofp are incompatible in this instance:
-// RUN: %clang --target=arm-none-eabi -march=armv8.1-m.main+nofp
-mfloat-abi=hard -### -c %s 2>&1
-// -mfloat-abi=hard and -march=...+nofp are compatible in this instance:
-// RUN: %clang --target=arm-none-eabi -march=armv8.1-m.main+mve+nofp
-mfloat-abi=hard -### -c %s 2>&1 \
-// RUN: | FileCheck -check-prefix=NOWARN %s
-
-// Here the float ABI is calculated as "hard" and FP registers are
-// calculated to not be available. Since the float ABI wasn't specified
-// explicitly, the warning should not be emitted.
-// RUN: not %clang --target=thumbv5-windows -mcpu=arm10tdmi -### -c %s -o
/dev/null 2>&1 \
-// RUN: | FileCheck -check-prefix=NOWARN %s
-
-// CHECK: warning: '-mfloat-abi=hard': selected processor lacks floating point
registers
-// HARDFLOAT: warning: '-mhard-float': selected processor lacks floating point
registers
-// NOWARN-NOT: selected processor lacks floating point registers
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index a58c63dcf762d1..07a798a525ac38 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -311,11 +311,15 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F)
const {
// function that reside in TargetOptions.
resetTargetOptions(F);
I = std::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle,
- F.hasMinSize());
+ F.hasMinSize());
if (!I->isThumb() && !I->hasARMOps())
F.getContext().emitError("Function '" + F.getName() + "' uses ARM "
"instructions, but the target does not support ARM mode execution.");
+
+ if (I->isTargetHardFloat() && !I->hasFPRegs())
+ F.getContext().emitError("The hard-float ABI is enabled, but the target "
+ "lacks floating-point registers.");
}
return I.get();
diff --git a/llvm/test/CodeGen/ARM/2013-04-05-Small-ByVal-Structs-PR15293.ll
b/llvm/test/CodeGen/ARM/2013-04-05-Small-ByVal-Structs-PR15293.ll
index 8669935bd95dbb..d1c4159b69dd1a 100644
--- a/llvm/test/CodeGen/ARM/2013-04-05-Small-ByVal-Structs-PR15293.ll
+++ b/llvm/test/CodeGen/ARM/2013-04-05-Small-ByVal-Structs-PR15293.ll
@@ -1,5 +1,5 @@
;PR15293: ARM codegen ice - expected larger existing stack allocation
-;RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
+;RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s
;CHECK-LABEL: foo:
;CHECK: sub sp, sp, #16
diff --git a/llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding.ll
b/llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding.ll
index e186ae3a961502..56454bb1de5255 100644
--- a/llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding.ll
+++ b/llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding.ll
@@ -1,5 +1,5 @@
;PR15293: ARM codegen ice - expected larger existing stack allocation
-;RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
+;RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s
%struct.S227 = type { [49 x i32], i32 }
diff --git a/llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding2.ll
b/llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding2.ll
index efdecce9ae723a..1a24ccb98541ea 100644
--- a/llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding2.ll
+++ b/llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding2.ll
@@ -1,5 +1,5 @@
;PR15293: ARM codegen ice - expected larger existing stack allocation
-;RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
+;RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s
%struct4bytes = type { i32 }
%struct20bytes = type { i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/ARM/2014-02-21-byval-reg-split-alignment.ll
b/llvm/test/CodeGen/ARM/2014-02-21-byval-reg-split-alignment.ll
index 4242343ae67bf2..ff616c22463eb3 100644
--- a/llvm/test/CodeGen/ARM/2014-02-21-byval-reg-split-alignment.ll
+++ b/llvm/test/CodeGen/ARM/2014-02-21-byval-reg-split-alignment.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
+; RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s
%struct4bytes = type { i32 }
%struct8bytes8align = type { i64 }
diff --git a/llvm/test/CodeGen/ARM/arm-eabi.ll
b/llvm/test/CodeGen/ARM/arm-eabi.ll
index 9abdb81805bda5..7fa77acf103766 100644
--- a/llvm/test/CodeGen/ARM/arm-eabi.ll
+++ b/llvm/test/CodeGen/ARM/arm-eabi.ll
@@ -1,31 +1,31 @@
; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s
--check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s
--check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fpregs -disable-post-ra -o -
| FileCheck %s --check-prefix=CHECK-EABI
; RUN: llc < %s -mtriple=arm-none-androideabi -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
; RUN: llc < %s -mtriple=arm-none-gnueabi -disable-post-ra -o - | FileCheck %s
--check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -disable-post-ra -o - | FileCheck
%s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+fpregs -disable-post-ra -o
- | FileCheck %s --check-prefix=CHECK-GNUEABI
; RUN: llc < %s -mtriple=arm-none-musleabi -disable-post-ra -o - | FileCheck
%s --check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-musleabihf -disable-post-ra -o - | FileCheck
%s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+fpregs -disable-post-ra
-o - | FileCheck %s --check-prefix=CHECK-GNUEABI
; RUN: llc < %s -mtriple=arm-none-eabi -meabi=gnu -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=gnu -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fpregs -meabi=gnu
-disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=gnu -disable-post-ra -o -
| FileCheck %s --check-prefix=CHECK-GNUEABI
; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=gnu -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=gnu -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+fpregs -meabi=gnu
-disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
; RUN: llc < %s -mtriple=arm-none-musleabi -meabi=gnu -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-musleabihf -meabi=gnu -disable-post-ra -o -
| FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+fpregs -meabi=gnu
-disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
; RUN: llc < %s -mtriple=arm-none-eabi -meabi=4 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=4 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fpregs -meabi=4
-disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=4 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=4 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=4 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+fpregs -meabi=4
-disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
; RUN: llc < %s -mtriple=arm-none-musleabi -meabi=4 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-musleabihf -meabi=4 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+fpregs -meabi=4
-disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
; RUN: llc < %s -mtriple=arm-none-eabi -meabi=5 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=5 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fpregs -meabi=5
-disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=5 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=5 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=5 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+fpregs -meabi=5
-disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
; RUN: llc < %s -mtriple=arm-none-musleabi -meabi=5 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-musleabihf -meabi=5 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+fpregs -meabi=5
-disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
%struct.my_s = type { [18 x i32] }
diff --git a/llvm/test/CodeGen/ARM/block-order.mir
b/llvm/test/CodeGen/ARM/block-order.mir
index ecc749382f1f76..e3ca95cba244ca 100644
--- a/llvm/test/CodeGen/ARM/block-order.mir
+++ b/llvm/test/CodeGen/ARM/block-order.mir
@@ -1,6 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
UTC_ARGS: --version 5
-# RUN: llc -o - %s -mtriple=thumbv7em-arm-none-eabihf
-run-pass=block-placement -verify-machineinstrs | FileCheck %s
-# RUN: llc -o - %s -mtriple=thumbv7em-arm-none-eabihf
-run-pass=block-placement -force-loop-cold-block -verify-machineinstrs |
FileCheck %s
+# RUN: llc -o - %s -mtriple=thumbv7em-arm-none-eabi -run-pass=block-placement
-verify-machineinstrs | FileCheck %s
+# RUN: llc -o - %s -mtriple=thumbv7em-arm-none-eabi -run-pass=block-placement
-force-loop-cold-block -verify-machineinstrs | FileCheck %s
---
name: fn
tracksRegLiveness: true
diff --git a/llvm/test/CodeGen/ARM/constantpool-promote.ll
b/llvm/test/CodeGen/ARM/constantpool-promote.ll
index c383b391db8332..5fcd2bc15aa753 100644
--- a/llvm/test/CodeGen/ARM/constantpool-promote.ll
+++ b/llvm/test/CodeGen/ARM/constantpool-promote.ll
@@ -1,15 +1,15 @@
-; RUN: llc -mtriple armv7--linux-gnueabihf -relocation-model=static
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM,CHECK-STATIC
-; RUN: llc -mtriple armv7--linux-gnueabihf -relocation-model=pic
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM,CHECK-PIC
-; RUN: llc -mtriple armv7--linux-gnueabihf -relocation-model=ropi
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM
-; RUN: llc -mtriple armv7--linux-gnueabihf -relocation-model=rwpi
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM
-; RUN: llc -mtriple thumbv7--linux-gnueabihf -relocation-model=static
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
-; RUN: llc -mtriple thumbv7--linux-gnueabihf -relocation-model=pic
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
-; RUN: llc -mtriple thumbv7--linux-gnueabihf -relocation-model=ropi
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
-; RUN: llc -mtriple thumbv7--linux-gnueabihf -relocation-model=rwpi
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
-; RUN: llc -mtriple thumbv6m--linux-gnueabihf -relocation-model=static
-arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
-; RUN: llc -mtriple thumbv6m--linux-gnueabihf -relocation-model=pic
-arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
-; RUN: llc -mtriple thumbv6m--linux-gnueabihf -relocation-model=ropi
-arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
-; RUN: llc -mtriple thumbv6m--linux-gnueabihf -relocation-model=rwpi
-arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
+; RUN: llc -mtriple armv7-linux-gnueabi -relocation-model=static
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM,CHECK-STATIC
+; RUN: llc -mtriple armv7-linux-gnueabi -relocation-model=pic
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM,CHECK-PIC
+; RUN: llc -mtriple armv7-linux-gnueabi -relocation-model=ropi
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM
+; RUN: llc -mtriple armv7-linux-gnueabi -relocation-model=rwpi
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM
+; RUN: llc -mtriple thumbv7-linux-gnueabi -relocation-model=static
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
+; RUN: llc -mtriple thumbv7-linux-gnueabi -relocation-model=pic
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
+; RUN: llc -mtriple thumbv7-linux-gnueabi -relocation-model=ropi
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
+; RUN: llc -mtriple thumbv7-linux-gnueabi -relocation-model=rwpi
-arm-promote-constant < %s | FileCheck %s
--check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
+; RUN: llc -mtriple thumbv6m-none-eabi -relocation-model=static
-arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
+; RUN: llc -mtriple thumbv6m-none-eabi -relocation-model=pic
-arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
+; RUN: llc -mtriple thumbv6m-none-eabi -relocation-model=ropi
-arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
+; RUN: llc -mtriple thumbv6m-none-eabi -relocation-model=rwpi
-arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
@.str = private unnamed_addr constant [2 x i8] c"s\00", align 1
@.str1 = private unnamed_addr constant [69 x i8] c"this string is far too long
to fit in a literal pool by far and away\00", align 1
diff --git a/llvm/test/CodeGen/ARM/fp16-promote.ll
b/llvm/test/CodeGen/ARM/fp16-promote.ll
index ae3b8f9920e3b9..f74d1d8a970d00 100644
--- a/llvm/test/CodeGen/ARM/fp16-promote.ll
+++ b/llvm/test/CodeGen/ARM/fp16-promote.ll
@@ -1,9 +1,8 @@
-; RUN: llc -asm-verbose=false < %s -mattr=+vfp3,+fp16 | FileCheck
-allow-deprecated-dag-overlap %s -check-prefix=CHECK-FP16
--check-prefix=CHECK-VFP -check-prefix=CHECK-ALL
-; RUN: llc -asm-verbose=false < %s | FileCheck -allow-deprecated-dag-overlap
%s -check-prefix=CHECK-LIBCALL --check-prefix=CHECK-VFP -check-prefix=CHECK-ALL
--check-prefix=CHECK-LIBCALL-VFP
-; RUN: llc -asm-verbose=false < %s -mattr=-fpregs | FileCheck
-allow-deprecated-dag-overlap %s --check-prefix=CHECK-LIBCALL
-check-prefix=CHECK-NOVFP -check-prefix=CHECK-ALL
+; RUN: llc -asm-verbose=false < %s --mtriple=armv7-none-eabihf
--mattr=+vfp3,+fp16 | FileCheck -allow-deprecated-dag-overlap %s
-check-prefix=CHECK-FP16 --check-prefix=CHECK-VFP -check-prefix=CHECK-ALL
+; RUN: llc -asm-verbose=false < %s --mtriple=armv7-none-eabihf | FileCheck
-allow-deprecated-dag-overlap %s -check-prefix=CHECK-LIBCALL
--check-prefix=CHECK-VFP -check-prefix=CHECK-ALL
--check-prefix=CHECK-LIBCALL-VFP
+; RUN: llc -asm-verbose=false < %s --mtriple=armv7-none-eabi --mattr=-fpregs |
FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK-LIBCALL
-check-prefix=CHECK-NOVFP -check-prefix=CHECK-ALL
target datalayout =
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
-target triple = "armv7---eabihf"
; CHECK-ALL-LABEL: test_fadd:
; CHECK-FP16: vcvtb.f32.f16
diff --git a/llvm/test/CodeGen/ARM/macho-extern-hidden.ll
b/llvm/test/CodeGen/ARM/macho-extern-hidden.ll
index f0369e70fd183b..b0156bf98d8ad6 100644
--- a/llvm/test/CodeGen/ARM/macho-extern-hidden.ll
+++ b/llvm/test/CodeGen/ARM/macho-extern-hidden.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=thumbv7em-apple-unknown-macho | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv7-apple-unknown-macho | FileCheck %s
; CHECK: movw r0, :lower16:(L_bar$non_lazy_ptr-(LPC0_0+4))
; CHECK: movt r0, :upper16:(L_bar$non_lazy_ptr-(LPC0_0+4))
diff --git a/llvm/test/CodeGen/ARM/memfunc.ll b/llvm/test/CodeGen/ARM/memfunc.ll
index dfd86a2691cd56..2d1c9cfbb5c022 100644
--- a/llvm/test/CodeGen/ARM/memfunc.ll
+++ b/llvm/test/CodeGen/ARM/memfunc.ll
@@ -1,12 +1,12 @@
; RUN: llc < %s -mtriple=armv7-apple-ios -disable-post-ra -o - | FileCheck %s
--check-prefix=CHECK-IOS --check-prefix=CHECK
; RUN: llc < %s -mtriple=thumbv7m-none-macho -disable-post-ra -o - | FileCheck
%s --check-prefix=CHECK-DARWIN --check-prefix=CHECK
; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s
--check-prefix=CHECK-EABI --check-prefix=CHECK
-; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s
--check-prefix=CHECK-EABI --check-prefix=CHECK
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+vfp3 -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
; RUN: llc < %s -mtriple=arm-none-androideabi -disable-post-ra -o - |
FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
; RUN: llc < %s -mtriple=arm-none-gnueabi -disable-post-ra -o - | FileCheck %s
--check-prefix=CHECK-GNUEABI --check-prefix=CHECK
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -disable-post-ra -o - | FileCheck
%s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+vfp3 -disable-post-ra -o -
| FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
; RUN: llc < %s -mtriple=arm-none-musleabi -disable-post-ra -o - | FileCheck
%s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
-; RUN: llc < %s -mtriple=arm-none-musleabihf -disable-post-ra -o - | FileCheck
%s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+vfp3 -disable-post-ra -o
- | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
define void @f1(ptr %dest, ptr %src) "frame-pointer"="all" {
entry:
diff --git a/llvm/test/CodeGen/ARM/no-expand-memcpy-no-builtins.ll
b/llvm/test/CodeGen/ARM/no-expand-memcpy-no-builtins.ll
index 0b2c96d93ba430..0b758dee60c6d0 100644
--- a/llvm/test/CodeGen/ARM/no-expand-memcpy-no-builtins.ll
+++ b/llvm/test/CodeGen/ARM/no-expand-memcpy-no-builtins.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 2
-; RUN: llc -mtriple=thumbv7em-apple-unknown-macho < %s | FileCheck %s
+; RUN: llc -mtriple=thumbv7em-apple-unknown-macho -mattr=+vfp3 < %s |
FileCheck %s
target datalayout = "e-m:o-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
diff --git a/llvm/test/CodeGen/ARM/readtp.ll b/llvm/test/CodeGen/ARM/readtp.ll
index dedd16cc49bf8a..8ba7ae740faf47 100644
--- a/llvm/test/CodeGen/ARM/readtp.ll
+++ b/llvm/test/CodeGen/ARM/readtp.ll
@@ -1,11 +1,11 @@
-; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 -mattr=+read-tp-tpidrurw %s -o -
| FileCheck %s -check-prefix=CHECK-TPIDRURW
-; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 -mattr=+read-tp-tpidruro %s -o -
| FileCheck %s -check-prefix=CHECK-TPIDRURO
-; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 -mattr=+read-tp-tpidrprw %s -o -
| FileCheck %s -check-prefix=CHECK-TPIDRPRW
-; RUN: llc -mtriple=armeb-linux-gnueabihf -O2 %s -o - | FileCheck %s
-check-prefix=CHECK-SOFT
-; RUN: llc -mtriple=thumbv7-linux-gnueabihf -O2 -mattr=+read-tp-tpidrurw %s -o
- | FileCheck %s -check-prefix=CHECK-TPIDRURW
-; RUN: llc -mtriple=thumbv7-linux-gnueabihf -O2 -mattr=+read-tp-tpidruro %s -o
- | FileCheck %s -check-prefix=CHECK-TPIDRURO
-; RUN: llc -mtriple=thumbv7-linux-gnueabihf -O2 -mattr=+read-tp-tpidrprw %s -o
- | FileCheck %s -check-prefix=CHECK-TPIDRPRW
-; RUN: llc -mtriple=thumbv7-linux-gnueabihf -O2 %s -o - | FileCheck %s
-check-prefix=CHECK-SOFT
+; RUN: llc -mtriple=armeb-linux-gnueabi -O2 -mattr=+read-tp-tpidrurw %s -o - |
FileCheck %s -check-prefix=CHECK-TPIDRURW
+; RUN: llc -mtriple=armeb-linux-gnueabi -O2 -mattr=+read-tp-tpidruro %s -o - |
FileCheck %s -check-prefix=CHECK-TPIDRURO
+; RUN: llc -mtriple=armeb-linux-gnueabi -O2 -mattr=+read-tp-tpidrprw %s -o - |
FileCheck %s -check-prefix=CHECK-TPIDRPRW
+; RUN: llc -mtriple=armeb-linux-gnueabi -O2 %s -o - | FileCheck %s
-check-prefix=CHECK-SOFT
+; RUN: llc -mtriple=thumbv7-linux-gnueabi -O2 -mattr=+read-tp-tpidrurw %s -o -
| FileCheck %s -check-prefix=CHECK-TPIDRURW
+; RUN: llc -mtriple=thumbv7-linux-gnueabi -O2 -mattr=+read-tp-tpidruro %s -o -
| FileCheck %s -check-prefix=CHECK-TPIDRURO
+; RUN: llc -mtriple=thumbv7-linux-gnueabi -O2 -mattr=+read-tp-tpidrprw %s -o -
| FileCheck %s -check-prefix=CHECK-TPIDRPRW
+; RUN: llc -mtriple=thumbv7-linux-gnueabi -O2 %s -o - | FileCheck %s
-check-prefix=CHECK-SOFT
; __thread int counter;
diff --git a/llvm/test/CodeGen/ARM/subtarget-align.ll
b/llvm/test/CodeGen/ARM/subtarget-align.ll
index a24b4870d928d3..12369fe869a859 100644
--- a/llvm/test/CodeGen/ARM/subtarget-align.ll
+++ b/llvm/test/CodeGen/ARM/subtarget-align.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=arm-linux-gnueabihf -filetype=obj <%s | llvm-objdump
--triple=armv7 --no-show-raw-insn -d - | FileCheck %s
+; RUN: llc -mtriple=arm-linux-gnueabi -filetype=obj <%s | llvm-objdump
--triple=armv7 --no-show-raw-insn -d - | FileCheck %s
;; Expect architectural nop to be used between func2 and func3 but not func1
;; and func2 due to lack of subtarget support in func2.
@@ -18,8 +18,8 @@ entry:
ret i32 0
}
-attributes #0 = { "target-cpu"="generic"
"target-features"="+armv7-a,+dsp,+neon,+vfp3,-thumb-mode"
"unsafe-fp-math"="false" "use-soft-float"="false" }
-attributes #1 = { "target-cpu"="arm7tdmi" "target-features"="+armv4t"
"use-soft-float"="true" }
+attributes #0 = { "target-cpu"="generic"
"target-features"="+armv7-a,+dsp,+neon,+vfp3" }
+attributes #1 = { "target-cpu"="arm7tdmi" "target-features"="+armv4t" }
; CHECK: 00000000 <func1>:
diff --git a/llvm/test/CodeGen/Thumb2/emit-unwinding.ll
b/llvm/test/CodeGen/Thumb2/emit-unwinding.ll
index 1931343de2457f..37fdd931739404 100644
--- a/llvm/test/CodeGen/Thumb2/emit-unwinding.ll
+++ b/llvm/test/CodeGen/Thumb2/emit-unwinding.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple thumbv7em-apple-unknown-eabi-macho %s -o - -O0 | FileCheck
%s
+; RUN: llc -mtriple thumbv7-apple-unknown-eabi-macho %s -o - -O0 | FileCheck %s
; CHECK: add r7, sp, #{{[1-9]+}}
diff --git a/llvm/test/DebugInfo/MIR/ARM/dbgcallsite-noreg-is-imm-check.mir
b/llvm/test/DebugInfo/MIR/ARM/dbgcallsite-noreg-is-imm-check.mir
index 87cf333807e960..1c631465a24827 100644
--- a/llvm/test/DebugInfo/MIR/ARM/dbgcallsite-noreg-is-imm-check.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/dbgcallsite-noreg-is-imm-check.mir
@@ -1,4 +1,4 @@
-# RUN: llc -emit-call-site-info -debug-entry-values
-mtriple=armebv6k-unknown-linux-gnueabihf -filetype=obj
-start-after=machineverifier %s -o -| llvm-dwarfdump - | FileCheck %s
--implicit-check-not=DW_TAG_GNU_call_site_parameter
+# RUN: llc -emit-call-site-info -debug-entry-values
-mtriple=armebv6k-unknown-linux-gnueabi -filetype=obj
-start-after=machineverifier %s -o -| llvm-dwarfdump - | FileCheck %s
--implicit-check-not=DW_TAG_GNU_call_site_parameter
## The test was handmade.
@@ -6,7 +6,7 @@
; ModuleID = 'test.c'
source_filename = "test.c"
target datalayout = "E-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
- target triple = "armebv6k-unknown-linux-gnueabihf"
+ target triple = "armebv6k-unknown-linux-gnueabi"
; Function Attrs: nounwind
define dso_local arm_aapcscc i32 @func1(i32 %arg1) local_unnamed_addr !dbg
!14 {
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