aprantl added inline comments.
================
Comment at: packages/Python/lldbsuite/test/macosx/debug_map/Makefile:30
+main.o: main.c
+ $(CC) -c -g $(CFLAGS) $(CFLAGS_MAIN) -o main.o $(SRCDIR)/main.c
+
----------------
sgraenitz wrote:
> aprantl wrote:
> > ` $(CC) -c $(CFLAGS) $(CFLAGS_MAIN) -o $@ $^`
> >
> > -g should already be part of CFLAGS, no?
> > -g should already be part of CFLAGS, no?
> Yes, right.
>
> > ` $(CC) -c $(CFLAGS) $(CFLAGS_MAIN) -o $@ $^`
> Actually, I'd prefer my version with `-o main.o $(SRCDIR)/main.c`. It's more
> verbose, but clearly states what happens here. `$@ $^` is hard-to-read
> Makefile magic (to me).
One benefit of $^ over spelling the filename out is that it automatically works
with the VPATH environment those Makefiles are run in by dotest:
```
main.o: main.c
$(CC) -c main.c -o main.o # doesn't work, you need to say $(SRCDIR)/main.c
```
SRCDIR is a Makefile.rules implementation detail that you need to know about to
make sense of the rule, whereas $^ is a automatic variable
(https://www.gnu.org/software/make/manual/html_node/Automatic-Variables.html)
whose meaning is understandable to everyone familiar with `make`.
I understand that it looks more cryptic at first, but it keeps the rules
shorter and less error-prone in the environment the Makefile is being evaluated
in.
https://reviews.llvm.org/D52375
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