[Bug target/115795] RISC-V: vsetvl step causes wrong codegen after fusing info

[jordi.sala at semidynamics dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115795

--- Comment #6 from Jordi Sala <jordi.sala at semidynamics dot com> ---
Perfect, that's what I was looking for. I'm thinking of adding a way to tell
GCC to minimize, maximize or preserve SEW on vsetvl expand. Like
-mrvv-vsetvl-sew={maximize,minimize,preserve}