[Bug target/115795] RISC-V: vsetvl step causes wrong codegen after fusing info

[jordi.sala at semidynamics dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115795

--- Comment #2 from Jordi Sala <jordi.sala at semidynamics dot com> ---
Thanks, is it possible to force a bigger LMUL currently? It's mainly for
performance reasons.