https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115795
--- Comment #5 from JuzheZhong <juzhe.zhong at rivai dot ai> --- (In reply to Jordi Sala from comment #4) > problem is this is not related to the vectorizer as far as I'm aware, so > setting -mrvv-max-lmul=m8 does not change the fact that vsetvl pass is going > to change the loads and stores from m8 to m2 Ok. I see. I think you can modify the default SEW as the largest SEW of the RATIO for vsetvli intrinsic, then you can get what you want. For example, when ratio = 4, the largest sew = 32 wheras the largest sew = 64 shen ratio = 64. The codes is: https://github.com/gcc-mirror/gcc/blob/master/gcc/config/riscv/riscv-vector-builtins-bases.cc Basically, you should adjust this following piece of code to get what you want: else { /* Normalize same RATO (SEW/LMUL) into same vsetvl instruction. - e8,mf8/e16,mf4/e32,mf2/e64,m1 --> e8mf8 - e8,mf4/e16,mf2/e32,m1/e64,m2 --> e8mf4 - e8,mf2/e16,m1/e32,m2/e64,m4 --> e8mf2 - e8,m1/e16,m2/e32,m4/e64,m8 --> e8m1 - e8,m2/e16,m4/e32,m8 --> e8m2 - e8,m4/e16,m8 --> e8m4 - e8,m8 --> e8m8 */ /* SEW. */ e.add_input_operand (Pmode, gen_int_mode (8, Pmode)); /* LMUL. */ machine_mode e8_mode = get_vector_mode (QImode, GET_MODE_NUNITS (mode)).require (); e.add_input_operand (Pmode, gen_int_mode (get_vlmul (e8_mode), Pmode)); }
