------- Comment #2 from jakub at gcc dot gnu dot org 2005-12-06 14:48 -------
Yeah, making separate
(define_insn "*<shift>di3_and_31"
[(set (match_operand:DI 0 "register_operand" "=d")
(SHIFT:DI (match_operand:DI 1 "register_operand" "0")
(and:SI (match_operand:SI 2 "shift_count_operand" "Y")
(const_int 63)))]
"!TARGET_64BIT"
"s<lr>dl\t%0,%Y2"
[(set_attr "op_type" "RS")
(set_attr "atype" "reg")])
and 'Y'/shift_count_operand reject AND sounds best to me. You don't need to
duplicate define_expand's I guess, just let combiner combine it.
It is not very nice to duplicate 14 patterns, on the other side lying to
reload that shift count is an address constraint when it is not is worse.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=25268
