dyninst-api
Thread
Date
Earlier messages
Later messages
Messages by Date
2025/02/03
[DynInst_API:] [dyninst/dyninst] 116d98: Add ROSE register tests for aarch64 (#1890)
Tim Haines
2025/02/03
[DynInst_API:] [dyninst/dyninst] 060ce8: Add ROSE register tests for aarch64
Tim Haines
2025/02/03
[DynInst_API:] [dyninst/dyninst] a10a2d: Fix rose register conversion for x86/x86_64 (#1853)
Tim Haines
2025/02/03
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/02/03
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/02/03
[DynInst_API:] [dyninst/dyninst] a47a22: Move .github/README.md into .github/workflows/READ...
Tim Haines
2025/02/03
[DynInst_API:] [dyninst/dyninst] cfbbc7: Correctly handle IP/PC for x86_64
Tim Haines
2025/02/02
[DynInst_API:] [dyninst/dyninst] 121e8a: Add test skeleton
Tim Haines
2025/02/02
[DynInst_API:] [dyninst/dyninst] 49ca93: Rewrite load and store using I-Type and S-Type gen...
wxrdnx
2025/02/02
[DynInst_API:] [dyninst/dyninst] 1cbe90: Fix wrong indexing order in INSN_SET
wxrdnx
2025/02/02
[DynInst_API:] [dyninst/dyninst] 661884: Rewrite shifts and constants in RISC-V codegen
wxrdnx
2025/02/02
[DynInst_API:] [dyninst/dyninst] 945f3c: Update flag and segment registers
Tim Haines
2025/02/02
[DynInst_API:] [dyninst/dyninst] cad1af: gfx908
Tim Haines
2025/02/01
[DynInst_API:] [dyninst/dyninst] 0714a3: Add ROSE register tests for aarch64
Tim Haines
2025/02/01
[DynInst_API:] [dyninst/dyninst] a5f377: cmake formatting
Tim Haines
2025/02/01
[DynInst_API:] [dyninst/dyninst] d67c49: Treat ppc64 vector registers as FPRs for ROSE
Tim Haines
2025/02/01
[DynInst_API:] [dyninst/dyninst] 37911b: Treat ppc64 vector registers as FPRs for ROSE
Tim Haines
2025/02/01
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/02/01
[DynInst_API:] [dyninst/dyninst] 2c14be: Separate usage of aarch64 pstate and nzcv flag reg...
Tim Haines
2025/02/01
[DynInst_API:] [dyninst/dyninst] 608e91: Correctly handle IP/PC for x86_64
Tim Haines
2025/02/01
[DynInst_API:] [dyninst/dyninst] 5db1d0: Add RISC-V Long Branch
wxrdnx
2025/02/01
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/02/01
[DynInst_API:] [dyninst/dyninst] 7471be: Add type queries to MachRegister (#1855)
Tim Haines
2025/02/01
[DynInst_API:] [dyninst/dyninst] 32cb06: isGeneralPurpose - add stub
Tim Haines
2025/01/31
[DynInst_API:] [dyninst/dyninst] bccfa6: Move .github/README.md into .github/workflows/READ...
Tim Haines
2025/01/31
[DynInst_API:] [dyninst/dyninst] f4ae48: Change gregs to __gregs
wxrdnx
2025/01/31
[DynInst_API:] [dyninst/dyninst] 88fc76: Update unit tests
Tim Haines
2025/01/31
[DynInst_API:] [dyninst/dyninst] 37683a: Run cmake-format
bbiiggppiigg
2025/01/31
[DynInst_API:] [dyninst/dyninst] 998af9: Separate usage of aarch64 pstate and nzcv flag reg...
Tim Haines
2025/01/31
[DynInst_API:] [dyninst/dyninst] 5ee27b: Separate usage of aarch64 pstate and nzcv flag reg...
Tim Haines
2025/01/31
[DynInst_API:] [dyninst/dyninst]
bbiiggppiigg
2025/01/31
[DynInst_API:] [dyninst/dyninst] 6d2f7c: Disable simplifyStack for AMDGPU (#1886)
bbiiggppiigg
2025/01/31
[DynInst_API:] [dyninst/dyninst] fe164f: Add include guard on top of ppc64_linux
bbiiggppiigg
2025/01/31
[DynInst_API:] [dyninst/dyninst] 077ac0: Fix x86 includes and compile warnings for zeroah
bbiiggppiigg
2025/01/30
[DynInst_API:] [dyninst/dyninst] e3c098: Disable simplifyStack for AMDGPU
bbiiggppiigg
2025/01/30
[DynInst_API:] [dyninst/dyninst] e82d22: refactor amdgpu register handling (#1884)
bbiiggppiigg
2025/01/29
[DynInst_API:] [dyninst/dyninst] 4183b7: Cmake formatting
Tim Haines
2025/01/29
[DynInst_API:] [dyninst/dyninst] d7a9ac: isGeneralPurpose - add stub
Tim Haines
2025/01/29
[DynInst_API:] [dyninst/dyninst] bd8f54: Fix the register definition of src_scc
bbiiggppiigg
2025/01/28
[DynInst_API:] [dyninst/dyninst] d429c6: Add RISC-V instruction mnemonics and registers
wxrdnx
2025/01/28
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/27
[DynInst_API:] [dyninst/dyninst] 7aeac0: Add RISC-V jump instruction generation
wxrdnx
2025/01/27
[DynInst_API:] [dyninst/dyninst] 5b26ca: Rebase and fix code generation
wxrdnx
2025/01/27
[DynInst_API:] [dyninst/dyninst] 1af4ed: Fix Register handling for AMDGPU
bbiiggppiigg
2025/01/27
[DynInst_API:] [dyninst/dyninst] b6c063: Fix flag check in register converter
Tim Haines
2025/01/26
[DynInst_API:] [dyninst/dyninst] f55eb3: Temporary fix for handling VCC in Rose Conversion
bbiiggppiigg
2025/01/26
[DynInst_API:] [dyninst/dyninst] 3742fe: Add RISC-V initialize64
wxrdnx
2025/01/26
[DynInst_API:] [dyninst/dyninst] cfe169: Rebase and fix code generation
wxrdnx
2025/01/26
[DynInst_API:] [dyninst/dyninst] b86a0d: Fix DYNINST_ARCH_riscv64
wxrdnx
2025/01/26
[DynInst_API:] [dyninst/dyninst] 545a2a: Fix misspelling of DYNINST_ARCH_riscv64
wxrdnx
2025/01/26
[DynInst_API:] [dyninst/dyninst] 358744: Fix misspelling of DYNINST_ARCH_riscv64
wxrdnx
2025/01/26
[DynInst_API:] [dyninst/dyninst] 150e50: Fix DYNINST_ARCH_riscv64
wxrdnx
2025/01/23
[DynInst_API:] [dyninst/dyninst] 0ee285: Fix PowerPC flag checks in parse_func::calcUsedReg...
Tim Haines
2025/01/23
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/23
[DynInst_API:] [dyninst/dyninst] ac803d: Import unit tests (#1872)
Tim Haines
2025/01/23
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/23
[DynInst_API:] [dyninst/dyninst] 6a0257: Update sha1.C: #include <cstdint> (#1880)
Frank Ch. Eigler
2025/01/22
[DynInst_API:] [dyninst/dyninst] 6b6fd3: Fix PowerPC flag checks in parse_func::calcUsedRegs
Tim Haines
2025/01/22
[DynInst_API:] [dyninst/dyninst] 3dfaff: Separate usage of aarch64 pstate and nzcv flag reg...
Tim Haines
2025/01/21
[DynInst_API:] [dyninst/dyninst] 9f2618: Add RISC-V instruction mnemonics and registers
wxrdnx
2025/01/21
[DynInst_API:] [dyninst/dyninst] 80e1ad: Add AMDGPU GFX941 and GFX942 as GFX940 arch (#1876)
kupsch
2025/01/21
[DynInst_API:] [dyninst/dyninst] efe016: Fix MachRegister conversion in getDynamicCallSiteA...
Tim Haines
2025/01/21
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/21
[DynInst_API:] [dyninst/dyninst] bd28cd: Add RISC-V instruction mnemonics and registers
wxrdnx
2025/01/21
[DynInst_API:] [dyninst/dyninst] c4b4e3: Import unit tests
Tim Haines
2025/01/20
[DynInst_API:] [dyninst/dyninst] bbdf94: Optimize addi Code Generation
wxrdnx
2025/01/20
[DynInst_API:] [dyninst/dyninst] 8c1313: Add RISC-V instruction mnemonics and registers
wxrdnx
2025/01/19
[DynInst_API:] [dyninst/dyninst] c6177d: Fix MachRegister conversion in getDynamicCallSiteA...
Tim Haines
2025/01/19
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/19
[DynInst_API:] [dyninst/dyninst] 06d522: Add missing invalid mnemonics (#1870)
Tim Haines
2025/01/19
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/18
[DynInst_API:] [dyninst/dyninst] cd342f: add RISC-V instruction mnemonics and registers
wxrdnx
2025/01/18
[DynInst_API:] [dyninst/dyninst] dd290f: Add addi codegen
wxrdnx
2025/01/17
[DynInst_API:] [dyninst/dyninst] 8054a9: Fix ctest in build.sh
Tim Haines
2025/01/17
[DynInst_API:] [dyninst/dyninst] 407a7b: Import unit tests
Tim Haines
2025/01/17
[DynInst_API:] [dyninst/dyninst] 13721a: Import unit tests
Tim Haines
2025/01/17
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/17
[DynInst_API:] [dyninst/dyninst] f87bdf: GithubCI: update build scripts (#1873)
Tim Haines
2025/01/17
[DynInst_API:] [dyninst/dyninst] ef2d49: Add missing invalid mnemonics
Tim Haines
2025/01/17
[DynInst_API:] [dyninst/dyninst] fd63c8: GithubCI: update build scripts
Tim Haines
2025/01/17
[DynInst_API:] [dyninst/dyninst] 722daa: Update container
Tim Haines
2025/01/17
[DynInst_API:] [dyninst/dyninst] e5029c: Import unit tests
Tim Haines
2025/01/16
[DynInst_API:] [dyninst/dyninst] 31bbda: isGeneralPurpose - add stub
Tim Haines
2025/01/16
[DynInst_API:] [dyninst/dyninst] d5bb54: Fix AMDGPU rose to use explicit operands (#1871)
bbiiggppiigg
2025/01/16
[DynInst_API:] [dyninst/dyninst] 071d5e: update comments
bbiiggppiigg
2025/01/16
[DynInst_API:] [dyninst/dyninst]
bbiiggppiigg
2025/01/16
[DynInst_API:] [dyninst/dyninst] 8eff87: Fix AMDGPU rose to use explicit operands
bbiiggppiigg
2025/01/16
[DynInst_API:] [dyninst/dyninst] bc9524: Add missing invalid mnemonics
Tim Haines
2025/01/16
[DynInst_API:] [dyninst/dyninst] 35f2f5: Add Invalid OP entry and handling for AMDGPU
bbiiggppiigg
2025/01/16
[DynInst_API:] Save the date: 2025 Scalable Tools Workshop
BARTON MILLER
2025/01/16
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/16
[DynInst_API:] [dyninst/dyninst] 649a5b: Use x86_regpos_dword for x86/x86_64 segment register
Tim Haines
2025/01/16
[DynInst_API:] [dyninst/dyninst] c4403c: Correctly handle IP/PC for x86_64
Tim Haines
2025/01/16
[DynInst_API:] [dyninst/dyninst] 7585c0: Preserve full register in AbsRegionConverter::conv...
Tim Haines
2025/01/16
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/16
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/16
[DynInst_API:] [dyninst/dyninst] 4489cd: Fix ROSE register conversions for aarch64 (#1852)
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst] 805a95: add RISC-V instruction mnemonics and registers
wxrdnx
2025/01/15
[DynInst_API:] [dyninst/dyninst] b948cb: Change insn_size to is_compressed
wxrdnx
2025/01/15
[DynInst_API:] [dyninst/dyninst] f380ec: Use correct ppc32/64 base registers in MachRegiste...
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst] 808f3d: Preserve full register in AbsRegionConverter::conv...
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst] e5f816: Add executor for aarch64 return instruction (#1861)
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst] 8d3e37: Preserve full register in AbsRegionConverter::conv...
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst] fdb3c0: Use correct ppc32/64 base registers in is* checks
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst] 83556f: Add executor for aarch64 return instruction
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst] a092b7: Fix rose register conversion for aarch64
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst] 5fd776: Update aarch64 flag and pstate registers (#1866)
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst] 0256e8: Fix operand fetch in RoseInsnFactory::convert -- B...
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst] fae0d4: Fix base register calculation for ppc (#1864)
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/15
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/14
[DynInst_API:] [dyninst/dyninst] 4a222d: Make pstate flags 1 bit
Tim Haines
2025/01/14
[DynInst_API:] [dyninst/dyninst] 391bb0: ppc32
Tim Haines
2025/01/14
[DynInst_API:] [dyninst/dyninst] cee7f6: Change aarch64::pstate to FLAG type
Tim Haines
2025/01/13
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/13
[DynInst_API:] [dyninst/dyninst] 193ea0: Handle all architectures in MachRegister::getSysca...
Tim Haines
2025/01/12
[DynInst_API:] [dyninst/dyninst] a11ded: Add Load Immediate
wxrdnx
2025/01/12
[DynInst_API:] [dyninst/dyninst] bc6305: Update base registers for amdgpu_gfx908
Tim Haines
2025/01/12
[DynInst_API:] [dyninst/dyninst] 409112: isGeneralPurpose - add stub
Tim Haines
2025/01/12
[DynInst_API:] [dyninst/dyninst] a8fb2f: Use correct ppc32/64 base registers in is* checks
Tim Haines
2025/01/12
[DynInst_API:] [dyninst/dyninst] 352772: Change aarch64::pstate to FLAG type
Tim Haines
2025/01/12
[DynInst_API:] [dyninst/dyninst] 72eded: [AMDGPU][BPatch] Don't create symtab entry for var...
Ronak Chauhan
2025/01/12
[DynInst_API:] [dyninst/dyninst] eb6f23: Handle all architectures in getSyscallNumberOReg
Tim Haines
2025/01/12
[DynInst_API:] [dyninst/dyninst] 11b381: Fix base register calculation for ppc32
Tim Haines
2025/01/11
[DynInst_API:] [dyninst/dyninst] 189696: Add C-Type Emitter
wxrdnx
2025/01/11
[DynInst_API:] [dyninst/dyninst] 62d287: Preserve full register in AbsRegionConverter::conv...
Tim Haines
2025/01/11
[DynInst_API:] [dyninst/dyninst] a6cee3: Fix aarch64 flag detection in AbsRegionConverter::...
Tim Haines
2025/01/11
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/08
[DynInst_API:] [dyninst/dyninst] 32c4bb: Fix aarch64 flag detection in AbsRegionConverter::...
Tim Haines
2025/01/08
[DynInst_API:] [dyninst/dyninst] 7cef00: Correctly handle IP/PC for x86_64
Tim Haines
2025/01/08
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/08
[DynInst_API:] [dyninst/dyninst] 0f92e1: Update exception handling in SymbolicExpansion::ex...
Tim Haines
2025/01/07
[DynInst_API:] [dyninst/dyninst] 9b18f0: Add executor for aarch64 return instruction
Tim Haines
2025/01/07
[DynInst_API:] [dyninst/dyninst] 55237a: Update exception handling in SymbolicExpansion::ex...
Tim Haines
2025/01/07
[DynInst_API:] [dyninst/dyninst] 3231d2: Fix operand fetch in RoseInsnFactory::convert -- BUG
Tim Haines
2025/01/06
[DynInst_API:] [dyninst/dyninst] 1c17f9: Modify RISC-V Capstone instruction decoder
wxrdnx
2025/01/06
[DynInst_API:] [dyninst/dyninst] 3c0fb9: Add CMake stub
wxrdnx
2025/01/06
[DynInst_API:] [dyninst/dyninst] 9995fd: add RISC-V instruction mnemonics and registers
wxrdnx
2025/01/06
[DynInst_API:] [dyninst/dyninst] c6cd35: [AMDGPU] Change filename of instrumented kernel list
Ronak Chauhan
2025/01/06
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/06
[DynInst_API:] [dyninst/dyninst] c170e4: Use MachRegister::isFlag in RegisterAST::isFlag (#...
Tim Haines
2025/01/05
[DynInst_API:] [dyninst/dyninst] 97b0d0: Clean up BPatch_binaryEdit::writeFile
Ronak Chauhan
2025/01/05
[DynInst_API:] [dyninst/dyninst] 2fa3f5: Use MachRegister::isFlag in RegisterAST::isFlag
Tim Haines
2025/01/04
[DynInst_API:] [dyninst/dyninst] fd0e42: Correctly handle IP/PC for x86_64
Tim Haines
2025/01/04
[DynInst_API:] [dyninst/dyninst] ecd370: Fix rose register conversion for aarch64
Tim Haines
2025/01/04
[DynInst_API:] [dyninst/dyninst] 165c14: Fix position for x86::pc
Tim Haines
2025/01/04
[DynInst_API:] [dyninst/dyninst] 5bdfdd: Add isGeneralPurpose
Tim Haines
2025/01/03
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2025/01/03
[DynInst_API:] [dyninst/dyninst] eeb814: Fix MachRegister::isZeroFlag for ppc (#1857)
Tim Haines
2024/12/31
[DynInst_API:] [dyninst/dyninst] e67a83: Treat avx k0-7 as control/status registers
Tim Haines
2024/12/31
[DynInst_API:] [dyninst/dyninst] 9f4f9e: ppc64
Tim Haines
2024/12/31
[DynInst_API:] [dyninst/dyninst] 7e230e: Fix MachRegister::isZeroFlag for ppc
Tim Haines
2024/12/31
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2024/12/31
[DynInst_API:] [dyninst/dyninst] 00d7f4: Don't use base register in isZeroFlag (#1854)
Tim Haines
2024/12/31
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2024/12/31
[DynInst_API:] [dyninst/dyninst] e2143a: Remove RegisterParts from dataflowAPI (#1856)
Tim Haines
2024/12/30
[DynInst_API:] [dyninst/dyninst] bc31a9: Rename arch_riscv64 to DYNINST_HOST_ARCH_AARCH64
wxrdnx
2024/12/30
[DynInst_API:] [dyninst/dyninst] 93b953: Use x86_regpos_qword for rflags
Tim Haines
2024/12/30
[DynInst_API:] [dyninst/dyninst] c0929e: Add CMake stub
wxrdnx
2024/12/30
[DynInst_API:] [dyninst/dyninst] 557f6f: Remove RegisterParts from dataflowAPI
Tim Haines
2024/12/30
[DynInst_API:] [dyninst/dyninst] 60048e: Report aarch64::ffr as a status register
Tim Haines
2024/12/30
[DynInst_API:] [dyninst/dyninst] 2da501: Add isGeneralPurpose
Tim Haines
2024/12/30
[DynInst_API:] [dyninst/dyninst] 0bd518: Don't use base register in isZeroFlag
Tim Haines
2024/12/29
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2024/12/29
[DynInst_API:] [dyninst/dyninst] 1ddbf1: Fix register calculation in parse_func::calcUsedRe...
Tim Haines
2024/12/29
[DynInst_API:] [dyninst/dyninst] cd626d: add RISC-V instruction mnemonics and registers
wxrdnx
2024/12/28
[DynInst_API:] [dyninst/dyninst] ef4797: Fix rose register conversion for aarch64
Tim Haines
2024/12/28
[DynInst_API:] [dyninst/dyninst] 6bef11: Correctly handle IP/PC for x86_64
Tim Haines
2024/12/28
[DynInst_API:] [dyninst/dyninst] b8199b: Unify valid instruction detection (#1850)
Tim Haines
2024/12/28
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2024/12/28
[DynInst_API:] [dyninst/dyninst] 6d78ba: Fix MachRegister::getBaseRegister for x86 vector t...
Tim Haines
2024/12/28
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2024/12/28
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2024/12/28
[DynInst_API:] [dyninst/dyninst] 1d20f0: Fix non-unique AMDGPU registers
Tim Haines
2024/12/28
[DynInst_API:] [dyninst/dyninst] 0cf8d6: Correctly handle IP/PC for x86_64
Tim Haines
2024/12/28
[DynInst_API:] [dyninst/dyninst] fad437: Fix rose register conversion for aarch64
Tim Haines
2024/12/27
[DynInst_API:] [dyninst/dyninst] 9be602: Add x86_64::eip -> rip
Tim Haines
2024/12/27
[DynInst_API:] [dyninst/dyninst] 6b2518: add RISC-V instruction mnemonics and registers
wxrdnx
2024/12/27
[DynInst_API:] [dyninst/dyninst] 693afc: add RISC-V instruction mnemonics and registers
wxrdnx
2024/12/27
[DynInst_API:] [dyninst/dyninst] a1c371: add RISC-V instruction mnemonics and registers
wxrdnx
2024/12/27
[DynInst_API:] [dyninst/dyninst] c1eafc: Squash duplicate code
Tim Haines
2024/12/27
[DynInst_API:] [dyninst/dyninst] f0fb17: Fix MachRegister::getBaseRegister for x86 vector t...
Tim Haines
2024/12/26
[DynInst_API:] [dyninst/dyninst] 691c81: add RISC-V instruction mnemonics and registers
wxrdnx
2024/12/26
[DynInst_API:] [dyninst/dyninst] 1b4d57: Unify valid instruction detection
Tim Haines
2024/12/26
[DynInst_API:] [dyninst/dyninst] 9d6c64: add RISC-V instruction mnemonics and registers
wxrdnx
2024/12/25
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2024/12/25
[DynInst_API:] [dyninst/dyninst] 53f833: Fix register calculation in parse_func::calcUsedRe...
Tim Haines
2024/12/24
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2024/12/24
[DynInst_API:] [dyninst/dyninst] cf8733: Move DWARF register encoding/decoding into Dyninst...
Tim Haines
2024/12/22
[DynInst_API:] [dyninst/dyninst] a03f44: Amalgamate 32 and 64 bit fpr
wxrdnx
2024/12/22
[DynInst_API:] [dyninst/dyninst] 1eb4bf: add RISC-V instruction mnemonics and registers
wxrdnx
2024/12/20
[DynInst_API:] [dyninst/dyninst] 76a3cb: MachRegister: use base register for category/class...
Tim Haines
2024/12/20
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2024/12/20
[DynInst_API:] [dyninst/dyninst]
Tim Haines
2024/12/20
[DynInst_API:] [dyninst/dyninst] 18004e: MachRegister: handle aarch64 SPRs in getBaseRegist...
Tim Haines
2024/12/20
[DynInst_API:] [dyninst/dyninst] 0b0591: add RISC-V instruction mnemonics and registers
wxrdnx
2024/12/20
[DynInst_API:] [dyninst/dyninst] cd22b5: Fix register calculation in parse_func::calcUsedRe...
Tim Haines
Earlier messages
Later messages