Branch: refs/heads/thaines/fix_aarch64_pstate
Home: https://github.com/dyninst/dyninst
Commit: cee7f6a142dc918163e43a5396aa06072d77346f
https://github.com/dyninst/dyninst/commit/cee7f6a142dc918163e43a5396aa06072d77346f
Author: Tim Haines <[email protected]>
Date: 2025-01-14 (Tue, 14 Jan 2025)
Changed paths:
M common/h/registers/aarch64_regs.h
Log Message:
-----------
Change aarch64::pstate to FLAG type
Commit: 67fed283e1cbb0ef0b904fd7732b8922f669190b
https://github.com/dyninst/dyninst/commit/67fed283e1cbb0ef0b904fd7732b8922f669190b
Author: Tim Haines <[email protected]>
Date: 2025-01-14 (Tue, 14 Jan 2025)
Changed paths:
M common/h/registers/aarch64_regs.h
M common/src/registers/MachRegister.C
M instructionAPI/capstone/aarch64/registers.py
Log Message:
-----------
Update NZCV condition flags
Dyninst and ROSE track the individual bits as separate registers, but
Capstone does not.
Commit: 7cc7257322d68e4cb3a5be9beecab9b26ae8125a
https://github.com/dyninst/dyninst/commit/7cc7257322d68e4cb3a5be9beecab9b26ae8125a
Author: Tim Haines <[email protected]>
Date: 2025-01-14 (Tue, 14 Jan 2025)
Changed paths:
M common/h/registers/aarch64_regs.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Update daif
Commit: 422d2c9ec841c1f7abcf267917f3b284bcd422dd
https://github.com/dyninst/dyninst/commit/422d2c9ec841c1f7abcf267917f3b284bcd422dd
Author: Tim Haines <[email protected]>
Date: 2025-01-14 (Tue, 14 Jan 2025)
Changed paths:
M common/h/registers/aarch64_regs.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Update PSTATE
Commit: 5051e58872b3a87fe57f5fc6152c149dce73c199
https://github.com/dyninst/dyninst/commit/5051e58872b3a87fe57f5fc6152c149dce73c199
Author: Tim Haines <[email protected]>
Date: 2025-01-14 (Tue, 14 Jan 2025)
Changed paths:
M common/h/registers/aarch64_regs.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Update fpcr
Compare: https://github.com/dyninst/dyninst/compare/3527722f80ae...5051e58872b3
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