On 10/16/25 4:07 AM, Liu Ying wrote:
Hello Liu,
+$id: http://devicetree.org/schemas/display/imx/fsl,imx95-dc-domainblend.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX95 Display Controller Domain Blend Unit
+
+description: Combines two input frames to a single output frame.
I'd like to comment on patches in split patch serieses(to be sent if needed).
But, since I provide the below interrupt information, anyway I take the chance
to comment more:
Add more description about the unit according to i.MX95 DC IP spec:
The unit operates in four modes:
- Primary mode: The primary input is used for output.
- Secondary mode: The secondary input is used for output.
- Blend mode: Primary and secondary inputs are blended, according to the
programmed blending functions.
- SidebySide mode: Primary and secondary streams are projected side by side,
i.e., primary video on the left side and secondary on the
right.
BTW, I confirm that two Domain Blend Units exist in i.MX95 DC while they don't
exist in i.MX8qxp/qm DCs. And, as you can see, this unit supports multiple
modes, this would impact how an OS implements a display driver a lot, especially
Blend mode and SidebySide mode.
There is one thing which specifically concerns me about the DB, it seems
to be capable of blending two inputs from different security domains, is
that correct ?
+maintainers:
+ - Marek Vasut <[email protected]>
+
+properties:
+ compatible:
+ const: fsl,imx95-dc-domainblend
+
+ reg:
+ maxItems: 1
No clocks or other resources?
As patch 39 shows, there are 3 interrupts - domainblend{0,1}_shdload,
domainblend{0,1}_framecomplete and domainblend{0,1}_seqcomplete.
It seems we currently do not use either clock or interrupts on either
domainblend or layerblend IPs, but maybe DB and LB are different and LB
really has no clock/interrupts ?
