lei added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.h:487
+ /// Allows utilization of the Load VSX Vector Rightmost Instructions.
+ LXVRZX
+
----------------
missing `,`?
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:220
+
+def SDT_PPCLXVRZX : SDTypeProfile<1, 2, [
+ SDTCisVT<0, v1i128>, SDTCisPtrTy<1>, SDTCisPtrTy<2>
----------------
We should put all such def at the top of this file under:
```
// PowerPC specific type constraints.
```
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:224
+
+def PPClxvrzx : SDNode<"PPCISD::LXVRZX", SDT_PPCLXVRZX,
+ [SDNPHasChain, SDNPMayLoad]>;
----------------
Put these under the `type constraints` section and doc with:
```
// PowerPC specific DAG Nodes.
```
================
Comment at: llvm/test/CodeGen/PowerPC/p10-vsx-builtins.ll:3
+; These test cases tests that zero extending loads utilize the Load VSX Vector
Rightmost
+
+; (lxvr[b|h|w|d]x) instructions in Power10.
----------------
remve extra line. Makes the comment harder to read.
================
Comment at: llvm/test/CodeGen/PowerPC/p10-vsx-builtins.ll:10
+; Function Attrs: norecurse nounwind readonly
+define dso_local <1 x i128> @vec_xl_zext(i64 %__offset, i8* nocapture readonly
%__pointer) local_unnamed_addr #0 {
+; CHECK-LABEL: vec_xl_zext:
----------------
You don't need the `local_unnamed_addr #0`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D82502/new/
https://reviews.llvm.org/D82502
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