amyk added a comment.

Please update this patch to remove the instruction defs and MC tests. Also, you 
can update the patch to put your backend llc tests in the file I've introduced 
in: https://reviews.llvm.org/D82467



================
Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:14
 
-#include <altivec.h>
+#include "altivec.h"
 
----------------
unintended change?


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:14165
+  // The width of the narrow type becomes an operand of the LXVRZX node
+  SDValue Width = ;
+  SDValue LoadOps[] = {LD->getChain(), LD->getBasePtr(), 
DAG.getIntPtrConstant(MemoryType.getScalarSizeInBits(), dl)};
----------------
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Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82502/new/

https://reviews.llvm.org/D82502



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