Yes. Side processor only. I wasn't sure how to ask that. I thought it
would. Thanks.
I figured I could write drivers to use either shared memory or Xilinx's
mailbox IP as a serial device for inter processor IO. Does RTEMS already
support OpenAMP? I'm running Linux on the A53 side. There are
On Mon, Aug 9, 2021 at 12:53 PM Mathew Benson
wrote:
> I might take that on. When I took the RTEMS training a couple years ago,
> the repository was still in the middle of a restructuring and build system
> upgrade so it was a little confusing. I just looked at it and the new
> documentation an
I might take that on. When I took the RTEMS training a couple years ago,
the repository was still in the middle of a restructuring and build system
upgrade so it was a little confusing. I just looked at it and the new
documentation and it looks a lot less daunting.
On Mon, Aug 9, 2021 at 12:35 P
On Mon, Aug 9, 2021 at 11:49 AM Gedare Bloom wrote:
>
> Hi Mathew,
>
> Not that I'm aware of, so probably not. There is ongoing work that is
> improving the Zynq Ultrascale+ support, and there is also work ongoing
> for the Xilinx Versal, which shares some features including R5F
> co-processors. O
Hi Mathew,
Not that I'm aware of, so probably not. There is ongoing work that is
improving the Zynq Ultrascale+ support, and there is also work ongoing
for the Xilinx Versal, which shares some features including R5F
co-processors. OAR has been pushing on Ultrascale, but I couldn't tell
you what th
