I might take that on. When I took the RTEMS training a couple years ago, the repository was still in the middle of a restructuring and build system upgrade so it was a little confusing. I just looked at it and the new documentation and it looks a lot less daunting.
On Mon, Aug 9, 2021 at 12:35 PM Joel Sherrill <j...@rtems.org> wrote: > On Mon, Aug 9, 2021 at 11:49 AM Gedare Bloom <ged...@rtems.org> wrote: > > > > Hi Mathew, > > > > Not that I'm aware of, so probably not. There is ongoing work that is > > improving the Zynq Ultrascale+ support, and there is also work ongoing > > for the Xilinx Versal, which shares some features including R5F > > co-processors. OAR has been pushing on Ultrascale, but I couldn't tell > > you what their scope is, and I have been working with Chris Johns on > > the Versal but the R5F is not yet in scope for me. > > Gedare's right. OAR did the aarch64 bit port but we haven't touched the > R5 yet. Everytime someone (you?) ask, I always think of the R52 FVP and > tms570 BSPs but those aren't what you need. > > This is certainly something we'd like to see for RTEMS. It just needs a > sponsor. <not so subtle hint> :) > > --joel > > > > Gedare > > > > On Sat, Aug 7, 2021 at 2:22 PM Mathew Benson <mben...@windhoverlabs.com> > wrote: > > > > > > Has anybody started or completed porting RTEMS to the R5? > > > > > > Sent from my iPad > > > _______________________________________________ > > > users mailing list > > > users@rtems.org > > > http://lists.rtems.org/mailman/listinfo/users > > _______________________________________________ > > users mailing list > > users@rtems.org > > http://lists.rtems.org/mailman/listinfo/users > -- *Mathew Benson* CEO | Chief Engineer Windhover Labs, LLC 832-640-4018 www.windhoverlabs.com
_______________________________________________ users mailing list users@rtems.org http://lists.rtems.org/mailman/listinfo/users
