On 6/30/23 17:11, Christoph Müllner wrote:
On Fri, Jun 30, 2023 at 4:03 PM Richard Henderson
wrote:
On 6/30/23 13:52, Christoph Muellner wrote:
+bool trans_fmvh_x_d(DisasContext *ctx, arg_fmvh_x_d *a)
+{
+REQUIRE_FPU;
+REQUIRE_ZFA(ctx);
+REQUIRE_EXT(ctx, RVD);
+REQUIRE_32BIT(c
On Fri, Jun 30, 2023 at 4:03 PM Richard Henderson
wrote:
>
> On 6/30/23 13:52, Christoph Muellner wrote:
> > +bool trans_fmvh_x_d(DisasContext *ctx, arg_fmvh_x_d *a)
> > +{
> > +REQUIRE_FPU;
> > +REQUIRE_ZFA(ctx);
> > +REQUIRE_EXT(ctx, RVD);
> > +REQUIRE_32BIT(ctx);
> > +
> > +
On 6/30/23 13:52, Christoph Muellner wrote:
+bool trans_fmvh_x_d(DisasContext *ctx, arg_fmvh_x_d *a)
+{
+REQUIRE_FPU;
+REQUIRE_ZFA(ctx);
+REQUIRE_EXT(ctx, RVD);
+REQUIRE_32BIT(ctx);
+
+TCGv dst = dest_gpr(ctx, a->rd);
+TCGv_i64 t1 = tcg_temp_new_i64();
+
+tcg_gen_extra
On 6/30/23 13:52, Christoph Muellner wrote:
+bool trans_fmvp_d_x(DisasContext *ctx, arg_fmvp_d_x *a)
+{
+REQUIRE_FPU;
+REQUIRE_ZFA(ctx);
+REQUIRE_EXT(ctx, RVD);
+REQUIRE_32BIT(ctx);
+
+TCGv src1 = get_gpr(ctx, a->rs1, EXT_ZERO);
+TCGv src2 = get_gpr(ctx, a->rs2, EXT_ZERO);
From: Christoph Müllner
This patch introduces the RISC-V Zfa extension, which introduces
additional floating-point instructions:
* fli (load-immediate) with pre-defined immediates
* fminm/fmaxm (like fmin/fmax but with different NaN behaviour)
* fround/froundmx (round to integer)
* fcvtmod.w.d (M
