On 6/30/23 13:52, Christoph Muellner wrote:
+bool trans_fmvp_d_x(DisasContext *ctx, arg_fmvp_d_x *a)
+{
+ REQUIRE_FPU;
+ REQUIRE_ZFA(ctx);
+ REQUIRE_EXT(ctx, RVD);
+ REQUIRE_32BIT(ctx);
+
+ TCGv src1 = get_gpr(ctx, a->rs1, EXT_ZERO);
+ TCGv src2 = get_gpr(ctx, a->rs2, EXT_ZERO);
+ TCGv_i64 t1 = tcg_temp_new_i64();
+ TCGv_i64 t2 = tcg_temp_new_i64();
+
+ tcg_gen_ext_tl_i64(t1, src1);
+ tcg_gen_ext_tl_i64(t2, src2);
+ tcg_gen_shli_i64(t2, t2, 32);
+ tcg_gen_or_i64(t2, t2, t1);
+ tcg_gen_mov_i64(cpu_fpr[a->rd], t2);
This isn't right, because tcg_gen_ext_tl_i64 does signed extension.
But this whole operation is
tcg_gen_concat_tl_i64(cpu_fpr[a->rd], src1, src2);
(which isn't a great name, but chosen long ago).
You can also use EXT_NONE, since we'll be discarding the upper bits.
r~
