00)
2 - i2c (0x4080)
3 - qspi (0x44a0)
4 - uart16550 (0x44a1)
5 - emaclite (0x40e0)
6 - timer2 (0x41c1)
7 - axi emac (0x40c0)
8 - axi dma (0x41e0)
9 - axi dma
10 - gpio (0x4000)
11 - gpio2 (0x4001)
12 - gpio3 (0x4002)
Signed-off-by: Sai Pavan Boddu
Signed-o
Hi Alistair,
Thanks for Review. I will address below comments in V4.
Regards,
Sai Pavan
>-Original Message-
>From: Alistair Francis
>Sent: Monday, November 18, 2024 11:37 AM
>To: Boddu, Sai Pavan
>Cc: qemu-devel@nongnu.org; qemu-ri...@nongnu.org; Paolo Bonzini
>; Pa
00)
2 - i2c (0x4080)
3 - qspi (0x44a0)
4 - uart16550 (0x44a1)
5 - emaclite (0x40e0)
6 - timer2 (0x41c1)
7 - axi emac (0x40c0)
8 - axi dma (0x41e0)
9 - axi dma
10 - gpio (0x4000)
11 - gpio2 (0x4001)
12 - gpio3 (0x4002)
Signed-off-by: Sai Pavan Boddu
Signed-o
Hi,
I would be out of office first half, will connect online post lunch.
Regards,
Sai Pavan
00)
2 - i2c (0x4080)
3 - qspi (0x44a0)
4 - uart16550 (0x44a1)
5 - emaclite (0x40e0)
6 - timer2 (0x41c1)
7 - axi emac (0x40c0)
8 - axi dma (0x41e0)
9 - axi dma
10 - gpio (0x4000)
11 - gpio2 (0x4001)
12 - gpio3 (0x4002)
Signed-off-by: Sai Pavan Boddu
Signed-o
Thanks Phil, I will send a v3 for follow-up.
Regards,
Sai Pavan
>-Original Message-
>From: Philippe Mathieu-Daudé
>Sent: Thursday, October 31, 2024 9:30 PM
>To: Simek, Michal ; Alistair Francis
>; Boddu, Sai Pavan
>Cc: qemu-devel@nongnu.org; qemu-ri...@nongnu.
Hi Alistair,
Thanks for the review, I will send a v3 as follow-up.
Regards,
Sai Pavan
>-Original Message-
>From: Alistair Francis
>Sent: Thursday, October 31, 2024 10:01 AM
>To: Philippe Mathieu-Daudé
>Cc: Simek, Michal ; Boddu, Sai Pavan
>; qemu-devel@nongnu.org; qem
00)
2 - i2c (0x4080)
3 - qspi (0x44a0)
4 - uart16550 (0x44a1)
5 - emaclite (0x40e0)
6 - timer2 (0x41c1)
7 - axi emac (0x40c0)
8 - axi dma (0x41e0)
9 - axi dma
10 - gpio (0x4000)
11 - gpio2 (0x4001)
12 - gpio3 (0x4002)
Signed-off-by: Sai Pavan Boddu
Signed-o
Hi Daniel,
Thanks for the review, I will send a V2 addressing the comments.
Regards,
Sai Pavan
>-Original Message-
>From: Daniel Henrique Barboza
>Sent: Wednesday, October 16, 2024 1:28 AM
>To: Boddu, Sai Pavan ; qemu-devel@nongnu.org;
>qemu-ri...@nongnu.org
>Cc: Paol
00)
2 - i2c (0x4080)
3 - qspi (0x44a0)
4 - uart16550 (0x44a1)
5 - emaclite (0x40e0)
6 - timer2 (0x41c1)
7 - axi emac (0x40c0)
8 - axi dma (0x41e0)
9 - axi dma
10 - gpio (0x4000)
11 - gpio2 (0x4001)
12 - gpio3 (0x4002)
Signed-off-by: Sai Pavan Boddu
Signed-o
From: Michal Simek
Add missing optional MDIO lines. Without it U-Boot is not working.
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Michal Simek
---
hw/net/xilinx_ethlite.c | 240
1 file changed, 240 insertions(+)
diff --git a/hw/net/xilinx_ethlite.
Added the supported device list and an example command.
Signed-off-by: Sai Pavan Boddu
Reviewed-by: Edgar E. Iglesias
Reviewed-by: Francisco Iglesias
---
MAINTAINERS | 1 +
docs/system/arm/xlnx-zynq.rst | 47 +++
docs/system/target-arm.rst
boot-mode property sets user values into BOOT_MODE register, on hardware
these are derived from board switches.
Signed-off-by: Sai Pavan Boddu
Reviewed-by: Edgar E. Iglesias
Reviewed-by: Francisco Iglesias
---
hw/misc/zynq_slcr.c | 22 +-
1 file changed, 21 insertions
Read boot-mode value as machine property and propagate that to
SLCR.BOOT_MODE register.
Signed-off-by: Sai Pavan Boddu
Acked-by: Edgar E. Iglesias
Reviewed-by: Francisco Iglesias
---
hw/arm/xilinx_zynq.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/hw
doc,
fixed commit message to mention right property name.
Changes for V4:
Use strncasecmp,
Fix boot mode names to use small case in few other places,
Fix code indentation.
Sai Pavan Boddu (3):
hw/misc/zynq_slcr: Add boot-mode property
hw/arm/xilinx_zynq: Add boot-mode property
boot-mode property sets user values into BOOT_MODE register, on hardware
these are derived from board switches.
Signed-off-by: Sai Pavan Boddu
Reviewed-by: Edgar E. Iglesias
---
hw/misc/zynq_slcr.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/hw
Added the supported device list and an example command.
Signed-off-by: Sai Pavan Boddu
Reviewed-by: Edgar E. Iglesias
---
MAINTAINERS | 1 +
docs/system/arm/xlnx-zynq.rst | 47 +++
docs/system/target-arm.rst| 1 +
3 files changed, 49
Read boot-mode value as machine property and propagate that to
SLCR.BOOT_MODE register.
Signed-off-by: Sai Pavan Boddu
Acked-by: Edgar E. Iglesias
---
hw/arm/xilinx_zynq.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm
doc
fixed commit message to mention right property name.
Sai Pavan Boddu (3):
hw/misc/zynq_slcr: Add boot-mode property
hw/arm/xilinx_zynq: Add boot-mode property
docs/system/arm: Add a doc for zynq board
MAINTAINERS | 1 +
docs/system/arm/xlnx-zynq.rst | 47
Add a way to update the boot-mode via machine properties.
Changes for V2:
Make boot-mode property work with string
Fixed few code style issues
Added zynq board doc.
Sai Pavan Boddu (3):
hw/misc/zynq_slcr: Add BootMode property
hw/arm/xilinx_zynq: Add boot-mode property
docs
Read boot-mode value as machine property and propagate that to
SLCR.BOOT_MODE register.
Signed-off-by: Sai Pavan Boddu
---
hw/arm/xilinx_zynq.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 7f7a3d23fbe
Added the supported device list and an example command.
Signed-off-by: Sai Pavan Boddu
---
docs/system/arm/xlnx-zynq.rst | 47 +++
docs/system/target-arm.rst| 1 +
2 files changed, 48 insertions(+)
create mode 100644 docs/system/arm/xlnx-zynq.rst
diff
BootMode property sets user values into BOOT_MODE register, on hardware
these are derived from board switches.
Signed-off-by: Sai Pavan Boddu
---
hw/misc/zynq_slcr.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/hw/misc/zynq_slcr.c b/hw/misc
Hi Edgar,
From: Boddu, Sai Pavan
Sent: Friday, June 14, 2024 8:37 PM
To: Edgar E. Iglesias
Cc: qemu-...@nongnu.org; qemu-devel@nongnu.org; Alistair Francis
; Peter Maydell ; Iglesias,
Francisco
Subject: RE: [PATCH 2/2] hw/arm/xilinx_zynq: Add boot-mode property
Hi Edgar,
I examined -boot
Hi Edgar,
From: Edgar E. Iglesias
Sent: Friday, June 14, 2024 4:38 PM
To: Boddu, Sai Pavan
Cc: qemu-...@nongnu.org; qemu-devel@nongnu.org; Alistair Francis
; Peter Maydell ; Iglesias,
Francisco
Subject: Re: [PATCH 2/2] hw/arm/xilinx_zynq: Add boot-mode property
On Thu, Jun 13, 2024 at 5
DCC is a debug port to transfer some data between debugger and
processor, we are using this feature to connect a chardev device.
Chardev frontends should be named as "dcc" inorder to connect
to this interface.
Signed-off-by: Sai Pavan Boddu
---
target/arm/cpu.h | 11 +
This enabled DCC support.
Signed-off-by: Sai Pavan Boddu
---
target/arm/cpu64.c | 1 +
target/arm/tcg/cpu32.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 262a1d6c0b..e39740303b 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
MDCCSR_EL0 is aarch64 varient of DBGDSCRint, so utilize the same cpreg
offset.
Signed-off-by: Sai Pavan Boddu
---
target/arm/debug_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c
index 7d856acddf..5deafa4d1f
aarch64 -M xlnx-zcu102 -kernel u-boot-dtb.bin
-dtb zynqmp-zcu102-rev1.1.d -display none -m 2G
-chardev stdio,id=dcc0
Sai Pavan Boddu (3):
target/arm: Add dcc uart support
target/arm: Enable dcc console for a53 and R5
target/arm/debug_helper: Add fieldoffset for MDCCSR_EL0 reg
Read boot-mode value as machine property and propagate that to
SLCR.BOOT_MODE register.
Signed-off-by: Sai Pavan Boddu
---
hw/arm/xilinx_zynq.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 7f7a3d23fb..4dfa9184ac
Add a way to update the boot-mode via machine properties.
Sai Pavan Boddu (2):
hw/misc/zynq_slcr: Add BootMode property
hw/arm/xilinx_zynq: Add boot-mode property
hw/arm/xilinx_zynq.c | 22 ++
hw/misc/zynq_slcr.c | 11 ++-
2 files changed, 32 insertions(+), 1
BootMode property sets user values into BOOT_MODE register, on hardware
these are derived from board switches.
Signed-off-by: Sai Pavan Boddu
---
hw/misc/zynq_slcr.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c
index
Hi Shiva,
>-Original Message-
>From: Shiva sagar Myana
>Sent: Friday, May 31, 2024 1:56 PM
>To: Iglesias, Francisco ; jasow...@redhat.com;
>qemu-devel@nongnu.org; p...@cmp.felk.cvut.cz
>Cc: peter.mayd...@linaro.org; Boddu, Sai Pavan ;
>Myana, Shivasagar
>Subject:
Add a new 2Gib octal flash mt35xu02gbba. Add an interface for versal
virt board to swap the default flash.
Changes for V2:
Added type checks for provided flash part name.
Sai Pavan Boddu (2):
block: m25p80: Add support of mt35xu02gbba
arm: xlnx-versal-virt: Add machine property ospi-flash
This property allows users to change flash model on command line as
below.
ex: "-M xlnx-versal-virt,ospi-flash=mt35xu02gbba"
Signed-off-by: Sai Pavan Boddu
---
hw/arm/xlnx-versal-virt.c | 44 ++-
1 file changed, 43 insertions(+), 1 deletion(-)
Add Micro 2Gb OSPI flash part with sfdp data.
Signed-off-by: Sai Pavan Boddu
Reviewed-by: Francisco Iglesias
---
hw/block/m25p80_sfdp.h | 1 +
hw/block/m25p80.c | 3 +++
hw/block/m25p80_sfdp.c | 36
3 files changed, 40 insertions(+)
diff --git a/hw
The OSPI DMA reads flash data through the OSPI linear address space (the
iomem_dac region), because of this the reentrancy guard introduced in
commit a2e1753b ("memory: prevent dma-reentracy issues") is disabled for
the memory region.
Signed-off-by: Sai Pavan Boddu
---
Chan
Hi Peter,
>-Original Message-
>From: Peter Maydell
>Sent: Tuesday, December 12, 2023 10:12 PM
>To: Boddu, Sai Pavan
>Cc: qemu-devel@nongnu.org; qemu-...@nongnu.org; qemu-
>bl...@nongnu.org; Alistair Francis ; Edgar E. Iglesias
>; Kevin Wolf ; Francisco
&
The OSPI DMA reads flash data through the OSPI linear address space (the
iomem_dac region), because of this the reentrancy guard introduced in
commit a2e1753b ("memory: prevent dma-reentracy issues") is disabled for
the memory region.
Signed-off-by: Sai Pavan Boddu
---
hw/ssi/xlnx-ver
Disable reentrancy on iomem_dac memory-region.
Sai Pavan Boddu (1):
xlnx-versal-ospi: disable reentrancy detection for iomem_dac
hw/ssi/xlnx-versal-ospi.c | 1 +
1 file changed, 1 insertion(+)
--
2.25.1
Disable reentrancy on iomem_dac memory-region.
Sai Pavan Boddu (1):
xlnx-versal-ospi: disable reentrancy detection for iomem_dac
hw/ssi/xlnx-versal-ospi.c | 1 +
1 file changed, 1 insertion(+)
--
2.25.1
Add Micro 2Gb OSPI flash part with sfdp data.
Signed-off-by: Sai Pavan Boddu
---
hw/block/m25p80_sfdp.h | 1 +
hw/block/m25p80.c | 3 +++
hw/block/m25p80_sfdp.c | 36
3 files changed, 40 insertions(+)
diff --git a/hw/block/m25p80_sfdp.h b/hw/block
This property allows users to change flash model on command line as
below.
ex: "-M xlnx-versal-virt,ospi-flash=mt35xu02gbba"
Signed-off-by: Sai Pavan Boddu
---
hw/arm/xlnx-versal-virt.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff
Add a new 2Gib octal flash mt35xu02gbba. Add an interface for versal
virt board to swap the default flash.
Sai Pavan Boddu (2):
block: m25p80: Add support of mt35xu02gbba
arm: xlnx-versal-virt: Add machine property ospi-flash
hw/block/m25p80_sfdp.h| 1 +
hw/arm/xlnx-versal-virt.c | 31
The OSPI DMA reads flash data through the OSPI linear address space (the
iomem_dac region), because of this the reentrancy guard introduced in
commit a2e1753b ("memory: prevent dma-reentracy issues") is disabled for
the memory region.
Signed-off-by: Sai Pavan Boddu
---
hw/ssi/xlnx-ver
rancisco ; Konrad, Frederic
>; Boddu, Sai Pavan
>
>Subject: [PATCH 11/11] hw/net/cadence_gem: enforce 32 bits variable size for
>CRC
>
>The CRC was stored in an unsigned variable in gem_receive. Change it for a
>uint32_t to ensure we have the correct variable size here.
>
>
rancisco ; Konrad, Frederic
>; Boddu, Sai Pavan
>
>Subject: [PATCH 10/11] hw/net/cadence_gem: perform PHY access on write
>only
>
>The MDIO access is done only on a write to the PHYMNTNC register. A
>subsequent read is used to retrieve the result but does not trigger an MDIO
>
rancisco ; Konrad, Frederic
>; Boddu, Sai Pavan
>
>Subject: [PATCH 09/11] hw/net/cadence_gem: use FIELD to describe
>PHYMNTNC register fields
>
>Use the FIELD macro to describe the PHYMNTNC register fields.
>
>Signed-off-by: Luc Michel
Reviewed-by: sai.pa
rancisco ; Konrad, Frederic
>; Boddu, Sai Pavan
>
>Subject: [PATCH 07/11] hw/net/cadence_gem: use FIELD to describe IRQ
>register fields
>
>Use de FIELD macro to describe the IRQ related register fields.
>
>Signed-off-by: Luc Michel
Reviewed-by: sai.pav
rancisco ; Konrad, Frederic
>; Boddu, Sai Pavan
>
>Subject: [PATCH 06/11] hw/net/cadence_gem: use FIELD to describe
>[TX|RX]STATUS register fields
>
>Use de FIELD macro to describe the TXSTATUS and RXSTATUS register fields.
>
>Signed-off-by: Luc Michel
Reviewed-by: sai.pav
rancisco ; Konrad, Frederic
>; Boddu, Sai Pavan
>
>Subject: [PATCH 05/11] hw/net/cadence_gem: use FIELD to describe DMACFG
>register fields
>
>Use de FIELD macro to describe the DMACFG register fields.
>
>Signed-off-by: Luc Michel
Reviewed-by: sai.pa
rancisco ; Konrad, Frederic
>; Boddu, Sai Pavan
>
>Subject: [PATCH 04/11] hw/net/cadence_gem: use FIELD to describe NWCFG
>register fields
>
>Use de FIELD macro to describe the NWCFG register fields.
>
>Signed-off-by: Luc Michel
Reviewed-by: sai.pavan.bo...@amd.com
rancisco ; Konrad, Frederic
>; Boddu, Sai Pavan
>
>Subject: [PATCH 03/11] hw/net/cadence_gem: use FIELD to describe NWCTRL
>register fields
>
>Use the FIELD macro to describe the NWCTRL register fields.
>
>Signed-off-by: Luc Michel
Reviewed-by: sai.pavan.bo...@amd.com
R
rancisco ; Konrad, Frederic
>; Boddu, Sai Pavan
>
>Subject: [PATCH 02/11] hw/net/cadence_gem: use FIELD for screening registers
>
>Describe screening registers fields using the FIELD macros.
>
>Signed-off-by: Luc Michel
Reviewed-by: sai.pavan.bo...@amd.com
Reg
Reviewed-by: sai.pavan.bo...@amd.com
Regards,
Sai Pavan
>-Original Message-
>From: Luc Michel
>Sent: Wednesday, October 18, 2023 1:14 AM
>To: qemu-devel@nongnu.org
>Cc: Michel, Luc ; qemu-...@nongnu.org; Edgar E .
>Iglesias ; Alistair Francis ;
>Peter Maydell ; J
Hi
Looks good.
Reviewed-by: sai.pavan.bo...@amd.com
Regards,
Sai Pavan
>-Original Message-
>From: Francisco Iglesias
>Sent: Monday, July 10, 2023 7:33 PM
>To: qemu-devel@nongnu.org
>Cc: frasse.igles...@gmail.com; alist...@alistair23.me;
>edgar.igles...@gma
Hi Cedric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Monday, March 1, 2021 4:32 PM
> To: Sai Pavan Boddu ; Markus Armbruster
> ; Kevin Wolf ; Max Reitz
> ; Vladimir Sementsov-Ogievskiy
> ; Eric Blake ; Joel Stanley
> ; Vincent Palatin ; Dr. David Alan
Hi David,
> -Original Message-
> From: Dr. David Alan Gilbert
> Sent: Monday, March 1, 2021 4:12 PM
> To: Sai Pavan Boddu
> Cc: Markus Armbruster ; Kevin Wolf
> ; Max Reitz ; Vladimir Sementsov-
> Ogievskiy ; Eric Blake ;
> Joel Stanley ; Cédric Le Goater ; Vi
Embedded device slots should be allowed as support of eMMC is available.
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sdhci.c | 4
1 file changed, 4 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 8ffa539..771212a 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -99,10 +99,6
ete,
Fix commit message to be generic.]
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sd.c | 40
1 file changed, 40 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 08b77ad..d311477 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1044,6 +1044,34 @@ static v
Add CMD35 and CMD36 which sets the erase start and end.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
---
hw/sd/sd.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 09c1222..bba0446 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1552,6
From: Vincent Palatin
eMMC CSD is similar to SD with an option to refer EXT_CSD for larger
devices.
Signed-off-by: Vincent Palatin
[clg: Add user friendly macros for EXT_CSD register]
Signed-off-by: Cédric Le Goater
[spb: updated commit message]
Signed-off-by: Sai Pavan Boddu
---
hw/sd
From: Joel Stanley
The userdata size is derived from the file the user passes on the
command line, but we must take into account the boot areas.
Signed-off-by: Joel Stanley
Signed-off-by: Cédric Le Goater
---
hw/sd/sd.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/hw/sd/sd.c b/hw/
From: Vincent Palatin
eMMC OCR register doesn't has UHS-II field and voltage fields are
different.
Signed-off-by: Vincent Palatin
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sd.c | 27 ---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/hw/sd/sd.c b/
Configuring SDHCI-0 to act as eMMC controller.
Signed-off-by: Sai Pavan Boddu
---
include/hw/arm/xlnx-versal.h | 1 +
hw/arm/xlnx-versal-virt.c| 29 +
hw/arm/xlnx-versal.c | 14 --
3 files changed, 38 insertions(+), 6 deletions(-)
diff --git
Add details of eMMC specific machine property and example for passing
eMMC device.
Signed-off-by: Sai Pavan Boddu
---
docs/system/arm/xlnx-versal-virt.rst | 14 ++
1 file changed, 14 insertions(+)
diff --git a/docs/system/arm/xlnx-versal-virt.rst
b/docs/system/arm/xlnx-versal
boot area in emmc image
sd: emmc: Subtract bootarea size from blk
Sai Pavan Boddu (14):
sd: sd: Remove usage of tabs in the file
sd: emmc: Add support for eMMC cards
sd: emmc: Dont not update CARD_CAPACITY for eMMC cards
sd: emmc: Update CMD1 definition for eMMC
sd: emmc: support idle s
eMMC is expected to be in idle-state post CMD1. Ready state is an
intermediate stage which we don't come across in Device identification
mode.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
Reviewed-by: Alistair Francis
---
hw/sd/sd.c | 4
1 file changed, 4 inser
eMMC cards support tuning sequence for entering HS200 mode.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
---
hw/sd/sd.c | 47 +++
1 file changed, 47 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index bf963ec..174c28e 100644
Add few simple steps to create emmc card with boot and user data
partitions.
Signed-off-by: Sai Pavan Boddu
---
docs/devel/emmc.txt | 16
1 file changed, 16 insertions(+)
create mode 100644 docs/devel/emmc.txt
diff --git a/docs/devel/emmc.txt b/docs/devel/emmc.txt
new file
From: Vincent Palatin
Sends the EXT_CSD register as response to CMD8.
Signed-off-by: Vincent Palatin
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sd.c | 52
1 file changed, 36 insertions(+), 16 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd
ACMD41 is not applicable for eMMC.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
---
hw/sd/sd.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 174c28e..09c1222 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1737,6 +1737,9 @@ static
Set tabstop as 4 and used expandtabs
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sd.c | 190 ++---
1 file changed, 95 insertions(+), 95 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 8517dbc..74b9162 100644
--- a/hw/sd/sd.c
+++ b/hw
switch operation in eMMC card updates the ext_csd register to
request changes in card operations. Here we implement similar
sequence but requests are mostly dummy and make no change.
Implement SWITCH_ERROR if the write operation extends goes beyond length
of ext_csd.
Signed-off-by: Sai Pavan
From: Vincent Palatin
Change SET_RELATIVE_ADDR command to assign relative address
as requested by user.
Signed-off-by: Vincent Palatin
Signed-off-by: Joel Stanley
Signed-off-by: Cédric Le Goater
[spb: Split original patch series]
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sd.c | 12
OCR.CARD_CAPACITY field is only valid for sd cards, So skip it for eMMC.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
Reviewed-by: Alistair Francis
---
hw/sd/sd.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 181e7e2
CID structure is little different for eMMC, w.r.t to product name and
manufacturing date.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
---
hw/sd/sd.c | 47 ++-
1 file changed, 30 insertions(+), 17 deletions(-)
diff --git a/hw/sd
Add support to Power up the card and send response r3 in case of eMMC.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
Reviewed-by: Alistair Francis
---
hw/sd/sd.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index
From: Cédric Le Goater
This adds extra info to trace log.
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sdmmc-internal.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/sd/sdmmc-internal.c b/hw/sd/sdmmc-internal.c
index 2053def..8648a78 100644
--- a/hw/sd/sdmmc-internal.c
Add eMMC device built on top of SD card.
Signed-off-by: Sai Pavan Boddu
---
include/hw/sd/sd.h | 2 ++
hw/sd/sd.c | 20
2 files changed, 22 insertions(+)
diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h
index 05ef9b7..b402dad 100644
--- a/include/hw/sd/sd.h
Hi Cedric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Wednesday, February 24, 2021 7:25 PM
> To: Stefan Hajnoczi ; Sai Pavan Boddu
>
> Cc: Philippe Mathieu-Daudé ; Markus Armbruster
> ; Kevin Wolf ; Max Reitz
> ; Vladimir Sementsov-Ogievskiy
>
Hi Stefan
> -Original Message-
> From: Stefan Hajnoczi
> Sent: Wednesday, February 24, 2021 5:10 PM
> To: Sai Pavan Boddu
> Cc: Philippe Mathieu-Daudé ; Markus Armbruster
> ; Kevin Wolf ; Max Reitz
> ; Vladimir Sementsov-Ogievskiy
> ; Eric Blake ; Joel Stan
Hi Philippe,
> -Original Message-
> From: Philippe Mathieu-Daudé
> Sent: Monday, February 22, 2021 5:34 PM
> To: Sai Pavan Boddu ; Markus Armbruster
> ; Kevin Wolf ; Max Reitz
> ; Vladimir Sementsov-Ogievskiy
> ; Eric Blake ; Joel Stanley
> ; Cédric Le Goater
Hi Philippe,
> -Original Message-
> From: Philippe Mathieu-Daudé
> Sent: Monday, February 22, 2021 6:54 PM
> To: Dr. David Alan Gilbert ; Markus Armbruster
>
> Cc: Sai Pavan Boddu ; Kevin Wolf ;
> Max Reitz ; Vladimir Sementsov-Ogievskiy
> ; Eric Blake ; Jo
Hi Cedric
> -Original Message-
> From: Cédric Le Goater
> Sent: Monday, February 22, 2021 3:22 PM
> To: Sai Pavan Boddu ; Markus Armbruster
> ; Kevin Wolf ; Max Reitz
> ; Vladimir Sementsov-Ogievskiy
> ; Eric Blake ; Joel Stanley
> ; Vincent Palatin ; Dr. David
Embedded device slots should be allowed as support of eMMC is available.
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sdhci.c | 4
1 file changed, 4 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 8ffa539..771212a 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -99,10 +99,6
Add CMD35 and CMD36 which sets the erase start and end.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
---
hw/sd/sd.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index df82b61..6d2ef2b 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1544,6
From: Vincent Palatin
Sends the EXT_CSD register as response to CMD8.
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sd.c | 52
1 file changed, 36 insertions(+), 16 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 4c211ba..a4f93b5 100644
OCR.CARD_CAPACITY field is only valid for sd cards, So skip it for eMMC.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
Reviewed-by: Alistair Francis
---
hw/sd/sd.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index a4f93b5
Add few simple steps to create emmc card with boot and user data
partitions.
Signed-off-by: Sai Pavan Boddu
---
docs/devel/emmc.txt | 16
1 file changed, 16 insertions(+)
create mode 100644 docs/devel/emmc.txt
diff --git a/docs/devel/emmc.txt b/docs/devel/emmc.txt
new file
eMMC is expected to be in idle-state post CMD1. Ready state is an
intermediate stage which we don't come across in Device identification
mode.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
Reviewed-by: Alistair Francis
---
hw/sd/sd.c | 4
1 file changed, 4 inser
ete,
Fix commit message to be generic.]
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sd.c | 40
1 file changed, 40 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 60799aa..ab29e54 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1040,6 +1040,34 @@ static v
Add details of eMMC specific machine property.
Signed-off-by: Sai Pavan Boddu
---
docs/system/arm/xlnx-versal-virt.rst | 10 ++
1 file changed, 10 insertions(+)
diff --git a/docs/system/arm/xlnx-versal-virt.rst
b/docs/system/arm/xlnx-versal-virt.rst
index 2602d0f..a48a88d 100644
--- a
From: Cédric Le Goater
Add user friendly macros for EXT_CSD register.
Signed-off-by: Cédric Le Goater
[spb: Rebased over versal emmc series,
updated commit message]
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sdmmc-internal.h | 97 ++
hw/sd
From: Vincent Palatin
eMMC CSD is similar to SD with an option to refer EXT_CSD for larger
devices.
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sd.c | 57 +++--
1 file changed, 55 insertions(+), 2 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd
switch operation in eMMC card updates the ext_csd register to
request changes in card operations. Here we implement similar
sequence but requests are mostly dummy and make no change.
Implement SWITCH_ERROR if the write operation extends goes beyond length
of ext_csd.
Signed-off-by: Sai Pavan
From: Cédric Le Goater
This adds extra info to trace log.
Signed-off-by: Sai Pavan Boddu
---
hw/sd/sdmmc-internal.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/sd/sdmmc-internal.c b/hw/sd/sdmmc-internal.c
index 2053def..8648a78 100644
--- a/hw/sd/sdmmc-internal.c
From: Vincent Palatin
Add new block device type.
Signed-off-by: Vincent Palatin
[SPB: Rebased over 5.1 version]
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Joel Stanley
Signed-off-by: Cédric Le Goater
Reviewed-by: Alistair Francis
---
include/sysemu/blockdev.h | 1 +
blockdev.c
eMMC cards support tuning sequence for entering HS200 mode.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
---
hw/sd/sd.c | 47 +++
1 file changed, 47 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index e50d40b..d702027 100644
ACMD41 is not applicable for eMMC.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Edgar E. Iglesias
---
hw/sd/sd.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index d702027..df82b61 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1729,6 +1729,9 @@ static
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