This patch series attaches a chardev to arm Debug Communication channel
registers,
As each cpu has it own DBGDTRTX/RX register just tried to hook each cpu
with chardev iff we find a chardev with id "dcc<cpu-id>".
ex:
Below chardev switch would be connected to A53-0.
./qemu-system-aarch64 -M xlnx-zcu102 -kernel u-boot-dtb.bin
-dtb zynqmp-zcu102-rev1.1.d -display none -m 2G
-chardev stdio,id=dcc0
Sai Pavan Boddu (3):
target/arm: Add dcc uart support
target/arm: Enable dcc console for a53 and R5
target/arm/debug_helper: Add fieldoffset for MDCCSR_EL0 reg
target/arm/cpu.h | 11 +++++
target/arm/internals.h | 4 ++
target/arm/cpu64.c | 1 +
target/arm/debug-dcc.c | 99 +++++++++++++++++++++++++++++++++++++++
target/arm/debug_helper.c | 2 +-
target/arm/helper.c | 3 ++
target/arm/tcg/cpu32.c | 1 +
target/arm/meson.build | 1 +
8 files changed, 121 insertions(+), 1 deletion(-)
create mode 100644 target/arm/debug-dcc.c
--
2.34.1
