Re: [RFC v4 0/5] Add packed virtqueue to shadow virtqueue

On Tue, Dec 17, 2024 at 6:45 AM Sahil Siddiq wrote: > > Hi, > > Thank you for your reply. > > On 12/16/24 2:09 PM, Eugenio Perez Martin wrote: > > On Sun, Dec 15, 2024 at 6:27 PM Sahil Siddiq wrote: > >> On 12/10/24 2:57 PM, Eugenio Perez Martin wrote: > >>> On Thu, Dec 5, 2024 at 9:34 PM Sahil S

Re: [PATCH 0/2] Change default pointer authentication algorithm on aarch64 to impdef

Pierrick Bouvier writes: > On 12/16/24 11:50, Richard Henderson wrote: >> On 12/16/24 13:26, Pierrick Bouvier wrote: >>> On 12/16/24 11:10, Richard Henderson wrote: On 12/4/24 15:12, Pierrick Bouvier wrote: > qemu-system-aarch64 default pointer authentication (QARMA5) is expensive,

Re: [PATCH 1/1] tests/avocado: update sbsa-ref firmware

W dniu 16.12.2024 o 13:46, Peter Maydell pisze: On Mon, 25 Nov 2024 at 13:25, Peter Maydell wrote: On Mon, 25 Nov 2024 at 12:54, Marcin Juszkiewicz wrote: Firmware is built using Debian 'bookworm' cross toolchain (gcc 12.2.0). Used versions: - Trusted Firmware v2.12.0 - Tianocore EDK2 sta

[PATCH v10 3/7] target/riscv: Handle Smrnmi interrupt and exception

From: Tommy Wu Because the RNMI interrupt trap handler address is implementation defined. We add the 'rnmi-interrupt-vector' and 'rnmi-exception-vector' as the property of the harts. It’s very easy for users to set the address based on their expectation. This patch also adds the functionality to

[PATCH v10 0/7] Add Smrnmi support

From: Frank Chang This patchset added support for Smrnmi Extension in RISC-V. There are four new CSRs and one new instruction added to allow NMI to be resumable in RISC-V, which are: = * mnscratch (0x740) * mnepc (0x741) * mn

[PATCH v10 4/7] target/riscv: Add Smrnmi mnret instruction

From: Tommy Wu This patch adds a new instruction 'mnret'. 'mnret' is an M-mode-only instruction that uses the values in `mnepc` and `mnstatus` to return to the program counter, privilege mode, and virtualization mode of the interrupted context. Signed-off-by: Frank Chang Signed-off-by: Tommy Wu

[PATCH v10 7/7] target/riscv: Disable Smrnmi for the 'max' type CPU

From: Frank Chang When Smrnmi is present, the firmware (e.g., OpenSBI) must set mnstatus.NMIE to 1 before enabling any interrupts. Otherwise, all interrupts will be disabled. Since our current OpenSBI does not support Smrnmi yet, let's disable Smrnmi for the 'max' type CPU for now. We can re-enab

[PATCH v10 2/7] target/riscv: Add Smrnmi CSRs

From: Tommy Wu The Smrnmi extension adds the 'mnscratch', 'mnepc', 'mncause', 'mnstatus' CSRs. Signed-off-by: Frank Chang Signed-off-by: Tommy Wu Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 5 +++ target/riscv/cpu.h | 7 target/riscv/cpu_bits.h | 11 ++ target

[PATCH v10 5/7] target/riscv: Add Smrnmi cpu extension

From: Tommy Wu This adds the properties for ISA extension Smrnmi. Signed-off-by: Frank Chang Signed-off-by: Tommy Wu --- target/riscv/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index e6988f44c6..7a4aa235ce 100644 --- a/target/riscv/cpu.

[PATCH v10 1/7] target/riscv: Add 'ext_smrnmi' in the RISCVCPUConfig

From: Tommy Wu The boolean variable 'ext_smrnmi' is used to determine whether the Smrnmi extension exists. Signed-off-by: Frank Chang Signed-off-by: Tommy Wu Reviewed-by: Alistair Francis --- target/riscv/cpu_cfg.h | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/cpu_cfg.h b/

[PATCH v10 6/7] target/riscv: Add Zicfilp support for Smrnmi

From: Frank Chang Zicfilp extension introduces the MNPELP (bit 9) in mnstatus. The MNPELP field holds the previous ELP. When a RNMI trap is delivered, the MNPELP is set to ELP and ELP set to NO_LP_EXPECTED. Upon a mnret, if the mnstatus.MNPP holds the value y, then ELP is set to the value of MNP

Re: [PATCH v9 0/6] Add Smrnmi support

On Mon, Dec 16, 2024 at 9:46 PM Daniel Henrique Barboza < dbarb...@ventanamicro.com> wrote: > Hi Frank, > > Sorry for the delay. > > It seems like this series is breaking the "make check-functional" test: > > $ make check-functional > (...) > 9/10 qemu:func-thorough+func-riscv32-thorough+thoroug

Re: [PATCH v13 6/7] target/riscv: Apply pointer masking for virtualized memory accesses

On Mon, Dec 16, 2024 at 10:19 PM wrote: > > From: Alexey Baturo > > Signed-off-by: Alexey Baturo > --- > target/riscv/cpu.h | 1 + > target/riscv/cpu_helper.c| 18 +++ > target/riscv/internals.h | 44 > target/riscv/op_helper.c

Re: [PATCH v3 12/17] intel_iommu: Add support for PASID-based device IOTLB invalidation

On 17/12/2024 03:13, Jason Wang wrote: > Caution: External email. Do not open attachments or click links, unless this > email comes from a known sender and you know the content is safe. > > > On Mon, Dec 16, 2024 at 4:22 PM Duan, Zhenzhong > wrote: >> >> >>> -Original Message- >>> From

Re: [PATCH v13 3/7] target/riscv: Add helper functions to calculate current number of masked bits for pointer masking

On Mon, Dec 16, 2024 at 10:19 PM wrote: > > From: Alexey Baturo > > Signed-off-by: Alexey Baturo > --- > target/riscv/cpu.h| 5 +++ > target/riscv/cpu_helper.c | 73 +++ > 2 files changed, 78 insertions(+) > > diff --git a/target/riscv/cpu.h b/target

Re: [RFC v4 0/5] Add packed virtqueue to shadow virtqueue

Hi, Thank you for your reply. On 12/16/24 2:09 PM, Eugenio Perez Martin wrote: On Sun, Dec 15, 2024 at 6:27 PM Sahil Siddiq wrote: On 12/10/24 2:57 PM, Eugenio Perez Martin wrote: On Thu, Dec 5, 2024 at 9:34 PM Sahil Siddiq wrote: [...] I have been following the "Hands on vDPA: what do you

Re: [PATCH v13 2/7] target/riscv: Add new CSR fields for S{sn, mn, m}pm extensions as part of Zjpm v1.0

On Mon, Dec 16, 2024 at 10:19 PM wrote: > > From: Alexey Baturo > > Signed-off-by: Alexey Baturo You shouldn't include a newline here > > Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Alistair > --- > target/riscv/cpu.h | 8 > target/riscv/cpu_bits.h |

Re: (Proposal) New TDX Global Metadata To Report FIXED0 and FIXED1 CPUID Bits

On 12/17/2024 9:53 AM, Sean Christopherson wrote: On Tue, Dec 10, 2024, Rick P Edgecombe wrote: On Tue, 2024-12-10 at 11:22 +0800, Xiaoyao Li wrote: The solution in this proposal decreases the work the VMM has to do, but in the long term won't remove hand coding completely. As long as we are de

Re: [PATCH v4 1/3] hw/riscv: Support to load DTB after 3GB memory on 64-bit system.

This is the correct fix, thanks! On Tue, Dec 17, 2024 at 11:39 AM Alistair Francis wrote: > > On Thu, Nov 21, 2024 at 1:41 AM Jim Shu wrote: > > > > Larger initrd image will overlap the DTB at 3GB address. Since 64-bit > > system doesn't have 32-bit addressable issue, we just load DTB to the en

Re: [PATCH v4 0/3] Support 64-bit address of initrd

I'm sorry for the wrong ping. The email to apply my patch is placed in the spam mail On Tue, Dec 17, 2024 at 12:01 PM Jim Shu wrote: > > Hi, > > Gentle ping on this patch > > Thanks, > Jim Shu > > > > > > On Wed, Nov 20, 2024 at 11:39 PM Jim Shu wrote: > > > > Support to load DTB after 3GB o

Re: [PATCH v4 0/3] Support 64-bit address of initrd

Hi, Gentle ping on this patch Thanks, Jim Shu On Wed, Nov 20, 2024 at 11:39 PM Jim Shu wrote: > > Support to load DTB after 3GB on RV64 system, so that larger initrd > doesn't be overlapped to DTB. DTB loading now will check if overlapping > to kernel/initrd and report this error. > > Verif

Re: [PATCH v6 0/9] target/riscv: Add support for Smdbltrp and Ssdbltrp extensions

On Fri, Nov 29, 2024 at 12:15 AM Clément Léger wrote: > > A double trap typically arises during a sensitive phase in trap handling > operations — when an exception or interrupt occurs while the trap > handler (the component responsible for managing these events) is in a > non-reentrant state. This

Re: [PATCH v4 1/3] hw/riscv: Support to load DTB after 3GB memory on 64-bit system.

On Thu, Nov 21, 2024 at 1:41 AM Jim Shu wrote: > > Larger initrd image will overlap the DTB at 3GB address. Since 64-bit > system doesn't have 32-bit addressable issue, we just load DTB to the end > of dram in 64-bit system. > > Signed-off-by: Jim Shu > --- > hw/riscv/boot.c| 14

Re: [PATCH 24/26] rust: qom: move device_id to PL011 class side

> +impl ClassInitImpl for PL011State { > +fn class_init(klass: &mut PL011Class) { > +klass.device_id = DeviceId::ARM; > +>::class_init(&mut > klass.parent_class); This seems a bit of a conflict with the C version of QOM semantics. In C, class_init is registered in TypeInfo, an

Re: [PATCH 7/9] system/dirtylimit: Don't use migration_is_active()

On Mon, Dec 16, 2024 at 5:47 PM Avihai Horon wrote: > vcpu_dirty_rate_stat_collect() uses migration_is_active() to detect > whether migration is running or not, in order to get the correct dirty > rate period value. > > However, recently there has been an effort to simplify the migration > status

Re: [PATCH v3 12/17] intel_iommu: Add support for PASID-based device IOTLB invalidation

On Mon, Dec 16, 2024 at 4:22 PM Duan, Zhenzhong wrote: > > > > >-Original Message- > >From: Jason Wang > >Sent: Sunday, September 29, 2024 9:59 AM > >Subject: Re: [PATCH v3 12/17] intel_iommu: Add support for PASID-based device > >IOTLB invalidation > > > >On Fri, Sep 27, 2024 at 3:18 PM

Re: (Proposal) New TDX Global Metadata To Report FIXED0 and FIXED1 CPUID Bits

On Tue, Dec 10, 2024, Rick P Edgecombe wrote: > On Tue, 2024-12-10 at 11:22 +0800, Xiaoyao Li wrote: > > > The solution in this proposal decreases the work the VMM has to do, but > > > in the long term won't remove hand coding completely. As long as we are > > > designing something, what kind of ba

Re: [PATCH 00/46] tcg: Remove in-flight mask data from OptContext

On 12/16/24 06:15, Richard Henderson wrote: Ping. I'll take a look tomorrow morning. Pierrick On 12/10/24 09:23, Richard Henderson wrote: The desire is to start re-using some of the fold_* functions while lowering or simplifying operations during tcg_optmize. Many of these fold_* function

Re: [PATCH] vvfat: fix ubsan issue in create_long_filename

On 12/4/24 11:51, Pierrick Bouvier wrote: Found with test sbsaref introduced in [1]. [1] https://patchew.org/QEMU/20241203213629.2482806-1-pierrick.bouv...@linaro.org/ ../block/vvfat.c:433:24: runtime error: index 14 out of bounds for type 'uint8_t [11]' #0 0x56151a66b93a in create_long_

Re: [PATCH 0/2] Change default pointer authentication algorithm on aarch64 to impdef

On 12/16/24 11:50, Richard Henderson wrote: On 12/16/24 13:26, Pierrick Bouvier wrote: On 12/16/24 11:10, Richard Henderson wrote: On 12/4/24 15:12, Pierrick Bouvier wrote: qemu-system-aarch64 default pointer authentication (QARMA5) is expensive, we spent up to 50% of the emulation time runnin

[PATCH 00/13] Fix 32-bit build for plugins

Since 9.2.0 release, we are building contrib plugins using the QEMU build system (before, it was external makefiles). When building for 32-bit host platform, some warnings are triggered and build fail. Thus, at the time, the decision was to not fix those plugins, and disable by default plugins for

Re: contrib/plugins does not build on 32-bit host

On 12/13/24 13:47, Richard Henderson wrote: Hi, Several of the recent contrib/plugins/ patches do not build on e.g. arm32. All of the issues are related to casting between pointers and uint64_t; there is a Werror generated for casting between pointers and integers of different sizes. I suspect

[PATCH 11/13] contrib/plugins/hwprofile: fix 32-bit build

Signed-off-by: Pierrick Bouvier --- contrib/plugins/hwprofile.c | 27 --- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/contrib/plugins/hwprofile.c b/contrib/plugins/hwprofile.c index 739ac0c66b5..2a4cbc47d40 100644 --- a/contrib/plugins/hwprofile.c +++ b

[PATCH 13/13] configure: reenable plugins by default for 32-bit hosts

Signed-off-by: Pierrick Bouvier --- configure | 21 + 1 file changed, 1 insertion(+), 20 deletions(-) diff --git a/configure b/configure index 18336376bff..02f1dd2311f 100755 --- a/configure +++ b/configure @@ -528,25 +528,6 @@ case "$cpu" in ;; esac -# Now we have ou

[PATCH 06/13] tests/tcg/plugins/mem: fix 32-bit build

Signed-off-by: Pierrick Bouvier --- tests/tcg/plugins/mem.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tests/tcg/plugins/mem.c b/tests/tcg/plugins/mem.c index b0fa8a9f277..d87d6628e09 100644 --- a/tests/tcg/plugins/mem.c +++ b/tests/tcg/plugins/mem.c @@ -135,14 +135

[PATCH 08/13] contrib/plugins/cache: fix 32-bit build

Signed-off-by: Pierrick Bouvier --- contrib/plugins/cache.c | 18 ++ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/contrib/plugins/cache.c b/contrib/plugins/cache.c index 512ef6776b7..cc6922c3c95 100644 --- a/contrib/plugins/cache.c +++ b/contrib/plugins/cache.c @

[PATCH 12/13] contrib/plugins/hotpages: fix 32-bit build

Signed-off-by: Pierrick Bouvier --- contrib/plugins/hotpages.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/contrib/plugins/hotpages.c b/contrib/plugins/hotpages.c index 8316ae50c72..c6e64937194 100644 --- a/contrib/plugins/hotpages.c +++ b/contrib/plugins/hotpages.c

[PATCH 02/13] plugins: bump API version

Signed-off-by: Pierrick Bouvier --- include/qemu/qemu-plugin.h | 6 +- plugins/plugin.h | 2 +- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h index 1fbcff6e1d2..a611f912139 100644 --- a/include/qemu/qemu-plugin

[PATCH 10/13] contrib/plugins/cflow: fix 32-bit build

Signed-off-by: Pierrick Bouvier --- contrib/plugins/cflow.c | 17 +++-- 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/contrib/plugins/cflow.c b/contrib/plugins/cflow.c index b39974d1cf3..930ecb46fcd 100644 --- a/contrib/plugins/cflow.c +++ b/contrib/plugins/cflow.c @@

[PATCH 04/13] contrib/plugins/howvec: ensure we don't regress if this plugin is extended

Signed-off-by: Pierrick Bouvier --- contrib/plugins/howvec.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/contrib/plugins/howvec.c b/contrib/plugins/howvec.c index 9be67f74534..2aa9029c3f0 100644 --- a/contrib/plugins/howvec.c +++ b/contrib/plugins/howvec.c @@ -253,6

[PATCH 01/13] plugins: change signature of qemu_plugin_insn_haddr

It makes more sense to return the same type than qemu_plugin_insn_vaddr. Signed-off-by: Pierrick Bouvier --- include/qemu/qemu-plugin.h | 2 +- plugins/api.c | 12 ++-- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/include/qemu/qemu-plugin.h b/include/qemu/

[PATCH 05/13] tests/tcg/plugins/syscall: fix 32-bit build

Signed-off-by: Pierrick Bouvier --- tests/tcg/plugins/syscall.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tests/tcg/plugins/syscall.c b/tests/tcg/plugins/syscall.c index ff452178b18..47aad55fc1b 100644 --- a/tests/tcg/plugins/syscall.c +++ b/tests/tcg/plugins/sysca

[PATCH 03/13] tests/tcg/plugins/insn: remove unused callback parameter

Signed-off-by: Pierrick Bouvier --- tests/tcg/plugins/insn.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/tests/tcg/plugins/insn.c b/tests/tcg/plugins/insn.c index baf2d07205d..0c723cb9ed8 100644 --- a/tests/tcg/plugins/insn.c +++ b/tests/tcg/plugins/insn.c @@ -150,10 +1

[PATCH 07/13] contrib/plugins/stoptrigger: fix 32-bit build

Signed-off-by: Pierrick Bouvier --- contrib/plugins/stoptrigger.c | 48 --- 1 file changed, 27 insertions(+), 21 deletions(-) diff --git a/contrib/plugins/stoptrigger.c b/contrib/plugins/stoptrigger.c index 03ee22f4c6a..b3a6ed66a7b 100644 --- a/contrib/plugins/sto

[PATCH 09/13] contrib/plugins/hotblocks: fix 32-bit build

Signed-off-by: Pierrick Bouvier --- contrib/plugins/hotblocks.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/contrib/plugins/hotblocks.c b/contrib/plugins/hotblocks.c index 02bc5078bdd..09b0932275c 100644 --- a/contrib/plugins/hotblocks.c +++ b/contrib/plugins/hotbl

Re: [PATCH v6 2/9] target/riscv: Add Ssdbltrp CSRs handling

On Fri, Nov 29, 2024 at 12:14 AM Clément Léger wrote: > > Add ext_ssdbltrp in RISCVCPUConfig and implement MSTATUS.SDT, > {H|M}ENVCFG.DTE and modify the availability of MTVAL2 based on the > presence of the Ssdbltrp ISA extension. > > Signed-off-by: Clément Léger Reviewed-by: Alistair Francis

Re: [PULL 0/7] Firmware 20241216 patches

Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes. signature.asc Description: PGP signature

Re: [PULL 00/67] Constify almost all Property

Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes. signature.asc Description: PGP signature

Re: [PATCH v3 08/24] migration: Add thread pool of optional load threads

On 16.12.2024 17:33, Peter Xu wrote: On Thu, Dec 12, 2024 at 11:53:42PM +0100, Maciej S. Szmigiero wrote: migrate_set_error() wouldn't be called until qemu_loadvm_state() exits into process_incoming_migration_co(). Also this does not account other qemu_loadvm_state() callers like qmp_xen_load_d

Re: [PATCH v3 08/24] migration: Add thread pool of optional load threads

On 16.12.2024 17:29, Peter Xu wrote: On Thu, Dec 12, 2024 at 11:53:24PM +0100, Maciej S. Szmigiero wrote: On 12.12.2024 17:38, Peter Xu wrote: On Wed, Dec 11, 2024 at 12:05:23AM +0100, Maciej S. Szmigiero wrote: Maybe move it over to migration_object_init()? Then we keep qemu_loadvm_state_set

Re: [PATCH] accel/tcg: Restrict curr_cflags() declaration to 'internal-common.h'

On 12/16/24 15:40, Philippe Mathieu-Daudé wrote: curr_cflags() is only used within accel/tcg/, move its declaration to accel/tcg/internal-common.h. Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/internal-common.h | 3 +++ include/exec/cpu-common.h | 3

Re: [PATCH 0/9] migration: Drop/unexport migration_is_device() and migration_is_active()

On 12/16/24 10:46, Avihai Horon wrote: Hello, This follows up on Peter's series [1] to simplify migration status API to a single migration_is_running() function. Peter's series tried to drop migration_is_device() and migration_is_active(), however VFIO used them to check if dirty page tracking

[PATCH] accel/tcg: Restrict curr_cflags() declaration to 'internal-common.h'

curr_cflags() is only used within accel/tcg/, move its declaration to accel/tcg/internal-common.h. Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/internal-common.h | 3 +++ include/exec/cpu-common.h | 3 --- accel/tcg/watchpoint.c | 1 + 3 files chang

Re: [PATCH v2 00/14] s390x: virtio-mem support

Thanks, queued to https://github.com/davidhildenbrand/qemu.git mem-next On 13.12.24 15:26, David Hildenbrand wrote: On 13.12.24 13:35, Thomas Huth wrote: On 12/12/2024 22.52, David Hildenbrand wrote: On 13.11.24 15:46, David Hildenbrand wrote: On 08.10.24 12:54, David Hildenbrand wrote: Base

Re: [PATCH 27/71] hw/hyperv: Constify all Property

On 13.12.2024 20:07, Richard Henderson wrote: Signed-off-by: Richard Henderson --- hw/hyperv/hv-balloon.c | 2 +- hw/hyperv/syndbg.c | 2 +- hw/hyperv/vmbus.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) Acked-by: Maciej S. Szmigiero Thanks, Maciej

Re: contrib/plugins does not build on 32-bit host

On 12/16/24 10:45, Pierrick Bouvier wrote: On 12/14/24 04:35, Philippe Mathieu-Daudé wrote: On 14/12/24 06:29, Richard Henderson wrote: On 12/13/24 21:44, Pierrick Bouvier wrote: Hi Richard, On 12/13/24 13:47, Richard Henderson wrote: Hi, Several of the recent contrib/plugins/ patches do no

Re: [PATCH 2/9] vfio/migration: Refactor vfio_devices_all_dirty_tracking() logic

On 16/12/2024 16:05, Joao Martins wrote: > On 16/12/2024 15:52, Joao Martins wrote: >> On 16/12/2024 14:52, Avihai Horon wrote: >>> >>> On 16/12/2024 14:32, Joao Martins wrote: External email: Use caution opening links or attachments On 16/12/2024 09:46, Avihai Horon wrote:

Re: [PATCH 0/2] Change default pointer authentication algorithm on aarch64 to impdef

On 12/16/24 13:26, Pierrick Bouvier wrote: On 12/16/24 11:10, Richard Henderson wrote: On 12/4/24 15:12, Pierrick Bouvier wrote: qemu-system-aarch64 default pointer authentication (QARMA5) is expensive, we spent up to 50% of the emulation time running it (when using TCG). Switching to pauth-im

Re: [PATCH 0/9] migration: Drop/unexport migration_is_device() and migration_is_active()

On 16/12/2024 17:33, Cédric Le Goater wrote: > On 12/16/24 16:37, Joao Martins wrote: >> On 16/12/2024 14:45, Avihai Horon wrote: >>> On 16/12/2024 14:00, Joao Martins wrote: On 16/12/2024 09:46, Avihai Horon wrote: I also have a much smaller series for that sort of unblockage that I

Re: [PATCH 3/3] target/arm: implement SEL2 physical and virtual timers

Peter Maydell writes: > On Fri, 6 Dec 2024 at 16:02, Alex Bennée wrote: >> >> When FEAT_SEL2 was implemented the SEL2 timers where missed. This >> shows up when building the latest Hafnium with SPMC_AT_EL=2. The >> actual implementation utilises the same logic as the rest of the >> timers so all

Re: [PULL 00/18] loongarch-to-apply queue

Git repository at: > > https://gitlab.com/bibo-mao/qemu.git tags/pull-loongarch-20241216 > > for you to fetch changes up to efada537c6c49e414ae87ce66803d6d8543ad140: > > hw/intc/loongarch_extioi: Code cleanup abo

Re: [PATCH v2] tests/qtest/sse-timer-test: Add watchdog reset to sse-timer test

Actually after some more debugging with the help of Roque (cc'd) we realized that this patch doesn't actually fix the issue, it only hides it behind the watchdog. The root issue comes from https://lists.gnu.org/archive/html/qemu-s390x/2024-09/msg00264.html. The function `qemu_clock_advance_virtual

Re: [PATCH 0/2] Change default pointer authentication algorithm on aarch64 to impdef

On 12/16/24 11:10, Richard Henderson wrote: On 12/4/24 15:12, Pierrick Bouvier wrote: qemu-system-aarch64 default pointer authentication (QARMA5) is expensive, we spent up to 50% of the emulation time running it (when using TCG). Switching to pauth-impdef=on is often given as a solution to spee

Re: contrib/plugins does not build on 32-bit host

Richard Henderson writes: > On 12/13/24 21:44, Pierrick Bouvier wrote: >> Hi Richard, >> On 12/13/24 13:47, Richard Henderson wrote: >>> Hi, >>> >>> Several of the recent contrib/plugins/ patches do not build on e.g. arm32. >>> All of the issues are related to casting between pointers and uint64_

Re: [PATCH 0/2] Change default pointer authentication algorithm on aarch64 to impdef

On 12/4/24 15:12, Pierrick Bouvier wrote: qemu-system-aarch64 default pointer authentication (QARMA5) is expensive, we spent up to 50% of the emulation time running it (when using TCG). Switching to pauth-impdef=on is often given as a solution to speed up execution. Thus we talked about making i

Re: contrib/plugins does not build on 32-bit host

On 12/14/24 04:35, Philippe Mathieu-Daudé wrote: On 14/12/24 06:29, Richard Henderson wrote: On 12/13/24 21:44, Pierrick Bouvier wrote: Hi Richard, On 12/13/24 13:47, Richard Henderson wrote: Hi, Several of the recent contrib/plugins/ patches do not build on e.g. arm32. All of the issues are

Re: [PATCH 2/3] tests: Use qemu_mkdir_with_parents() for all test code

On Mon, Dec 16, 2024 at 11:14:12AM -0500, Peter Xu wrote: > Coverity isn't happy on the QEMU test cases where g_mkdir_with_parents() is > used without checking retvals. Use qemu_mkdir_with_parents() to fix them. > > Resolves: Coverity CID 1568381 > Resolves: Coverity CID 1568378 > Signed-off-by:

Re: [PATCH 1/3] osdep: Add qemu_mkdir_with_parents()

On Mon, Dec 16, 2024 at 04:56:33PM +, Peter Maydell wrote: > On Mon, 16 Dec 2024 at 16:14, Peter Xu wrote: > > > > QEMU uses g_mkdir_with_parents() a lot, especially in the case where the > > failure case is ignored so an abort is expected when happened. > > > > Provide a helper qemu_mkdir_wit

Re: [PATCH v2 6/6] migration/block: Rewrite disk activation

On Mon, Dec 16, 2024 at 12:58:58PM -0300, Fabiano Rosas wrote: > > @@ -3286,6 +3237,11 @@ static void > > migration_iteration_finish(MigrationState *s) > > case MIGRATION_STATUS_FAILED: > > case MIGRATION_STATUS_CANCELLED: > > case MIGRATION_STATUS_CANCELLING: > > Pre-existing, but

Re: [PATCH V4 02/19] physmem: fd-based shared memory

On Fri, Dec 13, 2024 at 11:41:45AM -0500, Steven Sistare wrote: > On 12/12/2024 4:22 PM, Peter Xu wrote: > > On Thu, Dec 12, 2024 at 03:38:00PM -0500, Steven Sistare wrote: > > > On 12/9/2024 2:42 PM, Peter Xu wrote: > > > > On Mon, Dec 02, 2024 at 05:19:54AM -0800, Steve Sistare wrote: > > > > > @

Re: [PATCH v2] plugins: optimize cpu_index code generation

Hi Richard, On 11/29/24 05:29, Richard Henderson wrote: On 11/28/24 15:38, Pierrick Bouvier wrote: When running with a single vcpu, we can return a constant instead of a load when accessing cpu_index. A side effect is that all tcg operations using it are optimized, most notably scoreboard acces

Re: [PATCH 3/3] target/arm: implement SEL2 physical and virtual timers

On Fri, 6 Dec 2024 at 16:02, Alex Bennée wrote: > > When FEAT_SEL2 was implemented the SEL2 timers where missed. This > shows up when building the latest Hafnium with SPMC_AT_EL=2. The > actual implementation utilises the same logic as the rest of the > timers so all we need to do is: > > - defi

Re: [PATCH] vvfat: fix ubsan issue in create_long_filename

Hi everyone, gentle ping on this series. On 12/4/24 11:51, Pierrick Bouvier wrote: Found with test sbsaref introduced in [1]. [1] https://patchew.org/QEMU/20241203213629.2482806-1-pierrick.bouv...@linaro.org/ ../block/vvfat.c:433:24: runtime error: index 14 out of bounds for type 'uint8_t [

[PATCH v4 7/7] Update the ACPI tables according to the acpi aml_build change, also empty bios-tables-test-allowed-diff.h.

The disassembled differences between actual and expected PPTT based on the following cache topology representation: ``` test_acpi_one("-M virt,smp-cache.0.cache=l1i,smp-cache.0.topology=cluster," "smp-cache.1.cache=l1d,smp-cache.1.topology=cluster," "smp-cache.2

[PATCH v4 6/7] tests/qtest/bios-table-test: testing new ARM ACPI PPTT topology

Test new PPTT topolopy with cache representation. Signed-off-by: Alireza Sanaee --- tests/qtest/bios-tables-test.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index 36e5c0adde..0f72520664 100644 --- a/te

[PATCH v4 5/7] hw/acpi/aml-build.c: add cache hierarchy to pptt table

Add cache topology to PPTT table. With this patch, both ACPI PPTT table and device tree will represent the same cache topology given users input. Signed-off-by: Alireza Sanaee Co-developed-by: Jonathan Cameron Signed-off-by: Jonathan Cameron --- hw/acpi/aml-build.c | 235 ++

[PATCH v4 4/7] bios-tables-test: prepare to change ARM ACPI virt PPTT

Prepare to update `build_pptt` function to add cache description functionalities, thus add binaries in this patch. Signed-off-by: Alireza Sanaee --- tests/qtest/bios-tables-test-allowed-diff.h | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/test

[PATCH v4 3/7] arm/virt.c: add cache hierarchy to device tree

Specify which layer (core/cluster/socket) caches found at in the CPU topology. Updating cache topology to device tree (spec v0.4). Example: Here, 2 sockets (packages), and 2 clusters, 4 cores and 2 threads created, in aggregate 2*2*4*2 logical cores. In the smp-cache object, cores will have l1d an

[PATCH v4 2/7] target/arm/tcg: increase cache level for cpu=max

This patch addresses cache description in the `aarch64_max_tcg_initfn` function for cpu=max. It introduces three layers of caches and modifies the cache description registers accordingly. Signed-off-by: Alireza Sanaee --- target/arm/tcg/cpu64.c | 13 + 1 file changed, 13 insertions(+

Re: [PATCH 1/3] osdep: Add qemu_mkdir_with_parents()

On Mon, Dec 16, 2024 at 07:28:19PM +0200, Konstantin Kostiuk wrote: > On Mon, Dec 16, 2024 at 7:12 PM Peter Xu wrote: > > > On Mon, Dec 16, 2024 at 04:56:33PM +, Peter Maydell wrote: > > > On Mon, 16 Dec 2024 at 16:14, Peter Xu wrote: > > > > > > > > QEMU uses g_mkdir_with_parents() a lot, e

[PATCH v4 1/7] i386/cpu: add IsDefined flag to smp-cache property

This commit adds IsDefined flag to the object and this helps in avoiding extra checks for every single layer of caches in both x86 and ARM. There is already a discussion on mailing list to have this flag. A patch that enables this flag will follow later. Signed-off-by: Alireza Sanaee --- hw/cor

[RFC PATCH v4 0/7] Specifying cache topology on ARM

Specifying the cache layout in virtual machines is useful for applications and operating systems to fetch accurate information about the cache structure and make appropriate adjustments. Enforcing correct sharing information can lead to better optimizations. This patch enables the specification of

Re: [PATCH 0/2] Change default pointer authentication algorithm on aarch64 to impdef

Hi, On 12/4/24 13:12, Pierrick Bouvier wrote: qemu-system-aarch64 default pointer authentication (QARMA5) is expensive, we spent up to 50% of the emulation time running it (when using TCG). Switching to pauth-impdef=on is often given as a solution to speed up execution. Thus we talked about mak

Re: [PATCH v2 1/2] s390x/pci: add support for guests that request direct mapping

On 12/16/24 12:29 PM, David Hildenbrand wrote: > On 16.12.24 18:26, Matthew Rosato wrote: >> Good point.  Using s390_get_memory_limit() sounds good to me; That will make v3 of this series dependent on the s390x virtio-mem series but sounds like you're sending that sometime this wee

Re: [PATCH v3 24/24] vfio/migration: Multifd device state transfer support - send side

On Thu, Dec 12, 2024 at 11:53:05PM +0100, Maciej S. Szmigiero wrote: > On 12.12.2024 15:54, Avihai Horon wrote: > > > > On 11/12/2024 1:06, Maciej S. Szmigiero wrote: > > > External email: Use caution opening links or attachments > > > > > > > > > On 9.12.2024 10:28, Avihai Horon wrote: > > > >

Re: [PATCH 0/9] migration: Drop/unexport migration_is_device() and migration_is_active()

Hello Joao, On 12/16/24 16:37, Joao Martins wrote: On 16/12/2024 14:45, Avihai Horon wrote: On 16/12/2024 14:00, Joao Martins wrote: On 16/12/2024 09:46, Avihai Horon wrote: I also have a much smaller series for that sort of unblockage that I can give you a pointer. Yes, if you have it at ha

Re: [PATCH] qmp: update vhost-user protocol feature maps

On 12/16/24 12:09 PM, Laurent Vivier wrote: Add VHOST_USER_PROTOCOL_F_SHARED_OBJECT and VHOST_USER_PROTOCOL_F_DEVICE_STATE protocol feature maps to the virtio introspection. Cc: jonah.pal...@oracle.com Fixes: 160947666276 ("vhost-user: add shared_object msg") Cc: aest...@redhat.com Fixes: cda

Re: [PATCH v2 1/2] s390x/pci: add support for guests that request direct mapping

On 16.12.24 18:26, Matthew Rosato wrote: Good point.  Using s390_get_memory_limit() sounds good to me; That will make v3 of this series dependent on the s390x virtio-mem series but sounds like you're sending that sometime this week anyway. If my testing is good and there are no further comm

Re: [PATCH 1/3] osdep: Add qemu_mkdir_with_parents()

On Mon, Dec 16, 2024 at 7:12 PM Peter Xu wrote: > On Mon, Dec 16, 2024 at 04:56:33PM +, Peter Maydell wrote: > > On Mon, 16 Dec 2024 at 16:14, Peter Xu wrote: > > > > > > QEMU uses g_mkdir_with_parents() a lot, especially in the case where > the > > > failure case is ignored so an abort is e

Re: [PATCH v2 1/2] s390x/pci: add support for guests that request direct mapping

>> Good point.  Using s390_get_memory_limit() sounds good to me; That will make >> v3 of this series dependent on the s390x virtio-mem series but sounds like >> you're sending that sometime this week anyway. > > If my testing is good and there are no further comments, I'll queue it > directly

Re: [PATCH 2/3] tests: Use qemu_mkdir_with_parents() for all test code

Peter Xu writes: > Coverity isn't happy on the QEMU test cases where g_mkdir_with_parents() is > used without checking retvals. Use qemu_mkdir_with_parents() to fix them. > > Resolves: Coverity CID 1568381 > Resolves: Coverity CID 1568378 > Signed-off-by: Peter Xu Reviewed-by: Alex Bennée --

Re: [PATCH 3/3] tests/migration: Drop arch_[source|target]

Peter Xu writes: > Coverity complained about them. These two variables are never used now > after commit 832c732c5d ("migration-test: Create arch_opts"), and/or commit > 34cc54fb35 ("tests/qtest/migration-test: Use custom asm bios for ppc64"). > > Resolves: Coverity CID 1568379 > Resolves: Coveri

Re: [PATCH 1/3] osdep: Add qemu_mkdir_with_parents()

Peter Xu writes: > QEMU uses g_mkdir_with_parents() a lot, especially in the case where the > failure case is ignored so an abort is expected when happened. > > Provide a helper qemu_mkdir_with_parents() to do that, and use it in the > two cases in qga/. To be used in more places later. > > Sign

Re: [PATCH 1/3] osdep: Add qemu_mkdir_with_parents()

On Mon, Dec 16, 2024 at 04:56:33PM +, Peter Maydell wrote: > On Mon, 16 Dec 2024 at 16:14, Peter Xu wrote: > > > > QEMU uses g_mkdir_with_parents() a lot, especially in the case where the > > failure case is ignored so an abort is expected when happened. > > > > Provide a helper qemu_mkdir_wit

[PATCH] qmp: update vhost-user protocol feature maps

Add VHOST_USER_PROTOCOL_F_SHARED_OBJECT and VHOST_USER_PROTOCOL_F_DEVICE_STATE protocol feature maps to the virtio introspection. Cc: jonah.pal...@oracle.com Fixes: 160947666276 ("vhost-user: add shared_object msg") Cc: aest...@redhat.com Fixes: cda83adc62b6 ("vhost-user: Interface for migration s

Re: [PATCH RFCv2 00/20] kvm/arm: Introduce a customizable aarch64 KVM host model

On Mon, Dec 16 2024, Cornelia Huck wrote: > On Thu, Dec 12 2024, Eric Auger wrote: > >> Connie, >> >> On 12/6/24 12:21, Cornelia Huck wrote: >>> Whether it make sense to continue with the approach of tweaking values in >>> the ID registers in general. If we want to be able to migrate between cpu

Re: [PATCH 1/3] osdep: Add qemu_mkdir_with_parents()

On Mon, 16 Dec 2024 at 16:14, Peter Xu wrote: > > QEMU uses g_mkdir_with_parents() a lot, especially in the case where the > failure case is ignored so an abort is expected when happened. > > Provide a helper qemu_mkdir_with_parents() to do that, and use it in the > two cases in qga/. To be used

Re: [PATCH v2 1/2] s390x/pci: add support for guests that request direct mapping

On 16.12.24 17:53, Matthew Rosato wrote: +{ +    MachineState *ms = MACHINE(qdev_get_machine()); + +    /* + * For direct-mapping we must map the entire guest address space.  Rather + * than using an iommu, create a memory region alias that maps GPA X to + * iova X + SDMA.  VFIO wil

Re: [PATCH v2 1/2] s390x/pci: add support for guests that request direct mapping

>>> +{ >>> +    MachineState *ms = MACHINE(qdev_get_machine()); >>> + >>> +    /* >>> + * For direct-mapping we must map the entire guest address space.  >>> Rather >>> + * than using an iommu, create a memory region alias that maps GPA X to >>> + * iova X + SDMA.  VFIO will handle p

Re: [PATCH RFCv2 00/20] kvm/arm: Introduce a customizable aarch64 KVM host model

On Thu, Dec 12 2024, Eric Auger wrote: > Connie, > > On 12/6/24 12:21, Cornelia Huck wrote: >> Whether it make sense to continue with the approach of tweaking values in >> the ID registers in general. If we want to be able to migrate between cpus >> that do not differ wildly, we'll encounter diff

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