Il 02/09/2014 00:56, Peter Crosthwaite ha scritto:
> On Tue, Sep 2, 2014 at 3:43 AM, Peter Maydell
> wrote:
>> On 26 August 2014 01:58, Peter Crosthwaite
>> wrote:
>>> It's not really a common object
>>
>> In what sense isn't it a common object? It's only
>> compiled once, rather than per-targe
this memory leak is introduced by the original
commit 3158a3482b0093e41f2b2596fba50774ea31ae08
valgrind out showing:
==14553== 21,459 (72 direct, 21,387 indirect) bytes in 1 blocks are definitely
lost in loss record 8,055 of 8,082
==14553==at 0x4A06BC3: calloc (vg_replace_malloc.c:618)
On (Mon) 01 Sep 2014 [20:52:46], Zhang Haoyu wrote:
> >>> Hi, all
> >>>
> >>> I start a VM with virtio-serial (default ports number: 31), and found
> >>> that virtio-blk performance degradation happened, about 25%, this problem
> >>> can be reproduced 100%.
> >>> without virtio-serial:
> >>> 4k-
On 09/02/2014 03:56 PM, Aravinda Prasad wrote:
>
>
> On Tuesday 02 September 2014 11:19 AM, Alexey Kardashevskiy wrote:
>> On 09/02/2014 03:25 PM, Aravinda Prasad wrote:
>>>
>>>
>>> On Tuesday 02 September 2014 09:39 AM, Alexey Kardashevskiy wrote:
On 09/01/2014 09:23 PM, Aravinda Prasad wro
affects me as well.
versions:
qemu-system-common 2.0.0+dfsg-2ubuntu1.2 (current as of 14.04)
Mac OS X: 10.9.4, xnu-2422.110.17, Screen Sharing 1.4 (481.1)
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.
On Tuesday 02 September 2014 11:19 AM, Alexey Kardashevskiy wrote:
> On 09/02/2014 03:25 PM, Aravinda Prasad wrote:
>>
>>
>> On Tuesday 02 September 2014 09:39 AM, Alexey Kardashevskiy wrote:
>>> On 09/01/2014 09:23 PM, Aravinda Prasad wrote:
On Monday 01 September 2014 01:16 PM, A
On 09/02/2014 03:25 PM, Aravinda Prasad wrote:
>
>
> On Tuesday 02 September 2014 09:39 AM, Alexey Kardashevskiy wrote:
>> On 09/01/2014 09:23 PM, Aravinda Prasad wrote:
>>>
>>>
>>> On Monday 01 September 2014 01:16 PM, Alexey Kardashevskiy wrote:
On 08/25/2014 11:45 PM, Aravinda Prasad wrot
On Tuesday 02 September 2014 09:39 AM, Alexey Kardashevskiy wrote:
> On 09/01/2014 09:23 PM, Aravinda Prasad wrote:
>>
>>
>> On Monday 01 September 2014 01:16 PM, Alexey Kardashevskiy wrote:
>>> On 08/25/2014 11:45 PM, Aravinda Prasad wrote:
Extend rtas-blob to accommodate error log. Error l
On 09/01/2014 09:23 PM, Aravinda Prasad wrote:
>
>
> On Monday 01 September 2014 01:16 PM, Alexey Kardashevskiy wrote:
>> On 08/25/2014 11:45 PM, Aravinda Prasad wrote:
>>> Extend rtas-blob to accommodate error log. Error log
>>> structure is saved in rtas space upon a machine check
>>> exception
Dataplane doesn't depend on linux-aio any more, so we don't need the
compiling condition now.
Configure options are kept but just print a message.
Signed-off-by: Fam Zheng
---
configure | 21 ++---
hw/block/Makefile.objs | 2 +-
hw/block/virtio-blk.
This header has no further dependencies. It only has some stable data
types and primitive functions, so we can copy it to include/hw/virtio in
order to allow vring code (and its user virtio-blk dataplane) to be
built unconditionally, even for cross compiling.
Suggested-by: Paolo Bonzini
Signed-of
v2: Import virtio_vring.h.
Fam Zheng (2):
virtio: Import virtio_vring.h
block: Always compile virtio-blk dataplane
configure | 21 +
hw/block/Makefile.objs | 2 +-
hw/block/virtio-blk.c | 20 +
hw/net/vhost_net.c
On Mon, 09/01 16:11, Stefan Hajnoczi wrote:
> The src_cache option (-T) specifies the cache mode for backing files.
> It applies both the image's old backing file as well as the new backing
> file:
>
> ret = bdrv_open(&bs_old_backing, backing_name, NULL, NULL, src_flags,
> old_
On Mon, 09/01 16:11, Stefan Hajnoczi wrote:
> The source cache option takes the same values as the cache option. The
> documentation reads a little strange because it starts with "In contrast
> the src_cache option ...". The fact that this is comparing with the
> previous documented option (the '
On Tue, Sep 2, 2014 at 2:29 AM, Peter Maydell wrote:
> On 24 August 2014 01:13, Alistair Francis wrote:
>> This patch adds the Netduino Plus 2 GPIO controller to QEMU.
>> This allows reading and writing to the Netduino GPIO pins.
>
> Are you sure this isn't actually the GPIO module in the STM32F4
> From: peter.crosthwa...@petalogix.com
> [mailto:peter.crosthwa...@petalogix.com] On Behalf Of Peter Crosthwaite
> Sent: Tuesday, September 02, 2014 6:51 AM
> >> On Mon, Sep 1, 2014 at 3:50 PM, wrote:
> >> > From: Gonglei
> >> >
> >> > At present, this function doesn't have partial cleanup impl
On Tue, Sep 2, 2014 at 2:30 AM, Peter Maydell wrote:
> On 24 August 2014 03:09, Peter Crosthwaite
> wrote:
>> If you make your registers an array, you can index the with the offset
>> and remove the repeated s->foo return logic. You can also use a single
>> memset to do all the 0 resets.
>
> Hmm
On Mon, Sep 1, 2014 at 10:44 PM, Peter Maydell wrote:
> On 1 September 2014 13:34, Alistair Francis wrote:
>> On Sun, Aug 24, 2014 at 11:20 PM, Peter Crosthwaite
>> wrote:
>>> Most of this function is the same as armv7m_init(). This seems the be
>>> the main difference - the SRAM and FLASH setup
On Tue, Sep 2, 2014 at 2:39 AM, Peter Maydell wrote:
> On 24 August 2014 01:13, Alistair Francis wrote:
>> The Netduino Plus 2 has a Cortex-M4 in it, while this model uses
>> a Cortex-M3 as that is supported by QEMU. This means that the code
>> that runs on the Netduino Plus 2 is recompiled for a
On Mon, 09/01 13:07, Peter Maydell wrote:
> On 1 September 2014 13:04, Paolo Bonzini wrote:
> > Il 01/09/2014 13:46, Peter Maydell ha scritto:
> >> So we could fix this by not compiling empty files...
> >
> > Easy for int128, even easier for getauxval (it's not a fastpath, so we
> > can move the "
On 2 September 2014 00:22, Peter Crosthwaite
wrote:
> On Tue, Sep 2, 2014 at 9:12 AM, Peter Maydell
> wrote:
>> Actually, I'm confused now where the reset ordering issue comes
>> in, because (ignoring realize, which will call reset) as far as I
>> could make out the only place that the ARM CPU r
On Tue, Sep 2, 2014 at 9:12 AM, Peter Maydell wrote:
> On 2 September 2014 00:06, Peter Crosthwaite
> wrote:
>> On Tue, Sep 2, 2014 at 8:56 AM, Peter Maydell
>> wrote:
>>> Surely there's already a reset order dependency, because
>>> both the arm-boot reset hook and CPU reset proper want
>>> to
On 2 September 2014 00:06, Peter Crosthwaite
wrote:
> On Tue, Sep 2, 2014 at 8:56 AM, Peter Maydell
> wrote:
>> Surely there's already a reset order dependency, because
>> both the arm-boot reset hook and CPU reset proper want
>> to initialise the PC ?
> Yes. I had a PC specific solution to thi
On Tue, Sep 2, 2014 at 8:56 AM, Peter Maydell wrote:
> On 1 September 2014 23:41, Peter Crosthwaite
> wrote:
>> On Tue, Sep 2, 2014 at 3:15 AM, Peter Maydell
>> wrote:
>>> On 19 August 2014 01:54, Peter Crosthwaite
>>> wrote:
Linux should boot in EL2 or EL1. If in EL3, jump down before h
On 1 September 2014 23:41, Peter Crosthwaite
wrote:
> On Tue, Sep 2, 2014 at 3:15 AM, Peter Maydell
> wrote:
>> On 19 August 2014 01:54, Peter Crosthwaite
>> wrote:
>>> Linux should boot in EL2 or EL1. If in EL3, jump down before handing
>>> off to Linux.
>>>
>>> Signed-off-by: Peter Crosthwai
On Tue, Sep 2, 2014 at 3:43 AM, Peter Maydell wrote:
> On 26 August 2014 01:58, Peter Crosthwaite
> wrote:
>> It's not really a common object
>
> In what sense isn't it a common object? It's only
> compiled once, rather than per-target. We should
> avoid moving object files from compiled-once
>
On Mon, Sep 1, 2014 at 4:17 PM, Gonglei (Arei) wrote:
>
>
>
>
>
>
>
>> -Original Message-
>> From: peter.crosthwa...@petalogix.com
>> [mailto:peter.crosthwa...@petalogix.com] On Behalf Of Peter Crosthwaite
>> Sent: Monday, September 01, 2014 2:08 PM
>> To: Gonglei (Arei)
>> Cc: qemu-devel@
On 01.09.14 12:06, Christian Borntraeger wrote:
> On 29/08/14 15:52, Jens Freimann wrote:
>> Conny, Alex, Christian,
>>
>> here are some patches improving our gdb support.
>>
>> * Patch 1 fixes a bug where the cc was changed accidentally.
>> * Patch 2 adds the gdb feature XML files for s390x
>>
On Tue, Sep 2, 2014 at 3:15 AM, Peter Maydell wrote:
> On 19 August 2014 01:54, Peter Crosthwaite
> wrote:
>> Linux should boot in EL2 or EL1. If in EL3, jump down before handing
>> off to Linux.
>>
>> Signed-off-by: Peter Crosthwaite
>
> The other way we could do this would be to have the
> do
On 29.08.14 15:52, Jens Freimann wrote:
> From: David Hildenbrand
>
> When reading/writing the psw mask, the condition code may only be touched if
> running on tcg.
Why? Shouldn't we be able to set CC from gdb as well?
Alex
On Tue, Sep 2, 2014 at 3:54 AM, Paolo Bonzini wrote:
> Il 01/09/2014 19:43, Peter Maydell ha scritto:
>> On 26 August 2014 01:58, Peter Crosthwaite
>> wrote:
>>> It's not really a common object
>>
>> In what sense isn't it a common object? It's only
>> compiled once, rather than per-target. We s
El Mon, 1 Sep 2014 18:27:34 +0200
Marc Marí escribió:
> El Mon, 1 Sep 2014 18:09:09 +0200
> Greg Kurz escribió:
> > On Mon, 1 Sep 2014 12:07:58 +0200
> > Marc Marí wrote:
> > > Reviewed-by: Stefan Hajnoczi
> > > Signed-off-by: Marc Marí
> > > ---
> >
> > Hi Marc,
> >
> > I gave it a try for
Hi,
It seems that interrupts are not disabled by CPSIE instruction. The
current code apparently ignores (daif&PSTATE_I) for Cortex-M. The patch
below is basically identical to the patch that was attached to the
following message:
https://lists.gnu.org/archive/html/qemu-devel/2011-06/msg0051
On Tue, Aug 26, 2014 at 04:06:17PM +0800, zhanghailiang wrote:
> For all NICs(except virtio-net) emulated by qemu,
> Such as e1000, rtl8139, pcnet and ne2k_pci,
> Qemu can still receive packets when VM is not running.
>
> If this happened in *migration's* last PAUSE VM stage, but
> before the end
On Mon, 2014-09-01 at 12:39 +0300, Michael S. Tsirkin wrote:
> On Fri, Aug 29, 2014 at 09:17:07AM +0200, Knut Omang wrote:
> > This patch provides the building blocks for creating an SR/IOV
> > PCIe Extended Capability header and creating and removing
> > SR/IOV Virtual Functions.
> >
> > Signed-
On 1 September 2014 19:01, Ard Biesheuvel wrote:
> On 1 September 2014 13:55, Ard Biesheuvel wrote:
>> @@ -3599,6 +3609,28 @@ void arm_cpu_do_interrupt(CPUState *cs)
>> mask = CPSR_A | CPSR_I | CPSR_F;
>> offset = 4;
>> break;
>> +case EXCP_HVC:
>> +if (arm_
On 1 September 2014 19:04, Ard Biesheuvel wrote:
> On 1 September 2014 19:50, Peter Maydell wrote:
>> Also true; I thought about mentioning those but decided they
>> were orthogonal. We should probably pull together a list
>> of all the UEFI related QEMU patches and required work.
> By orthogona
Thank you. Peter. sorry for forgetting about the patch for so long.
Xin
On Mon, Sep 1, 2014 at 1:19 PM, Peter Maydell
wrote:
> On 14 August 2014 01:09, Xin Tong wrote:
> > someone please reviews the patch when have time.
>
> Thanks; reviewed and applied to master. Apologies for
> the length o
On 14 August 2014 01:09, Xin Tong wrote:
> someone please reviews the patch when have time.
Thanks; reviewed and applied to master. Apologies for
the length of time this one's taken to get in.
-- PMM
On 19 August 2014 14:16, Markus Armbruster wrote:
> Peter Maydell writes:
>
>> Convert the udp char backend to the new style QAPI framework.
>>
>> Signed-off-by: Peter Maydell
>> ---
>> qemu-char.c | 69
>> +++--
>> 1 file changed, 54 ins
On 1 September 2014 19:50, Peter Maydell wrote:
> On 1 September 2014 18:46, Ard Biesheuvel wrote:
>> On 1 September 2014 19:36, Peter Maydell wrote:
>>> On 26 August 2014 16:31, Ard Biesheuvel wrote:
If we are running the 'virt' machine, we may have a device tree blob but no
kernel t
On 1 September 2014 13:55, Ard Biesheuvel wrote:
> From: Rob Herring
>
> Add the infrastructure to handle and emulate hvc and smc exceptions.
> This will enable emulation of things such as PSCI calls. This commit
> does not change the behavior and will exit with unknown exception.
>
> Signed-off-
Il 01/09/2014 19:43, Peter Maydell ha scritto:
> On 26 August 2014 01:58, Peter Crosthwaite
> wrote:
>> It's not really a common object
>
> In what sense isn't it a common object? It's only
> compiled once, rather than per-target. We should
> avoid moving object files from compiled-once
> to com
On 1 September 2014 18:46, Ard Biesheuvel wrote:
> On 1 September 2014 19:36, Peter Maydell wrote:
>> On 26 August 2014 16:31, Ard Biesheuvel wrote:
>>> If we are running the 'virt' machine, we may have a device tree blob but no
>>> kernel to supply it to if no -kernel option was passed. In that
On 1 September 2014 19:36, Peter Maydell wrote:
> On 26 August 2014 16:31, Ard Biesheuvel wrote:
>> If we are running the 'virt' machine, we may have a device tree blob but no
>> kernel to supply it to if no -kernel option was passed. In that case, copy it
>> to the base of DRAM where it can be p
On 26 August 2014 01:58, Peter Crosthwaite wrote:
> It's not really a common object
In what sense isn't it a common object? It's only
compiled once, rather than per-target. We should
avoid moving object files from compiled-once
to compiled-per-target if we can...
thanks
-- PMM
> Am 01.09.2014 um 18:31 schrieb Eric Auger :
>
>> On 08/13/2014 09:59 PM, Alex Williamson wrote:
>>> On Tue, 2014-08-12 at 08:09 +0200, Eric Auger wrote:
On 08/11/2014 09:25 PM, Alex Williamson wrote:
> On Sat, 2014-08-09 at 15:25 +0100, Eric Auger wrote:
> diff --git a/include/hw/
On 26 August 2014 01:56, Peter Crosthwaite wrote:
>
> Hi All,
>
> This series sets up CPUs with configurable address spaces. This follows
> on from Edgars original work and moves towards removal of
> address_space_memory and support for arbitrary memory
> heirachies/layouts.
>
> Fuller context in
On 26 August 2014 16:31, Ard Biesheuvel wrote:
> If we are running the 'virt' machine, we may have a device tree blob but no
> kernel to supply it to if no -kernel option was passed. In that case, copy it
> to the base of DRAM where it can be picked up by a bootloader executing from
> NOR flash.
>
On 19 August 2014 01:54, Peter Crosthwaite wrote:
> Linux should boot in EL2 or EL1. If in EL3, jump down before handing
> off to Linux.
>
> Signed-off-by: Peter Crosthwaite
The other way we could do this would be to have the
do_cpu_reset() hook put the CPU into EL2 or EL1 before
starting the bo
On 28 August 2014 12:18, Pavel Dovgalyuk wrote:
> VMState added by this patch preserves correct
> loading of the integratorcp device state.
>
> Signed-off-by: Pavel Dovgalyuk
> ---
> hw/arm/integratorcp.c | 38 +-
> 1 files changed, 37 insertions(+), 1 delet
On 28 August 2014 12:19, Pavel Dovgalyuk wrote:
> This patch adds timer which uses virtual clock to the VMState.
> Such timers are required for saving because virtual clock is the part
> of the virtual machine state.
>
> Signed-off-by: Pavel Dovgalyuk
> ---
> hw/timer/pl031.c |3 ++-
> 1 fil
On 24 August 2014 01:13, Alistair Francis wrote:
> The Netduino Plus 2 has a Cortex-M4 in it, while this model uses
> a Cortex-M3 as that is supported by QEMU. This means that the code
> that runs on the Netduino Plus 2 is recompiled for a Cortex-M3 with
> out Floating Point or DSP optimisations.
On 1 September 2014 13:44, Peter Maydell wrote:
> Yeah, but it's not really the right design IMHO. We should
> have common armv7m init code for the parts which are
> really "the CPU has all this" (including at least the bitbanding,
> NVIC, memory mapped system registers, reset/ELF file
> loading,
On 08/13/2014 09:59 PM, Alex Williamson wrote:
> On Tue, 2014-08-12 at 08:09 +0200, Eric Auger wrote:
>> On 08/11/2014 09:25 PM, Alex Williamson wrote:
>>> On Sat, 2014-08-09 at 15:25 +0100, Eric Auger wrote:
diff --git a/include/hw/vfio/vfio-common.h b/include/hw/vfio/vfio-common.h
new f
On 24 August 2014 03:09, Peter Crosthwaite wrote:
> If you make your registers an array, you can index the with the offset
> and remove the repeated s->foo return logic. You can also use a single
> memset to do all the 0 resets.
Hmm. I dislike that style personally, especially for devices
like th
On 24 August 2014 01:13, Alistair Francis wrote:
> This patch adds the Netduino Plus 2 GPIO controller to QEMU.
> This allows reading and writing to the Netduino GPIO pins.
Are you sure this isn't actually the GPIO module in the STM32F4xx
SoC ? The datasheets and schematic suggest this isn't a
bo
El Mon, 1 Sep 2014 18:09:09 +0200
Greg Kurz escribió:
> On Mon, 1 Sep 2014 12:07:58 +0200
> Marc Marí wrote:
> > Reviewed-by: Stefan Hajnoczi
> > Signed-off-by: Marc Marí
> > ---
>
> Hi Marc,
>
> I gave it a try for various host/target combinations involving ppc64
> and x86_64. Here is what
Il 03/07/2014 16:33, fred.kon...@greensocs.com ha scritto:
> From: KONRAD Frederic
>
> Hi everybody,
>
> This is the sixth version of this RFC (see the changes below).
>
> Those are the two first patch-set we have been worked on for reverse
> execution.
>
> The first part is fully reviewed ex
On 1 September 2014 14:04, Peter Maydell wrote:
> On 1 September 2014 12:55, Ard Biesheuvel wrote:
>> From: Rob Herring
>>
>> Add support for handling PSCI calls in system emulation. Both version
>> 0.1 and 0.2 of the PSCI spec are supported. Platforms can enable support
>> by setting "psci-meth
On Mon, 1 Sep 2014 12:07:58 +0200
Marc Marí wrote:
> Reviewed-by: Stefan Hajnoczi
> Signed-off-by: Marc Marí
> ---
Hi Marc,
I gave it a try for various host/target combinations involving ppc64 and
x86_64. Here is what I get:
| x86_64 |ppc64| TARGET
++-
On Mon, 09/01 13:11, Benoît Canet wrote:
> The Monday 01 Sep 2014 à 18:52:48 (+0800), Jun Li wrote :
> > When every item of refcount block is NULL, free refcount block and reset the
> > corresponding item of refcount table with NULL.
> >
> > Signed-off-by: Jun Li
> > ---
> >
> > The v2 do follow
On 1 September 2014 15:50, Peter Maydell wrote:
> On 1 September 2014 12:55, Ard Biesheuvel wrote:
>> Currently, booting multiple cores under TCG is unstable, so the restriction
>> to 1 cpu in TCG mode is retained for now. However, PSCI reset and poweroff
>> are
>> supported.
>
> This is worryin
On 29 August 2014 14:03, Ard Biesheuvel wrote:
> Add a property "linux,stdout-path" to the /chosen DT node and make
> it point to the emulated UART. This allows users such as the Linux
> kernel to produce console output without the need to pass console=
> or earlycon=pl011,0x... command line argum
On Sat, Aug 23, 2014 at 12:19:05PM +0200, Laszlo Ersek wrote:
> Libvirt is growing support for x86_64 OVMF guests:
>
> http://www.redhat.com/archives/libvir-list/2014-August/msg01045.html
>
> An important feature of such guests is the persistent store for
> non-volatile UEFI variables. This is im
On Mon, Sep 01, 2014 at 07:55:22AM -, senya wrote:
> I'm trying to reanimate github.com/jagane/qemu-kvm-livebackup
> there is a separate thread which connects with client through socket and
> sends disk blocks to it.
Regarding your original question about threads: it is possible to do
block I
On 09/01/14 03:07, Paolo Bonzini wrote:
> Il 01/09/2014 07:05, Rob Landley ha scritto:
>> If you grab http://landley.net/aboriginal/bin/qemu-system-sh4.tar.bz2
>> extract it and ./run-emulator.sh (which is a fairly straightforward
>> qemu-system-sh4 invocation on the included kernel image and squas
On 09/01/14 00:05, Rob Landley wrote:
> If you grab http://landley.net/aboriginal/bin/qemu-system-sh4.tar.bz2
> extract it and ./run-emulator.sh (which is a fairly straightforward
> qemu-system-sh4 invocation on the included kernel image and squashfs
> root filesystem), older qemu versions would ru
On Fri, Aug 29, 2014 at 05:59:37PM +0200, Paolo Bonzini wrote:
> Il 29/08/2014 17:49, Stefan Hajnoczi ha scritto:
> > for (i = 0; i < 8; ++i) {
> > quad.bytes[i] = qpci_io_readb(dev->pdev, addr + i);
> > }
> > if (qtest_big_endian() != qtest_host_endian()) {
> > quad.u64 = bswap64(quad.u64)
On 17.06.2014 13:46, Paolo Bonzini wrote:
Il 17/06/2014 13:37, Peter Lieven ha scritto:
On 17.06.2014 13:15, Paolo Bonzini wrote:
Il 17/06/2014 08:14, Peter Lieven ha scritto:
BTW, while debugging a case with a bigger storage supplier I found
that open-iscsi seems to do exactly this undeter
On Fri, Aug 29, 2014 at 06:47:01PM +0200, Benoît Canet wrote:
> The Friday 29 Aug 2014 à 17:29:37 (+0100), Stefan Hajnoczi wrote :
> > Cc: Benoit Canet
> > Cc: Eric Blake
> > Cc: Kevin Wolf
> > Cc: Stefan Hajnoczi
> > Signed-off-by: Liu Yuan
> > Signed-off-by: Stefan Hajnoczi
>
> Here again
On Mon, Sep 01, 2014 at 01:35:21PM +0800, Liu Yuan wrote:
> Cc: Kevin Wolf
> Cc: Stefan Hajnoczi
> Signed-off-by: Liu Yuan
> ---
> block.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Thanks, applied to my block tree:
https://github.com/stefanha/qemu/commits/block
Stefan
pgpRbGkd
The src_cache option (-T) specifies the cache mode for backing files.
It applies both the image's old backing file as well as the new backing
file:
ret = bdrv_open(&bs_old_backing, backing_name, NULL, NULL, src_flags,
old_backing_drv, &local_err);
if (ret) {
...
}
i
The source cache option takes the same values as the cache option. The
documentation reads a little strange because it starts with "In contrast
the src_cache option ...". The fact that this is comparing with the
previous documented option (the 'cache' option) is implicit. Readers
may be confused
These patches clarify and fix the documentation for the recent qemu-img
src_mode (-T) option.
Stefan Hajnoczi (2):
qemu-img: clarify src_cache option documentation
qemu-img: fix rebase src_cache option documentation
qemu-img.c| 3 ++-
qemu-img.texi | 7 ---
2 files changed, 6 inserti
On 1 September 2014 12:59, Bastian Koppelmann
wrote:
> Hi,
>
> my aim is to add Infineon's TriCore architecture to QEMU. This series of
> patches adds the target stubs, a basic testboard and a softmmu for system
> mode emulation. Furthermore it adds all the 16 bit long instructions of the
> arc
On Wed, Aug 20, 2014 at 02:27:06PM +, Benoît Canet wrote:
> On Wed, Aug 13, 2014 at 04:23:51PM +0200, Benoît Canet wrote:
> > Hi,
> >
> > Here is my current wip on the throttle group support.
> >
> > For the user interface I implemented Stefanha's idea proposed in Stuttgart.
> >
> > For the
On Mon, 1 Sep 2014 15:19:28 +0100
"Richard W.M. Jones" wrote:
> A test case, attached.
>
> Note that you have to look at the output of the final qemu-img info
> command. In the case where it goes wrong, the 'backing file:' and
> 'backing file format:' lines disappear completely. In the case wh
> # Write stuff to the overlay.
> guestfish < add-drive overlay.qcow2 format:qcow2 cachemode:unsafe
To head off any suggestions, removing cachemode:unsafe doesn't fix it.
Rich.
--
Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones
Read my programming and virtualizat
A test case, attached.
Note that you have to look at the output of the final qemu-img info
command. In the case where it goes wrong, the 'backing file:' and
'backing file format:' lines disappear completely. In the case where
the bug is not reproduced, these lines are still present.
It's 100% r
On 01/09/14 16:03, Christian Borntraeger wrote:
> On 01/09/14 15:29, Paolo Bonzini wrote:
>> Il 01/09/2014 15:22, Christian Borntraeger ha scritto:
> If virtio-blk and virtio-serial share an IRQ, the guest operating system
> has to check each virtqueue for activity. Maybe there is some
>>
On 01/09/14 15:29, Paolo Bonzini wrote:
> Il 01/09/2014 15:22, Christian Borntraeger ha scritto:
If virtio-blk and virtio-serial share an IRQ, the guest operating system
has to check each virtqueue for activity. Maybe there is some inefficiency
doing that.
AFAIK virtio-serial
On 1 September 2014 12:55, Ard Biesheuvel wrote:
> Currently, booting multiple cores under TCG is unstable, so the restriction
> to 1 cpu in TCG mode is retained for now. However, PSCI reset and poweroff are
> supported.
This is worrying, incidentally. What's the instability? Last time I
tried Ro
It seems like I only need to put all my bdrv_read's into one co-routine
and start it
--
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https://bugs.launchpad.net/bugs/1362635
Title:
bdrv_read co-routine re-entered recursively
Status
:15 +0100)
>
> are available in the git repository at:
>
>
> git://github.com/borntraeger/qemu.git tags/kvm-s390-20140901
>
> for you to fetch changes up to 218829db2303e3d61f901f1d12fd4f7cd03644e1:
>
>
The Monday 01 Sep 2014 à 13:41:01 (+0200), Markus Armbruster wrote :
> Benoît Canet writes:
>
> > The Monday 01 Sep 2014 à 11:52:00 (+0200), Markus Armbruster wrote :
> >> Cc'ing libvirt following Stefan's lead.
> >>
> >> Benoît Canet writes:
> >>
> >> > Hi,
> >> >
> >> > I collected some item
From: Gonglei
We may use it check type of qbus's parent.
Signed-off-by: Gonglei
---
hw/core/qdev.c | 9 +
include/hw/qdev-core.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/hw/core/qdev.c b/hw/core/qdev.c
index da1ba48..e42d313 100644
--- a/hw/core/qdev.c
+++ b/hw/co
From: Gonglei
In QEMU, ARI Forwarding is enabled defualt at emulation of PCIe
ports. ARI Forwarding enable setting at firmware/OS Control handoff.
If the bit is Set when a non-ARI Device is present, the non-ARI
Device can respond to Configuration Space accesses under what it
interprets as being d
From: Gonglei
Root ports and downstream ports of switches are the hot
pluggable ports in a PCI Express hierarchy.
PCI Express supports chip-to-chip interconnect, a PCIe link can
only connect one pci device/Switch/EndPoint or PCI-bridge.
7.3. Configuration Transaction Rules (PCI Express specifica
From: Gonglei
The below functions is not allocation funcitons, but
find helper function. The only allocation function is
pcie_add_capability(), but its argument names is not the
same with the comments. So remove this comments which
make people confused.
Signed-off-by: Gonglei
---
hw/pci/pcie.c
Il 01/09/2014 15:22, Christian Borntraeger ha scritto:
> > > If virtio-blk and virtio-serial share an IRQ, the guest operating system
> > > has to check each virtqueue for activity. Maybe there is some
> > > inefficiency doing that.
> > > AFAIK virtio-serial registers 64 virtqueues (on 31 ports +
On 01/09/14 15:12, Paolo Bonzini wrote:
> Il 01/09/2014 15:09, Christian Borntraeger ha scritto:
>> This is just wild guessing:
>> If virtio-blk and virtio-serial share an IRQ, the guest operating system has
>> to check each virtqueue for activity. Maybe there is some inefficiency doing
>> that.
Il 01/09/2014 15:09, Christian Borntraeger ha scritto:
> This is just wild guessing:
> If virtio-blk and virtio-serial share an IRQ, the guest operating system has
> to check each virtqueue for activity. Maybe there is some inefficiency doing
> that.
> AFAIK virtio-serial registers 64 virtqueues
On 01/09/14 14:52, Zhang Haoyu wrote:
Hi, all
I start a VM with virtio-serial (default ports number: 31), and found that
virtio-blk performance degradation happened, about 25%, this problem can
be reproduced 100%.
without virtio-serial:
4k-read-random 1186 IOPS
Hi Peter,
On 09/01/2014 01:48 PM, Peter Maydell wrote:
On 1 September 2014 12:59, Bastian Koppelmann
wrote:
Add basic board to allow systemmode emulation
Signed-off-by: Bastian Koppelmann
---
v6 -> v7:
- TRICORECPU -> TriCoreCPU.
- CPUTRICOREState -> CPUTriCoreState.
- tricore
>> >> Hi, all
>> >>
>> >> I start a VM with virtio-serial (default ports number: 31), and found
>> >> that virtio-blk performance degradation happened, about 25%, this problem
>> >> can be reproduced 100%.
>> >> without virtio-serial:
>> >> 4k-read-random 1186 IOPS
>> >> with virtio-serial:
>> >
On Mon, Sep 01, 2014 at 02:41:02PM +0200, Greg Kurz wrote:
> On Sat, 30 Aug 2014 15:53:13 +0100
> "Richard W.M. Jones" wrote:
> > I can reproduce this easily, although of course the reproducer will
> > involve libguestfs.
> >
> > Rich.
> >
>
> Can you share this reproducer ?
The immediate repr
From: David Hildenbrand
This patch cleanes up two coding style issues (missing whitespaces).
Signed-off-by: David Hildenbrand
Acked-by: Cornelia Huck
Acked-by: Christian Borntraeger
Signed-off-by: Jens Freimann
Signed-off-by: Christian Borntraeger
---
target-s390x/gdbstub.c | 4 ++--
1 fil
From: "Eugene (jno) Dvurechenski"
The block size value may be given "as is" OR as a base value and
a shift count (exponent). So, we have to use calculation to get
the proper number in the code.
The main expression reads as
(blk_cfg.blk_size << blk_cfg.physical_block_exp)
E.g., various c
From: David Hildenbrand
When reading/writing the psw mask, the condition code may only be touched if
running on tcg.
Signed-off-by: David Hildenbrand
Signed-off-by: Jens Freimann
Signed-off-by: Christian Borntraeger
---
target-s390x/gdbstub.c | 14 ++
1 file changed, 10 insertion
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