From: Yevgeny Kliteynik
When supported by the device, SW steering RoCE RC QP that is used to
write/read to/from ICM will be created with force-loopback attribute.
Such QP doesn't require GID index upon creation.
Signed-off-by: Erez Shitrit
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed
From: Yevgeny Kliteynik
When using SW steering, rule insertion rate depends on the RDMA RC QP
performance used for writing to the ICM. During stress this QP is competing
on the HW resources with all the other QPs that are used to send data.
To protect SW steering QP's performance in such cases, w
From: Yevgeny Kliteynik
Query the flex_parser id that's intended for TNL_MPLS
and use an appropriate flex parser for MPLS over UDP/GRE.
Signed-off-by: Muhammad Sammar
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core/steering/dr_cmd.c | 8 ++
...
From: Yevgeny Kliteynik
Enable matching on tunnel geneve TLV option using the flex parser.
Signed-off-by: Muhammad Sammar
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core/steering/dr_cmd.c | 4 +++
.../mellanox/mlx5/core/steering/dr_matcher.c |
From: Yevgeny Kliteynik
Enable matching on tunnel GTP-U and GTP-U first extension
header using dynamic flex parser.
Signed-off-by: Muhammad Sammar
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core/steering/dr_cmd.c | 16 +++
.../mellanox/mlx5/cor
From: Yevgeny Kliteynik
Set the flex parser ID dynamicly for ICMP instead of relying
on hardcoded values.
Signed-off-by: Muhammad Sammar
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core/steering/dr_matcher.c | 12 ++---
.../mellanox/mlx5/core/steerin
From: Yevgeny Kliteynik
Flex parser is a HW parser that can support protocols that are not
natively supported by the HCA, such as Geneve (TLV options) and GTP-U.
There are 8 such parsers, and each of them can be assigned to parse a
specific set of protocols.
This patch adds misc4 match params whi
From: Muhammad Sammar
Remove MPLS specific fields from flex parser 3 layout.
Flex parser can be used for multiple protocols and should
not be hardcoded to a specific type.
Signed-off-by: Muhammad Sammar
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core
From: Yevgeny Kliteynik
Rename the argument to better reflect that the meaning is
not number of records, but wheather or not we should
ring the dorbell.
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../net/ethernet/mellanox/mlx5/core/steering/dr_send.c| 8
1
From: Yevgeny Kliteynik
QP doorbell size is 16 bits.
Fixing sw steering's QP doorbel bitmask, which had 20 bits.
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Roi Dayan
The cmd size is 8K so use kvzalloc().
Signed-off-by: Roi Dayan
Signed-off-by: Saeed Mahameed
---
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c | 4 ++--
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c | 6 +++---
2 files changed, 5 insertions(+), 5 dele
From: Jianbo Liu
mlx5dr_action is a generally used data structure, and there is an
union for different types of actions in it. The size of mlx5dr_action
is about 72 bytes, but for those actions with fewer fields, most of
the allocated memory is wasted.
Remove this union, and mlx5dr_action becomes
From: Jianbo Liu
mlx5dr_action is a generally used data structure, and there is an
union for different types of actions in it. The size of mlx5dr_action
is about 72 bytes, but for those actions with fewer fields, most of
the allocated memory is wasted.
Remove this union, and mlx5dr_action becomes
From: Roi Dayan
The cmd size is 8K so use kvzalloc().
Signed-off-by: Roi Dayan
Signed-off-by: Saeed Mahameed
---
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c | 4 ++--
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c | 6 +++---
2 files changed, 5 insertions(+), 5 dele
From: Yevgeny Kliteynik
Fix 32-bit variable shift wrapping in dr_ste_v1_get_miss_addr.
Fixes: a6098129c781 ("net/mlx5: DR, Add STEv1 setters and getters")
Reported-by: Dan Carpenter
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
Signed-off-by: Saeed Mahameed
---
d
From: Yevgeny Kliteynik
"reforamt" -> "reformat"
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
Signed-off-by: Saeed Mahameed
---
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/m
From: Yevgeny Kliteynik
The field source_eswitch_owner_vhca_id was not consumed
in the same way as in STEv0. Added the missing set.
Fixes: 10b694186410 ("net/mlx5: DR, Add HW STEv1 match logic")
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
From: Yevgeny Kliteynik
Remove the dr_ste_v1_set_rx_decap_l3 function that was
replaced by another function - fixing a rebase error.
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core/steering/dr_ste_v1.c| 18 ---
From: Yevgeny Kliteynik
Fix 32-bit variable shift wrapping in dr_ste_v1_get_miss_addr.
Fixes: a6098129c781 ("net/mlx5: DR, Add STEv1 setters and getters")
Reported-by: Dan Carpenter
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
Signed-off-by: Saeed Mahameed
---
d
From: Yevgeny Kliteynik
If as part of the actions the TTL of the packet is modified, the packet's
checksum needs to be recalculated. Connect-X6DX can handle this csum
recalculation natively. Older devices require this additional recalculation.
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex
Hello:
This series was applied to netdev/net-next.git (refs/heads/master):
On Fri, 29 Jan 2021 18:26:08 -0800 you wrote:
> From: Yevgeny Kliteynik
>
> Fix 32-bit variable shift wrapping in dr_ste_v0_get_miss_addr.
>
> Fixes: 6b93b400aa88 ("net/mlx5: DR, Move STEv0
From: Yevgeny Kliteynik
Fix 32-bit variable shift wrapping in dr_ste_v0_get_miss_addr.
Fixes: 6b93b400aa88 ("net/mlx5: DR, Move STEv0 setters and getters")
Reported-by: Dan Carpenter
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
Signed-off-by: Saeed Mahameed
---
d
From: Yevgeny Kliteynik
Some flex parser protocols are native as part of STEv1.
The check for supported protocols was modified to allow this.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core/steering/dr_matcher.c | 1
From: Yevgeny Kliteynik
Add HW specific modify header fields and logic to STEv1 file.
Since STEv0 and STEv1 modify actions values are different, each
version has its own implementation.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox
From: Yevgeny Kliteynik
In these cases we need to update only the ctrl area of the STE.
So it is better to write only the control 32B and avoid copying
the unneeded reduced 48B (control 32B + tag 16B).
Signed-off-by: Erez Shitrit
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Sig
From: Yevgeny Kliteynik
Add HW specific setter and getters to STEv1 file.
Since STEv0 and STEv1 format are different, each version
should implemented different setters and getters.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5
From: Yevgeny Kliteynik
Allow sw_owner_v2 based on sw_format_version.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core/steering/dr_cmd.c| 17 +++--
.../mellanox/mlx5/core/steering/dr_domain.c | 17 +++
From: Yevgeny Kliteynik
Add mlx5_ifc_dr_ste_v1.h - a new header with HW specific
STE structs for version 1.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mlx5/core/steering/mlx5_ifc_dr_ste_v1.h | 273 ++
1 file changed, 27
From: Yevgeny Kliteynik
STEv0 format and STEv1 HW format are different, each has a
different order:
STEv0: CTRL 32B, TAG 16B, BITMASK 16B
STEv1: CTRL 32B, BITMASK 16B, TAG 16B
To make this transparent to upper layers we introduce a
new ste_ctx function to format the STE prior to writing it.
Sig
From: Yevgeny Kliteynik
Add HW specific action apply logic to STEv1.
Since STEv0 and STEv1 actions format is different, each
version has its implementation.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core/steering/dr_ste_v1
From: Yevgeny Kliteynik
Add STEv1 match logic to a new file.
This file will be used for HW specific STEv1.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../net/ethernet/mellanox/mlx5/core/Makefile | 2 +-
.../mellanox/mlx5/core/steering/dr_
From: Yevgeny Kliteynik
Till now the code assumed that need to copy reduced size of the
ste because the rest is the mask part which shouldn't be changed.
This is not true for all types of HW (like STEv1).
Take all 64B from the new STE and write them in the replaced STE place.
This change will mak
From: Yevgeny Kliteynik
Extend the STE context struct with per-device
tx/rx actions.
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Saeed Mahameed
Signed-off-by: Saeed Mahameed
---
.../ethernet/mellanox/mlx5/core/steering/dr_ste.h| 12
1 file changed, 12 insertions(+)
diff -
From: Yevgeny Kliteynik
Extend the STE context struct with per-device modify header actions.
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Saeed Mahameed
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core/steering/dr_ste.h | 23 +++
1 file changed, 23 insertions(+)
From: Yevgeny Kliteynik
Move HW specific modify header fields and logic to STEv0 file
and use the new STE context callbacks.
Since STEv0 and STEv1 modify actions values are different, each
version has its own implementation.
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
Reviewed-by
From: Yevgeny Kliteynik
Use STE tx/rx actions per-device API: move HW specific
action apply logic from dr_ste to STEv0 file - STEv0 and
STEv1 actions format is different, each version should
have its own implementation.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: S
From: Yevgeny Kliteynik
Extend the STE context struct with various per-device
setters and getters.
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Saeed Mahameed
Signed-off-by: Saeed Mahameed
---
.../ethernet/mellanox/mlx5/core/steering/dr_ste.h| 12
1 file changed, 12 inserti
From: Yevgeny Kliteynik
The action apply logic is device specific per STE version,
moving to the STE layer will allow implementing it for
both devices while keeping DR upper layers the same.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Saeed Mahameed
Signed-off-by
From: Yevgeny Kliteynik
Use the new setters and getters API for STEv0: move HW specific setter and
getters from dr_ste to STEv0 file. Since STEv0 and STEv1 format are
different each version should implemented different setters and getters.
Rename remaining static functions w/o mlx5 prefix.
Signe
From: Yevgeny Kliteynik
Merge DR_STE_STE macros for better code reuse, the macro
DR_STE_SET_MASK_V and DR_STE_SET_TAG are merged to avoid
tag and bit_mask function creation which are usually the
same.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Saeed Mahameed
Sign
From: Yevgeny Kliteynik
Reworked ICMP tag builder to better handle ICMP v4/6 fields and avoid unneeded
code duplication and 'if' statements, removed unused macro, changed bitfield
of len 8 to u8.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Saeed Mahameed
Signed-of
From: Yevgeny Kliteynik
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Saeed Mahameed
Signed-off-by: Saeed Mahameed
---
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
b/dr
From: Yevgeny Kliteynik
The lookup types are device specific and should not be
exposed to DR upper layers, matchers/tables.
Each HW STE version should keep them internal.
The lu_type size is updated to support larger lu_types as
required for STEv1.
Signed-off-by: Alex Vesker
Signed-off-by
From: Yevgeny Kliteynik
Check vport_cap only if match on source gvmi is required.
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
Reviewed-by: Saeed Mahameed
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core/steering/dr_ste_v0.c | 25 +++
1 file changed, 1
From: Yevgeny Kliteynik
Move current STE match logic to a seprate file.
This file will be used for HW specific STEv0.
Future patches will add functionality for v1 steering.
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
Reviewed-by: Saeed Mahameed
Signed-off-by: Saeed Mahameed
--
From: Yevgeny Kliteynik
Move some macros from dr_ste.c to header - these macros
will be used by all the format-specific functions.
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Saeed Mahameed
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core/steering/dr_ste.c | 74 ---
From: Yevgeny Kliteynik
Split the STE builders functionality into the common part and
device-specific part. All the device-specific part (with 'v0' in
the function names) is accessed through the STE context structure.
Subsequent patches will have the device-specific logic moved to a
separate fil
From: Yevgeny Kliteynik
Add a struct of device specific callbacks for STE layer below dr_ste.
Each device will implement its HW-specific function, and a comon logic
from the DR code will access these functions through the new ste_ctx API.
More callbacks will follow in the subsequent patches
mlx5_ifc definitions for
Connect-X6DX SW steering, read FW capability to get the current format
version, and check this version when domain is being created.
Fixes: 26d688e33f88 ("net/mlx5: DR, Add Steering entry (STE) utilities")
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saee
From: Muhammad Sammar
This is to allow passing misc4 match param from userspace when
function like ib_flow_matcher_create is called.
Signed-off-by: Muhammad Sammar
Reviewed-by: Alex Vesker
Reviewed-by: Mark Bloch
Signed-off-by: Saeed Mahameed
---
drivers/net/ethernet/mellanox/mlx5/core/stee
From: Yevgeny Kliteynik
When freeing chunks, we want to sync the steering
so that all the "hot" memory will be written to ICM
and all the chunks that are in the hot_list will be
actually destroyed.
When allocating from the pool, we don't have a need
to sync the steering, as we're not freeing anyt
From: Yevgeny Kliteynik
Track buddy's used ICM memory, and free it if all
of the buddy's memory bacame unused.
Do this only for STEs.
MODIFY_ACTION buddies are much smaller, so in case there
is a large amount of modify_header actions, which result
in large amount of MODIFY_ACTION buddies, doing t
From: Yevgeny Kliteynik
Struct mlx5dr_action doesn't use this member
Signed-off-by: Erez Shitrit
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
Signed-off-by: Saeed Mahameed
---
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h | 1 -
1 file changed, 1 deletion(-)
diff
From: Yevgeny Kliteynik
Remove flex parser from the matcher function names since
the matcher should not be aware of such HW specific details.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core/steering/dr_cmd.c | 4 +-
.
From: Yevgeny Kliteynik
We will support multiple STE versions.
The existing naming is not suitable for newer versions.
Removed the HW specific details and renamed with a more
general names.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mell
From: Yevgeny Kliteynik
Track the pool's hot ICM memory when freeing/allocating
chunk, so that when checking if the sync is required, just
check if the pool hot memory has reached the sync threshold.
Signed-off-by: Hamdan Igbaria
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
Revie
From: Yevgeny Kliteynik
Till now in order to manage the ICM memory we used bucket
mechanism, which kept a bucket per specified size (sizes were
between 1 block to 2^21 blocks).
Now changing that with buddy-system mechanism, which gives us much
more flexible way to manage the ICM memory.
Its bigg
From: Yevgeny Kliteynik
Add implementation of SW Steering variation of buddy allocator.
The buddy system for ICM memory uses 2 main data structures:
- Bitmap per order, that keeps the current state of allocated
blocks for this order
- Indicator for the number of available blocks per each order
From: Yevgeny Kliteynik
When freeing chunks, we want to sync the steering
so that all the "hot" memory will be written to ICM
and all the chunks that are in the hot_list will be
actually destroyed.
When allocating from the pool, we don't have a need
to sync the steering, as we're not freeing anyt
From: Yevgeny Kliteynik
Track buddy's used ICM memory, and free it if all
of the buddy's memory bacame unused.
Do this only for STEs.
MODIFY_ACTION buddies are much smaller, so in case there
is a large amount of modify_header actions, which result
in large amount of MODIFY_ACTION buddies, doing t
From: Yevgeny Kliteynik
We will support multiple STE versions.
The existing naming is not suitable for newer versions.
Removed the HW specific details and renamed with a more
general names.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mell
From: Yevgeny Kliteynik
Struct mlx5dr_action doesn't use this member
Signed-off-by: Erez Shitrit
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
Signed-off-by: Saeed Mahameed
---
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h | 1 -
1 file changed, 1 deletion(-)
diff
From: Yevgeny Kliteynik
Till now in order to manage the ICM memory we used bucket
mechanism, which kept a bucket per specified size (sizes were
between 1 block to 2^21 blocks).
Now changing that with buddy-system mechanism, which gives us much
more flexible way to manage the ICM memory.
Its bigg
From: Yevgeny Kliteynik
Track the pool's hot ICM memory when freeing/allocating
chunk, so that when checking if the sync is required, just
check if the pool hot memory has reached the sync threshold.
Signed-off-by: Hamdan Igbaria
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
Revie
From: Yevgeny Kliteynik
Add implementation of SW Steering variation of buddy allocator.
The buddy system for ICM memory uses 2 main data structures:
- Bitmap per order, that keeps the current state of allocated
blocks for this order
- Indicator for the number of available blocks per each order
From: Yevgeny Kliteynik
Remove flex parser from the matcher function names since
the matcher should not be aware of such HW specific details.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core/steering/dr_cmd.c | 4 +-
.
From: "longguang.yue"
Just like for MASQ, inspect the reply packets coming from DR/TUN
real servers and alter the connection's state and timeout
according to the protocol.
It's ipvs's duty to do traffic statistic if packets get hit,
no matter what mode it is.
Sig
On 06-Oct-20 17:47, David Miller wrote:
> From: Yevgeny Kliteynik
> Date: Tue, 6 Oct 2020 16:02:24 +0300
>
>> Buddy allocator allocates blocks of different sizes, so when it
>> scans the bits array, the allocator looks for free *area* of at
>> least the required size.
>> Can't store this info in
From: Yevgeny Kliteynik
Date: Tue, 6 Oct 2020 16:02:24 +0300
> Buddy allocator allocates blocks of different sizes, so when it
> scans the bits array, the allocator looks for free *area* of at
> least the required size.
> Can't store this info in a 'lowest set bit' counter.
If you make it per-or
On 29-Sep-20 23:44, Yevgeny Kliteynik wrote:>
> On 29-Sep-20 00:41, David Miller wrote:
>>
>> From: Yevgeny Kliteynik
>> Date: Mon, 28 Sep 2020 19:58:59 +
>>
>>> By replacing the bits-per-long array with a single counter we loose
>>> this ability to jump faster to the free spot.
>>
>> I don't
From: Yevgeny Kliteynik
When we create a matcher we check that all fields are consumed.
There is no need for this specific check. This keeps the STE
builder functions simple and clean.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox/
From: Yevgeny Kliteynik
Instead of getting the tag in each function, call the builder
directly with the tag. This will allow to use the same function
for building the tag and the bitmask.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellan
From: Hamdan Igbaria
Skip the rule according to flow arrival source, in case of RX and the
source is local port skip and in case of TX and the source is uplink
skip, we get this info according to the flow source hint we get from
upper layers when creating the rule.
This is needed because for exam
From: Yevgeny Kliteynik
Mask validity for ste builders is checked by mlx5dr_ste_build_pre_check
during matcher creation.
It already checks the mask value of source_vport, so removing
this duplicated check.
Also, moving there the check of source_eswitch_owner_vhca_id mask.
Signed-off-by: Alex Ves
From: Yevgeny Kliteynik
Validity check is done by reading the next lu_type from the STE,
this check can be replaced by checking the refcount.
This will make the check independent on internal STE structure.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahamee
From: Yevgeny Kliteynik
The misc3 variable is used only once and can be dropped.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-
It's ipvs's duty to do traffic statistic if packets get hit,
no matter what mode it is.
Signed-off-by: longguang.yue
---
net/netfilter/ipvs/ip_vs_conn.c | 14 --
net/netfilter/ipvs/ip_vs_core.c | 5 -
2 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/net/netfilter/
On 29-Sep-20 00:41, David Miller wrote:
From: Yevgeny Kliteynik
Date: Mon, 28 Sep 2020 19:58:59 +
By replacing the bits-per-long array with a single counter we loose
this ability to jump faster to the free spot.
I don't understand why this is true, because upon the free we will
update
On Tue, 29 Sep 2020 16:18:11 +0800 longguang.yue wrote:
> @@ -411,10 +413,17 @@ struct ip_vs_conn *ip_vs_conn_out_get(const struct
> ip_vs_conn_param *p)
> rcu_read_lock();
>
> hlist_for_each_entry_rcu(cp, &ip_vs_conn_tab[hash], c_list) {
> - if (p->vport == cp->cport &&
It's ipvs's duty to do traffic statistic if packets get hit,
no matter what mode it is.
Signed-off-by: longguang.yue
---
net/netfilter/ipvs/ip_vs_conn.c | 13 +++--
net/netfilter/ipvs/ip_vs_core.c | 5 -
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/net/netfilter/i
especially in public cloud case, statistic is related to monitorring
and billing , both ingress and egress packets will go throught ipvs,
even dr/tun mode.
in dr/tun mode, ipvs need to do nothing except statistic, so
skb->ipvs_property = 1
regards
On Tue, Sep 29, 2020 at 1:04 PM longguang.
It's ipvs's duty to do traffic statistic if packets get hit,
no matter what mode it is.
Signed-off-by: longguang.yue
---
net/netfilter/ipvs/ip_vs_core.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/net/netfilter/ipvs/ip_vs_core.c b/net/netfilter/ipvs/ip_vs_core.c
index
From: Yevgeny Kliteynik
Date: Mon, 28 Sep 2020 19:58:59 +
> By replacing the bits-per-long array with a single counter we loose
> this ability to jump faster to the free spot.
I don't understand why this is true, because upon the free we will
update the hint and that's where the next bit sea
> From: David Miller
> Sent: Sunday, September 27, 2020 01:16
> To: sa...@kernel.org
> Cc: k...@kernel.org; netdev@vger.kernel.org; Yevgeny Kliteynik
> ; Erez Shitrit ; Mark Bloch
> ; Saeed Mahameed
> Subject: Re: [net-next 01/15] net/mlx5: DR, Add buddy allocator utilitie
From: sa...@kernel.org
Date: Fri, 25 Sep 2020 12:37:55 -0700
> From: Yevgeny Kliteynik
>
> Add implementation of SW Steering variation of buddy allocator.
>
> The buddy system for ICM memory uses 2 main data structures:
> - Bitmap per order, that keeps the current state of allocated
> blo
From: Yevgeny Kliteynik
The misc3 variable is used only once and can be dropped.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-
From: Yevgeny Kliteynik
Track the pool's hot ICM memory when freeing/allocating
chunk, so that when checking if the sync is required, just
check if the pool hot memory has reached the sync threshold.
Signed-off-by: Hamdan Igbaria
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
Revie
From: Yevgeny Kliteynik
We will support multiple STE versions.
The existing naming is not suitable for newer versions.
Removed the HW specific details and renamed with a more
general names.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mell
From: Yevgeny Kliteynik
Add implementation of SW Steering variation of buddy allocator.
The buddy system for ICM memory uses 2 main data structures:
- Bitmap per order, that keeps the current state of allocated
blocks for this order
- Indicator for the number of available blocks per each
From: Yevgeny Kliteynik
When we create a matcher we check that all fields are consumed.
There is no need for this specific check. This keeps the STE
builder functions simple and clean.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox/
From: Yevgeny Kliteynik
When freeing chunks, we want to sync the steering
so that all the "hot" memory will be written to ICM
and all the chunks that are in the hot_list will be
actually destroyed.
When allocating from the pool, we don't have a need
to sync the steering, as we're not freeing anyt
From: Yevgeny Kliteynik
Mask validity for ste builders is checked by mlx5dr_ste_build_pre_check
during matcher creation.
It already checks the mask value of source_vport, so removing
this duplicated check.
Also, moving there the check of source_eswitch_owner_vhca_id mask.
Signed-off-by: Alex Ves
From: Hamdan Igbaria
Skip the rule according to flow arrival source, in case of RX and the
source is local port skip and in case of TX and the source is uplink
skip, we get this info according to the flow source hint we get from
upper layers when creating the rule.
This is needed because for exam
From: Yevgeny Kliteynik
Instead of getting the tag in each function, call the builder
directly with the tag. This will allow to use the same function
for building the tag and the bitmask.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellan
From: Yevgeny Kliteynik
Remove flex parser from the matcher function names since
the matcher should not be aware of such HW specific details.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahameed
---
.../mellanox/mlx5/core/steering/dr_cmd.c | 4 +-
.
From: Yevgeny Kliteynik
Till now in order to manage the ICM memory we used bucket
mechanism, which kept a bucket per specified size (sizes were
between 1 block to 2^21 blocks).
Now changing that with buddy-system mechanism, which gives us much
more flexible way to manage the ICM memory.
Its bigg
From: Yevgeny Kliteynik
Track buddy's used ICM memory, and free it if all
of the buddy's memory bacame unused.
Do this only for STEs.
MODIFY_ACTION buddies are much smaller, so in case there
is a large amount of modify_header actions, which result
in large amount of MODIFY_ACTION buddies, doing t
From: Yevgeny Kliteynik
Validity check is done by reading the next lu_type from the STE,
this check can be replaced by checking the refcount.
This will make the check independent on internal STE structure.
Signed-off-by: Alex Vesker
Signed-off-by: Yevgeny Kliteynik
Signed-off-by: Saeed Mahamee
From: Yevgeny Kliteynik
Struct mlx5dr_action doesn't use this member
Signed-off-by: Erez Shitrit
Signed-off-by: Yevgeny Kliteynik
Reviewed-by: Alex Vesker
Signed-off-by: Saeed Mahameed
---
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h | 1 -
1 file changed, 1 deletion(-)
diff
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