> It wouldn't be trivial. The stats are queried from the driver.
So are page pool stats, with the increments happening in the page pool
code, not the driver.
Andrew
On Thu, May 09, 2024 at 09:19:52PM +, Dan Jurgens wrote:
> > From: Andrew Lunn
> > Sent: Thursday, May 9, 2024 3:47 PM
> > To: Dan Jurgens
> > Subject: Re: [PATCH net-next 1/2] netdev: Add queue stats for TX stop and
> > wake
> >
> > On Thu, May 09
On Thu, May 09, 2024 at 11:32:15AM -0500, Daniel Jurgens wrote:
> TX queue stop and wake are counted by some drivers.
> Support reporting these via netdev-genl queue stats.
>
> Signed-off-by: Daniel Jurgens
> Reviewed-by: Jiri Pirko
> ---
> Documentation/netlink/specs/netdev.yaml | 10 +
> > > > while (!virtqueue_get_buf(vi->cvq, &tmp) &&
> > > > - !virtqueue_is_broken(vi->cvq))
> > > > + !virtqueue_is_broken(vi->cvq)) {
> > > > + if (timeout)
> > > > + timeout--;
> > > This is not really a timeout, just a loop counter. 200 iterations cou
On Tue, Apr 20, 2021 at 10:44:16AM +0200, Linus Walleij wrote:
> On Tue, Apr 20, 2021 at 3:47 AM Andrew Lunn wrote:
>
> > > @@ -1381,25 +1382,12 @@ static struct eth_plat_info
> > > *ixp4xx_of_get_platdata(struct device *dev)
> > > /* NPE ID 0x00, 0x10,
> @@ -1381,25 +1382,12 @@ static struct eth_plat_info
> *ixp4xx_of_get_platdata(struct device *dev)
> /* NPE ID 0x00, 0x10, 0x20... */
> plat->npe = (val << 4);
>
> - phy_np = of_parse_phandle(np, "phy-handle", 0);
> - if (phy_np) {
> - ret = of_property_read_u32(
> + phy_np = of_parse_phandle(np, "phy-handle", 0);
> + if (phy_np) {
> + ret = of_property_read_u32(phy_np, "reg", &val);
> + if (ret) {
> + dev_err(dev, "cannot find phy reg\n");
> + return NULL;
> + }
> +
> + mdio {
> +#address-cells = <1>;
> +#size-cells = <0>;
> +phy1: phy@1 {
> + #phy-cells = <0>;
Hi Linus
phy-cells is not part of the Ethernet PHY binding.
Andrew
le, some devices, such as the Ubiquiti EdgeRouter X, may have
> ports labeled ethX. Labeling the master GMAC with a different prefix
> than DSA ports helps with clarity.
>
> Suggested-by: René van Dorst
> Signed-off-by: Ilya Lipnitskiy
Reviewed-by: Andrew Lunn
Andrew
On Mon, Apr 19, 2021 at 02:26:22PM -0700, Jakub Kicinski wrote:
> ETHTOOL_MSG_MODULE_EEPROM_GET is missing from the list of messages.
> ETHTOOL_MSG_MODULE_EEPROM_GET_REPLY is sadly a rather long name
> so we need to adjust column length.
>
> Fixes: c781ff12a2f3 ("ethtool: Allow network drivers to
On Sun, Apr 18, 2021 at 09:03:52PM -0700, Ilya Lipnitskiy wrote:
> The MAC device name can now be set within DTS file instead of always
> being "ethX". This is helpful for DSA to clearly label the DSA master
> device and distinguish it from DSA slave ports.
>
> For example, some devices, such as t
t; Fix by using readl_poll_timeout as a more standard and less error-prone
> solution.
>
> Fixes: ba37b7caf1ed ("net: ethernet: mtk_eth_soc: add support for
> initializing the PPE")
> Signed-off-by: Ilya Lipnitskiy
> Cc: Felix Fietkau
Reviewed-by: Andrew Lunn
Andrew
> @@ -1079,6 +1078,14 @@ static int korina_probe(struct platform_device *pdev)
> eth_hw_addr_random(dev);
> }
>
> + clk = devm_clk_get(&pdev->dev, NULL);
You should use a name here. It makes future expansion of the binding
easier. devm_clk_get_optional() is probab
> - memcpy(dev->dev_addr, mac_addr, ETH_ALEN);
> + if (mac_addr) {
> + ether_addr_copy(dev->dev_addr, mac_addr);
> + } else {
> + u8 ofmac[ETH_ALEN];
> +
> + if (of_get_mac_address(pdev->dev.of_node, ofmac) == 0)
> + ether_addr_cop
On Thu, Apr 15, 2021 at 01:06:43AM +0200, Thomas Bogendoerfer wrote:
> Get rid of access to struct korina_device by just passing the mac
> address via platform data and use drvdata for passing netdev to remove
> function.
>
> Signed-off-by: Thomas Bogendoerfer
> ---
> arch/mips/rb532/devices.c
On Thu, Apr 15, 2021 at 01:06:42AM +0200, Thomas Bogendoerfer wrote:
> Instead of messing with MIPS specific macros use DMA API for mapping
> descriptors and skbs.
>
> Signed-off-by: Thomas Bogendoerfer
Reviewed-by: Andrew Lunn
Andrew
On Thu, Apr 15, 2021 at 01:06:41AM +0200, Thomas Bogendoerfer wrote:
> Remove helpers, which are only used in one call site.
>
> Signed-off-by: Thomas Bogendoerfer
Reviewed-by: Andrew Lunn
Andrew
On Thu, Apr 15, 2021 at 01:06:40AM +0200, Thomas Bogendoerfer wrote:
> Descriptors are mapped uncached so there is no need to do any cache
> handling for them.
>
> Signed-off-by: Thomas Bogendoerfer
Reviewed-by: Andrew Lunn
Andrew
On Thu, Apr 15, 2021 at 01:06:39AM +0200, Thomas Bogendoerfer wrote:
> Simplify probe/remove code by using devm_ functions.
>
> Signed-off-by: Thomas Bogendoerfer
Reviewed-by: Andrew Lunn
Andrew
> +static int korina_mdio_wait(struct korina_private *lp)
> +{
> + u32 value;
> +
> + return readl_poll_timeout_atomic(&lp->eth_regs->miimind,
> + value, value & ETH_MII_IND_BSY,
> + 1, 1000);
> +}
> +
> +static int k
On Thu, Apr 15, 2021 at 04:02:34PM -0700, Ilya Lipnitskiy wrote:
> The intention is for the loop to timeout if the body does not succeed.
> The current logic calls time_is_before_jiffies(timeout) which is false
> until after the timeout, so the loop body never executes.
>
> time_is_after_jiffies(t
On Thu, Apr 15, 2021 at 12:25:37PM +0300, Radu Pirea (NXP OSS) wrote:
> Add generic PMA suspend and resume callback functions for C45 PHYs.
>
> Signed-off-by: Radu Pirea (NXP OSS)
Reviewed-by: Andrew Lunn
Andrew
> +config NXP_C45_TJA11XX_PHY
> + tristate "NXP C45 TJA11XX PHYs"
> + help
> + Enable support for NXP C45 TJA11XX PHYs.
> + Currently supports only the TJA1103 PHY.
> +#define PHY_ID_BASE_T1 0x001BB010
It would be better to use PHY_ID_TJA_1103 here.
> +
> + if (!p) {
> printk(KERN_ERR DRV_NAME ": cannot remap registers\n");
> - rc = -ENXIO;
> - goto probe_err_out;
> + return -ENOMEM;
> }
Hi Thomas
Another possible cleanup would be replacing printk(KERN_ERR with
dev_err(), or netdev_err(
> +static int korina_mdio_wait(struct korina_private *lp)
> +{
> + int timeout = 1000;
> +
> + while ((readl(&lp->eth_regs->miimind) & 1) && timeout-- > 0)
> + udelay(1);
> +
> + if (timeout <= 0)
> + return -1;
> +
> + return 0;
Using readl_poll_timeout_ato
On Wed, Apr 14, 2021 at 07:05:10PM +0300, Vladimir Oltean wrote:
> On Wed, Apr 14, 2021 at 05:58:44PM +0200, Andrew Lunn wrote:
> > > Let us now add the 'is_local' bit to bridge FDB entries, and make all
> > > drivers ignore these entries by their own choice.
>
> Let us now add the 'is_local' bit to bridge FDB entries, and make all
> drivers ignore these entries by their own choice.
Hi Vladimir
This goes to the question about the missing cover letter. Why should
drivers get to ignore them, rather than the core? It feels like there
should be another patc
On Wed, Apr 14, 2021 at 05:26:55PM +0200, Michael Walle wrote:
> It is already possible to read the MAC address via a NVMEM provider. But
> there are boards, esp. with many ports, which only have a base MAC
> address stored. Thus we need to have a way to provide an offset per
> network device.
We
> +static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types
> type,
> + u32 attr, int channel, long *temp)
> {
> struct phy_device *phydev = dev_get_drvdata(dev);
> - int err;
> + const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(p
> #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT (0x2 << 14)
> #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE(0x3 << 14)
> #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK (0x3 <<
> 14)
> +#define MII_88E6393_MISC_TEST_SAMPLES_4096 0x
> +#d
On Tue, Apr 13, 2021 at 09:55:37AM +0200, Marek Behún wrote:
> Amethyst internal PHYs also report empty model number in MII_PHYSID2.
>
> Fill in switch product number, as is done for Topaz and Peridot.
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
On Tue, Apr 13, 2021 at 09:55:36AM +0200, Marek Behún wrote:
> Use the &= operator instead of
> ret = ret & ...
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
On Tue, Apr 13, 2021 at 09:55:35AM +0200, Marek Behún wrote:
> Register 27_6.15:14 has the following description in 88E6393X
> documentation:
> Temperature Sensor Enable
> 0x0 - Sample every 1s
> 0x1 - Sense rate decided by bits 10:8 of this register
> 0x2 - Use 26_6.5 (One shot Tempe
> nxp-c45-tja11xx is acceptable from my point of view.
Great. Enough bike shedding, nxp-c45-tja11xx it is.
Andrew
> Ok, we can agree that there will not be a perfect naming. Would it be a
> possibility to rename the existing TJA11xx driver to TJA1100-1-2 or is that
> unwanted?
It is generally a bad idea. It makes back porting fixing harder if the
file changes name.
> If nxp-c45.c is to generic (I take from y
On Tue, Apr 13, 2021 at 08:56:30AM +0200, Christian Herber wrote:
> Hi Andrew,
>
> On 4/12/2021 6:52 PM, Andrew Lunn wrote:
> >
> > So what you are say is, you don't care if the IP is completely
> > different, it all goes in one driver. So lets put this driver int
> Indeed - it should be a logical and operation - there is light present
> _and_ the PHY recognises the signal. This is what the commit achieves,
> although (iirc) doesn't cater for the case where there is no SFP cage
> attached.
Hi Russell
Is there something like this in the marvell10 driver?
A
On Tue, Apr 13, 2021 at 10:13:49AM +0300, Ivan Bornyakov wrote:
> On Tue, Apr 13, 2021 at 01:32:12AM +0200, Marek Behún wrote:
> > On Mon, 12 Apr 2021 15:16:59 +0300
> > Ivan Bornyakov wrote:
> >
> > > Some SFP modules uses RX_LOS for link indication. In such cases link
> > > will be always up, e
> I guess this is depends whether the most usual case is to have all
> these interrupts being actively in use or not. Most interrupts only
> use a limited portion of their interrupt space at any given time.
> Allocating all interrupts and creating mappings upfront is a waste of
> memory.
>
> If th
On Tue, Apr 13, 2021 at 09:09:37AM +0200, Michal Vokáč wrote:
> On 12. 04. 21 16:14, Andrew Lunn wrote:
> > > [1]
> > > https://elixir.bootlin.com/linux/v5.12-rc7/source/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi#L101
> >
> > &fec {
> > p
associated with that device.
>
> Signed-off-by: Michael Walle
Reviewed-by: Andrew Lunn
Andrew
; - else {}
>
> @@
> identifier a.x;
> expression e;
> @@
> - if (<+... x ...+>@e)
> - {}
> - else
> + if (!(e))
> {...}
>
> @@
> expression x, y, z;
> @@
> - x = of_get_mac_address(y, z);
> + of_get_mac_address(y, z);
> ... when != x
>
>
> All drivers, except drivers/net/ethernet/aeroflex/greth.c, were
> compile-time tested.
>
> Suggested-by: Andrew Lunn
> Signed-off-by: Michael Walle
I cannot say i looked at all the changes, but the ones i did exam
seemed O.K.
Reviewed-by: Andrew Lunn
Andrew
> > > +static void
> > > +mt7530_setup_mdio_irq(struct mt7530_priv *priv)
> > > +{
> > > + struct dsa_switch *ds = priv->ds;
> > > + int p;
> > > +
> > > + for (p = 0; p < MT7530_NUM_PHYS; p++) {
> > > + if (BIT(p) & ds->phys_mii_mask) {
> > > + unsigned int irq;
> > > +
> >
On Tue, Apr 13, 2021 at 12:24:49AM +0200, Martin Blumenstingl wrote:
> Hi Andrew,
>
> On Mon, Apr 12, 2021 at 1:16 AM Andrew Lunn wrote:
> >
> > On Sun, Apr 11, 2021 at 10:55:11PM +0200, Martin Blumenstingl wrote:
> > > Add support for .get_regs_len and .get_re
On Mon, Apr 12, 2021 at 03:16:59PM +0300, Ivan Bornyakov wrote:
> Some SFP modules uses RX_LOS for link indication. In such cases link
> will be always up, even without cable connected. RX_LOS changes will
> trigger link_up()/link_down() upstream operations. Thus, check that SFP
> link is operation
On Mon, Apr 12, 2021 at 11:47:07AM -0700, Jakub Kicinski wrote:
> Add missing 't' in attrtype.
>
> Signed-off-by: Jakub Kicinski
Reviewed-by: Andrew Lunn
Andrew
> +static const struct nxp_c45_phy_stats nxp_c45_hw_stats[] = {
> + { "phy_symbol_error_cnt", MDIO_MMD_VEND1, SYMBOL_ERROR_COUNTER, 0,
> GENMASK(15, 0) },
> + { "phy_link_status_drop_cnt", MDIO_MMD_VEND1, LINK_DROP_COUNTER, 8,
> GENMASK(13, 8) },
> + { "phy_link_availability_drop_cnt"
caletechnologies/linux/issues/1
> Fixes: fee2d546414d ("net: phy: marvell: mv88e6390 temperature sensor
> reading")
> Reviewed-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
On Mon, Apr 12, 2021 at 05:49:04PM +0300, Radu Nicolae Pirea (NXP OSS) wrote:
> On Mon, 2021-04-12 at 16:23 +0200, Andrew Lunn wrote:
> > > It is purely a C45 device.
> >
> > > Even if the PHY will be based on the same IP or not, if it is a C45
> > > PHY, it
On Mon, Apr 12, 2021 at 05:52:39PM +0200, Pali Rohár wrote:
> On Monday 12 April 2021 17:32:33 Andrew Lunn wrote:
> > > Anyway, now I'm looking at phy/marvell.c driver again and it supports
> > > only 88E6341 and 88E6390 families from whole 88E63xxx range.
> > >
> Anyway, now I'm looking at phy/marvell.c driver again and it supports
> only 88E6341 and 88E6390 families from whole 88E63xxx range.
>
> So do we need to define for now table for more than
> MV88E6XXX_FAMILY_6341 and MV88E6XXX_FAMILY_6390 entries?
Probably not. I've no idea if the 6393 has an I
On Mon, Apr 12, 2021 at 03:34:47PM +0200, Pali Rohár wrote:
> On Monday 12 April 2021 15:15:07 Andrew Lunn wrote:
> > > +static u16 mv88e6xxx_physid_for_family(enum mv88e6xxx_family family);
> > > +
> >
> > No forward declaration please. Move the code around. It
> > > +/* This table contains representative model for every family */
> > > +static const enum mv88e6xxx_model family_model_table[] = {
> > > + [MV88E6XXX_FAMILY_6095] = MV88E6095,
> > > + [MV88E6XXX_FAMILY_6097] = MV88E6097,
> > > + [MV88E6XXX_FAMILY_6185] = MV88E6185,
> > > + [MV88E6XXX_FAMILY_6
> It is purely a C45 device.
> Even if the PHY will be based on the same IP or not, if it is a C45
> PHY, it will be supported by this driver. We are not talking about 2 or
> 3 PHYs. This driver will support all future C45 PHYs. That's why we
> named it "NXP C45".
So if in future you produce C45
> [1]
> https://elixir.bootlin.com/linux/v5.12-rc7/source/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi#L101
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
phy-reset-duratio
> +static u16 mv88e6xxx_physid_for_family(enum mv88e6xxx_family family);
> +
No forward declaration please. Move the code around. It is often best
to do that in a patch which just moves code, no other changes. It
makes it easier to review.
> static int mv88e6xxx_mdio_read(struct mii_bus *bus, in
On Mon, Apr 12, 2021 at 01:02:07PM +0300, Radu Nicolae Pirea (NXP OSS) wrote:
> On Fri, 2021-04-09 at 21:36 +0200, Andrew Lunn wrote:
> > On Fri, Apr 09, 2021 at 09:41:06PM +0300, Radu Pirea (NXP OSS) wrote:
> > > Add driver for tja1103 driver and for future NXP C45 PHYs.
>
> +static void mana_gd_deregiser_irq(struct gdma_queue *queue)
> +{
> + struct gdma_dev *gd = queue->gdma_dev;
> + struct gdma_irq_context *gic;
> + struct gdma_context *gc;
> + struct gdma_resource *r;
> + unsigned int msix_index;
> + unsigned long flags;
> +
> + /* At
> +static inline bool is_gdma_msg(const void *req)
> +{
> + struct gdma_req_hdr *hdr = (struct gdma_req_hdr *)req;
> +
> + if (hdr->req.hdr_type == GDMA_STANDARD_HEADER_TYPE &&
> + hdr->resp.hdr_type == GDMA_STANDARD_HEADER_TYPE &&
> + hdr->req.msg_size >= sizeof(struct gdma
> > Currently the protocol versin is 0.1.1 You may ask why it's called
> > "drv version" rather than "protocol version" -- it's because the PF driver
> > calls it that way, so I think here the VF driver may as well use the same
> > name. BTW, the "drv ver" info is passed to the PF driver in the bel
On Sun, Apr 11, 2021 at 10:55:11PM +0200, Martin Blumenstingl wrote:
> Add support for .get_regs_len and .get_regs so it is easier to find out
> about the state of the ports on the GSWIP hardware. For this we
> specifically add the GSWIP_MAC_PSTATp(port) and GSWIP_MDIO_STATp(port)
> register #defin
On Sun, Apr 11, 2021 at 08:01:35PM +0200, Marek Behun wrote:
> On Sat, 10 Apr 2021 15:34:46 +0200
> Ansuel Smith wrote:
>
> > Hi,
> > this is a respin of the Marek series in hope that this time we can
> > finally make some progress with dsa supporting multi-cpu port.
> >
> > This implementation
On Fri, Apr 09, 2021 at 07:42:32AM +0200, Sander Vanheule wrote:
> Hi Andrew,
>
> Thank you for the feedback. You can find a (leaked) datasheet at:
> https://github.com/libc0607/Realtek_switch_hacking/blob/files/RTL8231_Datasheet_1.2.pdf
So this is not really an MFD. It has different ways of maki
On Fri, Apr 09, 2021 at 07:16:42PM +0100, Mark Brown wrote:
> On Fri, Apr 09, 2021 at 08:14:22PM +0200, Sander Vanheule wrote:
>
> > The kernel has the mii_bus struct to describe the bus master, but like
> > you noted the bus is generaly refered to as an MDIO interface. I'm fine
> > with naming it
On Fri, Apr 09, 2021 at 09:41:06PM +0300, Radu Pirea (NXP OSS) wrote:
> Add driver for tja1103 driver and for future NXP C45 PHYs.
So apart from c45 vs c22, how does this differ to nxp-tja11xx.c?
Do we really want two different drivers for the same hardware?
Can we combine them somehow?
> +conf
For the structs containing variables with the same sizes, or already size
aligned
> variables, we knew the __packed has no effect. And for these structs, it
> doesn't
> cause performance impact either, correct?
>
> But in the future, if different sized variables are added, the __packed may
Hi Sven
> Many thanks to Heiner Kallweit for suggesting this solution.
Adding a Suggested-by: would be good. And it might sometime help
Johnathan Corbet extract some interesting statistics from the commit
messages if everybody uses the same format.
Andrew
> Linux kernel doesn't do namespaces in the code, so every new driver needs
> to worry about global symbols clashing
This driver is called mana, yet the code uses ana. It would be good to
resolve this inconsistency as well. Ideally, you want to prefix
everything with ana_ or mana_, depending on wh
> - Providing no compatible for an MDIO child node is considered to be
> equivalent
> to a c22 ethernet phy, so one must be provided. However, this node is then
> not automatically probed.
It cannot be automatically probed, since register 2 and 3 do not
contain an ID, which PHYs do. So you ne
On Thu, Apr 08, 2021 at 11:00:08PM +0800, DENG Qingfang wrote:
> Hi René,
>
> On Thu, Apr 8, 2021 at 10:02 PM René van Dorst wrote:
> >
> > Tested on Ubiquiti ER-X-SFP (MT7621) with 1 external phy which uses
> > irq=POLL.
> >
>
> I wonder if the external PHY's IRQ can be registered in the devic
> > > diff --git a/drivers/net/ethernet/microsoft/Kconfig
> > b/drivers/net/ethernet/microsoft/Kconfig
> > > new file mode 100644
> > > index ..12ef6b581566
> > > --- /dev/null
> > > +++ b/drivers/net/ethernet/microsoft/Kconfig
> > > @@ -0,0 +1,30 @@
> > > +#
> > > +# Microsoft Azure ne
On Thu, Apr 08, 2021 at 01:58:13PM +0300, Danielle Ratson wrote:
> __ethtool_get_link_ksettings() function is shared by both ioctl and
> netlink ethtool interfaces.
>
> Move it to net/ethtool/common.c file, which is the suitable place for
> a shared code.
>
> Signed-off-by: Danielle Ratson
> Sug
> If dropping the modifications to gswip_phylink_mac_config is my only change:
> do you want me to keep or drop your Reviewed-by in v2?
You can keep it.
Andrew
On Wed, Apr 07, 2021 at 12:50:38PM +0800, DENG Qingfang wrote:
> Enable MT7530 interrupt controller in the MT7621 SoC.
>
> Signed-off-by: DENG Qingfang
Reviewed-by: Andrew Lunn
Andrew
On Wed, Apr 07, 2021 at 12:50:37PM +0800, DENG Qingfang wrote:
> Add device tree binding to support MT7530 interrupt controller.
>
> Signed-off-by: DENG Qingfang
Reviewed-by: Andrew Lunn
Andrew
On Wed, Apr 07, 2021 at 12:50:36PM +0800, DENG Qingfang wrote:
> Add support for MT7530 interrupt controller to handle internal PHYs.
> In order to assign an IRQ number to each PHY, the registration of MDIO bus
> is also done in this driver.
>
> Signed-off-by: DENG Qingfang
> ---
> RFC v1 -> RFC
; Signed-off-by: DENG Qingfang
Reviewed-by: Andrew Lunn
Andrew
On Wed, Apr 07, 2021 at 10:22:52PM +0200, Marek Behún wrote:
> 88E2111 is a variant of 88E2110 which does not support 5 gigabit speeds.
>
> Differentiate these variants via the match_phy_device() method, since
> they have the same PHY ID.
>
> Signed-off-by: Marek Behún
Review
gned-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
On Wed, Apr 07, 2021 at 10:22:46PM +0200, Marek Behún wrote:
> The 88E2110 does not support xaui nor rxaui modes. Check for correct
> interface mode for different chips.
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
this work is not finished yet.
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
> For my own curiosity: is there a "recommended" way where to configure
> link up/down, speed, duplex and flow control? currently I have the
> logic in both, .phylink_mac_config and .phylink_mac_link_up.
You probably want to read the documentation in
include/linux/phylink.h
Andrew
On Wed, Apr 07, 2021 at 10:15:37PM +0800, Wong Vee Khee wrote:
> From: Tan Tee Min
>
> The Synopsis MAC controller supports auxiliary snapshot feature that
> allows user to store a snapshot of the system time based on an external
> event.
>
> This patch add supports to the above mentioned featur
> Intel mgbe is flexible to pair with any PHY. Only Aquantia/Marvell
> multi-gige PHY can do rate adaption right?
The Marvell/Marvell multi-gige PHY can also do rate
adaptation. Marvell buying Aquantia made naming messy :-(
I should probably use part numbers.
> Hence, we still need to take care o
On Wed, Apr 07, 2021 at 06:44:04PM +0800, Joakim Zhang wrote:
> Both get and set WoL will check device_can_wakeup(), if MAC supports
> PMT, it will set device wakeup capability. After commit 1d8e5b0f3f2c ("net:
> stmmac: Support WOL with phy"), device wakeup capability will be
> overwrite in stmmac
> And, some variable defines can not follow the reverse christmas tree
> style due to dependency, e.g.
> static void hwc_init_event_handler(void *ctx, struct gdma_queue *q_self,
>struct gdma_event *event)
> {
> struct hw_channel_context *hwc = ctx;
>
> +static int gdma_query_max_resources(struct pci_dev *pdev)
> +{
> + struct gdma_context *gc = pci_get_drvdata(pdev);
> + struct gdma_general_req req = { 0 };
> + struct gdma_query_max_resources_resp resp = { 0 };
> + int err;
Network drivers need to use reverse christmas tree. I
On Tue, Apr 06, 2021 at 06:50:40AM +0200, Ansuel Smith wrote:
> qca8k 83xx switch have 2 cpu ports. Rework the driver to support
> multiple cpu port. All ports can access both cpu ports by default as
> they support the same features.
Do you have more information about how this actually works. How
On Tue, Apr 06, 2021 at 05:23:59PM -0700, Jakub Kicinski wrote:
> Add missing kdoc for phy tunable callbacks.
>
> Signed-off-by: Jakub Kicinski
Reviewed-by: Andrew Lunn
Andrew
> case PHY_INTERFACE_MODE_RGMII:
> case PHY_INTERFACE_MODE_RGMII_ID:
> case PHY_INTERFACE_MODE_RGMII_RXID:
> case PHY_INTERFACE_MODE_RGMII_TXID:
> miicfg |= GSWIP_MII_CFG_MODE_RGMII;
> +
> + if (phylink_autoneg_inband(mode))
> +
_gswip: Let GSWIP automatically set
> the xMII clock")
> Cc: sta...@vger.kernel.org
> Acked-by: Hauke Mehrtens
> Signed-off-by: Martin Blumenstingl
Having the MAC polling the PHY is pretty much always a bad idea.
Reviewed-by: Andrew Lunn
Andrew
On Tue, Apr 06, 2021 at 05:49:03AM +0200, Ansuel Smith wrote:
> In preparation for the future when dsa will support multi cpu port,
> dsa_cpu_ports can be useful for switch that has multiple cpu port to
> retrieve the cpu mask for ACL and bridge table.
>
> Signed-off-by: Ansuel Smith
> ---
> inc
On Tue, Apr 06, 2021 at 03:59:31PM -0700, Jakub Kicinski wrote:
> Quotes to backticks. All commands use backticks since the names
> are constants.
>
> Signed-off-by: Jakub Kicinski
Upps. Sorry.
Reviewed-by: Andrew Lunn
Andrew
> @@ -479,8 +479,8 @@ static int mv3310_config_init(struct phy_device *phydev)
> val = phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL);
> if (val < 0)
> return val;
> - priv->rate_match = ((val & MV_V2_PORT_CTRL_MACTYPE_MASK) ==
> - MV_V2_PORT
On Wed, Apr 07, 2021 at 12:11:06AM +0200, Marek Behún wrote:
> This module supports not not only Alaska X, but also Alaska M.
>
> Change module description appropriately.
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
On Wed, Apr 07, 2021 at 12:11:05AM +0200, Marek Behún wrote:
> 88E2111 is a variant of 88E2110 which does not support 5 gigabit speeds.
>
> Differentiate these variants via the match_phy_device() method, since
> they have the same PHY ID.
>
> Signed-off-by: Marek Behún
Review
On Wed, Apr 07, 2021 at 12:11:04AM +0200, Marek Behún wrote:
> Add constants for 2.5G and 5G speed in PCS speed register into mdio.h.
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
On Wed, Apr 07, 2021 at 12:11:03AM +0200, Marek Behún wrote:
> The driver name "mv88x2110" should be instead "mv88e2110".
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
gned-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
On Wed, Apr 07, 2021 at 12:11:00AM +0200, Marek Behún wrote:
> Now that we have a chip structure, we can store the temperature reading
> method in this structure (OOP style).
>
> Signed-off-by: Marek Behún
Reviewed-by: Andrew Lunn
Andrew
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