This will dump the INTERFACE_DESCRIPTOR_DATA along with the associated
samplers & surfaces.
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 24
1 file changed, 24 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
From: Roland Scheidegger
The blend math gets a bit funky due to inverse blend factors being
in range [0,2] rather than [-1,1], our normalized math can't really
cover this.
src_alpha_saturate blend factor has a similar problem too.
(Note that piglit fbo-blending-formats test is mostly useless for
For the series:
Tested-by: Dieter Nützel
on RX580 with F1 2017
with Mesa-git taken from 2 days ago.
As there isn't much tessellation I do NOT see (any) much improvements.
Full HD 1920x1080, all _max_ (!)
before 3 times
min 24 27 25
average 41 40 40
max 57 56 56
after 3 times
min
On Mon, Nov 13, 2017 at 5:18 AM, wrote:
> From: Kevin Rogovin
I like this. Thanks for writing this.
> Signed-off-by: Kevin Rogovin
> ---
> src/intel/Makefile.tools.am | 21 ++-
> src/intel/tools/.gitignore| 1 +
> src/intel/tools/gen_shader_disassembler.c | 2
On Fri, Nov 17, 2017 at 5:31 PM, Jason Ekstrand wrote:
> The brw_disasm_info header is included by certain tools in order to get
> shader assembly from binaries so it's a semi-external header. Including
> brw_cfg.h also pulls in brw_shader.h so you end up getting quite a bit
> of our back-end com
The brw_disasm_info header is included by certain tools in order to get
shader assembly from binaries so it's a semi-external header. Including
brw_cfg.h also pulls in brw_shader.h so you end up getting quite a bit
of our back-end compiler internals. Instead, make the couple of forward
declaratio
On Friday, November 17, 2017 5:02:04 PM PST Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_bufmgr.c | 17 +++--
> 1 file changed, 11 insertions(+), 6 deletions(-)
Both patches are:
Reviewed-by: Kenneth Graunke
Cc: mesa-sta...@lists.freedesktop.org
signature.asc
Descri
On Fri, Nov 17, 2017 at 2:18 PM, Grazvydas Ignotas
wrote:
> I've tested this branch (rx470 + hd530) and it's only partially working:
> - display on amd, radv: always fails with "offscreen:
> wsi/wsi_common.c:172: select_memory_type: Assertion `!"No memory type
> found"' failed."
> - display on am
---
src/mesa/drivers/dri/i965/brw_bufmgr.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c
b/src/mesa/drivers/dri/i965/brw_bufmgr.c
index 17036b5..60b0dad 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
+++ b/src/me
Almost all of our BO export paths were already properly marked the BO as
external and added it to the handle table. Most export use-cases go
through a prime fd or flink where we have a brw_bo export helper that
does the right thing. The one missing one happens when you call
queryImage and ask for
Reviewed-by: Lionel Landwerlin
On 18/11/17 00:55, Kristian H. Kristensen wrote:
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen_pack_header.py | 23 +--
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/src/intel/genxml/gen_pack_header.py
b/s
Signed-off-by: Kristian H. Kristensen
---
src/intel/genxml/gen_pack_header.py | 23 +--
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/src/intel/genxml/gen_pack_header.py
b/src/intel/genxml/gen_pack_header.py
index 405f600174..1a5d193d22 100644
--- a/src/intel
On Fri, Nov 17, 2017 at 4:48 PM, Andres Gomez wrote:
> Fixes: 4f82b1728719 ("i965: Rewrite disassembly annotation code")
>
> Cc: Matt Turner
> Signed-off-by: Andres Gomez
Damn it :)
Reviewed-by: Matt Turner
Thanks!
___
mesa-dev mailing list
mesa-de
Fixes: 4f82b1728719 ("i965: Rewrite disassembly annotation code")
Cc: Matt Turner
Signed-off-by: Andres Gomez
---
src/intel/compiler/test_eu_validate.cpp | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/intel/compiler/test_eu_validate.cpp
b/src/intel/compile
Build mesa 6199 completed
Commit 8d5994098f by Eric Anholt on 11/14/2017 11:52 PM:
broadcom/vc5: Set up the padded height at surface creation time.\n\nThis centralizes the calculation in the surface, instead of in each\nload/store.
Configure your noti
This fixes a bug where we were taking the tiling from the BO regardless
of what the modifier said. When we got images in from Vulkan where it
doesn't set the tiling on the BO, we would treat them as linear even
though the modifier expressly said to treat it as Y-tiled.
Cc: mesa-sta...@lists.freed
Otherwise, create_for_bo will just grab the tiling from the BO which is
not what we want when using modifiers.
Cc: mesa-sta...@lists.freedesktop.org
---
src/mesa/drivers/dri/i965/brw_blorp.c | 6 --
src/mesa/drivers/dri/i965/brw_context.c | 4
src/mesa/drivers/dri/i965/in
On 17/11/17 18:37, Kenneth Graunke wrote:
On Friday, November 17, 2017 9:47:59 AM PST Lionel Landwerlin wrote:
This will allow to set the flags on any anv_bo created/filled from a
state pool or block pool later.
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/anv_allocator.c
I noticed this race condition too, this patch isn't correct though, since this
will add a radeonsi generated target unconditionally to the sources.
si_driinfo_h should be added to the gallium_dri_sources inside the `if
with_gallium_radeonsi` block.
Dylan
Quoting Juan A. Suarez Romero (2017-11-17
Build mesa 6197 failed
Commit af322ed887 by Brian Paul on 11/17/2017 10:03 PM:
tgsi: s/uint/enum pipe_shader_type/\n\nRoland Scheidegger
Configure your notification preferences
___
mesa-dev mailing list
me
Reviewed-by: Charmaine Lee
From: Brian Paul
Sent: Friday, November 17, 2017 2:40:01 PM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee; Neha Bhende; Roland Scheidegger
Subject: [PATCH] tgsi: bump tgsi_opcode_info::output_mode size to 4 bits
To avoi
Reviewed-by: Marek Olšák
Marek
On Fri, Nov 17, 2017 at 11:40 PM, Brian Paul wrote:
> To avoid problems with MSVC. And verify size with ASSERT_BITFIELD_SIZE().
> ---
> src/gallium/auxiliary/tgsi/tgsi_info.c | 2 ++
> src/gallium/auxiliary/tgsi/tgsi_info.h | 2 +-
> 2 files changed, 3 insertion
Reviewed-by: Marek Olšák
Marek
On Fri, Nov 17, 2017 at 11:40 PM, Brian Paul wrote:
> To silence compiler warnings.
> ---
> src/gallium/drivers/r300/r300_screen.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/src/gallium/drivers/r300/r300_screen.c
> b/src/gallium/drivers/r300/r300
To silence compiler warnings.
---
src/gallium/drivers/r300/r300_screen.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/r300/r300_screen.c
b/src/gallium/drivers/r300/r300_screen.c
index ac5208a..99d6302 100644
--- a/src/gallium/drivers/r300/r300_screen.c
+++ b/src/galli
To avoid problems with MSVC. And verify size with ASSERT_BITFIELD_SIZE().
---
src/gallium/auxiliary/tgsi/tgsi_info.c | 2 ++
src/gallium/auxiliary/tgsi/tgsi_info.h | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c
b/src/gallium/auxiliary
A primitive counter encapsulates a scalar aggregating counter for each
vertex stream along with a section within the primitive tally buffer
which hasn't been read out yet. Defining this as a separate type will
allow us to keep multiple counter objects around for the same
transform feedback object
This allows us to aggregate the primitive counts of a completed
transform feedback begin/end block lazily, which in the most typical
case (where glDrawTransformFeedback is not used) will allow us to
avoid aggregating the primitive counters on the CPU altogether,
preventing a stall on previous rende
Improves performance of SynMark2 OglGSCloth by a further 9.65%±0.59%
due to the reduction in overwraps of the primitive count buffer that
lead to a CPU stall on previous rendering. Cummulative performance
improvement from the series 81.50% ±0.96% (data gathered on VLV).
---
src/mesa/drivers/dri/i
Reviewed-by:
Roland Scheidegger
Am 17.11.2017 um 23:15 schrieb Brian Paul:
> ---
> src/gallium/auxiliary/tgsi/tgsi_info.c | 2 +-
> src/gallium/auxiliary/tgsi/tgsi_info.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c
> b/src/
I've tested this branch (rx470 + hd530) and it's only partially working:
- display on amd, radv: always fails with "offscreen:
wsi/wsi_common.c:172: select_memory_type: Assertion `!"No memory type
found"' failed."
- display on amd, anv: misrenders. For SaschaWillems, only
multisampling, subpasses a
---
src/gallium/auxiliary/tgsi/tgsi_info.c | 2 +-
src/gallium/auxiliary/tgsi/tgsi_info.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c
b/src/gallium/auxiliary/tgsi/tgsi_info.c
index 2baed5b..a204682 100644
--- a/src/gallium/auxiliar
https://bugs.freedesktop.org/show_bug.cgi?id=94168
--- Comment #11 from Diego ---
Problem is gone with Mesa 17.2.4 and Wine 2.21. I haven't done any reliable
testing and therefore I am not sure what fixed or hid it, or when it happened.
Diego.
--
You are receiving this mail because:
You are the
On Fri, 2017-11-17 at 16:26 +, Eric Engestrom wrote:
> On Thursday, 2017-11-16 13:27:28 -0500, Adam Jackson wrote:
>
> > @@ -402,6 +380,11 @@ _eglGetPlatformDisplayCommon(EGLenum platform, void
> > *native_display,
> > case EGL_PLATFORM_SURFACELESS_MESA:
> >dpy = _eglGetSurfaceles
Build mesa 6195 completed
Commit ddcd4b05a3 by Adam Jackson on 11/16/2017 6:27 PM:
egl: Convert int to attrib in eglGetPlatformDisplay\n\n... because converting attrib to int truncates, and that's bad.\n\nSigned-off-by: Adam Jackson \nReviewed-by: Eric Engestro
Quoting Matt Turner (2017-11-17 12:46:03)
> On Fri, Nov 17, 2017 at 12:34 PM, Dylan Baker wrote:
> > Quoting Emil Velikov (2017-11-17 03:11:50)
> >> On 16 November 2017 at 22:21, Dylan Baker wrote:
> >> > Quoting Emil Velikov (2017-11-16 03:35:17)
> >> >> Hi Dylan,
> >> >>
> >> >> On 16 November
Quoting Emil Velikov (2017-11-17 04:19:22)
> Hi Dylan,
>
> On 17 November 2017 at 00:27, Dylan Baker wrote:
>
> > + elif not (with_gallium_r600 or with_gallium_radeonsi or
> > with_gallium_nouveau)
>
>
> > + elif not (with_gallium_r600 or with_gallium_radeonsi or
> > with_gallium_nouveau)
On Fri, Nov 17, 2017 at 12:34 PM, Dylan Baker wrote:
> Quoting Emil Velikov (2017-11-17 03:11:50)
>> On 16 November 2017 at 22:21, Dylan Baker wrote:
>> > Quoting Emil Velikov (2017-11-16 03:35:17)
>> >> Hi Dylan,
>> >>
>> >> On 16 November 2017 at 01:10, Dylan Baker wrote:
>> >> > This patch ch
Quoting Emil Velikov (2017-11-17 03:11:50)
> On 16 November 2017 at 22:21, Dylan Baker wrote:
> > Quoting Emil Velikov (2017-11-16 03:35:17)
> >> Hi Dylan,
> >>
> >> On 16 November 2017 at 01:10, Dylan Baker wrote:
> >> > This patch checks for an and then enables sse4.1 optimizations if the
> >>
Build mesa 6194 failed
Commit 1831e3fb1d by Rob Clark on 11/17/2017 8:18 PM:
docs: update features for freedreno\n\nJust comparing glxinfo and features.txt, and it seems features.txt is\nfairly out of date. The a5xx specific features (compute/images/atomics/\n
On Fri, Nov 17, 2017 at 11:16 AM, Kenneth Graunke wrote:
> On Thursday, November 16, 2017 8:47:33 PM PST Matt Turner wrote:
>> diff --git a/src/intel/compiler/intel_asm_annotation.c
>> b/src/intel/compiler/intel_asm_annotation.c
>> index 26ab4b9818..fa37f248d1 100644
>> --- a/src/intel/compiler/i
Pushed as of 11:33. Maybe too late, but we can pick it up in 17.3.1 if
needed.
On Fri, Nov 17, 2017 at 7:31 AM, Emil Velikov
wrote:
> Hi Jason,
>
> On 13 November 2017 at 16:12, Jason Ekstrand wrote:
> > Found by inspection
> >
> > Cc: mesa-sta...@lists.freedesktop.org
> > ---
> > src/intel/v
On Thursday, November 16, 2017 8:47:33 PM PST Matt Turner wrote:
> diff --git a/src/intel/compiler/intel_asm_annotation.c
> b/src/intel/compiler/intel_asm_annotation.c
> index 26ab4b9818..fa37f248d1 100644
> --- a/src/intel/compiler/intel_asm_annotation.c
> +++ b/src/intel/compiler/intel_asm_annot
On Friday, November 17, 2017 9:47:59 AM PST Lionel Landwerlin wrote:
> This will allow to set the flags on any anv_bo created/filled from a
> state pool or block pool later.
>
> Signed-off-by: Lionel Landwerlin
> ---
> src/intel/vulkan/anv_allocator.c | 24
> --
On Fri, Nov 17, 2017 at 05:07:09PM +0100, Juan A. Suarez Romero wrote:
> From section 8.7, page 179 of OpenGL ES 3.2 spec:
>
> An INVALID_OPERATION error is generated by CompressedTexImage3D
> if internalformat is one of the the formats in table 8.17 and target
> is not TEXTURE_2D_ARRAY, TEX
On Fri, Nov 17, 2017 at 09:42:40AM +0100, Juan A. Suarez Romero wrote:
> On Wed, 2017-11-15 at 17:56 -0500, Ilia Mirkin wrote:
> > On Wed, Nov 15, 2017 at 5:49 PM, Nanley Chery wrote:
> > > On Wed, Nov 15, 2017 at 12:08:58PM -0500, Ilia Mirkin wrote:
> > > > On Wed, Nov 15, 2017 at 11:54 AM, Juan
On 17/11/17 17:57, Kristian Høgsberg wrote:
On Fri, Nov 17, 2017 at 9:48 AM, Lionel Landwerlin
wrote:
When the kernel support flagging our BO, let's mark batch &
instruction BOs for capture so then can be included in the error
state.
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/anv
On Fri, Nov 17, 2017 at 9:48 AM, Lionel Landwerlin
wrote:
> When the kernel support flagging our BO, let's mark batch &
> instruction BOs for capture so then can be included in the error
> state.
>
> Signed-off-by: Lionel Landwerlin
> ---
> src/intel/vulkan/anv_device.c | 6 --
> src/intel/
For the series:
Reviewed-by: Marek Olšák
Marek
On Mon, Nov 13, 2017 at 3:03 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> We could always do the flush asynchronously, but if we're going to wait
> for a fence anyway and the driver thread is currently idle, the additional
> communication
When the kernel support flagging our BO, let's mark batch &
instruction BOs for capture so then can be included in the error
state.
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/anv_device.c | 6 --
src/intel/vulkan/anv_private.h | 1 +
2 files changed, 5 insertions(+), 2 deletions(
This will allow to set the flags on any anv_bo created/filled from a
state pool or block pool later.
Signed-off-by: Lionel Landwerlin
---
src/intel/vulkan/anv_allocator.c | 24 --
src/intel/vulkan/anv_device.c | 18
src/
Hi,
We do the same things in i965 to notify the kernel about buffers of
interest in case of GPU hang. Let's do it in Anv too!
Cheer,
Lionel Landwerlin (2):
anv: setup BO flags at state_pool/block_pool creation
anv: flag batch & instruction BOs for capture
src/intel/vulkan/anv_allocator.c
On Thursday, 2017-11-16 16:36:27 -0800, Dylan Baker wrote:
> This patch checks for an and then enables sse4.1 optimizations if the
> host machine will be x86/x86_64.
>
> v2: - Don't compile code, it's unnecessary since we require a compiler
> which always has SSE4.1 (Matt)
Maybe add this se
On Thursday, 2017-11-16 16:27:35 -0800, Dylan Baker wrote:
> Which is required for the gallium media state trackers.
>
> v4: - Make the full version the hard link and the partial so versiions
> the symlinks
>
> Signed-off-by: Dylan Baker
> ---
> bin/install_megadrivers.py | 19 +++
On Thursday, 2017-11-16 14:16:38 -0800, Dylan Baker wrote:
> Quoting Eric Engestrom (2017-11-16 03:46:04)
> > On Wednesday, 2017-11-15 17:11:00 -0800, Dylan Baker wrote:
> > > This patch allows building asm for x86 on x86_64 platforms, when the
> > > operating system is the same. Previously cross c
On Thursday, 2017-11-16 13:27:28 -0500, Adam Jackson wrote:
> The latter is now the one place where we initialize an _EGLDisplay.
>
> Signed-off-by: Adam Jackson
> ---
> src/egl/main/eglapi.c | 67
> ++-
> 1 file changed, 45 insertions(+), 22 dele
On 11/17/2017 04:03 AM, Gert Wollny wrote:
Hello Brian and Emil,
considering Emils comments on the patches 17 and 29 I'd suggest to drop
these two from the series.
Regarding 29 (-Wmissing-field-initializers) I have to admit I'm not
sure how to silence this in a save way other then really initia
From section 8.7, page 179 of OpenGL ES 3.2 spec:
An INVALID_OPERATION error is generated by CompressedTexImage3D
if internalformat is one of the the formats in table 8.17 and target
is not TEXTURE_2D_ARRAY, TEXTURE_CUBE_MAP_ARRAY or TEXTURE_3D.
An INVALID_OPERATION error is generated by
Reviewed-by: Marek Olšák
Marek
On Fri, Nov 17, 2017 at 3:05 AM, Dave Airlie wrote:
> From: Dave Airlie
>
> There is no need to have these overlap if we support hw atomics.
>
> Signed-off-by: Dave Airlie
> ---
> src/mesa/state_tracker/st_atom_storagebuf.c | 8 +---
> src/mesa/state_track
On Wed, Nov 15, 2017 at 05:33:17PM +0100, Lucas Stach wrote:
> The OVERWRITE bit disables destination fetches, which is exactly what
> we want when there is no valid color buffer bound.
>
> Signed-off-by: Lucas Stach
Reviewed-by: Wladimir J. van der Laan
___
Reviewed-by: Marek Olšák
Marek
On Wed, Nov 15, 2017 at 11:23 AM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> We need to account for SGPR locations in merged shaders.
>
> This case is exercised by KHR-GL45.enhanced_layouts.vertex_attrib_locations
>
> Fixes: 79c2e7388c7f ("radeonsi/gfx9: us
On 11/17/2017 04:59 AM, Eric Engestrom wrote:
On Thursday, 2017-11-16 11:17:57 -0700, Brian Paul wrote:
For checking that bitfields are large enough to hold the largest
expected value.
v2: move into existing util/macros.h header where STATIC_ASSERT() lives.
v3: add MAYBE_UNUSED to variable decl
On 16 November 2017 at 18:27, Adam Jackson wrote:
> ... because converting attrib to int truncates, and that's bad.
>
I seems to recall mentioning the same thing as _eglConvertIntsToAttribs
Indeed truncating is bad - fortunately we don't have a case where that matters..
With Eric's comment the pa
---
src/gallium/targets/dri/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/targets/dri/meson.build
b/src/gallium/targets/dri/meson.build
index c591b75d037..bb056764b4c 100644
--- a/src/gallium/targets/dri/meson.build
+++ b/src/gallium/targets/dri/meson
Hi Jason,
On 13 November 2017 at 16:12, Jason Ekstrand wrote:
> Found by inspection
>
> Cc: mesa-sta...@lists.freedesktop.org
> ---
> src/intel/vulkan/genX_cmd_buffer.c | 9 ++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
Analogous to 2/14, if we can have this updated and merged in
Am 17.11.2017 um 14:20 schrieb Emil Velikov:
> Hi Roland,
>
> Just a small fly-by idea:
>
> On 17 November 2017 at 07:00, wrote:
>
>> - if(bld->type.norm) {
>> + if(type.norm) {
>>const char *intrinsic = NULL;
>>
>> - if(a == bld->one || b == bld->one)
>> + if(!type.sign
On Thursday, 2017-11-16 13:27:27 -0500, Adam Jackson wrote:
> ... because converting attrib to int truncates, and that's bad.
>
> Signed-off-by: Adam Jackson
> ---
> src/egl/main/eglapi.c | 29 ++---
> src/egl/main/egldisplay.c | 15 ---
> src/egl/main/egl
Hi Jason, Lionel,
On 14 November 2017 at 14:33, Lionel Landwerlin
wrote:
> Oh dear...
>
> Reviewed-by: Lionel Landwerlin
>
> On 13/11/17 16:12, Jason Ekstrand wrote:
>>
>> Otherwise, if the image is not bound to the start of the buffer, we're
>> going to be reading and writing its fast clear sta
Hi Anuj,
On 14 November 2017 at 22:40, Anuj Phogat wrote:
> Signed-off-by: Anuj Phogat
> Cc:
> ---
> This series has already been pushed upstream. Nanley and Ken has
> taken a look at the patches. I'll send out a separate patch for
> a small change suggested by them.
>
JFYI since the patch* whi
On 14 November 2017 at 19:28, Matt Turner wrote:
> On Tue, Nov 14, 2017 at 6:37 AM, Emil Velikov
> wrote:
>> The fourth release candidate for Mesa 17.3.0 is now available.
>>
>> As per the issue tracker [1] we still have a number of outstanding bugs
>> blocking the release.
>>
>> [1] https://bug
Hi Roland,
Just a small fly-by idea:
On 17 November 2017 at 07:00, wrote:
> - if(bld->type.norm) {
> + if(type.norm) {
>const char *intrinsic = NULL;
>
> - if(a == bld->one || b == bld->one)
> + if(!type.sign && (a == bld->one || b == bld->one))
> return bld->one
On Thursday, 2017-11-16 11:17:57 -0700, Brian Paul wrote:
> For checking that bitfields are large enough to hold the largest
> expected value.
>
> v2: move into existing util/macros.h header where STATIC_ASSERT() lives.
> v3: add MAYBE_UNUSED to variable declaration
Good shout on the MAYBE_UNUSED
Hi Dylan,
On 17 November 2017 at 00:27, Dylan Baker wrote:
> + elif not (with_gallium_r600 or with_gallium_radeonsi or
> with_gallium_nouveau)
> + elif not (with_gallium_r600 or with_gallium_radeonsi or
> with_gallium_nouveau)
> +error('OMX state tracker requires at least one of the fo
https://bugs.freedesktop.org/show_bug.cgi?id=103732
--- Comment #6 from Andrés Gómez García ---
Created attachment 135551
--> https://bugs.freedesktop.org/attachment.cgi?id=135551&action=edit
BT from the stuck glx-multi-context-single-window process
This is a quite complete backtrace from the
Thankyou! very much for the patch to the command line disassembler.
-Kevin
-Original Message-
From: Matt Turner [mailto:matts...@gmail.com]
Sent: Friday, November 17, 2017 6:52 AM
To: Rogovin, Kevin
Cc: mesa-dev@lists.freedesktop.org
Subject: Re: [Mesa-dev] [PATCH 07/18] intel/compiler
https://bugs.freedesktop.org/show_bug.cgi?id=103732
Andrés Gómez García changed:
What|Removed |Added
Summary|swr often gets stuck in |[swr] often gets stuck in
So far on pre-cayman chipsets the CF instructions CF_OP_LOOP_END,
CF_OP_CALL_FS, CF_OP_POP, and CF_OP_GDS an extra CF_NOP instruction
was added to add the EOP flag, even though this is not actually
needed, because all these instrutions support the EOP flag.
This patch removes the fixup code, adds
On 16 November 2017 at 22:21, Dylan Baker wrote:
> Quoting Emil Velikov (2017-11-16 03:35:17)
>> Hi Dylan,
>>
>> On 16 November 2017 at 01:10, Dylan Baker wrote:
>> > This patch checks for an and then enables sse4.1 optimizations if the
>> > host machine will be x86/x86_64.
>> >
>> Hell yeah, SSE
Hello Brian and Emil,
considering Emils comments on the patches 17 and 29 I'd suggest to drop
these two from the series.
Regarding 29 (-Wmissing-field-initializers) I have to admit I'm not
sure how to silence this in a save way other then really initializing
all members.
For 17 I'll take anot
You can add my Acked-by to this patch, I skimmed over it and I have not
found any error.
Acked-by: Samuel Iglesias Gonsálvez
I would be better for review if it was split in different patches, even
though they would be squashed together before pushing to master.
Sam
On Thu, 2017-11-16 at 20:47
Hi Jason,
-Ursprüngliche Nachricht-
Von: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] Im Auftrag von
Jason Ekstrand
Gesendet: Donnerstag, 16. November 2017 22:29
An: mesa-dev@lists.freedesktop.org
Cc: Dave Airlie
Betreff: [Mesa-dev] [PATCH 01/28] vulkan/wsi: use function ptr
Patches 1, 2 and 4 are:
Reviewed-by: Samuel Iglesias Gonsálvez
Sam
On Thu, 2017-11-16 at 20:47 -0800, Matt Turner wrote:
> It was the only file named intel_* in the compiler.
> ---
> src/intel/Makefile.sources | 6
> +++---
> src/intel/compiler/{intel_asm_
On Wed, 2017-11-15 at 17:56 -0500, Ilia Mirkin wrote:
> On Wed, Nov 15, 2017 at 5:49 PM, Nanley Chery wrote:
> > On Wed, Nov 15, 2017 at 12:08:58PM -0500, Ilia Mirkin wrote:
> > > On Wed, Nov 15, 2017 at 11:54 AM, Juan A. Suarez Romero
> > > wrote:
> > > > From section 8.7, page 179 of OpenGL ES
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