On Mon, Nov 13, 2017 at 5:18 AM, <[email protected]> wrote: > From: Kevin Rogovin <[email protected]>
I like this. Thanks for writing this. > Signed-off-by: Kevin Rogovin <[email protected]> > --- > src/intel/Makefile.tools.am | 21 ++- > src/intel/tools/.gitignore | 1 + > src/intel/tools/gen_shader_disassembler.c | 221 > ++++++++++++++++++++++++++++++ > 3 files changed, 242 insertions(+), 1 deletion(-) > create mode 100644 src/intel/tools/gen_shader_disassembler.c > > diff --git a/src/intel/Makefile.tools.am b/src/intel/Makefile.tools.am > index dd68d8f173..71eb3253c3 100644 > --- a/src/intel/Makefile.tools.am > +++ b/src/intel/Makefile.tools.am > @@ -32,7 +32,8 @@ intellib_LTLIBRARIES = \ > > intelbin_PROGRAMS = tools/i965_batchbuffer_dump_show \ > tools/i965_batchbuffer_dump_show_xml \ > - tools/i965_batchbuffer_dump_show_json > + tools/i965_batchbuffer_dump_show_json \ > + tools/gen_shader_disassembler > > intelbin_SCRIPTS = tools/i965_batchbuffer_logger_sh > CLEANFILES += $(intelbin_SCRIPTS) > @@ -111,3 +112,21 @@ tools_i965_batchbuffer_dump_show_xml_SOURCES = \ > > tools_i965_batchbuffer_dump_show_json_SOURCES = \ > tools/i965_batchbuffer_dump_show_json.cpp > + > +tools_gen_shader_disassembler_SOURCES = \ > + tools/gen_shader_disassembler.c \ > + tools/disasm.c \ > + tools/gen_disasm.h > + > +tools_gen_shader_disassembler_LDADD = \ > + common/libintel_common.la \ > + compiler/libintel_compiler.la \ > + $(top_builddir)/src/util/libmesautil.la \ > + $(PTHREAD_LIBS) \ > + $(EXPAT_LIBS) \ > + $(ZLIB_LIBS) > + > +tools_gen_shader_disassembler_CFLAGS = \ > + $(AM_CFLAGS) \ > + $(EXPAT_CFLAGS) \ > + $(ZLIB_CFLAGS) > diff --git a/src/intel/tools/.gitignore b/src/intel/tools/.gitignore > index ea4dc23c20..e9b22c89aa 100644 > --- a/src/intel/tools/.gitignore > +++ b/src/intel/tools/.gitignore > @@ -4,3 +4,4 @@ > /i965_batchbuffer_dump_show > /i965_batchbuffer_dump_show_xml > /i965_batchbuffer_dump_show_json > +/gen_shader_disassembler > diff --git a/src/intel/tools/gen_shader_disassembler.c > b/src/intel/tools/gen_shader_disassembler.c > new file mode 100644 > index 0000000000..bd6c400fcc > --- /dev/null > +++ b/src/intel/tools/gen_shader_disassembler.c > @@ -0,0 +1,221 @@ > +/* > + * Copyright © 2017 Intel Corporation > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice (including the next > + * paragraph) shall be included in all copies or substantial portions of the > + * Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER > DEALINGS > + * IN THE SOFTWARE. > + */ > + > +#include <stdio.h> > +#include <stdint.h> > +#include <stdlib.h> > +#include <stdbool.h> > +#include <getopt.h> > +#include <strings.h> > + > +#include "compiler/brw_inst.h" > +#include "compiler/brw_eu.h" > + > +static > +void static void on one line > +print_opcodes(const void *data, int data_sz, > + struct gen_device_info *devinfo, > + bool print_offsets) > +{ > + for (int offset = 0; offset < data_sz;) { > + const brw_inst *insn = data + offset; > + bool compacted; > + brw_inst uncompacted; > + enum opcode opcode; > + const struct opcode_desc *desc; > + > + if (print_offsets) { > + printf("0x%08x: ", offset); > + } > + > + compacted = brw_inst_cmpt_control(devinfo, insn); > + if (compacted) { > + brw_compact_inst *compacted_insn; > + compacted_insn = (void*)insn; Declare and initialize one one line. > + brw_uncompact_instruction(devinfo, &uncompacted, compacted_insn); > + insn = &uncompacted; > + offset += 8; > + } else { > + offset += 16; > + } > + > + opcode = brw_inst_opcode(devinfo, insn); > + desc = brw_opcode_desc(devinfo, opcode); > + if (desc) { > + printf("(0x%08x) %s", opcode, desc->name); > + } else { > + printf("(0x%08x) UnknownOpcode", opcode); > + } > + > + if (compacted) { > + printf(" {Compacted}"); > + } > + > + printf("\n"); > + } > +} > + > +static > +void > +print_disassembly(const void *data, int data_sz, > + struct gen_device_info *devinfo, > + bool print_offsets) > +{ > + struct annotation_info annotation_info = { > + .ann_count = 1, > + .ann_size = 2, > + }; > + annotation_info.mem_ctx = ralloc_context(NULL); > + annotation_info.ann = rzalloc_array(annotation_info.mem_ctx, > + struct annotation, > + annotation_info.ann_size); > + annotation_info.ann[0].offset = 0; > + annotation_info.ann[1].offset = data_sz; > + brw_validate_instructions(devinfo, data, 0, data_sz, &annotation_info); > + struct annotation *annotation = annotation_info.ann; > + int offset = 0; > + > + for (int i = 0; i < annotation_info.ann_count; i++) { > + int end_offset = annotation[i + 1].offset; > + > + brw_disassemble_print_offset_option(devinfo, data, offset, > + end_offset, stdout, print_offsets); > + > + if (annotation[i].error) { > + fputs(annotation[i].error, stdout); > + } > + > + offset = end_offset; > + } > + > + if (offset < data_sz) { > + brw_disassemble_print_offset_option(devinfo, data, offset, > + data_sz, stdout, print_offsets); > + } > + > + ralloc_free(annotation_info.mem_ctx); Attached is a patch that you can squash in to fix up the annotation changes. It's updated from the one I sent you earlier due to some changes as a result of review feedback. It also fixes the couple of trivial comments I gave earlier. With that, this patch is Reviewed-by: Matt Turner <[email protected]> Thanks!
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