llvmbot wrote:
@llvm/pr-subscribers-llvm-selectiondag
Author: Matt Arsenault (arsenm)
Changes
Work towards making RuntimeLibcalls the centralized location for
all libcall information. This requires changing the encoding from
tracking the ISD::CondCode to using CmpInst::Predicate.
---
Pat
llvmbot wrote:
@llvm/pr-subscribers-backend-arm
Author: Matt Arsenault (arsenm)
Changes
Work towards making RuntimeLibcalls the centralized location for
all libcall information. This requires changing the encoding from
tracking the ISD::CondCode to using CmpInst::Predicate.
---
Patch is
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/142905
Work towards making RuntimeLibcalls the centralized location for
all libcall information. This requires changing the encoding from
tracking the ISD::CondCode to using CmpInst::Predicate.
>From 0b1472786bc8e235718
arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142905?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/142905
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@@ -2627,6 +2629,93 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
@@ -184,24 +199,36 @@ def _compute_project_check_targets(projects_to_test:
Set[str]) -> Set[str]:
return check_targets
-def _compute_runtimes_to_test(projects_to_test: Set[str]) -> Set[str]:
+def _compute_runtimes_to_test(modified_projects: Set[str], platform: str) ->
S
https://github.com/rampitec created
https://github.com/llvm/llvm-project/pull/142910
None
>From 321eb42ae21d0d3156fb5ef15f5b336551a20c5b Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin
Date: Wed, 4 Jun 2025 23:46:28 -0700
Subject: [PATCH] [AMDGPU] Baseline fneg-fabs.bf16.ll tests. NFC.
-
https://github.com/rampitec created
https://github.com/llvm/llvm-project/pull/142911
None
>From 44a9017e98eff94456889a528a166d6aabca842d Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin
Date: Wed, 4 Jun 2025 23:49:43 -0700
Subject: [PATCH] [AMDGPU] Patterns for <2 x bfloat> fneg (fabs)
--
rampitec wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142911?utm_source=stack-comment-downstack-mergeability-warning"
rampitec wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142910?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/rampitec ready_for_review
https://github.com/llvm/llvm-project/pull/142910
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llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Stanislav Mekhanoshin (rampitec)
Changes
---
Patch is 52.94 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/142910.diff
1 Files Affected:
- (added) llvm/test/CodeGen/AMDGPU/fneg-fab
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Stanislav Mekhanoshin (rampitec)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/142911.diff
2 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/SIInstructions.td (+5-6)
- (modified) llvm/test/CodeGen/AMDGP
https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/142696
>From 360e723b51ee201603f72b56859cd7c6d6faec24 Mon Sep 17 00:00:00 2001
From: Aiden Grossman
Date: Thu, 5 Jun 2025 06:51:37 +
Subject: [PATCH] feedback
Created using spr 1.3.4
---
.ci/compute_projec
https://github.com/rampitec ready_for_review
https://github.com/llvm/llvm-project/pull/142911
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https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/142908
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llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
Author: Yingwei Zheng (dtcxzyw)
Changes
Backport
https://github.com/llvm/llvm-project/commit/0f7cc4132b62e0ecdbd3193e954b745c5f492e90.
https://github.com/llvm/llvm-project/pull/79993 assumes that a reachable case
must be contained by `
https://github.com/dtcxzyw milestoned
https://github.com/llvm/llvm-project/pull/142730
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https://github.com/ritter-x2a created
https://github.com/llvm/llvm-project/pull/142739
This patch focuses on generic DAG combines, plus an AMDGPU-target-specific one
that is closely connected.
The generic DAG combine is based on a part of PR #105669 by @rgwott, which was
adapted from work by @j
https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/142604
>From 9fd34f632f194a025669b2c2c0f83d19fb48b00c Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Tue, 3 Jun 2025 15:08:06 +0200
Subject: [PATCH 1/3] [AMDGPU] New RegBankSelect: Add rules for `G_PTRTOINT`
and `G_I
https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/142601
>From 96669eee5e756faed679480521faafd9f1bad9d1 Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Tue, 3 Jun 2025 13:27:55 +0200
Subject: [PATCH] [AMDGPU] New RegBanKSelect: Add S128 types
---
llvm/lib/Target/AMD
https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/142603
>From 3a47927dfaaa98cb0d2a336bfa416d2eb28e294d Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Tue, 3 Jun 2025 15:03:01 +0200
Subject: [PATCH] [AMDGPU] Improve test coverage for G_INTTOPTR and G_PTRTOINT
Test P
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Fabian Ritter (ritter-x2a)
Changes
Pre-committing tests to show improvements in a follow-up PR with the
combines.
---
Full diff: https://github.com/llvm/llvm-project/pull/142738.diff
1 Files Affected:
- (added) llvm/test/CodeGe
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Fabian Ritter (ritter-x2a)
Changes
This patch focuses on generic DAG combines, plus an AMDGPU-target-specific one
that is closely connected.
The generic DAG combine is based on a part of PR #105669 by @rgwott, which was
adapted fr
https://github.com/ritter-x2a ready_for_review
https://github.com/llvm/llvm-project/pull/142739
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https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/142603
>From 3a47927dfaaa98cb0d2a336bfa416d2eb28e294d Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Tue, 3 Jun 2025 15:03:01 +0200
Subject: [PATCH] [AMDGPU] Improve test coverage for G_INTTOPTR and G_PTRTOINT
Test P
https://github.com/ritter-x2a created
https://github.com/llvm/llvm-project/pull/142738
Pre-committing tests to show improvements in a follow-up PR with the
combines.
>From d363847d4c4f3922875c23c69fd0e6e0148c7eff Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 3 Jun 2025 09:49:19 -0400
https://github.com/rovka approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/142603
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https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/142602
>From c69258d78459b8dcc89bec38a8a795763cd3dc80 Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Tue, 3 Jun 2025 14:40:38 +0200
Subject: [PATCH] [AMDGPU] New RegBankSelect: Add Ptr32/Ptr64/Ptr128
There's quite a
ritter-x2a wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142738?utm_source=stack-comment-downstack-mergeability-warnin
https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/142602
>From c69258d78459b8dcc89bec38a8a795763cd3dc80 Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Tue, 3 Jun 2025 14:40:38 +0200
Subject: [PATCH] [AMDGPU] New RegBankSelect: Add Ptr32/Ptr64/Ptr128
There's quite a
https://github.com/Pierre-vh edited
https://github.com/llvm/llvm-project/pull/142601
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https://github.com/MacDue commented:
cc @efriedma-quic
https://github.com/llvm/llvm-project/pull/142741
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@@ -0,0 +1,207 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942
-disable-separate-const-offset-from-gep=1 -amdgpu-use-sdag-ptradd=1 < %s |
FileCheck --check-prefixes=GFX942,GFX942_PTRADD %s
+; R
ritter-x2a wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142739?utm_source=stack-comment-downstack-mergeability-warnin
MacDue wrote:
> If you express the size of the hazard padding between the PPRs and ZPRs as a
> scalable size, that might simplify some of the logic? You wouldn't need to
> represent the two areas as separate stacks, at least.
It would, but for the sizes of hazard padding and vscale we're inter
https://github.com/aengelke updated
https://github.com/llvm/llvm-project/pull/142584
>From 4cbc231699c11444cff73ff28b88dc0f3835c752 Mon Sep 17 00:00:00 2001
From: Alexis Engelke
Date: Wed, 4 Jun 2025 09:21:02 +
Subject: [PATCH] Move one check to beginning of function
Created using spr 1.3.
https://github.com/tblah approved this pull request.
https://github.com/llvm/llvm-project/pull/142567
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@@ -1030,6 +1036,11 @@ bool MachineBlockPlacement::isTrellis(
SmallPtrSet SeenPreds;
for (MachineBasicBlock *Succ : ViableSuccs) {
+// Compile-time optimization: runtime is quadratic in the number of
+// predecessors. For such uncommon cases, exit early.
+if (S
https://github.com/dtcxzyw created
https://github.com/llvm/llvm-project/pull/142730
Backport
https://github.com/llvm/llvm-project/commit/0f7cc4132b62e0ecdbd3193e954b745c5f492e90.
https://github.com/llvm/llvm-project/pull/79993 assumes that a reachable case
must be contained by `CR`. However,
https://github.com/DavidSpickett commented:
Agree that `_compute_runtimes_to_test` is a confusing name but if it's going to
change anyway, this LGTM.
https://github.com/llvm/llvm-project/pull/142695
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https://github.com/DavidSpickett approved this pull request.
https://github.com/llvm/llvm-project/pull/142695
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Endilll wrote:
> I'm not sure how you're seeing this.
https://github.com/llvm/llvm-project/pull/142694
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https://github.com/tblah approved this pull request.
Looks great!
https://github.com/llvm/llvm-project/pull/142735
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https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142739
>From efdaf03ba25edfd254a3b9bc79470ed861e123c1 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 03:32:32 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add ISD::PTRADD DAG combines
This patch focuse
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142738
>From 8f51e2d76b4336f81027905b3c9b711eac7b6406 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 3 Jun 2025 09:49:19 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add tests for ISD::PTRADD DAG combines
Pre-com
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142739
>From efdaf03ba25edfd254a3b9bc79470ed861e123c1 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 03:32:32 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add ISD::PTRADD DAG combines
This patch focuse
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/142738
>From 8f51e2d76b4336f81027905b3c9b711eac7b6406 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Tue, 3 Jun 2025 09:49:19 -0400
Subject: [PATCH] [AMDGPU][SDAG] Add tests for ISD::PTRADD DAG combines
Pre-com
cor3ntin wrote:
This is a merge commit, it might be worth rebasing / cherry picking on a clean
branch
https://github.com/llvm/llvm-project/pull/142694
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llvmbot wrote:
@llvm/pr-subscribers-libcxx
Author: Aiden Grossman (boomanaiden154)
Changes
This patch switches us to using LLVM_ENABLE_RUNTIMES rather than using
separate runtimes builds for some reductions in CMake configuration time
and some simplification of the monolithic-linux.sh scri
@@ -1592,6 +1603,11 @@ bool MachineBlockPlacement::hasBetterLayoutPredecessor(
BlockFrequency CandidateEdgeFreq = MBFI->getBlockFreq(BB) * RealSuccProb;
bool BadCFGConflict = false;
+ // Compile-time optimization: runtime is quadratic in the number of
aen
https://github.com/momchil-velikov updated
https://github.com/llvm/llvm-project/pull/142422
>From 887f383aa07cca3fe023cd64b3b119cbf013c17b Mon Sep 17 00:00:00 2001
From: Momchil Velikov
Date: Mon, 2 Jun 2025 15:13:13 +
Subject: [PATCH 1/3] [MLIR] Fix incorrect slice contiguity inference in
https://github.com/momchil-velikov updated
https://github.com/llvm/llvm-project/pull/142422
>From 887f383aa07cca3fe023cd64b3b119cbf013c17b Mon Sep 17 00:00:00 2001
From: Momchil Velikov
Date: Mon, 2 Jun 2025 15:13:13 +
Subject: [PATCH 1/3] [MLIR] Fix incorrect slice contiguity inference in
Endilll wrote:
I just opened 9e3490b51f85d1aff3978dc32aadde4531363774 in my local git, and
yes, all libc++ changes are there alongside changes to `monolithic-linux.sh`
that we're interested in
https://github.com/llvm/llvm-project/pull/142694
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https://github.com/ritter-x2a ready_for_review
https://github.com/llvm/llvm-project/pull/142738
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https://github.com/Pierre-vh closed
https://github.com/llvm/llvm-project/pull/142600
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https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/142601
>From 96669eee5e756faed679480521faafd9f1bad9d1 Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Tue, 3 Jun 2025 13:27:55 +0200
Subject: [PATCH] [AMDGPU] New RegBanKSelect: Add S128 types
---
llvm/lib/Target/AMD
https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/142604
>From 9fd34f632f194a025669b2c2c0f83d19fb48b00c Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Tue, 3 Jun 2025 15:08:06 +0200
Subject: [PATCH 1/3] [AMDGPU] New RegBankSelect: Add rules for `G_PTRTOINT`
and `G_I
SamTebbs33 wrote:
Really sorry for the spam again, I pushed to the user branch in my fork rather
than the base branch in llvm :facepalm:
https://github.com/llvm/llvm-project/pull/136997
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https://github.com/ritter-x2a created
https://github.com/llvm/llvm-project/pull/142777
Pre-committing test to show improvements in a follow-up PR.
>From 1fe91cbd5d3a3f8baa59eb389936f92b0a49ab6c Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:30:34 -0400
Subject: [PATCH] [
https://github.com/ritter-x2a created
https://github.com/llvm/llvm-project/pull/142778
This is used in a bunch of memory-related transforms.
For SWDEV-516125.
>From 269663e10674813074ccd9645b431fed0287a405 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Wed, 4 Jun 2025 09:48:02 -0400
Subje
ritter-x2a wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142778?utm_source=stack-comment-downstack-mergeability-warnin
ritter-x2a wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142777?utm_source=stack-comment-downstack-mergeability-warnin
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Fabian Ritter (ritter-x2a)
Changes
Pre-committing test to show improvements in a follow-up PR.
---
Full diff: https://github.com/llvm/llvm-project/pull/142777.diff
1 Files Affected:
- (modified) llvm/test/CodeGen/AMDGPU/ptradd-
https://github.com/ritter-x2a ready_for_review
https://github.com/llvm/llvm-project/pull/142777
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llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Fabian Ritter (ritter-x2a)
Changes
This is used in a bunch of memory-related transforms.
For SWDEV-516125.
---
Full diff: https://github.com/llvm/llvm-project/pull/142778.diff
2 Files Affected:
- (modified) llvm/lib/CodeGen/Se
https://github.com/ritter-x2a ready_for_review
https://github.com/llvm/llvm-project/pull/142778
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@@ -3780,25 +3938,49 @@ void AArch64FrameLowering::determineStackHazardSlot(
bool HasFPRCSRs = any_of(SavedRegs.set_bits(), [](unsigned Reg) {
return AArch64::FPR64RegClass.contains(Reg) ||
AArch64::FPR128RegClass.contains(Reg) ||
- AArch64::ZPRRegCla
https://github.com/DavidSpickett approved this pull request.
CMake once with the runtimes enabled. Modify the test parameters each time.
Looks good to me.
https://github.com/llvm/llvm-project/pull/142694
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@@ -285,6 +285,62 @@ class MapInfoFinalizationPass
return false;
}
+ mlir::omp::MapInfoOp genBoxcharMemberMap(mlir::omp::MapInfoOp op,
bhandarkar-pranav wrote:
Thank you, @agozillon for the review. Yes, it was related to the fact that
`genDescriptorMe
https://github.com/ergawy updated
https://github.com/llvm/llvm-project/pull/142567
>From fd943c277c419105055caf92180f641550b747f3 Mon Sep 17 00:00:00 2001
From: ergawy
Date: Tue, 3 Jun 2025 04:22:20 -0500
Subject: [PATCH] [flang] Enable delayed localization by default for `do
concurrent`
---
https://github.com/ergawy updated
https://github.com/llvm/llvm-project/pull/142735
>From 62596cdddcbda71b2a1b306cedd8de238510b105 Mon Sep 17 00:00:00 2001
From: ergawy
Date: Wed, 4 Jun 2025 00:54:37 -0500
Subject: [PATCH] [flang][OpenMP] Map basic `local` specifiers to `private`
clauses
Start
https://github.com/petar-avramovic created
https://github.com/llvm/llvm-project/pull/142789
None
>From fcd0dc75f4674297ef1f5c591ecf6c16314ce3e2 Mon Sep 17 00:00:00 2001
From: Petar Avramovic
Date: Wed, 4 Jun 2025 17:12:16 +0200
Subject: [PATCH] AMDGPU/GlobalISel: Improve readanylane combines i
petar-avramovic wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142789?utm_source=stack-comment-downstack-mergeability-w
petar-avramovic wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/142790?utm_source=stack-comment-downstack-mergeability-w
https://github.com/petar-avramovic ready_for_review
https://github.com/llvm/llvm-project/pull/142789
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llvmbot wrote:
@llvm/pr-subscribers-llvm-globalisel
Author: Petar Avramovic (petar-avramovic)
Changes
Add rules for G_AMDGPU_BUFFER_LOAD and implement waterfall lowering
for divergent operands that must be sgpr.
---
Patch is 89.10 KiB, truncated to 20.00 KiB below, full version:
https:/
llvmbot wrote:
@llvm/pr-subscribers-llvm-globalisel
Author: Petar Avramovic (petar-avramovic)
Changes
---
Patch is 22.08 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/142789.diff
3 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGP
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Petar Avramovic (petar-avramovic)
Changes
---
Patch is 22.08 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/142789.diff
3 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGPU
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/142778
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https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/142777
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@@ -2627,6 +2629,93 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
https://github.com/petar-avramovic ready_for_review
https://github.com/llvm/llvm-project/pull/142790
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llvmbot wrote:
@llvm/pr-subscribers-flang-fir-hlfir
Author: Kareem Ergawy (ergawy)
Changes
Extends support for locality specifier to OpenMP translation by adding supprot
for transling localizers that have `init` and `dealloc` regions.
---
Full diff: https://github.com/llvm/llvm-project/p
@@ -14935,6 +14936,52 @@ SDValue SITargetLowering::performAddCombine(SDNode *N,
return SDValue();
}
+SDValue SITargetLowering::performPtrAddCombine(SDNode *N,
+ DAGCombinerInfo &DCI) const {
+ SelectionDAG &DAG = DCI.DAG;
+ EVT
@@ -2627,6 +2629,93 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/142739
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@@ -14935,6 +14936,52 @@ SDValue SITargetLowering::performAddCombine(SDNode *N,
return SDValue();
}
+SDValue SITargetLowering::performPtrAddCombine(SDNode *N,
+ DAGCombinerInfo &DCI) const {
+ SelectionDAG &DAG = DCI.DAG;
+ EVT
https://github.com/ergawy created
https://github.com/llvm/llvm-project/pull/142795
Extends support for locality specifier to OpenMP translation by adding supprot
for transling localizers that have `init` and `dealloc` regions.
>From 7b331963134cafc47290a45a321e7a62ef8cfce7 Mon Sep 17 00:00:00
https://github.com/petar-avramovic approved this pull request.
https://github.com/llvm/llvm-project/pull/142604
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@@ -2627,6 +2629,93 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
https://github.com/petar-avramovic created
https://github.com/llvm/llvm-project/pull/142790
Add rules for G_AMDGPU_BUFFER_LOAD and implement waterfall lowering
for divergent operands that must be sgpr.
>From 6dd26d44b55420f91a1684e78938ea8b426680cc Mon Sep 17 00:00:00 2001
From: Petar Avramovic
@@ -14935,6 +14936,52 @@ SDValue SITargetLowering::performAddCombine(SDNode *N,
return SDValue();
}
+SDValue SITargetLowering::performPtrAddCombine(SDNode *N,
+ DAGCombinerInfo &DCI) const {
+ SelectionDAG &DAG = DCI.DAG;
+ EVT
quic-garvgupt wrote:
Hi @petrhosek , I understand you had some feedback regarding further splitting
this PR however I responded to all of them. If you do not have any further
comments/feedback, will really appreciate if you can approve this PR. Thanks
again for reviewing all the patches!
http
@@ -2627,6 +2629,93 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
jrtc27 wrote:
> isNullConstant(X), since there are address spaces where 0 is a perfectly
normal value that shouldn't be treated specially,
I don't know if it's important for CHERI to have this or if the IR-level
optimisations render it not so needed. But `NULL + int` is how we represent an
int
kyulee-com wrote:
Adding this threshold check within `isTrellis()` feels somewhat unnatural. If
compile time is a concern, could we simply check the size of functions (in
terms of the number of blocks, as opposed to predecessor only) early in this
pass and either skip it or switch to a faster,
@@ -2627,6 +2629,93 @@ SDValue DAGCombiner::foldSubToAvg(SDNode *N, const SDLoc
&DL) {
return SDValue();
}
+/// Try to fold a pointer arithmetic node.
+/// This needs to be done separately from normal addition, because pointer
+/// addition is not commutative.
+SDValue DAGC
@@ -0,0 +1,207 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942
-disable-separate-const-offset-from-gep=1 -amdgpu-use-sdag-ptradd=1 < %s |
FileCheck --check-prefixes=GFX942,GFX942_PTRADD %s
+; R
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