llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-amdgpu Author: Fabian Ritter (ritter-x2a) <details> <summary>Changes</summary> This is used in a bunch of memory-related transforms. For SWDEV-516125. --- Full diff: https://github.com/llvm/llvm-project/pull/142778.diff 2 Files Affected: - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp (+3-3) - (modified) llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll (+8-20) ``````````diff diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp index f2ab88851b780..da92aaa860b2b 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp @@ -231,6 +231,7 @@ static BaseIndexOffset matchLSNode(const LSBaseSDNode *N, } break; case ISD::ADD: + case ISD::PTRADD: if (auto *C = dyn_cast<ConstantSDNode>(Base->getOperand(1))) { Offset += C->getSExtValue(); Base = DAG.getTargetLoweringInfo().unwrapAddress(Base->getOperand(0)); @@ -259,7 +260,7 @@ static BaseIndexOffset matchLSNode(const LSBaseSDNode *N, break; } - if (Base->getOpcode() == ISD::ADD) { + if (Base->isAnyAdd()) { // TODO: The following code appears to be needless as it just // bails on some Ptrs early, reducing the cases where we // find equivalence. We should be able to remove this. @@ -282,8 +283,7 @@ static BaseIndexOffset matchLSNode(const LSBaseSDNode *N, } // Check if Index Offset pattern - if (Index->getOpcode() != ISD::ADD || - !isa<ConstantSDNode>(Index->getOperand(1))) + if (!Index->isAnyAdd() || !isa<ConstantSDNode>(Index->getOperand(1))) return BaseIndexOffset(PotentialBase, Index, Offset, IsIndexSignExt); Offset += cast<ConstantSDNode>(Index->getOperand(1))->getSExtValue(); diff --git a/llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll b/llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll index bce59307446ce..1069339774894 100644 --- a/llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll +++ b/llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll @@ -136,26 +136,14 @@ declare noalias ptr addrspace(4) @llvm.amdgcn.dispatch.ptr() ; Taken from memcpy-param-combinations.ll, tests PTRADD handling in ; SelectionDAGAddressAnalysis. define void @memcpy_p1_p4_sz16_align_1_1(ptr addrspace(1) align 1 %dst, ptr addrspace(4) align 1 readonly %src) { -; GFX942_PTRADD-LABEL: memcpy_p1_p4_sz16_align_1_1: -; GFX942_PTRADD: ; %bb.0: ; %entry -; GFX942_PTRADD-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX942_PTRADD-NEXT: global_load_dwordx2 v[4:5], v[2:3], off -; GFX942_PTRADD-NEXT: s_waitcnt vmcnt(0) -; GFX942_PTRADD-NEXT: global_store_dwordx2 v[0:1], v[4:5], off -; GFX942_PTRADD-NEXT: global_load_dwordx2 v[2:3], v[2:3], off offset:8 -; GFX942_PTRADD-NEXT: s_waitcnt vmcnt(0) -; GFX942_PTRADD-NEXT: global_store_dwordx2 v[0:1], v[2:3], off offset:8 -; GFX942_PTRADD-NEXT: s_waitcnt vmcnt(0) -; GFX942_PTRADD-NEXT: s_setpc_b64 s[30:31] -; -; GFX942_LEGACY-LABEL: memcpy_p1_p4_sz16_align_1_1: -; GFX942_LEGACY: ; %bb.0: ; %entry -; GFX942_LEGACY-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX942_LEGACY-NEXT: global_load_dwordx4 v[2:5], v[2:3], off -; GFX942_LEGACY-NEXT: s_waitcnt vmcnt(0) -; GFX942_LEGACY-NEXT: global_store_dwordx4 v[0:1], v[2:5], off -; GFX942_LEGACY-NEXT: s_waitcnt vmcnt(0) -; GFX942_LEGACY-NEXT: s_setpc_b64 s[30:31] +; GFX942-LABEL: memcpy_p1_p4_sz16_align_1_1: +; GFX942: ; %bb.0: ; %entry +; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX942-NEXT: global_load_dwordx4 v[2:5], v[2:3], off +; GFX942-NEXT: s_waitcnt vmcnt(0) +; GFX942-NEXT: global_store_dwordx4 v[0:1], v[2:5], off +; GFX942-NEXT: s_waitcnt vmcnt(0) +; GFX942-NEXT: s_setpc_b64 s[30:31] entry: tail call void @llvm.memcpy.p1.p4.i64(ptr addrspace(1) noundef nonnull align 1 %dst, ptr addrspace(4) noundef nonnull align 1 %src, i64 16, i1 false) ret void `````````` </details> https://github.com/llvm/llvm-project/pull/142778 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
