https://github.com/MaskRay approved this pull request.
https://github.com/llvm/llvm-project/pull/97383
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llvmbot wrote:
@llvm/pr-subscribers-clang
@llvm/pr-subscribers-clang-driver
Author: Pengcheng Wang (wangpc-pp)
Changes
The format of dynamic linker is `ld-linux-{arch}-{abi}.so.1`, so
we can just get the arch name from arch type.
---
Full diff: https://github.com/llvm/llvm-project/pull/9
https://github.com/wangpc-pp created
https://github.com/llvm/llvm-project/pull/97383
The format of dynamic linker is `ld-linux-{arch}-{abi}.so.1`, so
we can just get the arch name from arch type.
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llvmbot wrote:
@llvm/pr-subscribers-llvm-binary-utilities
Author: Fangrui Song (MaskRay)
Changes
The decoder code is similar to that for llvm-readelf -r (#91280).
Because the section representation of LLVMObject (`SectionRef`) is
64-bit, insufficient to hold all decoder states, `section_r
https://github.com/MaskRay created
https://github.com/llvm/llvm-project/pull/97382
The decoder code is similar to that for llvm-readelf -r (#91280).
Because the section representation of LLVMObject (`SectionRef`) is
64-bit, insufficient to hold all decoder states, `section_rel_begin` is
modifie
llvmbot wrote:
@llvm/pr-subscribers-bolt
Author: Amir Ayupov (aaupov)
Changes
9d0754ada5dbbc0c009bcc2f7824488419cc5530 dropped MC support required for
macro-fusion alignment in BOLT. Remove the support in BOLT.
Test Plan:
macro-fusion alignment was never upstreamed, so no upstream tests a
https://github.com/aaupov ready_for_review
https://github.com/llvm/llvm-project/pull/97358
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@@ -1084,10 +1084,76 @@ static void
mergeArch(RISCVISAUtils::OrderedExtensionMap &mergedExts,
}
}
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+
@@ -1084,10 +1084,76 @@ static void
mergeArch(RISCVISAUtils::OrderedExtensionMap &mergedExts,
}
}
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+
@@ -1084,10 +1084,76 @@ static void
mergeArch(RISCVISAUtils::OrderedExtensionMap &mergedExts,
}
}
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+
@@ -1084,10 +1084,76 @@ static void
mergeArch(RISCVISAUtils::OrderedExtensionMap &mergedExts,
}
}
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+
https://github.com/aaupov created
https://github.com/llvm/llvm-project/pull/97358
9d0754ada5dbbc0c009bcc2f7824488419cc5530 dropped MC support required for
macro-fusion alignment in BOLT. Remove the support in BOLT.
Test Plan:
macro-fusion alignment was never upstreamed, so no upstream tests are
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/97347
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https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/97347
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https://github.com/shawbyoung updated
https://github.com/llvm/llvm-project/pull/96596
>From 05d59574d6260b98a469921eb2fccf5398bfafb6 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Mon, 24 Jun 2024 23:00:59 -0700
Subject: [PATCH 1/7] Added call to matchWithCallsAsAnchors
Created using spr 1.3.
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/97347
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llvmbot wrote:
@llvm/pr-subscribers-lld
@llvm/pr-subscribers-lld-elf
Author: Paul Kirth (ilovepi)
Changes
This patch adds support for merging the atomic_abi attribute, specifid in
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tag_riscv_atomic_abi-14-uleb12
https://github.com/ilovepi created
https://github.com/llvm/llvm-project/pull/97347
This patch adds support for merging the atomic_abi attribute, specifid in
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tag_riscv_atomic_abi-14-uleb128version,
to LLD.
The atomic
@@ -747,105 +747,79 @@ void clang::getOpenMPCaptureRegions(
assert(unsigned(DKind) < llvm::omp::Directive_enumSize);
assert(isOpenMPCapturingDirective(DKind) && "Expecting capturing directive");
- switch (DKind) {
- case OMPD_metadirective:
-CaptureRegions.push_back(
@@ -747,105 +747,79 @@ void clang::getOpenMPCaptureRegions(
assert(unsigned(DKind) < llvm::omp::Directive_enumSize);
assert(isOpenMPCapturingDirective(DKind) && "Expecting capturing directive");
- switch (DKind) {
- case OMPD_metadirective:
-CaptureRegions.push_back(
https://github.com/kparzysz updated
https://github.com/llvm/llvm-project/pull/97110
>From 2d25e0d32672ecae3dc3ad42c50446e651eceb06 Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek
Date: Fri, 28 Jun 2024 15:27:42 -0500
Subject: [PATCH 1/2] [clang][OpenMP] Rewrite `getOpenMPCaptureRegions` in t
@@ -747,105 +747,79 @@ void clang::getOpenMPCaptureRegions(
assert(unsigned(DKind) < llvm::omp::Directive_enumSize);
assert(isOpenMPCapturingDirective(DKind) && "Expecting capturing directive");
- switch (DKind) {
- case OMPD_metadirective:
-CaptureRegions.push_back(
@@ -747,105 +747,79 @@ void clang::getOpenMPCaptureRegions(
assert(unsigned(DKind) < llvm::omp::Directive_enumSize);
assert(isOpenMPCapturingDirective(DKind) && "Expecting capturing directive");
- switch (DKind) {
- case OMPD_metadirective:
-CaptureRegions.push_back(
https://github.com/shawbyoung updated
https://github.com/llvm/llvm-project/pull/96596
>From 05d59574d6260b98a469921eb2fccf5398bfafb6 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Mon, 24 Jun 2024 23:00:59 -0700
Subject: [PATCH 1/6] Added call to matchWithCallsAsAnchors
Created using spr 1.3.
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
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https://github.com/kparzysz updated
https://github.com/llvm/llvm-project/pull/97110
>From 2d25e0d32672ecae3dc3ad42c50446e651eceb06 Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek
Date: Fri, 28 Jun 2024 15:27:42 -0500
Subject: [PATCH] [clang][OpenMP] Rewrite `getOpenMPCaptureRegions` in term
@@ -178,6 +178,21 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool isOptimizableAtomic(Type *Ty) {
arsenm wrote:
How about isLegalCrossLaneType?
https://github.com/llvm/llvm-project/pull/96934
__
@@ -3480,6 +3480,31 @@ DiagnosedSilenceableFailure
transform::MapCopyToThreadsOp::applyToOne(
return DiagnosedSilenceableFailure::success();
}
+//===--===//
+// WinogradConv2DOp
+//===--
@@ -178,6 +178,20 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool shouldOptimizeForType(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+if (T
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() {
return success();
}
+SmallVector
+WinogradFilterTransformOp::getIterationDomain(OpBuilder &builder) {
+ Location loc = getLoc();
+ Value zero = builder.create(loc, 0);
+ Value one = builder.create(
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() {
return success();
}
+SmallVector
+WinogradFilterTransformOp::getIterationDomain(OpBuilder &builder) {
+ Location loc = getLoc();
+ Value zero = builder.create(loc, 0);
+ Value one = builder.create(
@@ -2638,4 +2638,41 @@ def WinogradConv2DOp : Op {
+ let description = [{
+Decompose winograd operators. It will convert filter, input and output
+transform operators into a combination of scf, tensor, and linalg
Hsiangkai wrote:
Done.
https://github.co
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() {
return success();
}
+SmallVector
+WinogradFilterTransformOp::getIterationDomain(OpBuilder &builder) {
+ Location loc = getLoc();
+ Value zero = builder.create(loc, 0);
+ Value one = builder.create(
@@ -867,13 +867,61 @@ def SMRDBufferImm : ComplexPattern;
def SMRDBufferImm32 : ComplexPattern;
def SMRDBufferSgprImm : ComplexPattern;
+class SMRDAlignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Ignore the alignment check if XNACK support is disabled.
+
@@ -867,13 +867,61 @@ def SMRDBufferImm : ComplexPattern;
def SMRDBufferImm32 : ComplexPattern;
def SMRDBufferSgprImm : ComplexPattern;
+class SMRDAlignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Ignore the alignment check if XNACK support is disabled.
+
@@ -867,13 +867,61 @@ def SMRDBufferImm : ComplexPattern;
def SMRDBufferImm32 : ComplexPattern;
def SMRDBufferSgprImm : ComplexPattern;
+class SMRDAlignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Ignore the alignment check if XNACK support is disabled.
+
@@ -1700,19 +1725,30 @@ unsigned SILoadStoreOptimizer::getNewOpcode(const
CombineInfo &CI,
case 8:
return AMDGPU::S_BUFFER_LOAD_DWORDX8_SGPR_IMM;
}
- case S_LOAD_IMM:
+ case S_LOAD_IMM: {
+// If XNACK is enabled, use the constrained opcodes when the first l
@@ -1212,8 +1228,17 @@ void SILoadStoreOptimizer::copyToDestRegs(
// Copy to the old destination registers.
const MCInstrDesc &CopyDesc = TII->get(TargetOpcode::COPY);
- const auto *Dest0 = TII->getNamedOperand(*CI.I, OpName);
- const auto *Dest1 = TII->getNamedOperand(*
@@ -1700,19 +1725,30 @@ unsigned SILoadStoreOptimizer::getNewOpcode(const
CombineInfo &CI,
case 8:
return AMDGPU::S_BUFFER_LOAD_DWORDX8_SGPR_IMM;
}
- case S_LOAD_IMM:
+ case S_LOAD_IMM: {
+// If XNACK is enabled, use the constrained opcodes when the first l
jayfoad wrote:
> [AMDGPU] Enable atomic optimizer for divergent i64 and double values
Needs some i64 tests
https://github.com/llvm/llvm-project/pull/96934
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@@ -178,6 +178,21 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool isOptimizableAtomic(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+unsigne
@@ -230,8 +245,7 @@ void
AMDGPUAtomicOptimizerImpl::visitAtomicRMWInst(AtomicRMWInst &I) {
// value to the atomic calculation. We can only optimize divergent values if
// we have DPP available on our subtarget, and the atomic operation is 32
// bits.
- if (ValDivergent
@@ -313,8 +327,7 @@ void
AMDGPUAtomicOptimizerImpl::visitIntrinsicInst(IntrinsicInst &I) {
// value to the atomic calculation. We can only optimize divergent values if
// we have DPP available on our subtarget, and the atomic operation is 32
// bits.
- if (ValDivergent
arsenm wrote:
### Merge activity
* **Jul 1, 6:08 AM EDT**: @arsenm started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/97180).
https://github.com/llvm/llvm-project/pull/97180
___
arsenm wrote:
### Merge activity
* **Jul 1, 6:08 AM EDT**: @arsenm started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/97151).
https://github.com/llvm/llvm-project/pull/97151
___
https://github.com/jayfoad approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/97151
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@@ -17565,6 +17565,12 @@ SDValue DAGCombiner::visitFCOPYSIGN(SDNode *N) {
if (CanCombineFCOPYSIGN_EXTEND_ROUND(N))
return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), VT, N0, N1.getOperand(0));
+ // We only take the sign bit from the sign operand.
+ EVT SignVT = N1.getValueTy
https://github.com/jayfoad edited
https://github.com/llvm/llvm-project/pull/97151
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https://github.com/skatrak updated
https://github.com/llvm/llvm-project/pull/92524
>From 95d6f3446201d2b3162b694887e3fd888b628e96 Mon Sep 17 00:00:00 2001
From: Sergio Afonso
Date: Fri, 17 May 2024 11:38:36 +0100
Subject: [PATCH] [Flang][OpenMP] Update flang with changes to the OpenMP
dialect
@@ -178,6 +178,21 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool isOptimizableAtomic(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+unsigne
@@ -178,6 +178,20 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool shouldOptimizeForType(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+if (T
@@ -178,6 +178,20 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool shouldOptimizeForType(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+if (T
https://github.com/vikramRH edited
https://github.com/llvm/llvm-project/pull/96934
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@@ -178,6 +178,20 @@ bool AMDGPUAtomicOptimizerImpl::run(Function &F) {
return Changed;
}
+static bool shouldOptimizeForType(Type *Ty) {
vikramRH wrote:
Any better suggestions ?
https://github.com/llvm/llvm-project/pull/96934
__
Author: Ryotaro KASUGA
Date: 2024-07-01T16:06:24+09:00
New Revision: dc041f77964ed3a93bae5568e18f9186acc265b4
URL:
https://github.com/llvm/llvm-project/commit/dc041f77964ed3a93bae5568e18f9186acc265b4
DIFF:
https://github.com/llvm/llvm-project/commit/dc041f77964ed3a93bae5568e18f9186acc265b4.diff
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