================
@@ -17565,6 +17565,12 @@ SDValue DAGCombiner::visitFCOPYSIGN(SDNode *N) {
if (CanCombineFCOPYSIGN_EXTEND_ROUND(N))
return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), VT, N0, N1.getOperand(0));
+ // We only take the sign bit from the sign operand.
+ EVT SignVT = N1.getValueType();
+ if (SimplifyDemandedBits(N1,
----------------
jayfoad wrote:
I think this should be able to subsume some of the optimizations above, e.g.
`copysign(x, abs(y)) -> abs(x)` would fall out if SimplifyDemandedBits knew
about extracting the sign bit from `abs(x)`.
https://github.com/llvm/llvm-project/pull/97151
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