================ @@ -867,13 +867,61 @@ def SMRDBufferImm : ComplexPattern<iPTR, 1, "SelectSMRDBufferImm">; def SMRDBufferImm32 : ComplexPattern<iPTR, 1, "SelectSMRDBufferImm32">; def SMRDBufferSgprImm : ComplexPattern<iPTR, 2, "SelectSMRDBufferSgprImm">; +class SMRDAlignedLoadPat<PatFrag Op> : PatFrag <(ops node:$ptr), (Op node:$ptr), [{ + // Ignore the alignment check if XNACK support is disabled. + if (!Subtarget->isXNACKEnabled()) + return true; + + // Returns true if it is a naturally aligned multi-dword load. + LoadSDNode *Ld = cast<LoadSDNode>(N); + unsigned Size = Ld->getMemoryVT().getStoreSize(); + return Size <= 4 || Ld->getAlign().value() >= Size; +}]> { + let GISelPredicateCode = [{ + if (!Subtarget->isXNACKEnabled()) + return true; + + auto &Ld = cast<GLoad>(MI); + TypeSize Size = Ld.getMMO().getSize().getValue(); + return Size <= 4 || Ld.getMMO().getAlign().value() >= Size; + }]; +} + +class SMRDUnalignedLoadPat<PatFrag Op> : PatFrag <(ops node:$ptr), (Op node:$ptr), [{ + // Do the alignment check if XNACK support is enabled. + if (!Subtarget->isXNACKEnabled()) + return false; + + // Returns true if it is an under aligned multi-dword load. + LoadSDNode *Ld = cast<LoadSDNode>(N); + unsigned Size = Ld->getMemoryVT().getStoreSize(); + return Size > 4 && (Ld->getAlign().value() < Size); ---------------- jayfoad wrote:
Don't need the parens https://github.com/llvm/llvm-project/pull/96163 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits