RFA: Fail gracefully when registering info for an unknown plugin

to apply ? Cheers Nick gcc/ChangeLog 2016-10-20 Nick Clifton * plugin.c (register_plugin_info): Produce an error message if the plugin is not found in the hash table. Index: gcc/plugin.c === --- gcc/plugin.c

Commit: M32R: Build crtinit.o and crtfini.o

Hi Guys, I am applying the patch below to fix a long standing snafu for the m32r target where the files crtinit.o and crtfini.o were not being built along with the rest of libgcc. Tested with no regressions and a lot of test case fixes using an m32r-elf toolchain. Cheers Nick

Re: [PATCH, nds32] Enable GDB building for nds32*-*-* target.

* configure.ac (nds32*-*-*): Remove entry to enable gdb. > * configure: Regenerated. Approved and applied. Cheers Nick

Re: [PATCH : RL78] Disable interrupts during hardware multiplication routines

l78/rl78.opt (msave-mduc-in-interrupts): New option. > * doc/invoke.texi (RL78 Options): Add -msave-mduc-in-interrupts. Approved and applied - thanks for persevering with this. Cheers Nick

Re: [RX] Add support for atomic operations

em, > atomic_fetch_si, atomic_fetch_nandsi, > atomic__fetchsi, atomic_nand_fetchsi): New patterns. Approved - please apply. Cheers Nick

RFA: Generate normal DWARF DW_LOC descriptors for non integer mode pointers

ed the unexpected failure count in the GDB testsuite for the MSP430's -mlarge multilib changes from 2253 to 367. There are no regressions, for MSP430 or x86_64, and no changes to the GCC testsuite results for either target. OK to apply ? Cheers Nick gcc/ChangeLog 20

Re: RFA: Generate normal DWARF DW_LOC descriptors for non integer mode pointers

.base/advance.c:41 12 {movhi} (nil)) which to me pretty clearly shows that "c" is being stored at R1+4. Cheers Nick

Commit: MSP430: Fix typo in --target-help text

Hi DJ, I am applying the patch below as an obvious fix for a typo in the msp430's --target-help output. Cheers Nick gcc/ChangeLog 2015-09-01 Nick Clifton * config/msp430/msp430.opt (mcpu): Fix typo. Index: gcc/config/msp430/msp43

RFA: Libiberty: Fix warnings about left shifting a negative value.

? Cheers Nick PS: Running the libiberty testsuite with -fsanitize=undefined does throw up a couple more runtime errors: libiberty/cplus-dem.c:503:13: runtime error: signed integer overflow: 922337203 * 10 cannot be represented in type 'int' libiberty/cp-demangle.c:4123:40: runtime error

RFA: PR 68913: Provide weak version of __fread_chk for PR61886 test

against a real __fread_chk function. A dummy will do. Hence I would like to apply the patch below. This patch resolves unexpected failures of the pr61886_0.c test on targets like spu-elf and sparc64-elf. Cheers Nick gcc/testsuite/ChangeLog 2015-12-18 Nick Clifton PR 68913

RFA: Fix ICE compiling gcc.dg/lto/pr55113_0.c for x86/x86_64

no regressions on an x86_64-pc-linux-gnu toolchain. OK to apply ? Cheers Nick gcc/ChangeLog 2015-12-18 Nick Clifton * config/i386/i386.c (ix86_get_builtin_type): Use SFmode variant of DFmode vector types when -fshort-doubles is enabled. Index: gcc/config/i386/i386.c

Re: RFA: PR 68913: Provide weak version of __fread_chk for PR61886 test

ing a weak definition of __fread_chk should be sufficient for those runtimes which do not provide their own definition. At least that is my theory... Cheers Nick

Re: RFA: Fix ICE compiling gcc.dg/lto/pr55113_0.c for x86/x86_64

ABI breaking option ? I think the option should be simply removed... Tempting - but we are in stage 3... My patch at least fixes the ICE for now. Cheers Nick

RFA: PR 68770: Fix use of uninitialised value in secondary_reload

fields. One field in particular - t_icode - is examined by default_secondary_reload, and it was this that was triggering the valgrind warning. Tested with no regressions on a x86_64-pc-linux-gnu and a powerpc64-le-linux-gnu toolchain. OK to apply ? Cheers Nick gcc/ChangeLog 2015-12-22

RFA: PR 66655: Use COFF/PE weak symbols

MAKE_DECL_ONE_ONLY using the COFF/PE weak symbol support now available in gas and the linker. Doing this allows the test to pass. OK to apply ? Cheers Nick gcc/ChangeLog 2015-12-22 Nick Clifton PR target/66655 * config/i386/cygming.h (MAKE_DECL_ONE_ONLY): Use weak symbol support

Re: RFA: PR 66655: Use COFF/PE weak symbols

ommon problem for all tests that use additional source files, so I do not think that it is a big issue. Tested with no regressions on an x86_64-pc-linux-gnu toolchain. OK to apply ? Cheers Nick gcc/testsuite/ChangeLog 2016-01-05 Nick Clifton PR target/66655 * g++.dg/pr66

Re: RFA: PR 68770: Fix use of uninitialised value in secondary_reload

compiler with valgrind. Actually I cheated - I initialised the unused field to 0xdeadbeef and then checked for this in default_secondary-reload(). That way it only took me 17 seconds in multidelta... With a testcase, this is fine. Thanks - committed. Testcase attached. Cheers Nick gcc

Re: [PATCH : RL78] Disable interrupts during hardware multiplication routines

the MDUC registers will not be saved if the interrupt function does not use the multiply hardware and does not call any other function. Cheers Nick

Re: RFA: PR 66655: Use COFF/PE weak symbols

".cc" rather than .C. Can you give that a quick whirl and see if that avoids having the additional file used as a a test on its own? Thanks - that worked. :-) Revised test attached. OK to apply ? Cheers Nick --- /dev/null 2016-01-07 09:30:14.144966933 + +++ gcc/testsuite/g++.dg

Re: RFA: PR 68913: Provide weak version of __fread_chk for PR61886 test

Hi Rainer. +/* { dg-lto-options { { -flto -O2 -Werror -Wl,--defsym,__fread_chk=0x1234 this assumes GNU ld and will break on all targets that use different linkers. OK, how about this version instead ? Cheers Nick Index: gcc/testsuite/gcc.dg/lto/pr61886_0.c

Re: RFA: PR 68913: Provide weak version of __fread_chk for PR61886 test

the actual bug being checked by the testcase is a generic one, not a target specific one, we can be reasonably confident that if the problem resurfaces it will be detected. So, two possible alternative versions of the patch are proposed below. Do either take your fancy ? Cheers Nick

Re: RFA: PR 68913: Provide weak version of __fread_chk for PR61886 test

not find a reference to it in the documentation. But malloc really has also different arguments... True - thinking about it afterwards it occurred to me that renaming the function to just "fread" would be a lot better ... Cheers Nick

Re: RFA: PR 68913: Provide weak version of __fread_chk for PR61886 test

ass the patched test. OK to apply ? Cheers Nick gcc/testsuite/ChangeLog 2016-01-08 Nick Clifton PR target/68913 * gcc.dg/lto/pr61886_0.c: Rename the external function called to fread so that it will be found in all target runtimes. Index: gcc/testsuite/gcc.dg/

Re: [PATCH : RL78] Disable interrupts during hardware multiplication routines

all any other function. Still not quite right. The last sentence should be: The MDUC registers will only be saved if the interrupt handler performs a multiplication or division operation or it calls another function. Cheers Nick

Commit: Try harder to run ARM neon testcases

regressions or new, unexpected failures. Cheers Nick gcc/testsuite/ChangeLog 2016-01-14 Nick Clifton * lib/target-supports.exp (check_effective_target_arm_neon_ok_nocache): Add an option sequence that includes setting the ARM architecture to ARMv7-A

Re: Commit: Try harder to run ARM neon testcases

on"))) That works in my local tests. Are you OK with it ? Cheers Nick

Re: Commit: Try harder to run ARM neon testcases

st an idea, I let you choose I tried that - it does not work. :-( If you put dg-additional-options after a dg-add-options you loose the dg-add-options... I'll check in the updated patch. Cheers Nick

Re: Thoughts on memcmp expansion (PR43052)

not used then the entire memcmp can be transformed into nothing. Plus if the return value is used, but only for an equality comparison with zero then the transformation can take place. Cheers Nick

RFA: MIPS: Fix race condition causing PR 69129

hard_frame_pointer_offset fields have been initialised. Tested with no regressions on a mipsisa32-elf toolchain. (I know that there are lots of different possible mips configurations. I was not sure which one(s) I should test, so I chose one at random). OK to apply ? Cheers Nick gcc

Commit: 4.9 branch: Backport RX alignment fix

Hi Guys, I am backporting an RX-specific patch from the mainline to the 4.9 branch as this fixes an internal error in the assembler (!) when running the gcc test gcc.c-torture/compile/pr53748.c. Cheers Nick gcc/ChangeLog 2014-12-24 Nick Clifton Backport from mainline

Commit: 4.9 branch: Backport RX 'R' operator fix

Hi Guys, I am backporting an RX-specific patch from the mainline to the 4.9 branch as it fixes an ICE running the gcc test gcc.c-torture/compile/pr39423-2.c. Cheers Nick gcc/ChangeLog 2014-12-24 Nick Clifton Backport from mainline: 2014-03-25 Nick Clifton

Commit: MSP430: Fix addsi splitter (PR 64160)

Hi Guys. I am applying the patch below to fix PR 64160 for the MSP430. Cheers Nick gcc/ChangeLog 2014-12-24 Nick Clifton PR target/64160 * config/msp430/msp430.md (addsi splitter): Do not split when the destination partially overlaps the source. Index: config

Re: VEC re-write [patch 21/25]

Hi Diego, 2012-11-15 Diego Novillo Adjust for new vec API (http://gcc.gnu.org/wiki/cxx-conversion/cxx-vec) * config/rx/rx.c: Use new vec API in vec.h. This is fine. Cheers Nick

Commit: V850: Various backend fixes

Hi Guys, I am applying the patch below to fix various small problems with the V850 backend. With this patch applied there are 454 fewer unexpected failures in the gcc testsuite for a v850-elf toolchain. Cheers Nick gcc/ChangeLog 2012-11-20 Nick Clifton * config/v850/v850.c

Commit: RX backend fixes

Hi Guys, I am applying this patch to fix up a few issues with the RX backend. With this patch applied there are 355 fewer gcc testsuite regressions. Cheers Nick gcc/ChangeLog 2012-11-20 Nick Clifton * config/rx/rx.c (rx_function_arg_boundary): When using the RX ABI

RFA: RL78: Improve interrupt function generation

K to apply ? Cheers Nick gcc/ChangeLog 2013-05-01 Nick Clifton * config/rl78/rl78.c (need_to_save): Make into a boolean function. Do not save register bank 0 registers in interrupt handlers. (rl78_attribute_table): Add "naked". (rl78_is_naked

RFA: Allow simplification of SUBREGs involving the frame pointer during LRA

still not working for these targets, but this patch lets more of libgcc be built than before). No regressions noted on an i686-pc-linux-gnu toolchain built with this patch applied. OK to apply ? Cheers Nick gcc/ChangeLog 2013-05-03 Nick Clifton * rtlanal.c

Re: RFA: RL78: Improve interrupt function generation

improvements and the addition of G10 support to the RL78 backend. What do you think of this version ? Cheers Nick rl78.intr.patch.2 Description: Unix manual page

Re: new port: msp430-elf, revision 2

ary to block its adoption now ? Cheers Nick

Re: RFA: Allow simplification of SUBREGs involving the frame pointer during LRA

hange. *sigh* Of course now I cannot reproduce the failure that this patch used to fix. Oh well. I withdraw the patch for now and if I can find a way to reproduce the problem I will post the patch again along with a more complete description of what is happening. Cheers Nick

RFA: RL78: Add support for naked function attribute.

Hi DJ, OK, I am abandoning my RL78 interrupt prologue patch for now. There are just too many complications to make it work. Instead here is a much simpler patch to add support for a naked function attribute. OK to apply ? Cheers Nick gcc/ChangeLog 2013-05-16 Nick Clifton

Re: [PING 2] [PATCH RX] Added target specific macros for RX100, RX200, and RX600

apply. Cheers Nick

Re: [PING 2] [PATCH RX] Added target specific macros for RX100, RX200, and RX600

Hi Sandeep, >>> The patch is fine, please apply. Thanks for the review. I do not have write approvals to gcc-svn. Could you please commit this for me? Done. Cheers Nick

Commit:

Hi Guys, I am applying the patch below as an obvious fix. It adds a missing @gol to the end of one of the option list lines and it removes a superfluous second "functions" from the description of the -mhotpatch option. Cheers Nick gcc/ChangeLog 2014-09-09 Ni

Commit: RL78: Fix poping of registers in G10 mode

A to the correct register) because the popped values were never used. Cheers Nick gcc/ChangeLog 2014-09-19 Nick Clifton * config/rl78/rl78.c (rl78_expand_epilogue): Generate a USE of the pop'ed registers so that DCE does not eliminate them. Index: gcc/config/r

Commit: SH: Fix typo in atomic fetch sequence

Hi Alex, Hi Kaz, Hi Oleg, I am applying the patch below as an obvious fix for a typo in the instruction sequence of the atomic_fetch_nand_soft_imask pattern. I hope that this is OK with you. Cheers Nick gcc/ChangeLog 2014-09-25 Nick Clifton PR target/62218 * config

Commit: MSP430: Improve -mhwmult= opton and fix prologues and epilogues for naked functions

generation in that code in function.c expects some RTL to be returned, even if the function is naked. Cheers Nick gcc/ChangeLog 2014-09-29 Nick Clifton * config/msp430/msp430.c (msp430_expand_prologue): Return a CLOBBER rtx for naked functions. (msp430_expand_epilogue

Re: msp430 port

blems with __builtin_apply_args(). Sorry - it should have been removed. Cheers Nick

RFA: AVR: Support building AVR Linux targets

as already been added to it. The patch below is the obvious fix for this problem, but I have not committed it because it occurred to me that there might be some AVR specific reason for not including t-glibc. So - is the patch OK, or is there some other way of fixing the problem ? Cheers

Commit: M32R: Fix config problem building m32r-linux toolchains

Hi Guys, I am applying the patch below to fix a small problem building m32r-linux toolchains - the glibc-c.o object file was not being built because the definition of tmake_file in M32R section of config.gcc was not allowing for the inclusion of t-glibc. Cheers Nick gcc/ChangeLog 2013

Commit: MN10300: Add missing comment line

Hi Guys I am applying this patch as obvious. It adds a line missing from the comment describing the mn10300_get_live_callee_saved_regs function. Cheers Nick gcc/ChangeLog 2013-03-18 Nick Clifton * config/mn10300/mn10300.c (mn10300_get_live_callee_saved_regs): Add

Commit: XStormy16: Remove spurious backslash

Hi Guys, I am applying this small patch to remove a spurious backslash escape at the end of a line in stormy16.c. Cheers Nick gcc/ChangeLog 2013-03-18 Nick Clifton * config/stormy16/stormy16.c (xstormy16_expand_prologue): Remove spurious backslash. Index: gcc/config

RFA: RL78: Improve prologues for interrupt handlers

rl78-elf toolchain, as well as various different interrupt handler configurations. OK to apply ? Cheers Nick gcc/ChangeLog 2013-03-26 Kaushik Phatak * config/rl78/rl78.c (need_to_save): Change return type to bool. For interrupt functions: save call clobbered registers if

Commit: V850: Use FPU-3.0 multiply-add instructions on E3V5 architectures

Hi Guys, I am checking in the patch below to make gcc generate the FPU-3.0 multiply-add instructions when targeting the E3V5 V850 architecture. Cheers Nick gcc/ChangeLog 2013-04-03 Nick Clifton * config/v850/v850e3v5.md (fmasf4): Use fmaf.s on E3V5 architectures

RFA: Fix use of extra_objs when configuring tilepro-linux and tilegx-linux

ux in config.gcc override the definition of extra_objs, rather than extending it, thus loosing the inclusion of linux_android.o into libbackend.a. I fixed the problem with the patch below and was able to build both toolchains. OK to apply ? Cheers Nick gcc/ChangeLog 2013-04-21 Nick Cl

RFA: Fix declaration of default value of TARGET_NARROW_VOLATILE_BITFIELD

rects this, and also fixes a small typo in the description of TARGET_CANONICALIZE_COMPARISON. Ok to apply ? Cheers Nick gcc/ChangeLog 2013-04-24 Nick Clifton * doc/tm.texi.in (TARGET_NARROW_VOLATILE_BITFIELD): Change the default to false. (TARGET_CANONICALIZE_

Commit: Fix building ARC, M32C and M32R backends

.c:3178:88: error: invalid conversion from 'int' to 'machine_mode' [-fpermissive] It happens because all of these backends use an integer to hold a machine mode value instead of an enum. The simple fix is to use the enum instead. Cheers Nick gcc/ChangeLog 2014-04-29 Ni

Commit: MSP430: Fix bugs in MSP430 backend

interrupt handlers when in fact it is interrupt safe. * The umulsidi3 pattern used the wrong address for the second operand. Tested with an msp430-elf toolchain with no regressions. Cheers Nick gcc/ChangeLog 2014-04-29 Nick Clifton * config/msp430/msp430.md (umulsidi

RFA: Fix calculation of size of builtin setjmp buffer

for an rl78-elf toolchain. OK to apply ? Cheers Nick 2014-05-06 Nick Clifton * except.c (init_eh): Fix computation of builtin setjmp buffer size. Index: gcc/except.c === --- gcc/except.c(revision

Commit: MSP430: Fix gcc.c-torture/execute/20050826-2.c

r7))) it became confused and thought that only r7 was being set, not r7 and r8. Changing the output constraint to "+r" prevents this from happening. Cheers Nick ChangeLog 2014-05-20 Nick Clifton * config/msp430/msp430.md (zero_extendpsisi2): Use + constraint on

Commit: MSP430: Fix some gcc testsuite failures

zero_extendpsisi2 pattern was confusing gcc about the number of hard registers needed to hold an SImode value. The second fixes a problem with expanding va_arg when pointers are not a multiple of the word size. Cheers Nick gcc/ChangeLog 2014-05-20 Nick Clifton * config/msp430

Commit: MSP430: Add spaces after options inserted by ASM_SPEC

unintelligible options. Cheers Nick gcc/ChangeLog 2014-05-22 Nick Clifton * config/msp430/msp430.h (ASM_SPEC): Add spaces after inserted options. Index: gcc/config/msp430/msp430.h === --- gcc/config/msp430/msp430.h

Commit: MSP430: Built libgcc with hardware multiply disabled

even when it was not clear that it would be supported by the target MCU. The fix is just to disable the use of hardware multiplies inside libgcc. Cheers Nick libgcc/ChangeLog 2014-05-22 Nick Clifton * config/msp430/t-msp430 (HOST_LIBGCC2_CFLAGS): Add -mhwmult=none

Commit: MSP430: Add -mcpu= option

Hi Guys, I am committing the attached patch to add a -mcpu= command line option to the MSP430 backend. This allows the selection of the ISA to be used, and it operates independently of the -mmcu= command line option. gcc/ChangeLog 2014-01-17 Nick Clifton * config/msp430/msp430

Re: Commit: MSP430: Add -mcpu= option

Hi Gerald, Mind adding an entry to the release notes? Happy to help if you have any questions. Is the following acceptable ? I even remembered to run it through the validator... Cheers Nick Index: htdocs/gcc-4.9/changes.html

Re: Commit: MSP430: Add -mcpu= option

Hi Gerald, "command-line option", I think, and I suggest to use ... around the actual options. OK - I have made those changes and committed the result. Cheers Nick

Commit: MSP430: Linker script renaming

command line option so that it will accept a wider range of names for the ISA to use. Cheers Nick gcc/ChangeLog 2014-01-23 Nick Clifton * config/msp430/msp430.h (ASM_SPEC): Pass the -mcpu as -mcpu. (LIB_SPEC): Drop useof memory.ld and peripherals.ld scripts in

RFA: RL78: Fix UMUL and $FP size

Hi DJ, I noticed a couple of RL78 patches in our local tree that ought to be upstream, so here they are. The first is for the size of the frame pointer register and the second is for the UMUL instruction when both input operands are in the same register. OK to apply ? Cheers Nick

RFA: MN10300: Fix typo store_movm pattern

-> mn10300_store_multiple_operation_p mn10300_store_multiple_operation_p -> mn10300_store_multiple_regs Cheers Nick gcc/ChangeLog 2014-01-29 Nick Clifton * config/mn10300/mn10300.md (store_movm): Fix typo. Index: gcc/config/mn10300/mn10

Re: RFA: MN10300: Fix typo store_movm pattern

Hi Jeff, Agreed, the naming seems awfully confusing right now. Feel free to go forward with fixing that :-) Done - thanks! Cheers Nick

RFA: MN10300: Fix building libstdc++-v3

ENDED_REGS class however is the mn10300_register_move_cost() function which tells it that it only costs 2 to move via those registers. Hence the patch below. With the patch applied the libstdc++-v3 library now builds. OK to apply ? gcc/ChangeLog 2014-02-03 Nick Clifton * conf

Re: RFA: MN10300: Fix building libstdc++-v3

registers to match some classes even in MN10300. So how about the patch below ? This also allows the libstdc++-v3 library to be built. Cheers Nick gcc/ChangeLog 2014-02-04 Nick Clifton * config/mn10300/mn10300.c (mn10300_hard_regno_mode_ok): Do not accept extended registers

RFA: MN10300: Include saved registers in stack usage

there is one thing that I am not sure about - is it OK to use __builtin_popcount() or should I be calling some other function ? Tested with no regression on an mn10300-elf toolchain. OK to apply ? Cheers Nick gcc/ChangeLog 2014-02-05 Nick Clifton * config/mn10300/mn10300.c

Re: RFA: MN10300: Include saved registers in stack usage

gcc native. However, it's pretty easy to avoid the headaches and just provide a popcount routine. OK, here is a version of the patch with a homebrew popcount() function in it. OK to apply ? Cheers Nick Index: gcc/config/mn

Re: [PATCH] Fix ARM dwarf2cfi ICE and unwind info issues (PR target/59575)

lease apply. Cheers Nick

RFA: RL78: Add missing instruction patterns

/bf.c gcc.dg/20050922-1.c OK to apply ? Cheers Nick gcc/ChangeLog 2014-02-14 Nick Clifton * config/rl78/rl78-expand.md (xorhi3): New pattern. * config/rl78/rl78-virt.md (andhi3_virt): New pattern. (nandhi3_virt): New pattern. (xorhi3_virt): New pattern

RFA: Fix some gcc tests for 16-bit targets

. OK to apply ? Cheers Nick gcc/testsuite/ChangeLog 2014-02-17 Nick Clifton * gcc.dg/c-torture/execute/pr43220.c: Use a long integer to count the iterations. * gcc.c-torture/execute/pr58570.c: Use a long integer to hold a 29-bit bitfield. * gcc.c

Re: RFA: RL78: Add missing instruction patterns

patterns, so the revised patch below removes them, Cheers Nick gcc/ChangeLog 2014-02-18 Nick Clifton * config/rl78/rl78-real.md (cbranchsi4_real_signed): Add anti-cacnonical alternatives. (negandhi3_real): New pattern. * config/rl78/rl78-virt.md (neg

Re: RFA: Fix some gcc tests for 16-bit targets

Hi Richard, Instead of modifying testcases I'd be less nervous if you'd make them require 32bit. Otherwise you should reproduce the original issues with the modified testcases. OK, I can do that. How about this patch. OK to apply ? Cheers Nick gcc/testsuite/ChangeLog 2014-0

Commit: Xstormy16: Add modes to post_inc and pre_dec patterns

Hi Guys, I am applying the patch below to add modes to the POST_INC and PRE_DEC patterns in the XStormy16 backend. The lack of the modes was leading to some build problems. Cheers Nick gcc/ChangeLog 2014-02-21 Nick Clifton * config/stormy16/stormy16.md (pushdqi1): Add mode

Commit: RX:

where a register was pushed onto the stack was off by 4 bytes. Cheers Nick gcc/ChangeLog 2014-07-24 Nick Clifton * config/rx/rx.md (stack_push): Adjust RTL to account for the fact that operations are taking place in parallel. * config/rx.h (FRAME_POINTER_CFA_OFFSET

Commit: MSP430: Add hardware multiply routines to libgcc

Hi Guys, I am applying the patch below to add libgcc functions to support hardware multiplies on the MSP430. Cheers Nick libgcc/ChangeLog 2014-03-06 Nick Clifton * config/msp430/t-msp430 (LIB2ADD): Add lib2hw_mul.S * config/msp430/lib2hw_mul.S: New: Hardware multiply

RFA: RL78: Fix handling of (SUBREG (SYMBOL_REF))

? Cheers Nick gcc/ChangeLog 2014-04-01 Nick Clifton * config/rl78/rl78-expand.md (movqi): Handle (SUBREG (SYMBOL_REF)) properly. Index: gcc/config/rl78/rl78-expand.md === --- gcc/config/rl78/rl78-expand.md

RFA: x86 backend: Add default-manifest to Cygwin/MinGW links

project which will have to become a new dependency for the Cygwin and MinGW projects. Cheers Nick gcc/ChangeLog 2014-04-23 Nick Clifton * config/i386/cygwin.h (ENDFILE_SPEC): Include default-manifest.o if it can be found in the search path. * config/i386

Commit: MSP430: Enhance -mhwmult option

options so that the last one specified takes precedence. Cheers Nick gcc/ChangeLog 2014-04-23 Nick Clifton * config/msp430/msp430.c (msp430_handle_option): Move function to msp430-common.c (msp430_option_override): Simplify mcu and mcpu option handling

Re: [PATCH, libgcc, ARM] __gnu_f2h_internal inaccuracy

Hi John, John Tytgat * config/arm/fp16.c (__gnu_f2h_internal): Fix inaccuracy. Approved and applied. Cheers Nick

RFA: RL78: Always select register bank 0 at the start of an ISR

happens. No regressions with a rl78-elf toolchain. OK to apply ? Cheers Nick gcc/ChangeLog 2013-01-03 Nick Clifton * config/rl78/rl78.c (rl78_expand_prologue): Always select register bank 0 at the start of an interrupt handler. Index: gcc/config/rl78/rl78.c

RFA: RL78: Correct values of the MDBL and MDBH registers

DBH => 4H, 5H. GCC and the RL78 simulator currently use the values from section 14. The patch below corrects GCC. A similar patch will be submitted to update the sim. Tested with no regressions (on an updated sim) using an rl78-elf toolchain. OK to apply ? Cheers Nick

Commit: V850: Only compile callt support functions when CALLT is enabled

relocation error for these functions due to the way that they are implemented. Tested with no regressions on a v850-elf toolchain. Cheers Nick libgcc/ChangeLog 2013-01-04 Nick Clifton * config/v850/lib1funcs.S: Only provide CALLT support functions if the CALLT

Commit: V850: Fix floating point comparisons, branches and conditional stores

ranch patterns. Tested with no regressions on a v850e2v3-elf toolchain. Cheers Nick gcc/ChangeLog 2013-01-09 Nguyen Duy Dat Nick Clifton * config/v850/v850.md (cbranchsf4): New pattern. (cstoresf4): New pattern. (cbranchdf4): New pattern. (csto

Re: v850 ld error

Hi Joel, Well Doh! The gcc-abi and 8byte multilib variants appeared to have been added around 2012-11-20 by Nick Clifton. I think he missed changing the ASM_SPEC in gcc/config/v850/rtems.h when he added it. v850-rtems-gcc wasn't passing in the expected cpu specification flags. Nick.. how

Re: PING: gcc.target/arm: skip 5 tests for flag conflicts

ures than incompatible ones, I think that it would be better to allow the test by default and only exclude when necessary. Eg: /* PR target/53187 */ /* { dg-do compile } */ + /* { dg-skip-if "incompatible -march" { *-*-* } { "-march=armv6s-m" "-march=armv6-m" } { "" } } */ /* { dg-options "-march=armv7-a -mfloat-abi=hard -O2" } */ Cheers Nick

Re: [testsuite] remove ARM big-endian from some vect effective targets

_effective_target_vect64): Return 0 for big-endian ARM. > (check_effective_target_vect_widen_sum_qi_to_hi): Return 1 for ARM. Approved - please apply. Cheers Nick

Re: [testsuite] add option to LTO flags for c-torture/execute/builtins tests

Hi Janis, > 2013-01-15 Janis Johnson > > PR testsuite/55994 > * gcc.c-torture/execute/builtins/builtins.exp: Add > -Wl,--allow-multiple-definition for eabi and elf targets. Approved - please apply. Cheers Nick

Re: [testsuite] fix ARM test gcc.target/arm/neon-vld1_dupQ.c

Hi Janis, > 2013-01-14 Janis Johnson > > * gcc.target/arm/neon-vld1_dupQ.c: Use types that match function > prototypes. Approved - please apply. Cheers Nick

Re: [testsuite] replace gcc.target/arm/ftest-*.c with compile-only tests

e current dg-require-effective-target statements are enough. Can you provide an example of a case where they do not work ? Cheers Nick

Re: PING: gcc.target/arm: skip 5 tests for flag conflicts

complaints from the compiler. Is this OK? Approved - please apply - thanks for persevering with this. Cheers Nick

Re: [testsuite] replace gcc.target/arm/ftest-*.c with compile-only tests

* gcc.target/arm/ftest-armv8a-arm.c: Likewise. > * gcc.target/arm/ftest-armv8a-thumb.c: Likewise. Approved - please apply. Cheers Nick

RFA: RL78: Allow SP to be used as a base register

Hi DJ, Please may I apply the patch below. It fixes the RL78 backend so that the stack register can be used as a base address register. Tested with no regressions on an rl78-elf toolchain. Cheers Nick PS. I am currently investigating allow r8-r15 to be used as base registers. gcc

Re: [PATCH ARM iWMMXt 0/5] Improve iWMMXt support

Hi Matt, Could this patch, or perhaps the much smaller one I attached to bug 35294 be committed to the 4.7 branch? Yes. Done. Also, could you close its duplicates, bugs 36798 and 36966? Sorry no. I do not actually own these PRs, so I cannot close them. :-( Cheers Nick

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