Hi Guys
I am checking in the patch below to fix a failure in the GCC testsuite
for the MSP430. The problem was that PSI mode values only occupy 1
hard register whereas SI mode values occupy 2 registers. This meant
that when gcc generated:
(set (reg:SI r7) (zero_extend:SI (reg:PSI r7)))
it became confused and thought that only r7 was being set, not r7 and
r8. Changing the output constraint to "+r" prevents this from
happening.
Cheers
Nick
ChangeLog
2014-05-20 Nick Clifton <ni...@redhat.com>
* config/msp430/msp430.md (zero_extendpsisi2): Use + constraint on
operand 0 in order to prevent confusion about the number of
registers involved.
Index: config/msp430/msp430.md
===================================================================
--- config/msp430/msp430.md (revision 210635)
+++ config/msp430/msp430.md (working copy)
@@ -618,9 +618,15 @@
; when the PSI value is negative..
;
; Note: using PUSHM.A #1 is two bytes smaller than using PUSHX.A....
+;
+; Note: We use a + constraint on operand 0 as otherwise GCC gets confused
+; about extending a single PSI mode register into a pair of SImode registers
+; with the same starting register. It thinks that the upper register of
+; the pair is unused and so it can clobber it. Try compiling 20050826-2.c
+; at -O2 to see this.
(define_insn "zero_extendpsisi2"
- [(set (match_operand:SI 0 "register_operand" "=r")
+ [(set (match_operand:SI 0 "register_operand" "+r")
(zero_extend:SI (match_operand:PSI 1 "register_operand" "r")))]
""
"*
