[PATCH v2][ARM][GCC][1/x]: MVE ACLE intrinsics framework patch.

reference manual [1] for more details. [1] https://developer.arm.com/docs/ddi0553/latest Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath gcc/ChangeLog: 2020-02-10 Andre Vieira Mihail Ionescu Srinath Parvathaneni * c

[PATCH v2][ARM][GCC][2/x]: MVE ACLE intrinsics framework patch.

arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath gcc/ChangeLog: 2020-20-11 Andre Vieira Mihail Ionescu Srinath Parvathaneni * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base feature bit is on and -mfpu=auto is

[PATCH v2][ARM][GCC][3/x]: MVE ACLE intrinsics framework patch.

?_ga=2.102521798.659307368.1572453718-1501600630.1548848914 Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-11-11 Andre Vieira Srinath Parvathaneni * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify

[PATCH v1][GCC] aarch64: Add GCS build attributes support.

otstrapped on aarch64-none-linux-gnu and regression tested on aarch64-none-elf, no issues. Ok for master? Regards, Srinath. [1]: https://github.com/ARM-software/abi-aa/pull/230 [2]: https://gcc.gnu.org/git/?p=gcc.git;a=shortlog;h=refs/vendors/ARM/heads/gcs gcc/ChangeLog: 2024-09-11 Srinath Pa

[PATCH][GCC]: Add myself to MAINTAINERS

Hello, Add myself to MAINTAINERS file. Regards, SRI. ChangeLog: 2020-03-05 Srinath Parvathaneni * MAINTAINERS (Write After Approval): Add myself. ### Attachment also inlined for ease of reply### diff --git a/MAINTAINERS b/MAINTAINERS index

[PATCH v3][ARM][GCC][1/x]: MVE ACLE intrinsics framework patch.

manual [1] for more details. [1] https://developer.arm.com/docs/ddi0553/latest Regression tested on target arm-none-eabi and armeb-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath gcc/ChangeLog: 2020-03-06 Andre Vieira Mihail Ionescu Srinath Parvath

[PATCH v3][ARM][GCC][2/x]: MVE ACLE intrinsics framework patch.

armeb-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath gcc/ChangeLog: 2020-03-06 Andre Vieira Mihail Ionescu Srinath Parvathaneni * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base feature bit is on and -mfpu=auto is

[PATCH v3][ARM][GCC][3/x]: MVE ACLE intrinsics framework patch.

-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-06 Andre Vieira Srinath Parvathaneni * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add emulator calls for dobule precision arithmetic operations

[PATCH v2][ARM][GCC][1/1x]: Patch to support MVE ACLE intrinsics with unary operand.

Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro. (UNOP_NONE_SNONE_QUALIFIERS): Likewise. (UNOP_NONE_UNONE_QUALIFIERS): Likewise. * config/arm/arm_mve.h (vrndxq_f16): Define macro

[PATCH v2][ARM][GCC][4/x]: MVE ACLE vector interleaving store intrinsics.

/helium/mve-intrinsics Regression tested on target arm-none-eabi and armeb-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-06 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c (CF

[PATCH v2][ARM][GCC][1/2x]: MVE intrinsics with binary operands.

/ChangeLog: 2019-10-21 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define qualifier for binary operands. (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise. (BINOP_NONE_

[PATCH v2][ARM][GCC][2/1x]: MVE intrinsics with unary operand.

-intrinsics Regression tested on target arm-none-eabi and armeb-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-06 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c

[PATCH v2][ARM][GCC][5/2x]: MVE intrinsics with binary operands.

, BINOP_UNONE_UNONE_UNONE. Regression tested on target arm-none-eabi and armeb-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-23 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h (vqmovntq_u16): Define

[PATCH v2][ARM][GCC][4/1x]: MVE intrinsics with unary operand.

on target arm-none-eabi and armeb-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-06 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c (hi_UP): Define mode. * config/arm/arm.h

[PATCH v2][ARM][GCC][3/2x]: MVE intrinsics with binary operands.

tested on target arm-none-eabi and armeb-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-21 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define

[PATCH v2][ARM][GCC][3/1x]: MVE intrinsics with unary operand.

e_vcvtmq_): Likewise. (mve_vcvtaq_): Likewise. (mve_vrev16q_v16qi): Likewise. (mve_vaddlvq_v4si): Likewise. gcc/testsuite/ChangeLog: 2020-03-06 Andre Vieira Mihail Ionescu Srinath Parvathaneni * gcc.target/arm/mve/intrinsics/vabsq_s16.c: New test.

[PATCH v2][ARM][GCC][2/2x]: MVE intrinsics with binary operands.

t; are added, to check the the matching constraint Rb and Rf respectively. Regression tested on target arm-none-eabi and armeb-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-21 Andre Vieira Mihail Ionescu Srinath Parvathanen

[PATCH v2][ARM][GCC][4/2x]: MVE intrinsics with binary operands.

OP_UNONE_NONE_IMM, BINOP_UNONE_NONE_NONE, BINOP_UNONE_UNONE_IMM, BINOP_UNONE_UNONE_NONE, BINOP_UNONE_UNONE_UNONE. Regression tested on target arm-none-eabi and armeb-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-23 Andre Vieira Mihail Io

[PATCH v4][ARM][GCC][2/x]: MVE ACLE intrinsics framework patch.

. [1] https://developer.arm.com/docs/ddi0553/latest Regression tested on target arm-none-eabi and armeb-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath gcc/ChangeLog: 2020-03-06 Andre Vieira Mihail Ionescu Srinath Parvathaneni * common

Re: [PATCH v3][ARM][GCC][1/x]: MVE ACLE intrinsics framework patch.

SRI From: Kyrill Tkachov Sent: 12 March 2020 11:15 To: Srinath Parvathaneni ; gcc-patches@gcc.gnu.org Subject: Re: [PATCH v3][ARM][GCC][1/x]: MVE ACLE intrinsics framework patch. Hi Srinath, On 3/10/20 6:19 PM, Srinath Parvathaneni wrote: > Hello Kyrill, > > This patch addresses all the

Re: [PATCH v3][ARM][GCC][2/x]: MVE ACLE intrinsics framework patch.

SRI. From: Kyrill Tkachov Sent: 12 March 2020 11:16 To: Srinath Parvathaneni ; gcc-patches@gcc.gnu.org Subject: Re: [PATCH v3][ARM][GCC][2/x]: MVE ACLE intrinsics framework patch. Hi Srinath, On 3/10/20 6:19 PM, Srinath Parvathaneni wrote: > Hello Kyrill, &g

[PATCH v2][ARM][GCC][1/3x]: MVE intrinsics with ternary operands.

/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-23 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c

[PATCH v2][ARM][GCC][2/3x]: MVE intrinsics with ternary operands.

aint Rc and Re respectively. Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-25 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h (vpselq_u8): Def

[PATCH v2][ARM][GCC][3/3x]: MVE intrinsics with ternary operands.

://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-29 Andre Vieira Mihail Ionescu Srinath Parvathaneni

Re: [PATCH v3][ARM][GCC][2/x]: MVE ACLE intrinsics framework patch.

Hi Kyrill, I have re-based this patch, please commit the following patch on my behalf. https://gcc.gnu.org/pipermail/gcc-patches/2020-March/541826.html Regards, SRI. From: Gcc-patches on behalf of Srinath Parvathaneni Sent: 16 March 2020 10:54 To: Kyrill

[PATCH v4][ARM][GCC][3/x]: MVE ACLE intrinsics framework patch.

re Vieira Srinath Parvathaneni * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add emulator calls for dobule precision arithmetic operations for MVE. 2020-03-06 Srinath Parvathaneni * gcc.target/arm/mve/intrinsics/mve_libcall1.c: New test. * g

[PATCH v3][ARM][GCC][1/3x]: MVE intrinsics with ternary operands.

/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-23 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS

[PATCH v3][ARM][GCC][2/3x]: MVE intrinsics with ternary operands.

aint Rc and Re respectively. Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-25 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h (vpselq_u8): Def

[PATCH v3][ARM][GCC][3/3x]: MVE intrinsics with ternary operands.

://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-29 Andre Vieira Mihail Ionescu Srinath Parvathaneni

[PATCH v2][ARM][GCC][1/4x]: MVE intrinsics with quaternary operands.

: 2019-10-29 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Define builtin qualifier. (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise

[PATCH v2][ARM][GCC][3/4x]: MVE intrinsics with quaternary operands.

-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-31 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-protos.h (arm_mve_immediate_check

[PATCH v2][ARM][GCC][2/4x]: MVE intrinsics with quaternary operands.

Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h (vabdq_m_s8): Define macro. (vabdq_m_s32): Likewise. (vabdq_m_s16): Likewise. (vabdq_m_u8): Likewise. (vabdq_m_u32): Likewise. (vabdq_m_u16): Likewise

[PATCH v2][ARM][GCC][4/4x]: MVE intrinsics with quaternary operands.

, Srinath. gcc/ChangeLog: 2019-10-31 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h (vabdq_m_f32): Define macro. (vabdq_m_f16): Likewise. (vaddq_m_f32): Likewise. (vaddq_m_f16): Likewise. (vaddq_m_n_f32

Re: [PATCH v3][ARM][GCC][1/3x]: MVE intrinsics with ternary operands.

Hi Kyrill, This patches was already committed. I have resend this by mistake. Sorry, please ignore this. Regards SRI. From: Gcc-patches on behalf of Srinath Parvathaneni Sent: 18 March 2020 11:18 To: gcc-patches@gcc.gnu.org Subject: [PATCH v3][ARM][GCC][1/3x

[PATCH v4][ARM][GCC][2/3x]: MVE intrinsics with ternary operands.

aint Rc and Re respectively. Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-25 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h (vpselq_u8): Define macro. (vps

[PATCH v2][ARM][GCC][1/5x]: MVE store intrinsics.

://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-11-01 Andre Vieira Mihail Ionescu Srinath Parvathaneni

[PATCH v2][ARM][GCC][2/5x]: MVE load intrinsics.

://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-11-01 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm

[PATCH v2][ARM][GCC][3/5x]: MVE store intrinsics with predicated suffix.

Srinath Parvathaneni * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin qualifier. (STRU_P_QUALIFIERS): Likewise. (STRSU_P_QUALIFIERS): Likewise. (STRSS_P_QUALIFIERS): Likewise. (STRSBS_P_QUALIFIERS): Likewise

[PATCH v2][ARM][GCC][5/5x]: MVE ACLE load intrinsics which load a byte, halfword, or word from memory.

/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-11-01 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h (vld1q_s8): Define

[PATCH v2][ARM][GCC][8/5x]: Remaining MVE store intrinsics which stores an half word, word and double word to memory.

ultiple of 8. Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-11-05 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): De

[PATCH v2][ARM][GCC][7/5x]: MVE store intrinsics which stores byte,half word or word to memory.

/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-11-01 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h

[PATCH v2][ARM][GCC][6/5x]: Remaining MVE load intrinsics which loads half word and word or double word from memory.

Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h (vldrdq_gather_base_s64): Define macro. (vldrdq_gather_base_u64): Likewise. (vldrdq_gather_base_z_s64): Likewise. (vldrdq_gather_base_z_u64): Likewise

[PATCH v2][ARM][GCC][4/5x]: MVE load intrinsics with zero(_z) suffix.

regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-11-01 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin qualifier. (LDRGBU_Z_QUALIFIERS): Likewise

[PATCH v2][ARM][GCC][6x]:MVE ACLE vaddq intrinsics using arithmetic plus operator.

tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-19 Srinath Parvathaneni Andre Vieira Mihail Ionescu * config/arm/arm_mve.h (vaddq_s8): Define macro. (vaddq_s16): Likewise. (vaddq_s32)

[PATCH v2][ARM][GCC][7x]: MVE vreinterpretq and vuninitializedq intrinsics.

Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-19 Srinath Parvathaneni * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro. (vreinterpretq_s16_s64): Likewise. (vreinterpretq_s16_s8): Likewise

[PATCH v2][ARM][GCC][1/8x]: MVE ACLE vidup, vddup, viwdup and vdwdup intrinsics with writeback.

found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-20 Srinath Parvathaneni Andre Vieira Mihail Ionescu * config/arm/arm-builtins.c (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary builtin

[PATCH v2][ARM][GCC][2/8x]: MVE ACLE gather load and scatter store intrinsics with writeback.

://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-20 Srinath Parvathaneni Andre Vieira Mihail Ionescu

[PATCH v2][ARM][GCC][9x]: MVE ACLE predicated intrinsics with (dont-care) variant.

://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-20 Srinath Parvathaneni * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro

[PATCH v3][ARM][GCC][9x]: MVE ACLE predicated intrinsics with (dont-care) variant.

://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-20 Srinath Parvathaneni * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro

[PATCH v2][ARM][GCC][10x]: MVE ACLE intrinsics "add with carry across beats" and "beat-wise substract".

://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-20 Srinath Parvathaneni Andre Vieira Mihail Ionescu * confi

[PATCH v2][ARM][GCC][11x]: MVE ACLE vector interleaving store and deinterleaving load intrinsics and also aliases to vstr and vldr intrinsics.

more details. [1] https://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-20 Srinath Parvathaneni Andre Vieira Mihail

[PATCH v2][ARM][GCC][12x]: MVE ACLE intrinsics to set and get vector lane.

(MVE) intrinsics [1] for more details. [1] https://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-11-08 Srinath Parvathaneni Andre

[PATCH v2][ARM][GCC][13x]: MVE ACLE scalar shift intrinsics.

. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-11-08 Srinath Parvathaneni * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier. (UQSHL_QUALIFIERS): Likewise. (ASRL_QUALIFIERS): Likewise. (SQSHL_QUALIFIERS): Likewise. * config

[PATCH v2][ARM][GCC][14x]: MVE ACLE whole vector left shift with carry intrinsics.

, Srinath. gcc/ChangeLog: 2019-11-08 Srinath Parvathaneni Andre Vieira Mihail Ionescu * config/arm/arm_mve.h (vshlcq_m_s8): Define macro. (vshlcq_m_u8): Likewise. (vshlcq_m_s16): Likewise. (vshlcq_m_u16): Likewise. (vshlcq_m_s32

[GCC][ARM][PATCH]: Add support for MVE ACLE intrinsics polymorphic variants for +mve.fp option.

/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-24 Srinath Parvathaneni * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the common section of both MVE Integer

[GCC][ARM][PATCH]: Add MVE ACLE intrinsics vbicq_n_* polymorphic variant support.

more details. [1] https://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-30 Srinath Parvathaneni * config/arm/arm_mve.h (vbicq

[GCC][PATCH][ARM]: Fix for MVE ACLE intrinsics with writeback (PR94317).

more details. [1] https://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-03-31 Srinath Parvathaneni PR target/94317 * config

[GCC][PATCH][ARM]: Modify the MVE polymorphic variant arguments to match the MVE intrinsic definition.

nstruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-04-22 Srinath Parvathaneni * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's

[GCC][PATCH][ARM]: Change arm constraint name from "e" to "Te".

Hello, This patches changes the constraint "e" to "Te". Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-04-24 Srinath Parvathaneni * config/arm/constraints.md (e): Remove constraint. (Te

[GCC][PATCH][ARM]: Fix the wrong code-gen generated by MVE vector load/store intrinsics (PR94959).

(mve_vstrwq_p_v4si): Likewise. (mve_vstrwq_v4si): Likewise.Modify constriant Us to Ux. * config/arm/predicates.md (mve_memory_operand): Define. gcc/testsuite/ChangeLog: 2020-05-13 Srinath Parvathaneni PR target/94959 * gcc.target/arm/mve/intrinsics/mve_vector_float2.c: Mod

RE: [GCC][PATCH][ARM]: Fix the wrong code-gen generated by MVE vector load/store intrinsics (PR94959).

Hi, > -Original Message- > From: Christophe Lyon > Sent: 13 May 2020 11:20 > To: Srinath Parvathaneni > Cc: gcc Patches ; Richard Earnshaw > > Subject: Re: [GCC][PATCH][ARM]: Fix the wrong code-gen generated by MVE > vector load/store intrinsics (PR94959). >

[ARM][wwwdocs]: Document Armv8.1-M, Helium Intrinsics and Cortex-M55 changes.

M-profile related changes in GCC-10. ### Attachment also inlined for ease of reply### diff --git a/htdocs/gcc-10/changes.html b/htdocs/gcc-10/changes.html index d1a7df0a9259292d097c1c3b9daeab56329ea435..57ca749da72ed64da37b3eb5404cf5cde8be44dd 100644 --- a/htdo

[ARM][wwwdocs]: Document Armv8.1-M Mainline Security Extensions changes.

Armv8.1-M Mainline Security Extensions related changes in GCC-10. ### Attachment also inlined for ease of reply### diff --git a/htdocs/gcc-10/changes.html b/htdocs/gcc-10/changes.html index 57ca749da72ed64da37b3eb5404cf5cde8be44dd..10bf3b78c7769b73c808bd2c2fe60e

[ARM]: Fix typo in documentation.

The command line option to enable Armv8.1-M Mainline Security Extensions has a typo and this patch corrects it. Committed it under the obvious rule. ### Attachment also inlined for ease of reply### diff --git a/htdocs/gcc-10/changes.html b/htdocs/gcc-10/changes.ht

RE: [GCC][PATCH][ARM]: Fix the wrong code-gen generated by MVE vector load/store intrinsics (PR94959).

Hi Martin, > -Original Message- > From: Martin Liška > Sent: 20 May 2020 11:51 > To: Srinath Parvathaneni ; Christophe Lyon > > Cc: Richard Earnshaw ; gcc Patches patc...@gcc.gnu.org> > Subject: Re: [GCC][PATCH][ARM]: Fix the wrong code-gen generated by

[PATCH][GCC] arm: Fix the MVE ACLE vbicq intrinsics.

egressions. Ok for master and gcc-10 branch? Thanks, Srinath. gcc/ChangeLog: 2020-05-20 Srinath Parvathaneni * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic arguments. (__arm_vbicq_n_s16): Likewise. (__arm_vbicq_n_u32)

[GCC][PATCH][ARM]: Correct the grouping of operands in MVE vector scatter store intrinsics (PR94735).

found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2020-06-02 Srinath Parvathaneni PR target/94735 * config/arm//predicates.md (mve_scatter_memory): Define to match (mem (reg)) for scatter store memory. * config/arm/mve.md (mve_v

[PATCH][GCC] arm: Fix the MVE ACLE vaddq_m polymorphic variants.

re details. [1] https://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for master and gcc-10 branch? Thanks, Srinath. gcc/ChangeLog: 2020-06-04 Srinath Parvathaneni * confi

[PATCH][GCC] arm: Fix MVE scalar shift intrinsics code-gen.

more details. [1] https://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for master and gcc-10 branch? Thanks, Srinath. gcc/ChangeLog: 2020-06-12 Srinath Parvathaneni * c

[PATCH][GCC-10 Backport] arm: Fix unintentional fall throughs in arm.c

Hi all, This small patch fix some unintentional fall-throughs in `mve_vector_mem_operand'. Regtested and bootstraped on arm-linux-gnueabihf. Okay for GCC-10 branch? Regards, Srinath gcc/ChangeLog 2020-06-09 Srinath Parvathaneni Backported from mainline 2020-05-28 A

[PATCH][GCC-10 Backport] arm: Fix the wrong code-gen generated by MVE vector load/store intrinsics (PR94959).

//developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics [2] https://developer.arm.com/docs/ddi0553/latest Regression tested on arm-none-eabi and found no regressions. Ok for gcc-10 branch? Thanks, Srinath. gcc/ChangeLog: 2020-06-09 Srinath Parvathaneni Back

[PATCH][GCC-10 Backport] arm: Fix the MVE ACLE vbicq intrinsics.

egressions. Ok for GCC-10 branch? Thanks, Srinath. gcc/ChangeLog: 2020-05-20 Srinath Parvathaneni Backported from mainline 2020-06-04 Srinath Parvathaneni * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic arguments. (__arm_v

[PATCH][GCC-10 Backport] arm: Correct the grouping of operands in MVE vector scatter store intrinsics (PR94735).

found no regressions. Ok for GCC-10 branch? Thanks, Srinath. gcc/ChangeLog: 2020-06-09 Srinath Parvathaneni Backported from mainline 2020-06-04 Srinath Parvathaneni PR target/94735 * config/arm//predicates.md (mve_scatter_memory): Define to match

[PATCH][GCC-10 Backport] arm: Fix MVE scalar shift intrinsics code-gen.

rinath. 2020-06-12 Srinath Parvathaneni gcc/ * config/arm/mve.md (mve_uqrshll_sat_di): Correct the predicate and constraint of all the operands. (mve_sqrshrl_sat_di): Likewise. (mve_uqrshl_si): Likewise. (mve_sqrshr_si): Likewise. (mve_uqshll_di): Li

[PATCH][GCC-10 Backport] arm: Fix the MVE ACLE vaddq_m polymorphic variants.

branch? Thanks, Srinath. 2020-06-04 Srinath Parvathaneni gcc/ * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic arguments. (__arm_vaddq_m_n_s32): Likewise. (__arm_vaddq_m_n_s16): Likewise. (__arm_vaddq_m_n_u8): Likewise. (__ar

[PATCH][GCC] arm: Fix the failing mve scalar shift execution tests.

tions. Regression tested on arm-none-eabi and found no regressions. Ok for master? Ok for GCC-10 branch? Thanks, Srinath. 2020-06-18 Srinath Parvathaneni gcc/ * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item. (arm_mve_hw): Likewise. gcc/testsuite/ * gcc.target/arm/mve/mv

RE: [PATCH][GCC] arm: Fix the failing mve scalar shift execution tests.

Hi, > -Original Message- > From: Christophe Lyon > Sent: 18 June 2020 14:38 > To: Srinath Parvathaneni > Cc: gcc Patches > Subject: Re: [PATCH][GCC] arm: Fix the failing mve scalar shift execution > tests. > > Hi, > > > On Thu, 18 Jun 2020 at

RE: [PATCH][GCC-10 Backport] arm: Fix MVE scalar shift intrinsics code-gen.

Hi, > -Original Message- > From: Christophe Lyon > Sent: 18 June 2020 16:06 > To: Kyrylo Tkachov > Cc: Srinath Parvathaneni ; gcc- > patc...@gcc.gnu.org > Subject: Re: [PATCH][GCC-10 Backport] arm: Fix MVE scalar shift intrinsics > code-gen. > > Hi, >

RE: [PATCH][GCC-10 Backport] arm: Fix MVE scalar shift intrinsics code-gen.

Hi, > -Original Message- > From: Christophe Lyon > Sent: 18 June 2020 16:44 > To: Srinath Parvathaneni > Cc: gcc-patches@gcc.gnu.org; Kyrylo Tkachov > Subject: Re: [PATCH][GCC-10 Backport] arm: Fix MVE scalar shift intrinsics > code-gen. > > On Thu, 18

[PATCH][GCC-10 Backport] arm: Fix the failing mve scalar shift execution tests.

tions. Regression tested on arm-none-eabi and found no regressions. Ok for GCC-10 branch? Thanks, Srinath. 2020-06-18 Srinath Parvathaneni gcc/ * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item. (arm_mve_hw): Likewise. gcc/testsuite/ * gcc.target/arm/mve/intri

[PATCH][ARM][GCC][2/x]: MVE ACLE intrinsics framework patch.

: 2019-11-11 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Add check to not allow TARGET_HAVE_MVE for this pattern. (thumb2_cmse_entry_return): Add TARGET_HAVE_MVE check to update APSR

[PATCH][ARM][GCC][3/1x]: MVE intrinsics with unary operand.

sions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-21 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS. * config/arm/arm_mve.h (vdupq_n_s8): Define macro. (vd

[PATCH][ARM][GCC][3/x]: MVE ACLE intrinsics framework patch.

Srinath Parvathaneni * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add emulator calls for dobule precision arithmetic operations for MVE. ### Attachment also inlined for ease of reply### diff --git a/gcc

[PATCH][ARM][GCC][4/1x]: MVE intrinsics with unary operand.

Srinath Parvathaneni * config/arm/arm-builtins.c (hi_UP): Define mode. * config/arm/arm.h (IS_VPR_REGNUM): Move. * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM. (APSRQ_REGNUM): Modify. (APSRGE_REGNUM): Modify. * config/arm

[PATCH][ARM][GCC][2/1x]: MVE intrinsics with unary operand.

Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define. (UNOP_SNONE_NONE_QUALIFIERS): Likewise. (UNOP_SNONE_IMM_QUALIFIERS): Likewise. (UNOP_UNONE_NONE_QUALIFIERS): Likewise

[PATCH][ARM][GCC][1/x]: MVE ACLE intrinsics framework patch.

ession tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath gcc/ChangeLog: 2019-11-11 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config.gcc (arm_mve.h): Add header file. * config/arm/aout.h (p0): Add new regist

[PATCH][ARM][GCC][4/x]: MVE ACLE vector interleaving store intrinsics.

Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c (CF): Define mve_builtin_data. (VAR1): Define. (ARM_BUILTIN_MVE_PATTERN_START): Define. (arm_init_mve_builtins): Define function. (arm_init_builtins): Add

[PATCH][ARM][GCC][1/1x]: Patch to support MVE ACLE intrinsics with unary operand.

arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-17 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro. (UNOP_NONE_SNONE_QUALIFIERS

[PATCH][ARM][GCC][1/2x]: MVE intrinsics with binary operands.

ching constraint Rd. Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-21 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE

[PATCH][ARM][GCC][2/2x]: MVE intrinsics with binary operands.

Thanks, Srinath. gcc/ChangeLog: 2019-10-21 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define qualifier for binary operands. (BINOP

[PATCH][ARM][GCC][3/2x]: MVE intrinsics with binary operands.

Srinath Parvathaneni * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define qualifier for binary operands. (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise. (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise. * config/arm/arm_mve.h

[PATCH][ARM][GCC][5/2x]: MVE intrinsics with binary operands.

Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h (vqmovntq_u16): Define macro. (vqmovnbq_u16): Likewise. (vmulltq_poly_p8): Likewise. (vmullbq_poly_p8): Likewise. (vmovntq_u16): Likewise. (vmovnbq_u16): Likewise

[PATCH][ARM][GCC][4/2x]: MVE intrinsics with binary operands.

d no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-23 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h (vsubq_u8): Define macro. (vsubq_n_u8): Likewise. (vrmulhq_u8): Likewise. (vrhaddq_u8):

[PATCH][ARM][GCC][3/3x]: MVE intrinsics with ternary operands.

for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-29 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro. (vrmlsldavhaq_s32): Likewise. (vrmlsldavhaxq_s32): Likewise

[PATCH][ARM][GCC][2/3x]: MVE intrinsics with ternary operands.

10-25 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h (vpselq_u8): Define macro. (vpselq_s8): Likewise. (vrev64q_m_u8): Likewise. (vqrdmlashq_n_u8): Likewise. (vqrdmlahq_n_u8): Likewise. (vqdml

[PATCH][ARM][GCC][3/4x]: MVE intrinsics with quaternary operands.

: 2019-10-31 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-protos.h (arm_mve_immediate_check): * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check mode and interger value. * config/arm/arm_mve.h

[PATCH][ARM][GCC][4/4x]: MVE intrinsics with quaternary operands.

://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-31 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h

[PATCH][ARM][GCC][1/3x]: MVE intrinsics with ternary operands.

Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Define qualifier for ternary operands. (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise

[PATCH][ARM][GCC][2/4x]: MVE intrinsics with quaternary operands.

-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-30 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm_mve.h (vabdq_m_s8): Define macro. (vabdq_m_s32

[PATCH][ARM][GCC][1/4x]: MVE intrinsics with quaternary operands.

/instruction-sets/simd-isas/helium/mve-intrinsics Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-29 Andre Vieira Mihail Ionescu Srinath Parvathaneni * config/arm/arm-builtins.c

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