Hello, This patch supports following MVE ACLE intrinsics with binary operands.
vqmovntq_u16, vqmovnbq_u16, vmulltq_poly_p8, vmullbq_poly_p8, vmovntq_u16, vmovnbq_u16, vmlaldavxq_u16, vmlaldavq_u16, vqmovuntq_s16, vqmovunbq_s16, vshlltq_n_u8, vshllbq_n_u8, vorrq_n_u16, vbicq_n_u16, vcmpneq_n_f16, vcmpneq_f16, vcmpltq_n_f16, vcmpltq_f16, vcmpleq_n_f16, vcmpleq_f16, vcmpgtq_n_f16, vcmpgtq_f16, vcmpgeq_n_f16, vcmpgeq_f16, vcmpeqq_n_f16, vcmpeqq_f16, vsubq_f16, vqmovntq_s16, vqmovnbq_s16, vqdmulltq_s16, vqdmulltq_n_s16, vqdmullbq_s16, vqdmullbq_n_s16, vorrq_f16, vornq_f16, vmulq_n_f16, vmulq_f16, vmovntq_s16, vmovnbq_s16, vmlsldavxq_s16, vmlsldavq_s16, vmlaldavxq_s16, vmlaldavq_s16, vminnmvq_f16, vminnmq_f16, vminnmavq_f16, vminnmaq_f16, vmaxnmvq_f16, vmaxnmq_f16, vmaxnmavq_f16, vmaxnmaq_f16, veorq_f16, vcmulq_rot90_f16, vcmulq_rot270_f16, vcmulq_rot180_f16, vcmulq_f16, vcaddq_rot90_f16, vcaddq_rot270_f16, vbicq_f16, vandq_f16, vaddq_n_f16, vabdq_f16, vshlltq_n_s8, vshllbq_n_s8, vorrq_n_s16, vbicq_n_s16, vqmovntq_u32, vqmovnbq_u32, vmulltq_poly_p16, vmullbq_poly_p16, vmovntq_u32, vmovnbq_u32, vmlaldavxq_u32, vmlaldavq_u32, vqmovuntq_s32, vqmovunbq_s32, vshlltq_n_u16, vshllbq_n_u16, vorrq_n_u32, vbicq_n_u32, vcmpneq_n_f32, vcmpneq_f32, vcmpltq_n_f32, vcmpltq_f32, vcmpleq_n_f32, vcmpleq_f32, vcmpgtq_n_f32, vcmpgtq_f32, vcmpgeq_n_f32, vcmpgeq_f32, vcmpeqq_n_f32, vcmpeqq_f32, vsubq_f32, vqmovntq_s32, vqmovnbq_s32, vqdmulltq_s32, vqdmulltq_n_s32, vqdmullbq_s32, vqdmullbq_n_s32, vorrq_f32, vornq_f32, vmulq_n_f32, vmulq_f32, vmovntq_s32, vmovnbq_s32, vmlsldavxq_s32, vmlsldavq_s32, vmlaldavxq_s32, vmlaldavq_s32, vminnmvq_f32, vminnmq_f32, vminnmavq_f32, vminnmaq_f32, vmaxnmvq_f32, vmaxnmq_f32, vmaxnmavq_f32, vmaxnmaq_f32, veorq_f32, vcmulq_rot90_f32, vcmulq_rot270_f32, vcmulq_rot180_f32, vcmulq_f32, vcaddq_rot90_f32, vcaddq_rot270_f32, vbicq_f32, vandq_f32, vaddq_n_f32, vabdq_f32, vshlltq_n_s16, vshllbq_n_s16, vorrq_n_s32, vbicq_n_s32, vrmlaldavhq_u32, vctp8q_m, vctp64q_m, vctp32q_m, vctp16q_m, vaddlvaq_u32, vrmlsldavhxq_s32, vrmlsldavhq_s32, vrmlaldavhxq_s32, vrmlaldavhq_s32, vcvttq_f16_f32, vcvtbq_f16_f32, vaddlvaq_s32. Please refer to M-profile Vector Extension (MVE) intrinsics [1] for more details. [1] https://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics The above intrinsics are defined using the already defined builtin qualifiers BINOP_NONE_NONE_IMM, BINOP_NONE_NONE_NONE, BINOP_UNONE_NONE_NONE, BINOP_UNONE_UNONE_IMM, BINOP_UNONE_UNONE_NONE, BINOP_UNONE_UNONE_UNONE. Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-10-23 Andre Vieira <andre.simoesdiasvie...@arm.com> Mihail Ionescu <mihail.ione...@arm.com> Srinath Parvathaneni <srinath.parvathan...@arm.com> * config/arm/arm_mve.h (vqmovntq_u16): Define macro. (vqmovnbq_u16): Likewise. (vmulltq_poly_p8): Likewise. (vmullbq_poly_p8): Likewise. (vmovntq_u16): Likewise. (vmovnbq_u16): Likewise. (vmlaldavxq_u16): Likewise. (vmlaldavq_u16): Likewise. (vqmovuntq_s16): Likewise. (vqmovunbq_s16): Likewise. (vshlltq_n_u8): Likewise. (vshllbq_n_u8): Likewise. (vorrq_n_u16): Likewise. (vbicq_n_u16): Likewise. (vcmpneq_n_f16): Likewise. (vcmpneq_f16): Likewise. (vcmpltq_n_f16): Likewise. (vcmpltq_f16): Likewise. (vcmpleq_n_f16): Likewise. (vcmpleq_f16): Likewise. (vcmpgtq_n_f16): Likewise. (vcmpgtq_f16): Likewise. (vcmpgeq_n_f16): Likewise. (vcmpgeq_f16): Likewise. (vcmpeqq_n_f16): Likewise. (vcmpeqq_f16): Likewise. (vsubq_f16): Likewise. (vqmovntq_s16): Likewise. (vqmovnbq_s16): Likewise. (vqdmulltq_s16): Likewise. (vqdmulltq_n_s16): Likewise. (vqdmullbq_s16): Likewise. (vqdmullbq_n_s16): Likewise. (vorrq_f16): Likewise. (vornq_f16): Likewise. (vmulq_n_f16): Likewise. (vmulq_f16): Likewise. (vmovntq_s16): Likewise. (vmovnbq_s16): Likewise. (vmlsldavxq_s16): Likewise. (vmlsldavq_s16): Likewise. (vmlaldavxq_s16): Likewise. (vmlaldavq_s16): Likewise. (vminnmvq_f16): Likewise. (vminnmq_f16): Likewise. (vminnmavq_f16): Likewise. (vminnmaq_f16): Likewise. (vmaxnmvq_f16): Likewise. (vmaxnmq_f16): Likewise. (vmaxnmavq_f16): Likewise. (vmaxnmaq_f16): Likewise. (veorq_f16): Likewise. (vcmulq_rot90_f16): Likewise. (vcmulq_rot270_f16): Likewise. (vcmulq_rot180_f16): Likewise. (vcmulq_f16): Likewise. (vcaddq_rot90_f16): Likewise. (vcaddq_rot270_f16): Likewise. (vbicq_f16): Likewise. (vandq_f16): Likewise. (vaddq_n_f16): Likewise. (vabdq_f16): Likewise. (vshlltq_n_s8): Likewise. (vshllbq_n_s8): Likewise. (vorrq_n_s16): Likewise. (vbicq_n_s16): Likewise. (vqmovntq_u32): Likewise. (vqmovnbq_u32): Likewise. (vmulltq_poly_p16): Likewise. (vmullbq_poly_p16): Likewise. (vmovntq_u32): Likewise. (vmovnbq_u32): Likewise. (vmlaldavxq_u32): Likewise. (vmlaldavq_u32): Likewise. (vqmovuntq_s32): Likewise. (vqmovunbq_s32): Likewise. (vshlltq_n_u16): Likewise. (vshllbq_n_u16): Likewise. (vorrq_n_u32): Likewise. (vbicq_n_u32): Likewise. (vcmpneq_n_f32): Likewise. (vcmpneq_f32): Likewise. (vcmpltq_n_f32): Likewise. (vcmpltq_f32): Likewise. (vcmpleq_n_f32): Likewise. (vcmpleq_f32): Likewise. (vcmpgtq_n_f32): Likewise. (vcmpgtq_f32): Likewise. (vcmpgeq_n_f32): Likewise. (vcmpgeq_f32): Likewise. (vcmpeqq_n_f32): Likewise. (vcmpeqq_f32): Likewise. (vsubq_f32): Likewise. (vqmovntq_s32): Likewise. (vqmovnbq_s32): Likewise. (vqdmulltq_s32): Likewise. (vqdmulltq_n_s32): Likewise. (vqdmullbq_s32): Likewise. (vqdmullbq_n_s32): Likewise. (vorrq_f32): Likewise. (vornq_f32): Likewise. (vmulq_n_f32): Likewise. (vmulq_f32): Likewise. (vmovntq_s32): Likewise. (vmovnbq_s32): Likewise. (vmlsldavxq_s32): Likewise. (vmlsldavq_s32): Likewise. (vmlaldavxq_s32): Likewise. (vmlaldavq_s32): Likewise. (vminnmvq_f32): Likewise. (vminnmq_f32): Likewise. (vminnmavq_f32): Likewise. (vminnmaq_f32): Likewise. (vmaxnmvq_f32): Likewise. (vmaxnmq_f32): Likewise. (vmaxnmavq_f32): Likewise. (vmaxnmaq_f32): Likewise. (veorq_f32): Likewise. (vcmulq_rot90_f32): Likewise. (vcmulq_rot270_f32): Likewise. (vcmulq_rot180_f32): Likewise. (vcmulq_f32): Likewise. (vcaddq_rot90_f32): Likewise. (vcaddq_rot270_f32): Likewise. (vbicq_f32): Likewise. (vandq_f32): Likewise. (vaddq_n_f32): Likewise. (vabdq_f32): Likewise. (vshlltq_n_s16): Likewise. (vshllbq_n_s16): Likewise. (vorrq_n_s32): Likewise. (vbicq_n_s32): Likewise. (vrmlaldavhq_u32): Likewise. (vctp8q_m): Likewise. (vctp64q_m): Likewise. (vctp32q_m): Likewise. (vctp16q_m): Likewise. (vaddlvaq_u32): Likewise. (vrmlsldavhxq_s32): Likewise. (vrmlsldavhq_s32): Likewise. (vrmlaldavhxq_s32): Likewise. (vrmlaldavhq_s32): Likewise. (vcvttq_f16_f32): Likewise. (vcvtbq_f16_f32): Likewise. (vaddlvaq_s32): Likewise. (__arm_vqmovntq_u16): Define intrinsic. (__arm_vqmovnbq_u16): Likewise. (__arm_vmulltq_poly_p8): Likewise. (__arm_vmullbq_poly_p8): Likewise. (__arm_vmovntq_u16): Likewise. (__arm_vmovnbq_u16): Likewise. (__arm_vmlaldavxq_u16): Likewise. (__arm_vmlaldavq_u16): Likewise. (__arm_vqmovuntq_s16): Likewise. (__arm_vqmovunbq_s16): Likewise. (__arm_vshlltq_n_u8): Likewise. (__arm_vshllbq_n_u8): Likewise. (__arm_vorrq_n_u16): Likewise. (__arm_vbicq_n_u16): Likewise. (__arm_vcmpneq_n_f16): Likewise. (__arm_vcmpneq_f16): Likewise. (__arm_vcmpltq_n_f16): Likewise. (__arm_vcmpltq_f16): Likewise. (__arm_vcmpleq_n_f16): Likewise. (__arm_vcmpleq_f16): Likewise. (__arm_vcmpgtq_n_f16): Likewise. (__arm_vcmpgtq_f16): Likewise. (__arm_vcmpgeq_n_f16): Likewise. (__arm_vcmpgeq_f16): Likewise. (__arm_vcmpeqq_n_f16): Likewise. (__arm_vcmpeqq_f16): Likewise. (__arm_vsubq_f16): Likewise. (__arm_vqmovntq_s16): Likewise. (__arm_vqmovnbq_s16): Likewise. (__arm_vqdmulltq_s16): Likewise. (__arm_vqdmulltq_n_s16): Likewise. (__arm_vqdmullbq_s16): Likewise. (__arm_vqdmullbq_n_s16): Likewise. (__arm_vorrq_f16): Likewise. (__arm_vornq_f16): Likewise. (__arm_vmulq_n_f16): Likewise. (__arm_vmulq_f16): Likewise. (__arm_vmovntq_s16): Likewise. (__arm_vmovnbq_s16): Likewise. (__arm_vmlsldavxq_s16): Likewise. (__arm_vmlsldavq_s16): Likewise. (__arm_vmlaldavxq_s16): Likewise. (__arm_vmlaldavq_s16): Likewise. (__arm_vminnmvq_f16): Likewise. (__arm_vminnmq_f16): Likewise. (__arm_vminnmavq_f16): Likewise. (__arm_vminnmaq_f16): Likewise. (__arm_vmaxnmvq_f16): Likewise. (__arm_vmaxnmq_f16): Likewise. (__arm_vmaxnmavq_f16): Likewise. (__arm_vmaxnmaq_f16): Likewise. (__arm_veorq_f16): Likewise. (__arm_vcmulq_rot90_f16): Likewise. (__arm_vcmulq_rot270_f16): Likewise. (__arm_vcmulq_rot180_f16): Likewise. (__arm_vcmulq_f16): Likewise. (__arm_vcaddq_rot90_f16): Likewise. (__arm_vcaddq_rot270_f16): Likewise. (__arm_vbicq_f16): Likewise. (__arm_vandq_f16): Likewise. (__arm_vaddq_n_f16): Likewise. (__arm_vabdq_f16): Likewise. (__arm_vshlltq_n_s8): Likewise. (__arm_vshllbq_n_s8): Likewise. (__arm_vorrq_n_s16): Likewise. (__arm_vbicq_n_s16): Likewise. (__arm_vqmovntq_u32): Likewise. (__arm_vqmovnbq_u32): Likewise. (__arm_vmulltq_poly_p16): Likewise. (__arm_vmullbq_poly_p16): Likewise. (__arm_vmovntq_u32): Likewise. (__arm_vmovnbq_u32): Likewise. (__arm_vmlaldavxq_u32): Likewise. (__arm_vmlaldavq_u32): Likewise. (__arm_vqmovuntq_s32): Likewise. (__arm_vqmovunbq_s32): Likewise. (__arm_vshlltq_n_u16): Likewise. (__arm_vshllbq_n_u16): Likewise. (__arm_vorrq_n_u32): Likewise. (__arm_vbicq_n_u32): Likewise. (__arm_vcmpneq_n_f32): Likewise. (__arm_vcmpneq_f32): Likewise. (__arm_vcmpltq_n_f32): Likewise. (__arm_vcmpltq_f32): Likewise. (__arm_vcmpleq_n_f32): Likewise. (__arm_vcmpleq_f32): Likewise. (__arm_vcmpgtq_n_f32): Likewise. (__arm_vcmpgtq_f32): Likewise. (__arm_vcmpgeq_n_f32): Likewise. (__arm_vcmpgeq_f32): Likewise. (__arm_vcmpeqq_n_f32): Likewise. (__arm_vcmpeqq_f32): Likewise. (__arm_vsubq_f32): Likewise. (__arm_vqmovntq_s32): Likewise. (__arm_vqmovnbq_s32): Likewise. (__arm_vqdmulltq_s32): Likewise. (__arm_vqdmulltq_n_s32): Likewise. (__arm_vqdmullbq_s32): Likewise. (__arm_vqdmullbq_n_s32): Likewise. (__arm_vorrq_f32): Likewise. (__arm_vornq_f32): Likewise. (__arm_vmulq_n_f32): Likewise. (__arm_vmulq_f32): Likewise. (__arm_vmovntq_s32): Likewise. (__arm_vmovnbq_s32): Likewise. (__arm_vmlsldavxq_s32): Likewise. (__arm_vmlsldavq_s32): Likewise. (__arm_vmlaldavxq_s32): Likewise. (__arm_vmlaldavq_s32): Likewise. (__arm_vminnmvq_f32): Likewise. (__arm_vminnmq_f32): Likewise. (__arm_vminnmavq_f32): Likewise. (__arm_vminnmaq_f32): Likewise. (__arm_vmaxnmvq_f32): Likewise. (__arm_vmaxnmq_f32): Likewise. (__arm_vmaxnmavq_f32): Likewise. (__arm_vmaxnmaq_f32): Likewise. (__arm_veorq_f32): Likewise. (__arm_vcmulq_rot90_f32): Likewise. (__arm_vcmulq_rot270_f32): Likewise. (__arm_vcmulq_rot180_f32): Likewise. (__arm_vcmulq_f32): Likewise. (__arm_vcaddq_rot90_f32): Likewise. (__arm_vcaddq_rot270_f32): Likewise. (__arm_vbicq_f32): Likewise. (__arm_vandq_f32): Likewise. (__arm_vaddq_n_f32): Likewise. (__arm_vabdq_f32): Likewise. (__arm_vshlltq_n_s16): Likewise. (__arm_vshllbq_n_s16): Likewise. (__arm_vorrq_n_s32): Likewise. (__arm_vbicq_n_s32): Likewise. (__arm_vrmlaldavhq_u32): Likewise. (__arm_vctp8q_m): Likewise. (__arm_vctp64q_m): Likewise. (__arm_vctp32q_m): Likewise. (__arm_vctp16q_m): Likewise. (__arm_vaddlvaq_u32): Likewise. (__arm_vrmlsldavhxq_s32): Likewise. (__arm_vrmlsldavhq_s32): Likewise. (__arm_vrmlaldavhxq_s32): Likewise. (__arm_vrmlaldavhq_s32): Likewise. (__arm_vcvttq_f16_f32): Likewise. (__arm_vcvtbq_f16_f32): Likewise. (__arm_vaddlvaq_s32): Likewise. (vst4q): Define polymorphic variant. (vrndxq): Likewise. (vrndq): Likewise. (vrndpq): Likewise. (vrndnq): Likewise. (vrndmq): Likewise. (vrndaq): Likewise. (vrev64q): Likewise. (vnegq): Likewise. (vdupq_n): Likewise. (vabsq): Likewise. (vrev32q): Likewise. (vcvtbq_f32): Likewise. (vcvttq_f32): Likewise. (vcvtq): Likewise. (vsubq_n): Likewise. (vbrsrq_n): Likewise. (vcvtq_n): Likewise. (vsubq): Likewise. (vorrq): Likewise. (vabdq): Likewise. (vaddq_n): Likewise. (vandq): Likewise. (vbicq): Likewise. (vornq): Likewise. (vmulq_n): Likewise. (vmulq): Likewise. (vcaddq_rot270): Likewise. (vcmpeqq_n): Likewise. (vcmpeqq): Likewise. (vcaddq_rot90): Likewise. (vcmpgeq_n): Likewise. (vcmpgeq): Likewise. (vcmpgtq_n): Likewise. (vcmpgtq): Likewise. (vcmpgtq): Likewise. (vcmpleq_n): Likewise. (vcmpleq_n): Likewise. (vcmpleq): Likewise. (vcmpleq): Likewise. (vcmpltq_n): Likewise. (vcmpltq_n): Likewise. (vcmpltq): Likewise. (vcmpltq): Likewise. (vcmpneq_n): Likewise. (vcmpneq_n): Likewise. (vcmpneq): Likewise. (vcmpneq): Likewise. (vcmulq): Likewise. (vcmulq): Likewise. (vcmulq_rot180): Likewise. (vcmulq_rot180): Likewise. (vcmulq_rot270): Likewise. (vcmulq_rot270): Likewise. (vcmulq_rot90): Likewise. (vcmulq_rot90): Likewise. (veorq): Likewise. (veorq): Likewise. (vmaxnmaq): Likewise. (vmaxnmaq): Likewise. (vmaxnmavq): Likewise. (vmaxnmavq): Likewise. (vmaxnmq): Likewise. (vmaxnmq): Likewise. (vmaxnmvq): Likewise. (vmaxnmvq): Likewise. (vminnmaq): Likewise. (vminnmaq): Likewise. (vminnmavq): Likewise. (vminnmavq): Likewise. (vminnmq): Likewise. (vminnmq): Likewise. (vminnmvq): Likewise. (vminnmvq): Likewise. (vbicq_n): Likewise. (vqmovntq): Likewise. (vqmovntq): Likewise. (vqmovnbq): Likewise. (vqmovnbq): Likewise. (vmulltq_poly): Likewise. (vmulltq_poly): Likewise. (vmullbq_poly): Likewise. (vmullbq_poly): Likewise. (vmovntq): Likewise. (vmovntq): Likewise. (vmovnbq): Likewise. (vmovnbq): Likewise. (vmlaldavxq): Likewise. (vmlaldavxq): Likewise. (vqmovuntq): Likewise. (vqmovuntq): Likewise. (vshlltq_n): Likewise. (vshlltq_n): Likewise. (vshllbq_n): Likewise. (vshllbq_n): Likewise. (vorrq_n): Likewise. (vorrq_n): Likewise. (vmlaldavq): Likewise. (vmlaldavq): Likewise. (vqmovunbq): Likewise. (vqmovunbq): Likewise. (vqdmulltq_n): Likewise. (vqdmulltq_n): Likewise. (vqdmulltq): Likewise. (vqdmulltq): Likewise. (vqdmullbq_n): Likewise. (vqdmullbq_n): Likewise. (vqdmullbq): Likewise. (vqdmullbq): Likewise. (vaddlvaq): Likewise. (vaddlvaq): Likewise. (vrmlaldavhq): Likewise. (vrmlaldavhq): Likewise. (vrmlaldavhxq): Likewise. (vrmlaldavhxq): Likewise. (vrmlsldavhq): Likewise. (vrmlsldavhq): Likewise. (vrmlsldavhxq): Likewise. (vrmlsldavhxq): Likewise. (vmlsldavxq): Likewise. (vmlsldavxq): Likewise. (vmlsldavq): Likewise. (vmlsldavq): Likewise. * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it. (BINOP_NONE_NONE_NONE): Likewise. (BINOP_UNONE_NONE_NONE): Likewise. (BINOP_UNONE_UNONE_IMM): Likewise. (BINOP_UNONE_UNONE_NONE): Likewise. (BINOP_UNONE_UNONE_UNONE): Likewise. * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern. (mve_vaddlvaq_<supf>v4si): Likewise. (mve_vaddq_n_f<mode>): Likewise. (mve_vandq_f<mode>): Likewise. (mve_vbicq_f<mode>): Likewise. (mve_vbicq_n_<supf><mode>): Likewise. (mve_vcaddq_rot270_f<mode>): Likewise. (mve_vcaddq_rot90_f<mode>): Likewise. (mve_vcmpeqq_f<mode>): Likewise. (mve_vcmpeqq_n_f<mode>): Likewise. (mve_vcmpgeq_f<mode>): Likewise. (mve_vcmpgeq_n_f<mode>): Likewise. (mve_vcmpgtq_f<mode>): Likewise. (mve_vcmpgtq_n_f<mode>): Likewise. (mve_vcmpleq_f<mode>): Likewise. (mve_vcmpleq_n_f<mode>): Likewise. (mve_vcmpltq_f<mode>): Likewise. (mve_vcmpltq_n_f<mode>): Likewise. (mve_vcmpneq_f<mode>): Likewise. (mve_vcmpneq_n_f<mode>): Likewise. (mve_vcmulq_f<mode>): Likewise. (mve_vcmulq_rot180_f<mode>): Likewise. (mve_vcmulq_rot270_f<mode>): Likewise. (mve_vcmulq_rot90_f<mode>): Likewise. (mve_vctp<mode1>q_mhi): Likewise. (mve_vcvtbq_f16_f32v8hf): Likewise. (mve_vcvttq_f16_f32v8hf): Likewise. (mve_veorq_f<mode>): Likewise. (mve_vmaxnmaq_f<mode>): Likewise. (mve_vmaxnmavq_f<mode>): Likewise. (mve_vmaxnmq_f<mode>): Likewise. (mve_vmaxnmvq_f<mode>): Likewise. (mve_vminnmaq_f<mode>): Likewise. (mve_vminnmavq_f<mode>): Likewise. (mve_vminnmq_f<mode>): Likewise. (mve_vminnmvq_f<mode>): Likewise. (mve_vmlaldavq_<supf><mode>): Likewise. (mve_vmlaldavxq_<supf><mode>): Likewise. (mve_vmlsldavq_s<mode>): Likewise. (mve_vmlsldavxq_s<mode>): Likewise. (mve_vmovnbq_<supf><mode>): Likewise. (mve_vmovntq_<supf><mode>): Likewise. (mve_vmulq_f<mode>): Likewise. (mve_vmulq_n_f<mode>): Likewise. (mve_vornq_f<mode>): Likewise. (mve_vorrq_f<mode>): Likewise. (mve_vorrq_n_<supf><mode>): Likewise. (mve_vqdmullbq_n_s<mode>): Likewise. (mve_vqdmullbq_s<mode>): Likewise. (mve_vqdmulltq_n_s<mode>): Likewise. (mve_vqdmulltq_s<mode>): Likewise. (mve_vqmovnbq_<supf><mode>): Likewise. (mve_vqmovntq_<supf><mode>): Likewise. (mve_vqmovunbq_s<mode>): Likewise. (mve_vqmovuntq_s<mode>): Likewise. (mve_vrmlaldavhxq_sv4si): Likewise. (mve_vrmlsldavhq_sv4si): Likewise. (mve_vrmlsldavhxq_sv4si): Likewise. (mve_vshllbq_n_<supf><mode>): Likewise. (mve_vshlltq_n_<supf><mode>): Likewise. (mve_vsubq_f<mode>): Likewise. (mve_vmulltq_poly_p<mode>): Likewise. (mve_vmullbq_poly_p<mode>): Likewise. (mve_vrmlaldavhq_<supf>v4si): Likewise. gcc/testsuite/ChangeLog: 2019-10-23 Andre Vieira <andre.simoesdiasvie...@arm.com> Mihail Ionescu <mihail.ione...@arm.com> Srinath Parvathaneni <srinath.parvathan...@arm.com> * gcc.target/arm/mve/intrinsics/vabdq_f16.c: New test. * gcc.target/arm/mve/intrinsics/vabdq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmulq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmulq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vctp16q_m.c: Likewise. * gcc.target/arm/mve/intrinsics/vctp32q_m.c: Likewise. * gcc.target/arm/mve/intrinsics/vctp64q_m.c: Likewise. * gcc.target/arm/mve/intrinsics/vctp8q_m.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmaq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmaq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmaq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavxq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavxq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovnbq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovnbq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovnbq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovnbq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovntq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovntq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovntq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovntq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovntq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovntq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovntq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovntq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_f32.c: Likewise.
diff12.patch.gz
Description: diff12.patch.gz
