RE: [RFC] expr: don't clear SUBREG_PROMOTED_VAR_P flag for a promoted subreg [target/111466]

2023-09-29 Thread Roger Sayle
: Vineet Gupta > Sent: 28 September 2023 22:44 > To: gcc-patches@gcc.gnu.org; Robin Dapp > Cc: kito.ch...@gmail.com; Jeff Law ; Palmer Dabbelt > ; gnu-toolch...@rivosinc.com; Roger Sayle > ; Jakub Jelinek ; Jivan > Hakobyan ; Vineet Gupta > Subject: [RFC] expr: don't clear SUBREG

[ARC PATCH] Use rlc r0, 0 to implement scc_ltu (i.e. carry_flag ? 1 : 0)

2023-09-29 Thread Roger Sayle
ed on a cross-compiler to arc-linux (hosted on x86_64-pc-linux-gnu), and a partial tool chain, where the new case passes and there are no new regressions. Ok for mainline? 2023-09-29 Roger Sayle gcc/ChangeLog * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C. (s

RE: [ARC PATCH] Use rlc r0, 0 to implement scc_ltu (i.e. carry_flag ? 1 : 0)

2023-09-29 Thread Roger Sayle
someone could double check there are no issues on real hardware that would be great. I'm not sure if ARC is one of the targets covered by Jeff Law's compile farm? > -Original Message- > From: Roger Sayle > Sent: Friday, September 29, 2023 6:54 PM > To: gcc-pat

RE: [ARC PATCH] Split SImode shifts pre-reload on !TARGET_BARREL_SHIFTER.

2023-10-03 Thread Roger Sayle
ks again. Roger -- > -Original Message- > From: Claudiu Zissulescu > Sent: 03 October 2023 15:26 > To: Roger Sayle ; gcc-patches@gcc.gnu.org > Subject: RE: [ARC PATCH] Split SImode shifts pre-reload on > !TARGET_BARREL_SHIFTER. > > Hi Roger, > > It was nice to meet you

PING: PR rtl-optimization/110701

2023-10-03 Thread Roger Sayle
There are a small handful of middle-end maintainers/reviewers that understand and appreciate the difference between the RTL statements: (set (subreg:HI (reg:SI x)) (reg:HI y)) and (set (strict_lowpart:HI (reg:SI x)) (reg:HI y)) If one (or more) of them could please take a look at https:

[PATCH] Support g++ 4.8 as a host compiler.

2023-10-04 Thread Roger Sayle
host compiler. Ok for mainline? 2023-10-04 Roger Sayle gcc/ChangeLog * rtl.h (rtx_def::u): Add explicit constructor to workaround issue using g++ 4.8 as a host compiler. diff --git a/gcc/rtl.h b/gcc/rtl.h index 6850281..a7667f5 100644 --- a/gcc/rtl.h +++ b/gcc/rtl.h @@ -451,6 +

[X86 PATCH] Split lea into shorter left shift by 2 or 3 bits with -Oz.

2023-10-05 Thread Roger Sayle
27; with no new failures. Additional testing was performed by repeating these steps after removing the "optimize_size > 1" condition, so that suitable lea instructions were always split [-Oz is not heavily tested, so this invoked the new code during the bootstrap and regression testing]

[X86 PATCH] Implement doubleword shift left by 1 bit using add+adc.

2023-10-05 Thread Roger Sayle
ithout --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-10-05 Roger Sayle gcc/ChangeLog * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by one into add3_cc_overflow_1 followed by add3_carry. * config/i386/i386.md (@add3_cc_over

RE: [X86 PATCH] Implement doubleword shift left by 1 bit using add+adc.

2023-10-05 Thread Roger Sayle
Doh! ENOPATCH. > -Original Message- > From: Roger Sayle > Sent: 05 October 2023 12:44 > To: 'gcc-patches@gcc.gnu.org' > Cc: 'Uros Bizjak' > Subject: [X86 PATCH] Implement doubleword shift left by 1 bit using add+adc. > > > This patc

RE: [X86 PATCH] Split lea into shorter left shift by 2 or 3 bits with -Oz.

2023-10-05 Thread Roger Sayle
Hi Uros, Very many thanks for the speedy reviews. Uros Bizjak wrote: > On Thu, Oct 5, 2023 at 11:06 AM Roger Sayle > wrote: > > > > > > This patch avoids long lea instructions for performing x<<2 and x<<3 > > by splitting them into shorter sal and mov

[X86 PATCH] Implement doubleword right shifts by 1 bit using s[ha]r+rcr.

2023-10-06 Thread Roger Sayle
board=unix{-m32} with no new failures. And to provide additional testing, I've also bootstrapped and regression tested a version of this patch where the RCR is always generated (independent of the -march target) again with no regressions. Ok for mainline? 2023-10-06 Roger Sayle gcc/Cha

RE: [X86 PATCH] Implement doubleword right shifts by 1 bit using s[ha]r+rcr.

2023-10-06 Thread Roger Sayle
Grr! I've done it again. ENOPATCH. > -Original Message- > From: Roger Sayle > Sent: 06 October 2023 14:58 > To: 'gcc-patches@gcc.gnu.org' > Cc: 'Uros Bizjak' > Subject: [X86 PATCH] Implement doubleword right shifts by 1 bit using s[ha]r+r

[ARC PATCH] Improved SImode shifts and rotates on !TARGET_BARREL_SHIFTER.

2023-10-08 Thread Roger Sayle
2: # end single insn loop j_s [blink] This patch has been tested with a cross-compiler to arc-linux hosted on x86_64-pc-linux-gnu and (partially) tested with the compile-only portions of the testsuite with no regressions. Ok for mainline, if your own testing shows no issues?

[PATCH] Optimize (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) as (and:SI x 1).

2023-10-10 Thread Roger Sayle
patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check with no new failures. Ok for mainline? 2023-10-10 Roger Sayle gcc/ChangeLog PR middle-end/101955 PR tree-optimization/106245 * simplify-rtx.c (simplify_relational_operation_1):

[PATCH] PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation.

2023-10-14 Thread Roger Sayle
ke -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-10-14 Roger Sayle gcc/ChangeLog PR rtl-optimization/91865 * combine.cc (make_compound_operation): Avoid creating a ZERO_EXTEND of a ZERO_EXTEND. gcc/testsuit

[PATCH] Improved RTL expansion of 1LL << x.

2023-10-14 Thread Roger Sayle
ck, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-10-15 Roger Sayle gcc/ChangeLog * optabs.cc (expand_subword_shift): Call simplify_expand_binop instead of expand_binop. Optimize cases (i.e. avoid generating RTL) when CARRIES

[ARC PATCH] Split asl dst, 1, src into bset dst, 0, src to implement 1<

2023-10-15 Thread Roger Sayle
This patch adds a pre-reload splitter to arc.md, to use the bset (set specific bit instruction) to implement 1< gcc/ChangeLog * config/arc/arc.md (*ashlsi3_1): New pre-reload splitter to use bset dst,0,src to implement 1<

RE: [ARC PATCH] Split asl dst, 1, src into bset dst, 0, src to implement 1<

2023-10-15 Thread Roger Sayle
I've done it again. ENOPATCH. From: Roger Sayle Sent: 15 October 2023 09:13 To: 'gcc-patches@gcc.gnu.org' Cc: 'Claudiu Zissulescu' Subject: [ARC PATCH] Split asl dst,1,src into bset dst,0,src to implement 1<mailto:ro...@nextmovesoftware.com> > gcc/Chan

RE: [PATCH] PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation.

2023-10-15 Thread Roger Sayle
Hi Jeff, Thanks for the speedy review(s). > From: Jeff Law > Sent: 15 October 2023 00:03 > To: Roger Sayle ; gcc-patches@gcc.gnu.org > Subject: Re: [PATCH] PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in > make_compound_operation. > > On 10/14/23 16:14, Roger Sayle wrote:

RE: [PATCH] Support g++ 4.8 as a host compiler.

2023-10-15 Thread Roger Sayle
n and release notes need updating, if my fix isn't considered acceptable? Why this patch is an trigger issue (that requires significant discussion and deliberation) is somewhat of a mystery. Thanks in advance. Roger > -Original Message- > From: Jeff Law > Sent: 07 October

[x86 PATCH] PR 106245: Split (x<<31)>>31 as -(x&1) in i386.md

2023-10-17 Thread Roger Sayle
oth Intel and AMD; Intel sees only a 2% improvement (perhaps just a size effect), but AMD sees a 7% win. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-10-17 R

RE: [x86 PATCH] PR 106245: Split (x<<31)>>31 as -(x&1) in i386.md

2023-10-17 Thread Roger Sayle
Hi Uros, Thanks for the speedy review. > From: Uros Bizjak > Sent: 17 October 2023 17:38 > > On Tue, Oct 17, 2023 at 3:08 PM Roger Sayle > wrote: > > > > > > This patch is the backend piece of a solution to PRs 101955 and > > 106245, that adds a define

[x86 PATCH] PR target/110511: Fix reg allocation for widening multiplications.

2023-10-17 Thread Roger Sayle
mainline? 2023-10-17 Roger Sayle gcc/ChangeLog PR target/110511 * config/i386/i386.md (mul3): Make operands 1 and 2 take "regiser_operand" and "nonimmediate_operand" respectively. (mulqihi3): Likewise. (*bmi2_umul3_1): Operand 2 needs to

RE: [x86 PATCH] PR target/110551: Fix reg allocation for widening multiplications.

2023-10-18 Thread Roger Sayle
- > From: Roger Sayle > Sent: 17 October 2023 20:06 > To: 'gcc-patches@gcc.gnu.org' > Cc: 'Uros Bizjak' > Subject: [x86 PATCH] PR target/110511: Fix reg allocation for widening > multiplications. > > > This patch contains clean-ups of the widening mult

RE: [Patch] nvptx: Use fatal_error when -march= is missing not an assert [PR111093]

2023-10-18 Thread Roger Sayle
. Best regards, Roger -- > -Original Message- > From: Thomas Schwinge > Sent: 18 October 2023 11:16 > To: Tobias Burnus > Cc: gcc-patches@gcc.gnu.org; Tom de Vries ; Roger Sayle > > Subject: Re: [Patch] nvptx: Use fatal_error when -march= is missing not an > assert &g

[PATCH] Replace a HWI_COMPUTABLE_MODE_P with wide-int in simplify-rtx.cc.

2023-05-26 Thread Roger Sayle
heck, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-05-23 Roger Sayle gcc/ChangeLog * simplify-rtx.cc (simplify_binary_operation_1) : Use wide-int instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of (and (exten

[PATCH] PR target/107172: Avoid "unusual" MODE_CC comparisons in simplify-rtx.cc

2023-05-26 Thread Roger Sayle
s that it doesn't understand/recognize. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-05-26 Roger Sayle gcc/ChangeLog * simplify-rtx.cc (simp

[PATCH] Refactor wi::bswap as a function (instead of a method).

2023-05-28 Thread Roger Sayle
ng wi::bswap. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-05-28 Roger Sayle gcc/ChangeLog * fold-const-call.cc (fold_const_call_ss) : Update ca

[x86_64 PATCH] PR target/109973: CCZmode and CCCmode variants of [v]ptest.

2023-05-29 Thread Roger Sayle
oth with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-05-29 Roger Sayle gcc/ChangeLog PR targt/109973 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new CODE_for_sse4_1_ptestzv2di. (__builtin_ia32_ptestc128):

[PATCH] New wi::bitreverse function.

2023-06-02 Thread Roger Sayle
pport for a backend-independent solution to PR middle-end/50481. 2023-06-02 Roger Sayle gcc/ChangeLog * wide-int.cc (wi::bitreverse_large): New function implementing bit reversal of an integer. * wide-int.h (wi::bitreverse): New (template) function prot

RE: [PATCH] New wi::bitreverse function.

2023-06-02 Thread Roger Sayle
Doh! Wrong patch... Roger -- -Original Message- From: Roger Sayle Sent: Friday, June 2, 2023 3:17 PM To: 'gcc-patches@gcc.gnu.org' Cc: 'Richard Sandiford' Subject: [PATCH] New wi::bitreverse function. This patch provides a wide-int implementation of bitreve

[x86_64 PATCH] PR target/110083: Fix-up REG_EQUAL notes on COMPARE in STV.

2023-06-03 Thread Roger Sayle
])) This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-06-03 Roger Sayle gcc/ChangeLog PR target/110083 * config/i386/i386-features.cc (sc

[x86 PATCH] Add support for stc, clc and cmc instructions in i386.md

2023-06-03 Thread Roger Sayle
setc%al movl%edx, o2(%rip) movzbl %al, %eax ret This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2022-06-03 Roger Sayle

RE: [x86 PATCH] Add support for stc, clc and cmc instructions in i386.md

2023-06-06 Thread Roger Sayle
]. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2022-06-06 Roger Sayle Uros Bizjak gcc/ChangeLog * config/i386/i386-expand.cc (ix86_expand_builtin

RE: [x86 PATCH] Add support for stc, clc and cmc instructions in i386.md

2023-06-06 Thread Roger Sayle
se, and this is holding up real improvements on current processors. cmc, for example, should allow for better cmov if-conversion. Thanks in advance. Roger -- -Original Message- From: Uros Bizjak Sent: 06 June 2023 18:34 To: Roger Sayle Cc: gcc-patches@gcc.gnu.org Subject: Re: [x86 PATCH] Add

[x86_64 PATCH] PR target/110104: Missing peephole2 for addcarry.

2023-06-06 Thread Roger Sayle
sting peephole2 described above. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-06-07 Roger Sayle gcc/ChangeLog PR target/110104 * config/i386/i3

[x86 PATCH] PR target/31985: Improve memory operand use with doubleword add.

2023-06-06 Thread Roger Sayle
with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-06-07 Roger Sayle gcc/ChangeLog PR target/31985 * config/i386/i386.md (*add3_doubleword_concat): New define_insn_and_split combine

RE: [x86_64 PATCH] PR target/110104: Missing peephole2 for addcarry.

2023-06-06 Thread Roger Sayle
Hi Jakub, Jakub Jelinek wrote: > Seems to be pretty much the same as one of the 12 define_peephole2 patterns I've posted in https://gcc.gnu.org/pipermail/gcc-patches/2023-June/620821.html Doh! Impressive work. I need to study how you handle constant carry flags. Fingers-crossed that patches th

[Committed] Bug fix to new wi::bitreverse_large function.

2023-06-07 Thread Roger Sayle
gcc.target/nvptx/brevll-2.c. Committed as obvious. 2023-06-07 Roger Sayle gcc/ChangeLog * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to avoid sign extension/undefined behaviour when setting each bit. Thanks, Roger -- diff --git a/gcc/wide-int.cc b/gcc/wide-int.cc

[nvptx PATCH] Update nvptx's bitrev2 pattern to use BITREVERSE rtx.

2023-06-07 Thread Roger Sayle
tested on nvptx-none with make and make -k check with no new failures. Ok for mainline? 2023-06-07 Roger Sayle gcc/ChangeLog * config/nvptx/nvptx.md (UNSPEC_BITREV): Delete. (bitrev2): Represent using bitreverse. Thanks in advance, Roger -- diff --git a/gcc/config/nvptx

[GCC 13 PATCH] PR target/109973: CCZmode and CCCmode variants of [v]ptest.

2023-06-10 Thread Roger Sayle
just close PR 109973 in Bugzilla? 2023-06-10 Roger Sayle Uros Bizjak gcc/ChangeLog PR target/109973 PR target/110083 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new CODE_for_sse4_1_ptestzv2di. (__builtin_ia32_ptestc128

[PATCH] Avoid duplicate vector initializations during RTL expansion.

2023-06-11 Thread Roger Sayle
een tested on x86_64-pc-linux-gnu with a make bootstrap and make -k check, both with and without --target_board=unix{-m32}, with no new failures. Ok for mainline? 2023-06-11 Roger Sayle gcc/ChangeLog * expr.cc (store_constructor) : Don't bother clearing vectors with on

[PATCH] New finish_compare_by_pieces target hook (for x86).

2023-06-12 Thread Roger Sayle
also help other backends with condition flags where the equality result can be materialized. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-06-12 Roge

[x86 PATCH] Convert ptestz of pandn into ptestc.

2023-06-13 Thread Roger Sayle
th make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-06-13 Roger Sayle gcc/ChangeLog * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize expansion of ptestc with equal operands as returning con

RE: [x86 PATCH] PR target/31985: Improve memory operand use with doubleword add.

2023-06-15 Thread Roger Sayle
and make -k check, with and without -m32, to confirm there are no issues, and this still fixes the pr31985.c test case. As you've suggested, I'm also working on improving STV in this area. Ok for mainline? 2023-06-15 Roger Sayle Uros Bizjak gcc/ChangeLog

RE: [x86 PATCH] Tweak ix86_expand_int_compare to use PTEST for vector equality.

2023-07-12 Thread Roger Sayle
> From: Hongtao Liu > Sent: 12 July 2023 01:45 > > On Wed, Jul 12, 2023 at 4:57 AM Roger Sayle > > > From: Hongtao Liu > > > Sent: 28 June 2023 04:23 > > > > From: Roger Sayle > > > > Sent: 27 June 2023 20:28 > > > > >

[x86_64 PATCH] Improved insv of DImode/DFmode {high, low}parts into TImode.

2023-07-13 Thread Roger Sayle
hopefully change dramatically with the next pieces. Ok for mainline? 2023-07-13 Roger Sayle gcc/ChangeLog * config/i386/i386-expand.cc (ix86_expand_move): Generalize special case inserting of 64-bit values into a TImode register, to handle both DImode and DFmode using either

[x86 PATCH] PR target/110588: Add *bt_setncqi_2 to generate btl

2023-07-13 Thread Roger Sayle
w failures. Ok for mainline? 2023-07-13 Roger Sayle gcc/ChangeLog PR target/110588 * config/i386/i386.md (*bt_setcqi): Prefer string form preparation statement over braces for a single statement. (*bt_setncqi): Likewise. (*bt_setncqi_2): New define_insn

RE: [x86 PATCH] PR target/110588: Add *bt_setncqi_2 to generate btl

2023-07-14 Thread Roger Sayle
> From: Uros Bizjak > Sent: 13 July 2023 19:21 > > On Thu, Jul 13, 2023 at 7:10 PM Roger Sayle > wrote: > > > > This patch resolves PR target/110588 to catch another case in combine > > where the i386 backend should be generating a btl instruction. This >

[PATCH] Fix bootstrap failure (with g++ 4.8.5) in tree-if-conv.cc.

2023-07-14 Thread Roger Sayle
This patch fixes the bootstrap failure I'm seeing using gcc 4.8.5 as the host compiler. Ok for mainline? [I might be missing something] 2023-07-14 Roger Sayle gcc/ChangeLog * tree-if-conv.cc (predicate_scalar_phi): Make the arguments to the std:

RE: [x86 PATCH] Fix FAIL of gcc.target/i386/pr91681-1.c

2023-07-17 Thread Roger Sayle
sted on x86_64-pc-linux-gnu with make > > > bootstrap and make -k check, both with and without > > > --target_board=unix{-m32} with no new failures. Ok for mainline? > > > > > > > > > 2023-07-11 Roger Sayle > > > > > > gcc/Chan

[x86_64 PATCH] More TImode parameter passing improvements.

2023-07-19 Thread Roger Sayle
) vmovsd -16(%rsp), %xmm1 vmovsd -24(%rsp), %xmm0 ret This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-07-19 Roger Sayle gcc/ChangeLog

[PATCH] PR c/110699: Defend against error_mark_node in gimplify.cc.

2023-07-19 Thread Roger Sayle
th no new failures. Ok for mainline? 2023-07-19 Roger Sayle gcc/ChangeLog PR c/110699 * gimplify.cc (gimplify_compound_lval): For ARRAY_REF and ARRAY_RANGE_REF return GS_ERROR if the array's type is error_mark_node. gcc/testsuite/ChangeLog P

RE: [x86_64 PATCH] More TImode parameter passing improvements.

2023-07-20 Thread Roger Sayle
Hi Uros, > From: Uros Bizjak > Sent: 20 July 2023 07:50 > > On Wed, Jul 19, 2023 at 10:07 PM Roger Sayle > wrote: > > > > This patch is the next piece of a solution to the x86_64 ABI issues in > > PR 88873. This splits the *concat3_3 define_insn_a

[x86 PATCH] Don't use insvti_{high, low}part with -O0 (for compile-time).

2023-07-22 Thread Roger Sayle
he regression that I've caused. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-07-22 Roger Sayle gcc/ChangeLog * config/i386/i386-expan

[x86 PATCH] Use QImode for offsets in zero_extract/sign_extract in i386.md

2023-07-22 Thread Roger Sayle
imply ensure that we continue to generate the same code (match revised patterns) as before. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-07-22 Roger Sayle

[PATCH] Replace lra-spill.cc's return_regno_p with return_reg_p.

2023-07-22 Thread Roger Sayle
patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, with no new failures. Ok for mainline? 2023-07-22 Roger Sayle gcc/ChangeLog PR middle-end/28071 PR rtl-optimization/110587 * lra-spills.cc (return_regno_p): Change argument and rename to

[Committed] PR target/110787: Revert QImode offsets in {zero, sign}_extract.

2023-07-24 Thread Roger Sayle
lying cause. Committed as obvious. 2023-07-23 Roger Sayle gcc/ChangeLog PR target/110787 PR target/110790 Revert patch. * config/i386/i386.md (extv): Use QImode for offsets. (extzv): Likewise. (insv): Likewise. (*testqi_

[PATCH] PR rtl-optimization/110587: Reduce useless moves in compile-time hog.

2023-07-25 Thread Roger Sayle
quickly if there's a problem, and investigate why this additional copy might (still) be needed on other non-x86 targets. 2023-07-25 Roger Sayle gcc/ChangeLog PR middle-end/28071 PR rtl-optimization/110587 * expr.cc (emit_group_load_1): Avoid copying a pseudo register int

[PATCH] PR rtl-optimization/110701: Fix SUBREG SET_DEST handling in combine.

2023-07-26 Thread Roger Sayle
submitted as a follow-up, but this is the piece that addresses the wrong code regression. 2023-07-26 Roger Sayle gcc/ChangeLog PR rtl-optimization/110701 * combine.cc (record_dead_and_set_regs_1): Split comment into pieces placed before the relevant clauses. When

RE: [PATCH] PR rtl-optimization/110587: Reduce useless moves in compile-time hog.

2023-07-27 Thread Roger Sayle
h the code looks dead, it's required to build libgcc during a bootstrap. But the remaining clean-up is good, reducing the number of source lines and making the logic easier to understand. Ok for mainline? 2023-07-27 Roger Sayle Richard Biener gcc/ChangeLog PR m

[Committed] Use QImode for offsets in zero_extract/sign_extract in i386.md (take #2)

2023-07-29 Thread Roger Sayle
tstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Committed to mainline as an obvious fix to the previously approved patch. Sorry again for the temporary inconvenience, and thanks to Rainer Orth for identifying/confirming the problematic patch.

[Committed] PR target/110843: Check TARGET_AVX512VL for V2DI rotates in STV.

2023-07-31 Thread Roger Sayle
without --target_board=unix{-m32} with no new failures. Committed to mainline as obvious. 2023-07-31 Roger Sayle gcc/ChangeLog PR target/110843 * config/i386/i386-features.cc (compute_convert_gain): Check TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode

[x86 PATCH] UNSPEC_PALIGNR optimizations and clean-ups.

2022-06-30 Thread Roger Sayle
ask the x86 experts for their opinions. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-,32}, with no new failures. Ok for mainline? 2022-06-30 Roger Sayle gcc/ChangeLog * config/i386/i386-builtin.

[x86 PATCH] PR target/106122: Don't update %esp via the stack with -Oz.

2022-06-30 Thread Roger Sayle
ux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2022-06-30 Roger Sayle gcc/ChangeLog PR target/106122 * config/i386/i386.md (peephole2): Avoid generating pop %esp when optimizing

[Committed] Add constraints to new andn_doubleword_bmi pattern in i386.md.

2022-07-01 Thread Roger Sayle
e building the tree with a non-default architecture that enables BMI. 2022-07-01 Roger Sayle Uroš Bizjak gcc/ChangeLog * config/i386/i386.md (*andn3_doubleword_bmi): Add constraints to post-reload define_insn_and_split. Roger -- diff --git a/gcc/config/i386/i38

RE: [x86 PATCH] PR rtl-optimization/96692: ((A|B)^C)^A using andn with -mbmi.

2022-07-04 Thread Roger Sayle
commutativity. This revised patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2022-07-04 Roger Sayle Uroš Bizjak gcc/ChangeLog PR rtl-optimization/96692

RE: [x86 PATCH] UNSPEC_PALIGNR optimizations and clean-ups.

2022-07-04 Thread Roger Sayle
-k check, both with and with --target_board=unix{-32}, with no new failures. Is this revised version Ok for mainline? 2022-07-04 Roger Sayle Hongtao Liu gcc/ChangeLog * config/i386/i386-builtin.def (__builtin_ia32_palignr128): Change CODE_FOR_ssse3_palignrti to

[x86 PATCH take #2] Doubleword version of and; cmp to not; test optimization.

2022-07-04 Thread Roger Sayle
cc.target/i386/pr65105-5.c now also fails (as that code diverges further from the expected vectorized output). This is progress as both FAILs in pr65105-5.c may now be fixed by changes localized to the STV pass. OK for mainline? 2022-07-04 Roger Sayle gcc/ChangeLog * confi

[x86 PATCH] Support *testdi_not_doubleword during STV pass.

2022-07-07 Thread Roger Sayle
patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, where with --target_board=unix{-m32} there are two fewer failures, and without, there are no new failures. Ok for mainline? 2022-07-07 Roger Sayle gcc/ChangeLog * config/i386/i386-features.cc (conver

[PATCH/RFC] combine_completed global variable.

2022-07-07 Thread Roger Sayle
type here. Many thanks in advance, Roger -- > -Original Message- > From: Kewen.Lin > Sent: 27 June 2022 10:04 > To: Roger Sayle > Cc: gcc-patches@gcc.gnu.org; Segher Boessenkool > ; David Edelsohn > Subject: Re: [rs6000 PATCH] Improve constant integer multiply usi

[PATCH] Be careful with MODE_CC in simplify_const_relational_operation.

2022-07-07 Thread Roger Sayle
tting this middle-end piece independently, to confirm that maintainers/reviewers are happy with the approach, and also to check there are no issues on other platforms, before building upon this infrastructure. Thoughts? Ok for mainline? 2022-07-07 Roger Sayle gcc/ChangeLog * simplif

[x86 PATCH] Fun with flags: Adding stc/clc instructions to i386.md.

2022-07-08 Thread Roger Sayle
to explain why that change is needed. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2022-07-08 Roger Sayle gcc/ChangeLog * config/i386/i386-expand.cc (ix86

[gcc12 backport] PR target/105930: Split *xordi3_doubleword after reload on x86.

2022-07-09 Thread Roger Sayle
branch? 2022-07-09 Roger Sayle Uroš Bizjak gcc/ChangeLog PR target/105930 * config/i386/i386.md (*di3_doubleword): Split after reload. Use rtx_equal_p to avoid creating memory-to-memory moves, and emit NOTE_INSN_DELETED if operand[2] is zero (i.e

[x86_64 PATCH] Improved Scalar-To-Vector (STV) support for TImode to V1TImode.

2022-07-09 Thread Roger Sayle
_gain doesn't yet have its final (tuned) form, but is already an improvement over the "return 1;" used previously. This patch has been tested on x86_64-pc-linux-gnu with make boostrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainl

[PATCH] Move reload_completed and other rtl.h globals to crtl structure.

2022-07-10 Thread Roger Sayle
oss-compilers, but if Jeff Law could spin this patch on his build farm, that would help identify targets that need attention. 2022-07-10 Roger Sayle gcc/ChangeLog * bb-reorder.cc (reorder_basic_blocks): bb_reorder_complete is now a bit in crtl->rtl_pass_progress. * c

RE: [x86_64 PATCH] Improved Scalar-To-Vector (STV) support for TImode to V1TImode.

2022-07-10 Thread Roger Sayle
on" changes if those modifications are pushed independently of these ones. Time to look into the (git) history of multiple STV passes... Thanks for the review. I'll wait for HJ's thoughts. Cheers, Roger -- > -Original Message- > From: Uros Bizjak > Sent: 10 July 202

RE: [x86_64 PATCH] Improved Scalar-To-Vector (STV) support for TImode to V1TImode.

2022-07-10 Thread Roger Sayle
> -Original Message- > From: H.J. Lu > Sent: 10 July 2022 20:15 > To: Roger Sayle > Cc: Uros Bizjak ; GCC Patches > Subject: Re: [x86_64 PATCH] Improved Scalar-To-Vector (STV) support for > TImode to V1TImode. > > On Sun, Jul 10, 2022 at 11:36 AM Roger Sayle >

RE: [PATCH] Move reload_completed and other rtl.h globals to crtl structure.

2022-07-11 Thread Roger Sayle
On 11 July 2022 08:20, Richard Biener wrote: > On Sun, 10 Jul 2022, Roger Sayle wrote: > > > This patch builds upon Richard Biener's suggestion of avoiding global > > variables to track state/identify which passes have already been run. > > In the early middle-end

RE: [x86_64 PATCH] Improved Scalar-To-Vector (STV) support for TImode to V1TImode.

2022-07-13 Thread Roger Sayle
On Mon, Jul 11, 2022, H.J. Lu wrote: > On Sun, Jul 10, 2022 at 2:38 PM Roger Sayle > wrote: > > Hi HJ, > > > > I believe this should now be handled by the post-reload (CSE) pass. > > Consider the simple test case: > > > > __int128 a, b, c; > > vo

[PATCH] PR target/106278: Keep REG_EQUAL notes consistent during TImode STV.

2022-07-14 Thread Roger Sayle
ithout --target_board=unix{-m32}, with no new failures. Ok for mainline? 2022-07-14 Roger Sayle gcc/ChangeLog PR target/106278 * config/i386/i386-features.cc (general_scalar_chain::convert_insn): Fix indentation whitespace. (timode_scalar_chain

[x86 PATCH] PR target/106273: Add earlyclobber to *andn3_doubleword_bmi

2022-07-15 Thread Roger Sayle
ruction which can lead to the overlapping cases described above. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2022-07-15 Roger Sayle gcc/Ch

[x86 PATCH] Fix issue with x86_64_const_vector_operand predicate.

2022-07-16 Thread Roger Sayle
out --target-board=unix{-m32}, with no new failures. Ok for mainline? 2022-07-16 Roger Sayle gcc/ChangeLog * config/i386/predicates.md (x86_64_const_vector_operand): Check the operand's mode matches the specified mode argument. Thanks in advance, Roger -- diff --git a/gc

[middle-end PATCH] PR c/106264: Silence warnings from __builtin_modf et al.

2022-07-16 Thread Roger Sayle
ew failures. Ok for mainline? 2022-07-16 Roger Sayle gcc/ChangeLog PR c/106264 * builtins.cc (fold_builtin_frexp): Set TREE_NO_WARNING on COMPOUND_EXPR to silence spurious warning if result isn't used. (fold_builtin_modf): Likewise. (do_mpfr_remquo):

[AVX512 PATCH] Add UNSPEC_MASKOP to kupck instructions in sse.md.

2022-07-16 Thread Roger Sayle
ions. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2022-07-16 Roger Sayle gcc/ChangeLog * config/i386/sse.md (kunpckhi): Add UNSPEC_MASKOP unspec.

[x86_64 PATCH] PR target/106231: Optimize (any_extend:DI (ctz:SI ...)).

2022-07-16 Thread Roger Sayle
failures. Ok for mainline? 2022-07-16 Roger Sayle gcc/ChangeLog PR target/106231 * config/i386/i386.md (*ctzsidi2_ext): New insn_and_split to recognize any_extend:DI of ctz:SI which is implicitly extended. (*ctzsidi2_ext_falsedep): New define_insn to model a DImode

[x86 PATCH] PR target/106303: Fix TImode STV related failures.

2022-07-23 Thread Roger Sayle
rther changes. As each chain is removed from consideration, it in turn may affect whether other insns/chains can safely be converted. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32}, with no new failures. Ok

[x86 PATCH take #3] PR target/91681: zero_extendditi2 pattern for more optimizations.

2022-07-23 Thread Roger Sayle
le word is constructed from its high and low parts, but the wrong way around. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without -target_board=unix{-m32}, with no new failures. Ok for mainline? 2022-07-23 Roger Sayle

[Documentation] Correct RTL documentation: (use (mem ...)) is allowed.

2022-07-23 Thread Roger Sayle
ine (to document the actual current behavior)? 2022-07-23 Roger Sayle gcc/ChangeLog * doc/rtl.texi (use): Document that the operand may be a MEM. Roger -- diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi index 43c9ee8..995c8be 100644 --- a/gcc/doc/rtl.texi +++ b/gcc/doc/rtl.tex

[PATCH] Add new target hook: simplify_modecc_const.

2022-07-26 Thread Roger Sayle
end patch, so for now I'm only looking for approval of the middle-end infrastructure pieces. The x86 hunks below are provided as context/documentation for how this hook could/should be used (but I wouldn't object to pre-approval of those bits by Uros). Ok for mainline? 2022-07-26 Roger Say

[PATCH] middle-end: More support for ABIs that pass FP values as wider ints.

2022-07-26 Thread Roger Sayle
2022-07-26 Roger Sayle gcc/ChangeLog PR target/104489 * calls.cc (emit_library_call_value_1): Enable the FP return value of a libcall to be returned as a wider integer, by converting the int result to be converted to the desired floating point mode. (sto

RE: [PATCH] Add new target hook: simplify_modecc_const.

2022-07-26 Thread Roger Sayle
ntation of the SUBREG rtx specifies. If you don't believe that op0 and op1 can ever both be const_int in this function, perhaps consider it harmless dead code and humor me. Thanks in advance, Roger -- > -Original Message- > From: Segher Boessenkool > Sent: 26 July 2022 18:45

RE: [PATCH] Add new target hook: simplify_modecc_const.

2022-07-27 Thread Roger Sayle
Hi Segher, > Thank you for telling the maintainer of combine the basics of what all of this > does! I hadn't noticed any of that before. You're welcome. I've also been maintaining combine for some time now: https://gcc.gnu.org/legacy-ml/gcc/2003-10/msg00455.html > They can be, as clearly docum

[PATCH] Some additional zero-extension related optimizations in simplify-rtx.

2022-07-27 Thread Roger Sayle
nd without --target_board=unix{-m32}, with no new failures. Testing with CSiBE shows these transformations trigger on several source files (and with -Os reduces the size of the code). Ok for mainline? 2022-07-27 Roger Sayle gcc/ChangeLog * simplify_rtx.cc (simplify_unary_operation_1)

[x86_64 PATCH] PR target/106450: Tweak timode_remove_non_convertible_regs.

2022-07-28 Thread Roger Sayle
_check_non_convertible_regs on each TImode register operand in the single_set's SET_SRC. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32}, with no new failures. Ok for mainline? 2022-07-28 Roger Sayle

[x86 PATCH] Support logical shifts by (some) integer constants in TImode STV.

2022-07-28 Thread Roger Sayle
-linux-gnu with make bootstrap and make -k check. both with and without --target_board=unix{-m32}, with no new failures. Ok for mainline? 2022-07-28 Roger Sayle gcc/ChangeLog * config/i386/i386-features.cc (compute_convert_gain): Add gain for converting suitable TImode shif

[x86_64 PATCH] Add rotl64ti2_doubleword pattern to i386.md

2022-07-28 Thread Roger Sayle
rencing. The much bigger win is that (eventually) all TImode mode shifts and rotates by constants will become potential candidates for TImode STV. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check with no new failures. Ok for mainline? 2022-07-

RE: [PATCH] Some additional zero-extension related optimizations in simplify-rtx.

2022-07-28 Thread Roger Sayle
Hi Segher, > On Wed, Jul 27, 2022 at 02:42:25PM +0100, Roger Sayle wrote: > > This patch implements some additional zero-extension and > > sign-extension related optimizations in simplify-rtx.cc. The original > > motivation comes from PR rtl-optimization/71775, where i

RE: [PATCH] Some additional zero-extension related optimizations in simplify-rtx.

2022-07-29 Thread Roger Sayle
Hi Segher, > > > To implement this, and some closely related transformations, we > > > build upon the existing val_signbit_known_clear_p predicate. In the > > > first chunk, nonzero_bits knows that FFS and ABS can't leave the > > > sign-bit bit set, > > > > Is that guaranteed in all cases? Also

[x86_64 PATCH take #2] PR target/106450: Tweak timode_remove_non_convertible_regs.

2022-07-30 Thread Roger Sayle
failures. Ok for mainline? 2022-07-30 Roger Sayle H.J. Lu gcc/ChangeLog PR target/106450 * config/i386/i386-features.cc (timode_check_non_convertible_regs): Do nothing if REGNO is set in the REGS bitmap, or is a hard reg

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