This patch adds a pre-reload splitter to arc.md, to use the bset (set
specific bit instruction) to implement 1<<x (i.e. left shifts of one)
on ARC processors that don't have a barrel shifter.
Currently,
int foo(int x) {
return 1 << x;
}
when compiled with -O2 -mcpu=em is compiled as a loop:
foo: mov_s r2,1 ;3
and.f lp_count,r0, 0x1f
lpnz 2f
add r2,r2,r2
nop
2: # end single insn loop
j_s.d [blink]
mov_s r0,r2 ;4
with this patch we instead generate a single instruction:
foo: bset r0,0,r0
j_s [blink]
Finger-crossed this passes Claudiu's nightly testing. This patch
has been minimally tested by building a cross-compiler cc1 to
arc-linux hosted on x86_64-pc-linux-gnu with no additional failures
seen with make -k check. Ok for mainline? Thanks in advance.
2023-10-15 Roger Sayle <ro...@nextmovesoftware.com>
gcc/ChangeLog
* config/arc/arc.md (*ashlsi3_1): New pre-reload splitter to
use bset dst,0,src to implement 1<<x on !TARGET_BARREL_SHIFTER.
Cheers,
Roger
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