On 04 Sep 2015, at 01:54, Segher Boessenkool wrote:
> On Thu, Sep 03, 2015 at 05:25:43PM +0100, Kyrill Tkachov wrote:
>>> void g(void);
>>> void f(int *x) { if (*x & 2) g(); }
>
>> A testcase I was looking at is:
>> int
>> foo (int a)
>> {
>> return (a & 7) != 0;
>> }
>>
>> For me this genera
Hi,
I've committed the following fix for PR 67506 as r227646 on trunk and as
r227647 on the gcc-5 branch.
The patch was tested by Kaz on sh4-linux. I've added the testcase and
briefly checked it with make all and
make -k check RUNTESTFLAGS="compile.exp=pr67506.c --target_board=sh-sim
\{-m2/-ml,-
Hi,
The attached patch fixes PR 67061.
Tested on sh-elf trunk r227682 with
make -k check RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
Committed to trunk as r227750.
Will backport to GCC 5 branch later.
Cheers,
Oleg
gcc/ChangeLog:
PR
On Jan 8, 2016, at 4:39 AM, Mike Frysinger wrote:
> This file fails when building for SuperH as it assumes __SHMEDIA__ is
> always defined. Update the code to check if it's defined.
This is OK for trunk. Thanks for spotting it.
Cheers,
Oleg
> ---
> include/longlong.h | 4 ++--
> 1 file chang
On Jan 8, 2016, at 7:18 AM, Mike Frysinger wrote:
> On 08 Jan 2016 06:54, Oleg Endo wrote:
>> On Jan 8, 2016, at 4:39 AM, Mike Frysinger wrote:
>>> This file fails when building for SuperH as it assumes __SHMEDIA__ is
>>> always defined. Update the code to check i
Hi Bernd,
On Sun, 2014-12-07 at 15:17 +0100, Bernd Edlinger wrote:
> Hi Oleg,
>
>
> your checking from 2013-06-15 duplicated contents of the following files:
>
>
> ./gcc.target/h8300/pragma-isr2.c
> ./gcc.target/h8300/pragma-isr.c
> ./gcc.target/h8300/h8300.exp
>
>
> it is therefore unlikely
On Tue, 2014-12-02 at 10:23 -0800, Mike Stump wrote:
> No. It is reasonable for the test suite to fail when the
> implementation of gcc is wrong (unclean) or newlib startup code is
> wrong (unclean). Since that is what happened, the fix is to fix the
> cleanliness problem.
>
> I’ve read through
Hi,
This fixes an SH64 problem which was introduced in r185534 and went
unnoticed until recently. There, the extendqihi2 insn was converted to
an expander and the TARGET_SH1 condition was wrongly omitted. Tested
with 'make all-gcc' on sh-elf and sh64-elf. Committed on trunk as
r218469, on 4.9 a
Hi,
After the changes regarding the FPSCR handling, some SH test cases
started to fail. This fixes one of them. Tested with
make -k check-gcc RUNTESTFLAGS="sh.exp --target_board=sh-sim\{-m4/-ml}"
to verify that the test case passes again. Committed as r218472.
Cheers,
Oleg
gcc/testsuite/Chang
On Sun, 2014-11-30 at 20:08 +0100, Oleg Endo wrote:
> Hi,
>
> In libgcc/lib1funcs.S the usage of the __SHMEDIA__ macro seems to
> mismatch the setup in sh/sh-c.c (sh_cpu_cpp_builtins). __SHMEDIA__ is
> always defined when building for SH5 / SH64, even when the subtarget is
>
Hi,
This documents the new SH FPSCR built-in functions.
Tested with 'make info dvi pdf', committed as r218551.
Cheers,
Oleg
gcc/ChangeLog:
PR target/53513
* doc/extend.texi (__builtin_sh_get_fpscr, __builtin_sh_get_fpscr):
Document it.
Index: gcc/doc/extend.texi
=
Hi,
This mentions the SH changes for GCC 5 that have happened so far.
Committed.
Cheers,
Oleg
Index: htdocs/gcc-5/changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-5/changes.html,v
retrieving revision 1.49
diff -u -r1.49 changes
On Wed, 2014-12-10 at 01:24 +0100, Oleg Endo wrote:
> Hi,
>
> This documents the new SH FPSCR built-in functions.
> Tested with 'make info dvi pdf', committed as r218551.
>
> Cheers,
> Oleg
>
> gcc/ChangeLog:
> PR target/53513
>
Hi,
The attached patch fixes symbol matching in the sh/sp-switch.c testcase
to allow zero or more prefix underscores. This should make the test
pass on sh4-linux.
Tested on sh-sim with
make check-gcc RUNTESTFLAGS="sh.exp=sp-switch.c --target_board=sh-sim
\{-m4/-ml}"
and
make check-gcc RUNTESTFLAG
assembler-times "\[^_\]fpscr" 4 } } */
extern void foo (void);
Index: gcc/testsuite/gcc.target/sh/attr-isr-trapa.c
===
--- gcc/testsuite/gcc.target/sh/attr-isr-trapa.c (revision 218705)
+++ gcc/testsuite/gcc.target/sh
Hi,
The attached patch fixes the gcc.target/sh/fpchg.c test case. The test
case actually never worked since it requires at least -O option to
output the expected fpchg insn. Moreover, scan-assembler "fpchg" would
match on the file name string in the asm output. Fixed and tested with
make check-
Hi,
The gcc.target/sh/pr54089-1.c test case started to fail for SH2A. Due
to different combine paths the expected rotcr insn is sometimes not
generated as expected at -O1. Changing it to -O2 produces the expected
insn sequences. Tested with
make -k check-gcc RUNTESTFLAGS="sh.exp=pr54089-1.c --t
On Mon, 2014-12-08 at 14:51 +0900, Kaz Kojima wrote:
> Oleg Endo wrote:
> > Kaz, could you please check if the patch doesn't break anything on
> > sh4-linux? If so, I'd like to commit this to trunk.
>
> Build and test ok on sh4-unknown-linux-gnu.
>
Now al
Hi,
When a cbranch immediately follows an SH2A nott insn, the branch
condition can be inverted and the nott insn can be deleted. This is
what the attached patch makes the sh_treg_combine pass do.
Tested with
make -k check RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/
Hi,
The test case gcc.target/sh/pr52933-2.c has been failing for a while.
This is because the sh_treg_combine pass optimizes only cbranches but
not cmoves, which on SH are zero-displacement cbranches. The attached
patch makes sh_treg_combine also handle cmoves. This eliminates the
need for some
On Thu, 2014-12-18 at 13:42 -0500, Vladimir Makarov wrote:
> Thank you very much for your work on porting LRA to SH! I know it
> is quite a challenge to do any RA work for this target.
The R0-ness (both, GP reg r0 and FP reg fr0) of the ISA taxes the
patience sometimes. Too often, I've been t
On Thu, 2014-12-18 at 10:04 +0900, Kaz Kojima wrote:
> This patch is discussed in PR55212
>
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212#c77
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212#c82
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212#c83
>
> and is to improve code quality
Hi,
It seems that quite some callers of refers_to_regno_p are interested in
testing a single register number only. The caller code can be
simplified by adding an overload for refers_to_regno_p. This is what
the patch does. No functional changes. Tested with 'make all-gcc' on
sh-elf cross confi
Hi,
This adds a test case for PR 17280. Tested with
make -k check-gcc RUNTESTFLAGS="sh-torture.exp --target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
Committed as r218998.
Cheers,
Oleg
gcc/testsuite/ChangeLog:
PR target/17280
* gcc.target/sh/tor
On Thu, 2014-12-18 at 10:04 +0900, Kaz Kojima wrote:
> This patch is discussed in PR55212
>
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212#c65
>
> and is to make LRA's register elimination work well on SH.
> The problem is SH has very limited add instructions only and expands
> rA := rB + N
Hi,
This adds another test case for the SH div0s insn utilization.
Tested with
make -k check-gcc RUNTESTFLAGS="sh.exp=pr52933* --target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
Committed as r219017.
Cheers,
Oleg
gcc/testsuite/ChangeLog:
PR target/52933
Hi,
I've noticed that the test case mentioned in the PR hasn't been
committed. Moreover, setting -Os in sh/torture/pr58314.c doesn't
accomplish anything. Tested with
make -k check-gcc RUNTESTFLAGS="sh-torture.exp=pr58314*
--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml
Hi,
Attached patch fixes the failures on SH2A that started to show recently
in the gcc.target/sh/pr51244-12.c test case. Tested with
make -k check-gcc RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
Committed as r219062.
Cheers,
Oleg
gcc/Change
On Mon, 2014-12-29 at 17:53 +, Thomas Preud'homme wrote:
> > From: Richard Biener [mailto:rguent...@suse.de]
> > Sent: Monday, December 29, 2014 5:09 PM
> >
> > OK, but what about targets without a rotation optab? Is the fallback
> > expansion reasonable in all cases?
>
> To be honest I have
On Tue, 2014-12-30 at 16:22 +0100, Richard Biener wrote:
> On December 29, 2014 7:44:13 PM CET, Oleg Endo wrote:
> >On Mon, 2014-12-29 at 17:53 +, Thomas Preud'homme wrote:
> >> > From: Richard Biener [mailto:rguent...@suse.de]
> >> > Sent: Monday, Decem
Hi,
This adds some known to work SH tests for PR 53987.
Tested with
make -k check-gcc RUNTESTFLAGS="sh.exp=pr53987-1.c --target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
Committed as r219110.
Cheers,
Oleg
gcc/testsuite/ChangeLog:
PR target/53987
Hi,
This adds some more SH tst insn test cases. Most of them are currently
failing and thus are marked as xfail. I'm working on some patches for
those cases.
Tested with
make -k check-gcc RUNTESTFLAGS="sh.exp=pr49263* --target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a
Hi,
This adds some more SH tst insn test cases. Most of them are currently
failing and thus are marked as xfail. I'm working on some patches for
those cases.
Tested with
make -k check-gcc RUNTESTFLAGS="sh.exp=pr49263* --target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a
Hi,
This adds some more SH tst and SH2A bld insn test cases. Most of them
are currently failing and thus are marked as xfail. I'm working on some
patches for those cases.
Tested with
make -k check-gcc RUNTESTFLAGS="sh.exp=pr49263* --target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,
https://gcc.gnu.org/ml/gcc-patches/2014-12/msg01730.html
On Sun, 2014-12-21 at 23:02 +0100, Oleg Endo wrote:
> Hi,
>
> It seems that quite some callers of refers_to_regno_p are interested in
> testing a single register number only. The caller code can be
> simplified by adding
On Mon, 2015-01-05 at 14:54 +, Thomas Preud'homme wrote:
> > From: Oleg Endo [mailto:oleg.e...@t-online.de]
> > Sent: Tuesday, December 30, 2014 4:25 PM
> >
> > I've just tried disabling the 'rotlhi3' pattern and __builtin_bswap16
> > expand
On Mon, 2015-01-05 at 12:48 -0700, Jeff Law wrote:
> On 01/03/15 05:18, Oleg Endo wrote:
> > https://gcc.gnu.org/ml/gcc-patches/2014-12/msg01730.html
> >
> > On Sun, 2014-12-21 at 23:02 +0100, Oleg Endo wrote:
> >> Hi,
> >>
> >> It seems that quite
On Tue, 2015-01-06 at 10:28 +0100, Christian Bruel wrote:
> Hello,
>
> We should not enter the first iteration when length is 0. Testcase
> attached. Difficult to reduce because register allocation generated
> accidentally the correct return value.
>
> testsuite OK
>
> OK for 4.9 and trunk ?
On Tue, 2015-01-06 at 13:13 +0100, Christian Bruel wrote:
> > Please use 'gen_cmpeqsi_t (len, const0_rtx)' for comparing a value
> > against zero instead of the bit test insn.
>
> OK, also then OK to replace the other occurrences of the idiom for
> coding consistency ? (not sure if I could commit
On Thu, 2014-12-18 at 10:04 +0900, Kaz Kojima wrote:
> This patch is discussed in PR55212
>
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212#c65
>
> and is to make LRA's register elimination work well on SH.
> The problem is SH has very limited add instructions only and expands
> rA := rB + N
Hi,
While doing some other work on the tst insns, I ran into the issue that
in sh-mem.cc the tstsi_t insn is emitted with the const_int operand
being the first operand. Normally reload fixes this afterwards, but
let's not stress that.
Tested with make -k check RUNTESTFLAGS="--target_board=sh-sim
Hi,
Currently reg_set_p doesn't handle sequence rtx, which I've identified
as the root cause of PR 64479. There is another alternative fix for the
PR, but I'd like to get some comments regarding letting reg_set_p also
handle sequence rtx:
Index: gcc/rtlanal.c
On Thu, 2015-01-08 at 14:18 -0700, Jeff Law wrote:
> On 01/08/15 05:23, Oleg Endo wrote:
> > Hi,
> >
> > Currently reg_set_p doesn't handle sequence rtx, which I've identified
> > as the root cause of PR 64479. There is another alternative fix for the
>
On Thu, 2012-11-01 at 02:31 -0400, Joern Rennecke wrote:
> gen_doloop_end_split creates a pattern that sets pc, hence emit_jump_insn
> has to be used instead of emit_insn.
>
> Committed as obvious.
I'd like to add a test case for this.
Attached patch was tested with
make -k check-gcc RUNTESTFLAG
On Thu, 2012-11-01 at 05:18 -0400, Joern Rennecke wrote:
> Quoting Oleg Endo :
>
> > I'd like to add a test case for this.
> >
> > Attached patch was tested with
> > make -k check-gcc RUNTESTFLAGS="sh.exp=pr55160.c --target_board=sh-sim
> > \{-m2/-ml,
Hello,
With this patch a few more cases are handled where the T bit is stored
and then re-tested again before conditional branches.
Tested on rev 193061 with
make -k check RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
and no new failures.
OK?
Hello,
This mainly reformats some of the asm output code in sh.c to use
multi-line strings.
Tested on rev 193061 with
make -k check RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
and no new failures.
OK?
Cheers,
Oleg
gcc/ChangeLog:
*
Hello,
The SH2A is actually superscalar and thus it might be better to treat it
as such for scheduling. It also is a harvard arch, but after adding it
to the TARGET_HARVARD arch, I've noticed that the macro is only used as
a parameter for instruction cache invalidation. Maybe it's better to
remo
On Sun, 2012-11-04 at 14:52 +0100, Uros Bizjak wrote:
> Hello!
>
> Vzeroupper placement patch uses MODE_EXIT to determine if vzeroupper
> has to be placed before function exit. However, when compiling
> following test
>
> --cut here--
> typedef struct objc_class *Class;
> typedef struct objc_obje
Hello,
This patch adds support for SH's rotcl instruction.
While working on it, I've noticed that the DImode left shift by one insn
was not used anymore, and instead ended up as 'x + x'. This
transformation was happening before/during RTL expansion. The fix for
it was to adjust the costs for DIm
Hello,
The sh4a-fprun.c test case was bogus. It did not really use the fsca
instruction to do any calculations, because the things it tests could be
evaluated at compile time and folded away. The test case was supposed
to be failing since rev 188149, as I introduced a bug in the commit for
PR 53
Hello,
When refactoring the SH fsca patterns to use the sincos standard name
pattern I got the order of the sin and cos operands wrong.
This obvious patch fixes it.
Tested with 'make all-gcc' and
make -k check-gcc RUNTESTFLAGS="sh.exp=sh4a-fprun* --target_board=sh-sim
\{-m4a/-ml,-m4a/-mb}"
Comm
Hello,
The documentation of the standard name pattern sincos is wrong about the
the operands for sine and cosine. Operand 0 is cosine and operand 1 is
sine, not the other way around.
The attached patch corrects this.
Tested with 'make info dvi pdf'.
Committed as obvious as rev 193424.
Cheers,
O
On Fri, 2012-12-07 at 13:37 -0600, Richard Henderson wrote:
> On 2012-12-06 02:25, Andreas Krebbel wrote:
> > ! targetm.canonicalize_comparison ((int*)&compare_code, &op0, &op1, 1);
>
> The basic approach seems sound. But this cast is distinctly uncool.
>
> And why the unused return value?
On Mon, 2012-12-10 at 11:22 -0800, Richard Henderson wrote:
> On 12/10/2012 01:50 AM, Andreas Krebbel wrote:
> > Ok. Here is an updated version trying to address the comments above.
> >
> > 2012-12-10 Andreas Krebbel
> >
> > * target.def: Define canonicalize_comparison hook.
> > * targ
Hi,
On Mon, 2013-04-29 at 11:31 +0200, Christian Bruel wrote:
> Hello,
>
> This patches set the correct operand mode for tstsi_t_zero_extract_eq,
> to avoid reload generating a move between a constant and a void register.
>
> Reg tested for sh-elf. No performance impact
Unfortunately after your
Hi,
Some of the SH div0s integer sign comparison cases stopped working. The
attached patch fixes that.
Tested on rev 198595 with
make -k check RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
and no new failures.
OK?
Cheers,
Oleg
gcc/ChangeLog
On Sun, 2013-05-05 at 22:56 +0900, Kaz Kojima wrote:
> Oleg Endo wrote:
> > The operand mode in the tstsi_t_zero_extract_eq pattern was void on
> > purpose to match any mode (at least QI HI SI DI). The attached patch
> > fixes that.
> > OK for trunk and 4.8 if it
Hello,
The attached patch restores the SH fma combine patterns which I removed
when adding support for the fma patterns in 4.8.
It turned out that without these patterns things like 'a * b + a' won't
utilize the fmac instruction.
As far as I understand, this is actually a tree optimization issue,
Hi,
I've noticed that testsuite/gcc.dg has some ISR related test cases that
probably should have went to testsuite/gcc.target. The tests in
question were mainly for SH, with two of them being used also for
H8/300.
Attached patch is supposed to fix that, also fixing some formatting
issues and tar
Hello,
I'd like to fix this ancient PR.
The attached patch picks up the suggested changes mentioned in comment
#3 to avoid changing the FPSCR.FR bit in the sdivsi3_i4 and udivsi3_i4
library functions. As mentioned in the PR, this makes integer division
a bit slower when using -mdiv=call-fp, but i
On Thu, 2013-06-06 at 16:29 -0400, Jason Merrill wrote:
> On 06/06/2013 01:47 PM, Andrew Sutton wrote:
> > I never did understand why this happens. Compiling with GCC-4.6, I get
> > these errors originating in logic.cc from an include of .
> > This is what I get:
> >
> > /usr/include/c++/4.6/cstdli
Hello,
Any comments on that one?
Original message containing the attachment is here:
http://gcc.gnu.org/ml/gcc-patches/2013-05/msg01086.html
On Mon, 2013-05-20 at 18:06 +0200, Oleg Endo wrote:
> Hi,
>
> I've noticed that testsuite/gcc.dg has some ISR related test cases that
>
Hi,
On Wed, 2014-09-10 at 15:46 -0400, Hans-Peter Nilsson wrote:
> (Thanks to people CC'ed and others forgotten; I hope I
> incorporated at least some of everyone's suggestions.)
>
> [...]
> Also, the idea of using a *combined* tree here, has been challenged,
> so I toned down the wording from th
On Fri, 2014-09-19 at 13:59 +0100, James Greenhalgh wrote:
> Hi,
>
> After https://gcc.gnu.org/ml/gcc-patches/2014-09/msg01615.html we error
> on the use of constraints in define_splits, define_expands and
> define_peephole2s. These are never looked at by the compiler, and so
> have no reason to b
On Thu, 2014-09-25 at 16:04 +0100, Nick Clifton wrote:
> Hi Alex, Hi Kaz, Hi Oleg,
>
> I am applying the patch below as an obvious fix for a typo in the
> instruction sequence of the atomic_fetch_nand_soft_imask
> pattern. I hope that this is OK with you.
Yes, ouch. Thanks!
I'll backport
On Thu, 2014-09-25 at 17:23 +0200, Oleg Endo wrote:
> On Thu, 2014-09-25 at 16:04 +0100, Nick Clifton wrote:
> > Hi Alex, Hi Kaz, Hi Oleg,
> >
> > I am applying the patch below as an obvious fix for a typo in the
> > instruction sequence of the atomic_fetch_nand_s
On Sat, 2014-09-27 at 11:10 -0700, Andi Kleen wrote:
> From: Andi Kleen
>
> In my tests the optimized glibc out of line strcmp is always faster than
> using inline rep ; cmpsb, even for small strings. The Intel optimization
> manual
> also recommends to not use it. So remove the cmpstrnsi instru
On Mon, 2013-06-17 at 10:41 +0200, Eric Botcazou wrote:
> > My mistake. It's because arm_legitimize_address cannot re-factor "[r105 +
> > r165*4 + (-2064)]" into "rx = r105 + (-2064); [rx + r165*4]". Do you
> > suggest that this kind of transformation should be done in backend? I can
> > think of
On Tue, 2013-06-18 at 18:09 +0800, Bin.Cheng wrote:
> On Tue, Jun 18, 2013 at 3:52 AM, Oleg Endo wrote:
> >
> > My observation is, that legitimizing addressing modes in the backend by
> > looking at one isolated address works, but doesn't give good results.
> > I
Hi,
the attached patch fixes volatile mem loads on SH so that they won't
result in redundant sign extensions and also utilize the available
addressing modes.
Tested on rev 200116 with
make -k check RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
On Thu, 2013-06-20 at 15:21 -0400, Jason Merrill wrote:
> Since we poison "malloc" and friends in system.h, any C++ code that
> includes a standard library header such as , which in turn
> includes , will get poisoning errors due to lines like
>
> > #undef malloc
> > using ::malloc;
>
> The s
On Wed, 2013-06-19 at 22:42 +0800, Bin.Cheng wrote:
> On Tue, Jun 18, 2013 at 10:02 PM, Oleg Endo wrote:
> >
> > No, I haven't disabled ivopt.
> >
>
> But -fno-ivopts is specified in PR50749.
> With current implementation, auto-inc-dec iterates instructio
On Sun, 2013-07-07 at 19:54 +0200, Georg-Johann Lay wrote:
> Ondrej Bilka schrieb:
>
> > http://kam.mff.cuni.cz/~ondra/gcc_misspell.patch
>
Below are some other hunks that look suspicious...
(trying not to duplicate the things already mentioned by others)
- * 1) It means that finalizers, and al
On Mon, 2013-07-08 at 16:12 +0200, Ondřej Bílka wrote:
> On Sun, Jul 07, 2013 at 09:57:05PM +0200, Oleg Endo wrote:
> > On Sun, 2013-07-07 at 19:54 +0200, Georg-Johann Lay wrote:
> > > Ondrej Bilka schrieb:
> > >
> > > > http://kam.mff.cuni.cz/~ondra/
On Sun, 2013-07-21 at 09:35 -0700, Mike Stump wrote:
> On Jul 21, 2013, at 7:32 AM, Ondřej Bílka wrote:
> > This is series of typo fixing patches. They are generated with stylepp
> > https://github.com/neleai/stylepp
> > which makes patch generation very effective.
>
> I've checked in most change
Hi,
On Fri, 2013-07-26 at 08:51 +0200, Uros Bizjak wrote:
> BTW: I am not c++ expert, but doesn't c++ offer some sort of
> abstraction to get rid of
>
> + union {
> +rtx (*argc0) (void);
> +rtx (*argc1) (rtx);
> +rtx (*argc2) (rtx, rtx);
> +rtx (*argc3) (rtx, rtx, rtx);
> +r
On Sat, 2013-07-27 at 14:52 +0200, Oleg Endo wrote:
> * I had to extend the number of max. args to 16, otherwise the SH
> backend's sync.md code wouldn't compile.
The error message was misleading. It wasn't sync.md but some other SH
insn gen func that takes 16 args. Anywa
On Mon, 2013-07-29 at 14:20 -0400, David Malcolm wrote:
> >
> > The same here and at a few other places. It may be just me not being
> > used to references... nevertheless, if someone really wants to use
> > them like this, at least make them const and you will save a night of
> > frantic debuggi
On Tue, 2013-07-30 at 11:30 +0200, Martin Jambor wrote:
> Hi,
>
> On Mon, Jul 29, 2013 at 09:02:53PM +0200, Oleg Endo wrote:
> > On Mon, 2013-07-29 at 14:20 -0400, David Malcolm wrote:
> > > >
> > > > The same here and at a few other places. It m
Hello,
Any comments?
(patch is here: http://gcc.gnu.org/ml/gcc-patches/2013-07/msg01315.html)
Cheers,
Oleg
On Sat, 2013-07-27 at 14:52 +0200, Oleg Endo wrote:
> Hi,
>
> On Fri, 2013-07-26 at 08:51 +0200, Uros Bizjak wrote:
>
> > BTW: I am not c++ expert, but doesn't
On Mon, 2013-08-05 at 11:42 -1000, Richard Henderson wrote:
> On 07/27/2013 02:52 AM, Oleg Endo wrote:
> > gcc/ChangeLog:
> > * recog.h (rtx (*insn_gen_fn) (rtx, ...)): Replace typedef with
> > new class insn_gen_fn.
> > * expr.c (move_by_pieces_1,
On Tue, 2013-08-06 at 13:27 +0200, Jan-Benedict Glaw wrote:
> Hi!
>
> On Mon, 2013-08-05 22:09:45 -, olege...@gcc.gnu.org
> wrote:
> > Author: olegendo
> > Date: Mon Aug 5 22:09:45 2013
> > New Revision: 201513
> >
> > URL: http://gcc.gnu.org/viewcvs?rev=201513&root=gcc&view=rev
> > Log:
>
On Mon, 2013-08-05 at 13:25 -1000, Richard Henderson wrote:
> On 08/05/2013 12:32 PM, Oleg Endo wrote:
> > Thanks, committed as rev 201513.
> > 4.8 also has the same problem. The patch applies on 4.8 branch without
> > problems and make all-gcc works.
> > OK for 4.8, t
On Wed, 2013-08-07 at 15:08 -0400, Michael Meissner wrote:
> On Tue, Aug 06, 2013 at 11:45:40PM +0200, Oleg Endo wrote:
> > On Mon, 2013-08-05 at 13:25 -1000, Richard Henderson wrote:
> > > On 08/05/2013 12:32 PM, Oleg Endo wrote:
> > > > Thanks, committed as rev 20
On Tue, 2013-08-06 at 22:01 -0500, Peter Bergner wrote:
> Oleg Endo wrote:
> > Speaking of GEN_FCN usage in rs6000.c. The recently added HTM builtin
> > code has one interesting piece:
> >
> > static rtx
> > htm_expand_builtin (tree exp, rtx target, bool * ex
On Mon, 2013-08-19 at 16:49 -0400, DJ Delorie wrote:
> > I'd say it's not as simple as you make it out to be. You can't blindly
> > combine operations on volatile memory.
>
> I'm not blindly combining them, I'm combining them when I know the
> hardware will do the volatile-correct thing.
>
> >
Hi,
On Mon, 2013-03-04 at 15:55 +0900, Yoshinori Sato wrote:
> It function called to divide operator.
> But libgcc.a is not include it helper functions.
>
> This patch is included those functions.
>
> diff -ru gcc-4.7.2.org/gcc/config.gcc gcc-4.7.2/gcc/config.gcc
> --- gcc-4.7.2.org/gcc/config.g
On Tue, 2013-03-05 at 00:15 +0100, Oleg Endo wrote:
> Hi,
>
> On Mon, 2013-03-04 at 15:55 +0900, Yoshinori Sato wrote:
> > It function called to divide operator.
> > But libgcc.a is not include it helper functions.
> >
> > This patch is included those functions
Hi,
This adds basic support for the SH2A clips and clipu instructions.
Tested on rev 196406 with
make -k check RUNTESTFLAGS="--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
and no new failures.
OK for trunk or 4.9?
Cheers,
Oleg
gcc/ChangeLog:
PR ta
On Wed, 2013-03-06 at 07:37 +0900, Kaz Kojima wrote:
> Oleg Endo wrote:
> > This adds basic support for the SH2A clips and clipu instructions.
> > Tested on rev 196406 with
> > make -k check RUNTESTFLAGS="--target_board=sh-sim
> > \{-m2/-ml,-m2/-mb,-m2a/-mb,-
Hi,
This is the patch that I posted in the PR and that was pre-approved by
Kaz, with some documentation bits added.
Tested with 'make info dvi pdf' and 'make all'.
Applied as revision 196484.
Will backport it to 4.7 branch.
Cheers,
Oleg
gcc/ChangeLog:
PR target/56529
* config/s
On Wed, 2013-03-06 at 01:43 +0100, Oleg Endo wrote:
> Hi,
>
> This is the patch that I posted in the PR and that was pre-approved by
> Kaz, with some documentation bits added.
>
> Tested with 'make info dvi pdf' and 'make all'.
> Applied as revision
Hi,
This adds the reduced test case from the PR to the test suite.
Tested with
make -k check-gcc RUNTESTFLAGS="compile.exp=pr40797*
--target_board=sh-sim
\{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
OK for trunk?
Cheers,
Oleg
testsuite/ChangeLog:
PR target/40797
Hi,
Initially I just wanted to simplify two lines as mentioned in the PR.
However, when I started writing the test cases a small can of worms
popped up.
'-m4 -mdiv=call-div1' would not link on bare metal configs because of
missing functions in libgcc, '-m2a -mdiv=call-fp' would ICE and/or not
link
Hi,
On Sat, 2013-03-23 at 21:18 -0700, Wei Mi wrote:
> This is the patch to add the shift truncation in
> simplify_binary_operation_1. I add a new hook
> TARGET_SHIFT_COUNT_TRUNCATED which uses enum rtx_code to decide
> whether we can do shift truncation. I didn't use
> TARGET_SHIFT_TRUNCATION_MAS
Hi,
I've backported this one
http://gcc.gnu.org/ml/gcc-patches/2012-03/msg01970.html
to the 4.7 branch.
Cheers,
Oleg
gcc/ChangeLog:
Backport from mainline:
2012-04-03 Kaz Kojima
* config/sh/t-sh (MULTILIB_MATCHES): Match m2a-single-only
to m2a-single instead
On Wed, 2013-03-13 at 12:05 +0900, Kaz Kojima wrote:
> Oleg Endo wrote:
> > The attached patch should make the -mdiv= option work as it is described
> > in the documentation (which I updated recently as part of PR 56529).
> >
> > Tested with 'make all' and
&g
Hello,
This one mentions the fixed SH -mdiv option in the changes for 4.8 and
4.7. OK?
Cheers,
Oleg
? www_sh_mdiv.patch
Index: htdocs/gcc-4.7/changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.7/changes.html,v
retrieving revis
Jonathan,
now that we're in stage 1 again, I'd like to revive the issue below. Do
you have any particular plans? How should we proceed?
Cheers,
Oleg
On Wed, 2014-01-29 at 23:45 +0100, Oleg Endo wrote:
> On Wed, 2014-01-29 at 21:38 +, Jonathan Wakely wrote:
> > On 29
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