On 04 Sep 2015, at 01:54, Segher Boessenkool <[email protected]> wrote:
> On Thu, Sep 03, 2015 at 05:25:43PM +0100, Kyrill Tkachov wrote:
>>> void g(void);
>>> void f(int *x) { if (*x & 2) g(); }
>
>> A testcase I was looking at is:
>> int
>> foo (int a)
>> {
>> return (a & 7) != 0;
>> }
>>
>> For me this generates:
>> and w0, w0, 7
>> cmp w0, wzr
>> cset w0, ne
>> ret
>>
>> when it could be:
>> tst w0, 7
>> cset w0, ne
>> ret
>
> Interesting, thanks.
>
> That testcase with 4 (instead of 7) results in a single ubfx (a zero_extract)
> (this case is written differently before combine already, however).
> With 6 it does what you want (combine does not handle it as an extract,
> no matter what the docs say); and 7 is as you say (combine tries the extract,
> there is no insn like that).
I've been through this on SH. As it currently stands, to generate tst insns
basically 4 different combine patterns are required:
- lsb (e.g. & 1)
- one bit (zero extract, e.g. & 2)
- n contiguous bits (zero extract, e.g. & 7)
- everything else (e.g. 4)
Cheers,
Oleg
