;, sym->name);
length = build_decl (input_location,
VAR_DECL, get_identifier (name),
Thanks, David
On Wed, Oct 3, 2012 at 5:00 PM, Tobias Burnus wrote:
> David,
>
>
> David Edelsohn wrote:
>>
>> I am not sure why you chose a period
Another suggestion from Segher is "_F.", which is both reserve and
cannot conflict with C/C++ because identifiers cannot contain ".".
- David
On Wed, Oct 3, 2012 at 8:29 PM, Mike Stump wrote:
> On Oct 3, 2012, at 4:49 PM, David Edelsohn wrote:
>> Another suggestion from Segher is "_F.", which is both reserve and
>> cannot conflict with C/C++ because identifiers cannot contain ".".
>
> The probl
@@ -1115,7 +1118,8 @@ static const struct attribute_spec rs600
{ NULL,0, 0, false, false, false, NULL, false }
};
-#ifndef MASK_STRICT_ALIGN
+#ifndef OPTION_MASK_STRICT_ALIGN
+#define OPTION_MASK_STRICT_ALIGN 0
#define MASK_STRICT_ALIGN 0
#endif
#ifndef TARGET_PROFILE_KERNEL
Why
On Thu, Oct 4, 2012 at 11:38 AM, Jason Merrill wrote:
> If configure doesn't think that the assembler supports weak symbols,
> rs6000.c fails to compile because ASM_WEAKEN_DECL isn't defined. So let's
> not use it in that case.
>
> OK for trunk?
This patch is okay.
Where are you compiling GCC f
Jim,
This version of the VLE support patch is an improvement, although I
still am troubled by the number of changes to rs6000.md.
And can you suggest any way to re-factor rs6000_rtx_costs()?
Andrew suggested placing all of the patterns in vle.md independently
and without my prompting. VLE reall
On Tue, Oct 9, 2012 at 6:53 PM, Segher Boessenkool
wrote:
> As David noticed, I forgot PRINT_OPERAND_PUNCT_VALID_P in the patch
> that removed %. This fixes it.
>
> Bootstrapped and regression tested on powerpc64-linux. Okay to
> apply?
> 2012-10-09 Segher Boessenkool
>
> gcc/
> * co
On Tue, Oct 9, 2012 at 6:58 PM, Michael Meissner
wrote:
> Ok, David preferred the 2 series of patches which replace all of the flags in
> target_flags to rs6000_isa_flags to the 3 series of patches, which started
> over, and added a new flag word, but did not change the existing options.
>
> In an
On Tue, Oct 9, 2012 at 7:01 PM, Michael Meissner
wrote:
> This patch is a preparation patch for the main infrastructure patch. It
> changes the types of the builtin masks and target options from unsigned/signed
> int to HOST_WIDE_INT. I built this with #2c also installed (but the two
> patches a
On Tue, Oct 9, 2012 at 7:20 PM, Michael Meissner
wrote:
> This patch adds more debugging via -mdebug=reg to the compiler, and it is the
> main way I verified that all of the options were set correctly. If you do not
> use -mdebug=reg, this patch has no effect. When I emailed this patch, I had
>
On Tue, Oct 9, 2012 at 10:47 PM, Alan Modra wrote:
> This fixes a problem with my PR45844 fix. PR45844 was due to rs6000.c
> reg_offset_addressing_ok_p testing the operand mode to determine
> whether an insn supports reg+offset addressing, but the VSX splat insn
> uses a DF/DI mode input operand.
On Tue, Oct 9, 2012 at 7:37 PM, Michael Meissner
wrote:
> No before I go an redo the main part of patch #2, I have a question, which
> people prefer.
>
> The current code has sequences of:
>
> target_flags |= MASK_FOO; /* set -mfoo */
> if ((target_flags_explicit & MASK_F
AIX bootstrap is broken after this change.
This patch also should not have been approved for GCC 4.7 branch
without wider testing on trunk.
Would you please revert this patch while you figure out how to provide
the previous libstdc++ build behavior?
Thanks, David
On Thu, Oct 11, 2012 at 2:17 PM, Pavel Chupin wrote:
> How about this patch?
>
> 2012/10/11 Rainer Orth :
>> Pavel Chupin writes:
>>
>>> Could you try this fix?
>>
>> Duplicating this much info from libgcc is certainly the wrong (read:
>> unmaintainable) approach.
The patch allows AIX to bootstr
On Fri, Oct 12, 2012 at 1:17 PM, Janis Johnson wrote:
> On 10/12/2012 08:05 AM, Joe Seymour wrote:
>> I'm observing vect/pr48765.c fail for non 64-bit PowerPC targets:
>>
>>> gcc/testsuite/gcc.dg/vect/pr48765.c:1:0: error: -m64 not supported in this
>> configuration
>>
>> This patch restricts the
On Fri, Oct 12, 2012 at 10:59 AM, Paolo Carlini
wrote:
> On 10/12/2012 04:20 PM, Pavel Chupin wrote:
>>
>> Please see attached patch (applicable after revert).
>> I've moved libgcc libstdc++ common configure thread header chunk into
>> separate gthr.m4.
>> Could you please try it on AIX?
>>
>> Is
Mike,
This patch is okay with the appropriate changes to adapt to the common
infrastructure improvements.
We will continue to iterate on this.
Are there any testcases that would be useful? A lot of other testcases
use target flags, so those probably will point out problems.
Thanks, David
On Tu
On Wed, Oct 17, 2012 at 11:06 PM, Alan Modra wrote:
> These two tests currently fail if using gold, in the first instance
> because powerpc64 gold doesn't support mixing old dot-sym objects
> with new objects, and in the second instance because gold doesn't have
> a --no-toc-sort option. Both mac
On Thu, Oct 18, 2012 at 9:40 AM, Segher Boessenkool
wrote:
> This fixes all warnings from the machine description (mostly these
> were missing modes).
>
> Bootstrapped and tested on powerpc64-linux; no regressions. The
> testsuite covers all changed patterns.
>
> Okay for mainline?
>
>
> Segher
>
On Thu, Oct 18, 2012 at 7:06 PM, Michael Meissner
wrote:
> 2012-10-18 Michael Meissner
>
> * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Don't assume
> OPTION_MASK_STRICT_ALIGN is defined.
> (MASK_STRICT_ALIGN): If OPTION_MASK_STRICT_ALIGN is not defined,
> d
Jim,
How do you want to move forward with the VLE patch? Can you localize
more of the changes?
Thanks, David
On Tue, Oct 23, 2012 at 6:34 PM, Alan Modra wrote:
> Gold on powerpc64 doesn't support old ABI objects, but libffi contains
> old ABI assembly. This patch modifies those files to support both old
> and new ABI, and adds a builtin define to powerpc64 gcc that can be
> used to select between the AB
This also causes PR bootstrap/55067 on AIX due to the use of typedef loc_t.
Thanks, David
Joel and Ralf,
Would you please comment on this patch?
http://gcc.gnu.org/ml/gcc-patches/2012-10/msg02154.html
Thanks, David
And PR bootstrap/55068 due to assert failure in push_reload() .
Thanks, David
On Wed, Oct 24, 2012 at 8:08 PM, David Edelsohn wrote:
> And PR bootstrap/55068 due to assert failure in push_reload() .
GCC bootstrapped on AIX with your patches. Thanks for fixing the
problems so quickly.
- David
On Thu, Oct 25, 2012 at 6:56 PM, Segher Boessenkool
wrote:
> This fixes the ICE with -m32 -mpowerpc64 on many of the testcases that
> use atomics:
> Bootstrapped and tested on powerpc64-linux, -m64,-m32,-m32/-mpowerpc64;
> no new failures, and the above improvements.
>
> Okay to apply?
> 2012-10
On Thu, Oct 25, 2012 at 6:57 PM, Segher Boessenkool
wrote:
> 2012-10-25 Segher Boessenkool
>
> gcc/
> * config/rs6000/rs6000.md (sign_extend:SI patterns): Split
> the memory case off. Merge the two register cases. Change
> the condition for the memory case to require
On Wed, Aug 1, 2012 at 9:52 AM, Alan Modra wrote:
> Hi David,
> This is the last of my vendetta against the "o" constraint in the
> rs6000 backend. Remaining are a few places in rs6000.md where the
> operand predicate is offsettable_mem_operand, and one instance in
> spe.md. I believe none of th
On Tue, Oct 30, 2012 at 3:44 PM, Richard Sandiford
wrote:
> The optabs patches that I'm working on treat patterns with names like
> "insvsi" and "insvdi" as part of the public target interface.
> Those names clash with some existing rs6000.md patterns, so this patch adds
> some _internal suffixes
On Wed, Oct 2, 2013 at 7:15 PM, Michael Meissner
wrote:
> This patch disables -mvsx-timode from being set by default because of yet
> another problem with it (PR target 58587, cannot bootstrap with ada and
> --with-cpu=power7). I will need to address this in my later stage of
> secondary
> reloa
On Mon, Sep 30, 2013 at 10:04 PM, Bill Schmidt
wrote:
> This patch implements support for VSX vector loads and stores in little
> endian mode. VSX loads and stores permute the register image with
> respect to storage in a unique manner that is not truly little endian.
> This can cause problems (f
On Sun, Oct 6, 2013 at 1:32 PM, Bill Schmidt
wrote:
> This patch corrects the expansion of vec_perm_constv16qi for
> powerpc64le. The explanation of the problem with a detailed example
> appears in the commentary, as this corrects for what I found to be
> surprising behavior in the implementation
On Wed, Oct 9, 2013 at 7:11 PM, Bill Schmidt
wrote:
> Hi,
>
> This is a follow-up to the recent patch that fixed constant permute
> control vectors for little endian. When the control vector is constant,
> we can adjust the constant and use a vperm without increasing code size.
> When the control
On Fri, Oct 11, 2013 at 8:48 AM, Bill Schmidt
wrote:
> Hi,
>
> In my previous patch to split LE VSX loads and stores to introduce
> permutes, I managed to miss the vector float modes. This patch corrects
> the oversight, fixing up a few more test failures.
>
> Bootstrapped and tested on both powe
Jakub Jelinek writes:
> On Fri, Oct 11, 2013 at 10:17:41AM +0200, Richard Biener wrote:
>> asm(".alias __sync_synchronize sync_synchronize");
>
> It is .set, but not everywhere.
> /* The MIPS assembler has different syntax for .set. We set it to
>.dummy to trap any errors. */
> #undef SET_ASM
> [gcc]
> 2013-10-11 Michael Meissner
>
> PR target/58673
> * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Only
> restrict TImode addresses to single indirect registers if both
> -mquad-memory and -mvsx-timode are used.
> (rs6000_output_move_128bi
On Mon, Oct 7, 2013 at 7:00 PM, Michael Meissner
wrote:
> On this patch, I add some infrastructure to say whether a given mode can go in
> a general purpose register, floating point register, or altivec register, and
> if it can, what kinds of addressing is legal for the mode. In addition, I
> h
On Tue, Oct 15, 2013 at 8:47 PM, Bill Schmidt
wrote:
> Simple patch to reverse the order of the input operands when
> concatenating for little endian code generation. Bootstrapped and
> tested on powerpc64-unknown-linux-gnu and powerpc64le-unknown-linux-gnu
> with no regressions. Fixes two tests
On Wed, Oct 16, 2013 at 8:22 AM, Bill Schmidt
wrote:
> For vector unpack operations, the meaning of "high" and "low" is
> reversed for little endian.
>
> Bootstrapped and tested on powerpc64{,le}-unknown-linux-gnu with no
> regressions. This fixes one test case for little endian
> (gcc.dg/vect/ve
On Wed, Oct 16, 2013 at 3:00 PM, Michael Meissner
wrote:
> On Mon, Oct 14, 2013 at 08:59:50PM -0400, David Edelsohn wrote:
>> Please use "VMX" instead of "AV", not because I am pedantic about
>> IBM's name for the feature, but "AV" is meaningless
On Wed, Oct 16, 2013 at 3:08 PM, Michael Meissner
wrote:
> I'll try "n". It probably should be something that allows CONST_DOUBLE ints
> as
> well as CONST_INT.
The 'n' constraint matches CONST_INT and CONST_DOUBLE.
- David
On Wed, Oct 16, 2013 at 7:23 PM, Sriraman Tallam wrote:
> I was unable to build a native powerpc compiler. I checked for
> build_target_node and build_optimization_node throughout and changed
> rs6000 because it had references. I did not realize
> function_specific_save and function_specific_rest
On Thu, Oct 17, 2013 at 10:43 PM, Bill Schmidt
wrote:
> Hi,
>
> In little endian mode, we managed to convert a load of the V4SI vector
> {3, 3, 3, 7} into a vspltisw of 3, apparently taking offense at the
> number 7. It turns out we only looked at the first N-1 elements of an
> N-element vector i
On Thu, Oct 3, 2013 at 5:02 PM, Vladimir Makarov wrote:
> The following patch permits today trunk to use LRA for ppc by default.
> To switch it off -mno-lra can be used.
>
> The patch was bootstrapped on ppc64. GCC testsuite does not have
> regressions too (in comparison with reload). The change
On Sun, Oct 20, 2013 at 12:00 AM, Bill Schmidt
wrote:
> Hi,
>
> For little endian, the permute control vector for unpacking high and low
> halves of a vector register must be reversed from the one used for big
> endian. Fixing this corrects 27 failing tests for
> powerpc64le-unknown-linux-gnu.
>
On Mon, Oct 21, 2013 at 8:49 AM, Bill Schmidt
wrote:
> Hi,
>
> In altivec_expand_vec_perm_const, we look for special masks that match
> the behavior of specific instructions, so we can use those instructions
> rather than load a constant control vector and perform a permute. Some
> of the masks m
On Mon, Oct 21, 2013 at 10:42 PM, Vladimir Makarov wrote:
>> I would say lets add -mlra, but make the default OFF for the time being.
>> We
>> can always switch the default later.
>
> Sure, if you know some LRA problems it should not be on default. Moreover,
> if we still have the problems when r
On Mon, Oct 21, 2013 at 8:03 PM, Bill Schmidt
wrote:
> Hi,
>
> This is a revision of my earlier patch on the subject, expanded to catch
> a few more cases and with some attendant test-case adjustments:
>
> In altivec_expand_vec_perm_const, we look for special masks that match
> the behavior of spe
* config/rs6000/altivec.md (mulv8hi3): Adjust for little endian.
Okay.
Thanks, David
PR target/58838
* config/rs6000/rs6000.md (mulsi3_internal1 and splitter): Add
TARGET_32BIT final condition.
(mulsi3_internal2 and splitter): Same.
Index: rs6000.md
===
--- rs6000.md (revision 203930)
On Wed, Oct 23, 2013 at 6:21 PM, Jan-Benedict Glaw wrote:
> Hi!
>
> When building on gcc111, I tried to use different compilers for my
> build robot. This machine has IBM's XL C compiler installed, but not
> the C++ compiler. So I used CC=xlC, g++ was auto-detected for CXX.
> This led to depmode=a
On Mon, Oct 28, 2013 at 3:17 PM, Bill Schmidt
wrote:
> Hi,
>
> These two test cases require source changes when compiled on a little
> endian target. Verified on powerpc64{,le}-unknown-linux-gnu. Ok to
> commit?
>
> Thanks,
> Bill
>
>
> 2013-10-28 Bill Schmidt
>
> * gcc.dg/vmx/gcc-bug
On Tue, Oct 15, 2013 at 5:22 PM, Joseph S. Myers
wrote:
> Bootstrapped with no regressions on x86_64-unknown-linux-gnu, and
> tested with no regressions with cross to powerpc-linux-gnu
> (soft-float). OK to commit (hook addition, rs6000/powerpc changes)?
>
> 2013-10-15 Joseph Myers
>
>
Where was this patch bootstrapped? This appears to have broken
bootstrap on PowerPC (Linux and AIX)
/nasfarm/edelsohn/src/src/libgcc/libgcov.c: In function 'gcov_exit':
/nasfarm/edelsohn/src/src/libgcc/libgcov.c:827:1: internal compiler error: in up
date_costs_from_allocno, at ira-color.c:1334
-
On Wed, Oct 30, 2013 at 6:55 PM, Bill Schmidt
wrote:
> Hi,
>
> When working around the peculiar little-endian semantics of the vperm
> instruction, our usual fix is to complement the permute control vector
> and swap the order of the two vector input operands, so that we get a
> double-wide vector
> Vladimir Makarov wrote:
> Robert, thanks for finding it and informing. You can commit the patch
> into the trunk.
Robert,
Do you have GCC SVN access? If not, please ask one of us to commit
your patch for you.
Thanks, David
On Fri, Nov 1, 2013 at 3:45 PM, Jeff Law wrote:
> On 10/31/13 14:03, Robert Suchanek wrote:
>>
>> Hi David,
>>
>> No, I do not have read/write SVN access. I know a person who could commit
>> the patch for me, however, if you can commit it, I'd be grateful.
>
> Note, I didn't see anywhere in this t
On Fri, Nov 1, 2013 at 6:00 PM, Jeff Law wrote:
> I'm not in a rush to revert... I don't plan on doing anything on the trunk
> over the weekend. I'm comfortable waiting until Monday, both to see if
> anyone else trips over whatever is going wrong and to give Robert or anyone
> else time to debu
On Thu, Oct 31, 2013 at 9:45 PM, Bill Schmidt
wrote:
> Hi,
>
> Brooks Moses reported a bug with code that sets a single element of a
> vector to a given value and the rest of the vector to zero. This is
> implemented in rs6000_expand_vector_set, which uses a vperm instruction
> to place the nonze
On Mon, Nov 4, 2013 at 8:28 AM, Bill Schmidt
wrote:
> Hi,
>
> This cleans up another case where a vector-pack operation needs to
> reverse its operand order for little endian. This fixes the last
> remaining vector test failure in the test suite when building for little
> endian.
>
> Next I'll be
On Sat, Nov 2, 2013 at 7:44 PM, Bill Schmidt
wrote:
> Hi,
>
> When I created the patch to split VSX loads and stores to add permutes
> so the register image was correctly little endian, I forgot to implement
> a known requirement. When a VSX store is split after reload, we must
> reuse the source
Hi, Steven
Thanks for investigating this. This presumably was the reason that
Vlad changed the constraint modifier for that pattern in his patch for
LRA. I don't think that using memory is an improvement, but Mike is
the best person to comment.
Thanks, David
On Sat, Nov 2, 2013 at 6:48 PM, Stev
Balaji,
I am seeing a large number of libcilkrts failures on AIX. These all
are of the form:
Executing on host: /tmp/20131103/gcc/xgcc -B/tmp/20131103/gcc/ /nasfarm/edelsohn
/src/src/gcc/testsuite/c-c++-common/cilk-plus/CK/sync_wo_spawn.c -fno-diagnosti
cs-show-caret -fdiagnostics-color=never
On Mon, Nov 4, 2013 at 2:23 PM, Vladimir Makarov wrote:
> The following patch fixes
>
>http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58967
>
> The removed code is too old. To be honest, I even don't remember why I
> added this. LRA has been changed a lot since this change and now it
> works fi
On Mon, Nov 4, 2013 at 12:34 AM, Bill Schmidt
wrote:
> Hi,
>
> This patch fixes the widening multiply high/low operations to work
> correctly in the presence of the first patch of this series, which
> reverses the meanings of multiply even/odd instructions. Here we
> reorder the input operands to
On Mon, Nov 4, 2013 at 10:21 PM, Bill Schmidt
wrote:
> Hi,
>
> This fixes the two companion patterns vec_pack_[su]fix_trunc_v2df in the
> same manner as the recent fix for vec_pack_trunc_v2df. The same fix
> obviously applies here as well. Bootstrapped and tested on
> powerpc64{,le}-unknown-linu
On Wed, Jan 20, 2016 at 9:28 AM, Jakub Jelinek wrote:
> Hi!
>
> As per discussion in the PR, I'd like to xfail this test for GCC6 and
> change it to 7.0 milestone, because it is too late/too risky to change
> this for gcc 6 now.
>
> Bootstrapped/regtested on powerpc64{,le}-linux, ok for trunk?
>
>
This patch finishes PR target/68609 to use reciprocal estimate for vector sqrt.
PR target/68609
* config/rs6000/rs6000.c (rs6000_emit_swsqrt): Add vector domain check.
* config/rs6000/vector.md (sqrt2): Call rs6000_emit_swsqrt for V4SFmode.
Thanks, David
Index: rs6000.c
=
On Thu, Jan 14, 2016 at 10:50 PM, Peter Bergner wrote:
> This patch adds support for __builtin_cpu_init(), __builtin_cpu_is() and
> __builtin_cpu_supports() builtins for PowerPC. We use the same API as the
> x86* builtins of the same name. These builtins uses the new GLIBC 2.23
> feature where w
On Wed, Jan 20, 2016 at 8:00 PM, Michael Meissner
wrote:
> This is revision 4 of the IEEE 128-bit floating point libgcc support.
>
> Since revision 3, I have removed the gcc changes that broke AIX. I rewrote
> the
> IBM extended double pack/unpack support to not use the builtin functions, but
>
On Wed, Jan 20, 2016 at 4:21 PM, Pat Haugen wrote:
> The following adds a couple missed Power9 assembler option entries.
> Bootstrapped on ppc64. Ok for trunk?
>
> -Pat
>
> 2016-01-20 Pat Haugen
>
> * config/rs6000/aix71.h (ASM_CPU_SPEC): Add entry for Power9.
> * config/rs6000/
A gcc/configure stanza to test for PowerPC mfcrf support became
tangled with Darwin test for .machine directive. This patch detangles
and separates the two tests.
I don't have a Darwin system to test.
* configure.ac (gcc_cv_as_powerpc_mfcrf, gcc_cv_as_machine_directive): Detangle.
Okay?
Thanks
On Thu, Jan 21, 2016 at 11:48 AM, Bill Schmidt
wrote:
> Hi,
>
> Anton Blanchard proposed a fix to his own bug report in
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63354, but never submitted
> the patch upstream. I've added a formal test case and am submitting on
> his behalf.
>
> The patch si
On Thu, Jan 21, 2016 at 12:47 PM, Bernd Schmidt wrote:
> On 01/18/2016 08:30 PM, David Edelsohn wrote:
>>
>> Bootstrapped on powerpc-ibm-aix7.1.2.0 with and without the corrected
>> assembler.
>>
>> Okay?
>
>
> The changes seem to be in *-*-aix blocks
On Thu, Jan 21, 2016 at 6:00 PM, Bill Schmidt
wrote:
> Hi,
>
> The test case gcc.target/powerpc/p8vector-builtin-8.c needs to be
> restricted to targets that support the __int128 keyword. This was
> wrongly being attempted with { dg-do compile { target int128 } } when
> what's really wanted is {
On Fri, Jan 22, 2016 at 12:42 AM, Bill Schmidt
wrote:
> Hi,
>
> On Thu, 2016-01-21 at 21:21 -0600, Bill Schmidt wrote:
>> The testcase will need a slight adjustment, as currently it fails on
>> powerpc64 with -m32 testing. Working on a fix.
>>
>> Bill
>>
>
> This patch adjusts the gcc.target/powe
On Sun, Jan 24, 2016 at 9:17 PM, Bill Schmidt
wrote:
> Hi Jan, thanks for the report! Patch below that should fix the problem.
> Bootstrapped and tested on powerpc64le-unknown-linux-gnu, no
> regressions. David, is this ok for trunk?
>
> Thanks,
> Bill
>
>
> 2016-01-24 Bill Schmidt
>
>
On Mon, Jan 25, 2016 at 3:34 PM, Jakub Jelinek wrote:
> Hi!
>
> The soft-fp multilib of powerpc libgcc doesn't build because of a typo
> in the conditional - the guarded code uses inline asm that assumes hard
> float.
>
> Ok for trunk?
>
> 2016-01-25 Jakub Jelinek
>
> PR target/69444
>
On Mon, Jan 25, 2016 at 9:39 PM, Segher Boessenkool
wrote:
> It turns out the 's' output modifier is used in some glibc math code,
> and is in an installed header even. So let's put it back, it is much
> less of a burden supporting it a bit longer than to deal with the fallout.
> (It is also bein
On Thu, Jan 21, 2016 at 4:25 PM, Michael Meissner
wrote:
> This is the final patch (at least so far) that turns on -mfloat128 by default
> for PowerPC Linux systems where the VSX instruction set is enabled. As I
> mentioned in the last email, because we don't build the __float128 emulator on
> ot
On Tue, Jan 26, 2016 at 2:15 PM, Jakub Jelinek wrote:
> Hi!
>
> As Alan mentioned in the PR, there is some other issue still around, but
> by the time I've noticed that, I already had this patch being
> bootstrapped/regtested on powerpc64{,le}-linux (which just passed).
> Ok for trunk and deal wit
On Tue, Jan 26, 2016 at 4:46 PM, Bill Schmidt
wrote:
> Hi,
>
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69479 notes that
> gcc.dg/and-1.c fails a scan-assembler-not test for nand, but the test
> does pass in subsequent releases. The test author indicates in comment
> #1 that we can just remov
On Tue, Jan 26, 2016 at 4:46 PM, Bill Schmidt
wrote:
> Hi,
>
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69479 notes that
> gcc.dg/and-1.c fails a scan-assembler-not test for nand, but the test
> does pass in subsequent releases. The test author indicates in comment
> #1 that we can just remov
The new sra-17.c and sra-18.c tests fail on AIX because the regex is
too restrictive -- AIX labels don't have exactly the same format. On
AIX, the labels in the dumps look like "LC..0" instead of ".LC0".
This patch adds "*" and ".*" so that the "." prepended to LC is
optional and to allow charact
On Wed, Jan 27, 2016 at 6:36 PM, Jeff Law wrote:
> On 01/27/2016 12:39 PM, David Edelsohn wrote:
>>
>> The new sra-17.c and sra-18.c tests fail on AIX because the regex is
>> too restrictive -- AIX labels don't have exactly the same format. On
>> AIX, the labe
On Wed, Jan 27, 2016 at 5:38 PM, Martin Sebor wrote:
> The attached patch adds a test for the apparently long fixed
> bug.
>
> FWIW, I've been trying to close out some of these old bugs and
> while it doesn't seem to be done consistently, it occurs to me
> that it might be nice to add tests for th
On Wed, Jan 27, 2016 at 6:10 PM, Pat Haugen wrote:
> The following patch prevents static prediction if we don't have real profile
> data. Testing on SPEC CPU2006 showed a couple improvements in specint and
> specfp neutral. Bootstrap/regtest on powerpc64 with no new regressions. Ok
> for trunk?
>
On Thu, Jan 28, 2016 at 5:41 PM, Bill Schmidt
wrote:
> Hi,
>
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65546 identifies a failure
> in gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c. The test case hasn't
> kept up with changes in the vectorizer, so it's looking for the wrong
> error message.
On Fri, Jan 29, 2016 at 11:38 AM, Alan Modra wrote:
> Since 4c4a180d, LTO has turned off flag_pic when linking a fixed
> position executable. This results in flag_pic being zero in
> rs6000_file_start, and no definition of ".LCTOC1".
>
> However, when we get to actually emitting code, flag_pic ma
On Fri, Jan 29, 2016 at 11:38 AM, Alan Modra wrote:
> Since 4c4a180d, LTO has turned off flag_pic when linking a fixed
> position executable. This results in flag_pic being zero in
> rs6000_file_start, and no definition of ".LCTOC1".
>
> However, when we get to actually emitting code, flag_pic ma
On Sun, Jan 31, 2016 at 5:28 PM, Alan Modra wrote:
> lqarx RT and stqcx. RS are valid only with even numbered gprs. The
> predicate to enforce this happens to allow a loophole, closed by this
> patch.
>
> This pattern created by combine:
> Trying 8 -> 9:
> Successfully matched this instruction:
>
this patch fixes bootstrap on FreeBSD PowerPC and hopefully all other
PowerPC targets which do not have float128 support.
The patch itself is a bandaid to survive stage4. We have to come up
with a better solution for FreeBSD and all other soft float targets
which do not support float128.
The patc
On Wed, Feb 3, 2016 at 5:28 PM, Jakub Jelinek wrote:
> Hi!
>
> rs6000_expand_atomic_compare_and_swap uses oldval directly in
> a comparison instruction, but oldval might be a CONST_INT not suitable
> for the instruction (such as in the testcase below in SImode comparison
> 0x8000 constant). We ne
On Wed, Feb 3, 2016 at 6:34 PM, Michael Meissner
wrote:
> In PR 69461, Vlad mentioned that in rs6000_legitimate_address_p, I was trying
> to validate an address for TOC fusion, but I was using a predicate that looked
> for a MEM instead of an address.
>
> I bootstrapped the compiler on a little en
On Thu, Feb 4, 2016 at 6:33 AM, Alan Modra wrote:
> On Wed, Feb 03, 2016 at 05:34:17PM -0500, David Edelsohn wrote:
>> On Wed, Feb 3, 2016 at 5:28 PM, Jakub Jelinek wrote:
>> > Hi!
>> >
>> > rs6000_expand_atomic_compare_and_swap uses oldval directly in
>&
On Thu, Feb 4, 2016 at 3:39 PM, Michael Meissner
wrote:
> This patch fixes a bug where LRA would abort when compiling a C++ program with
> -mlra. I tracked this down to using the "ws" constraint for TFmode, TDmode,
> and IFmode, but those types are limited to just the traditional floating point
>
On Thu, Feb 4, 2016 at 9:33 PM, Pat Haugen wrote:
> The following patch fixes a few insns that were specifying an incorrect
> 'type' attribute.
>
> Bootstrap/regtest on powerpc64-linux with no new regressions. Ok for trunk?
>
> -Pat
>
>
> 2016-02-04 Pat Haugen
>
> * config/rs6000/crypto
On Fri, Feb 5, 2016 at 3:27 PM, Jeff Law wrote:
> On 02/05/2016 06:43 AM, Alexander Fomin wrote:
>>
>> Hi!
>>
>> Some kind of this patch was submitted about a year ago by Igor
>> Zamyatin. It's an attempt to fix PR rtl-optimization/64081 by enabling
>> RTL loop unrolling for duplicated exit blocks
Runtime linking is disabled by default on AIX, and I disabled it for libstdc++.
There are two remaining issues:
1) FDEs with overlapping ranges causing problems with exceptions. I'm
not sure of the best way to work around this. Your patch is one
possible solution.
2) AIX linker garbage collect
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